HP DV1000 Schematics

A

hexainf@hotmail.com

Leopard 3 Block Diagram

CLK GEN

3

ICS954206AG

4 4

26

1394 Conn

22,23

PCMCIA 1 SLOT

SD/MS 6 in 1

24 22

24

Power Switch

TPS2220A

PCI7411

CARDBUS 1394 SD/MS/MMC/SM

Card Slost

3 3

Mini-PCI

29

802.11a/b/g

RJ45 CONN

RJ11 CONN

26

10/100 RTL8100C

25

MODEM

MDC Card

25,26

PCI BUS

30

AC97-LINK

B

4,5

Mobile CPU

C

Project code: 91.4C901.001 PCB P/N : 48.4C901.001 REVISION : 05205-1

D

E

SYSTEM DC/DC

36

MAX1999

INPUTS

DCBATOUT

OUTPUTS

5V_S3 3V_S5

Dothan

11,12

LVDS

SVIDEO/COMP

RGB CRT

BLUE THUMB

MASTER

SLAVE

14

LCD

13

TVOUT

CRT

DAUGHTER BOARD

USB x 2 USB x 2

HDD

DVD/ CD-RW

30

21

SYSTEM DC/DC

37

INPUTS

DCBATOUT

TPS5130

OUTPUTS

1D05V_S0 1D2V_S0 1D8V_S3

MAXIM CHARGER

34

INPUTS

DCBATOUT

MAX1909

OUTPUTS

BT+

18V 4.0A

5V 100mA

CPU DC/DC

35

MAX1907

INPUTS

DCBATOUT

OUTPUTS VCC_CORE

0.844~1.3V 27A

6,7,8,9,10

Alviso

GM

16,17,18,19

ICH6-M

DDR2*2 533MHz

Host BUS 400/533MHz

DMI I/F 100MHz

USB 2.0

P IDE

13

2 2

MIC IN

AC'97 CODEC

27

AD1981B

PCI EXPRESS/ USB2.0

LPC Bus

EXPRESSCARD

LINE OUT

13

KBC

NS97551

29 3231

Comsumer IR

31\

Touch Pad

C

OP AMP

28

Docking

G1420BF3U

2CH SPEAKER

1 1

A

B

31

Int. KB

X-BUS

Thermal & Fan

G768D

19

FlashRom

4Mb (512kB)

LPC Debug Conn

D

33

21

PCB LAYER

Signal 1

L1:

GND

L2:

Signal 2

21

Power Switch

TPS2231

Title

Size Document Number Rev

A3

Date: Sheet

Block Diagram

L3:

Signal 3

L4:

VCC

L5:

Signal 4

L6:

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

141Tuesday, July 19, 2005

E

-1

of

-1

A

B

C

D

E

ICH6-M Integrated Pull-up and Pull-down Resistors

ACZ_BIT_CLK, EE_DOUT, EE_CS, GNT[5]#/GPO[17], GNT[6]#/GPO[16],

4 4

LAD[3:0]#/FB[3:0]#, LDRQ[0], PME#, PWRBTN#,

LAN_RXD[2:0]

ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ACZ_SDOUT,ACZ_BITCLK, SPKR

USB[7:0][P,N]

DD[7],

LAN_CLK

3 3

ICH6-M IDE Integrated Series

DPRSLP#, EE_DIN,

TP[3]

SDDREQ

LDRQ[1]/GPI[41],

DPRSLPVR,

ICH6 internal 20K pull-ups

ICH6 internal 10K pull-ups

ICH6 internal 20K pull-downs

ICH6 internal 15K pull-downs

ICH6 internal 11.5K pull-downs

ICH6 internal 100K pull-downs

ICH6-M EDS 14308 0.8V1

Termination Resistors

DD[15:0], DDACK#, DCS3#,

IORDY,

IDEIRQ

DIOR#, DREQ,DIOW#,

DA[2:0],

DCS1#,

approximately 33 ohm

Power name description

5V_S0= 5 Voltage power up on system work(S0 state) 5V_S3= 5 Voltage suspend to RAM(S3 state) 5V_S5= 5 Voltage soft off(S5 state) 3D3V_S0= 3.3 Voltage power up on system work(S0 state) 3D3V_S3= 3.3 Voltage suspend to RAM(S3 state) 3D3V_S5= 3.3 Voltage soft off(S5 state) LVDDR_1D8V= 1.8 Voltage power up on system work(S0 state) 1D8V_S3= 1.8Voltage suspend to RAM(S3 state) 2D5V_S0= 2.5 Voltage power up on system work(S0 state)

VCC_CORE_S0= CPU VID Voltage power up on system work(S0 state) 1D5V_VCCA_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S5= 1.5 Voltage soft off(S5 state) DDR_VREF_S3= 0.9 Voltage suspend to RAM(S3 state) 0D9V_S0= 1.25 Voltage power up on system work(S0 state) 1D2_VGA_S0= 1.2 Voltage power up on system work(S0 state) for VGA 1D05V_S0= 1.05 Voltage power up on system work(S0 state) CORE_GMCH_S0= 1.05 Voltage power up on system work(S0 state) for ALVISO core power VCCP_GMCH_S0= 1.05 Voltage power up on system work(S0 state)for ALVISO BUSIO power

PCI RESOURCE TABLE

2 2

1 1

A

B

C

DEVICE IDSEL

Mini-PCI

Cardbus Controller TI7411

LAN

Blue Thumb

D

AD21

AD22

AD23

AD24

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

PCI IRQ

P_INTE#

(CARBUS)P_INTG# (1394)P_INTF# (CARD READER)P_INTG#

P_INTE#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ITP

Leopard 3

REQ# / GNT#

REQ0#/GNT0#

REQ1#/GNT1#

REQ2#/GNT2#

241Tuesday, July 12, 2005

E

-1

of

-1

A

hexainf@hotmail.com

1 2

L17

4 4

3D3V_S0

L34

1 2

MLB-201209-11

12

3D3V_APWR_S0 3D3V_48MPWR_S0

MLB-201209-11

12

C362

C362 SC10U10V6ZY-U

SC10U10V6ZY-U

C156

C156 SC4D7U10V5ZY

SC4D7U10V5ZY

12

3D3V_CLKGEN_S0

C374

C374 SCD1U16V

SCD1U16V

C373

C373 SCD1U16V

SCD1U16V

DY

12

C371

C371 SCD1U16V

SCD1U16V

B

3D3V_S03D3V_S0

12

1 2

C378

C378 SCD1U16V

SCD1U16V

R114

4D7R3

12

C379

C379 SCD1U16V

SCD1U16V

C154

C154 SC4D7U10V5ZY

SC4D7U10V5ZY

12

DY

12

C155

C155 SCD1U16V

SCD1U16V

DY

C372

C372 SCD1U16V

SCD1U16V

12

DY

C

C361

C361 SCD1U16V

SCD1U16V

12

DY

C382

C382 SCD1U16V

SCD1U16V

3D3V_S0

12

R118

R118 10KR2

10KR2

ITP_EN

R125

R125 10KR2

10KR2

DY

D

DummyR118(up side),Mounting R125(down side)

--SRC7 on

Mounting R118(up side),DummyR125(down side)

--CPU2_ITP on

E

3D3V_S0

3D3V_S05,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

CLK_PWRGD#20,36

C380

1 2

SC22P

X6

X-14D31818M-17

1 2

RN58

1

CLK_PCIE_NEW#21

3 3

CLK_PCIE_NEW21

CLK_MCH_3GPLL#7

CLK_MCH_3GPLL7

CLK_PCIE_ICH#17

CLK_PCIE_ICH17

TP57TPAD30 TP57TPAD30 TP56TPAD30 TP56TPAD30

PREQ2#21

CPU_SEL04,7 SMBC_ICH11,19

SMBD_ICH11,19

2 2

TP_SRCC6 CLK_SRCT6

TP_SRCT6 CLK_SRCC6

CLK_ICH1417

CLK_CODEC27

3D3V_S0

4

23

SRN33-2-U2

SRN33-2-U2 RN40

RN40

1

4

23

SRN33-2-U2

SRN33-2-U2 RN41

RN41

1

4

23

SRN33-2-U2

R523 0R2-0

R523 0R2-0 R524 0R2-0

R524 0R2-0 R468 22R2R468 22R2

R467 22R2R467 22R2 R522 2K2R2R522 2K2R2

DY

DY DY

DY

1 2 1 2

12 12

12

1 2

C381

C381 SC22P

SC22P

CLK_SRCC1 CLK_SRCT1

CLK_SRCC3 CLK_SRCT3

CLK_SRCC5 CLK_SRCT5

CLK_REF14

PCLK_KBC31

PM_STPPCI#17

CLK_ICHPCI17

NEAR CLKGEN

CLK_XOUT CLK_XIN

20

SRCCLKC1

23

SRCCLKC2

25

SRCCLKC3

27

SRCCLKC4_SATA

30

SRCCLKC5

32

SRCCLKC6

19

SRCCLKT1

22

SRCCLKT2

24

SRCCLKT3

26

SRCCLKT4_SATA

31

SRCCLKT5

33

SRCCLKT6

52

REF0

53

REF1/FSLC/TEST_SEL

46

SCLK

47

SDATA

51

R458

1 2

R126

1 2

10X150X249

22R2

33R2

VTT_PWRGD#/PD

34

GND2GND6GND13GND29GND45GND

GNDA

38

SS_SEL

VDDSRC21VDDSRC28VDDSRC

SEL100_96MHZ#/PCICLK_F1

9

ITP_EN

7

CPUCLKC2_ITP/SRCCLKC7

CPUCLKT2_ITP/SRCCLKT7

55

SD 0817

12

R525

R525 10KR2

10KR2

1 1

12

REQSEL

R526

R526 DUMMY-R2

DUMMY-R2

DY

A

3D3V_CLKGEN_S0

1 2

FS_B

FS_C

0

0 0

0 1 1

0 1

0

1 100M

0 1

1 1

1

R113

FS_A

10KR2

CPU

FS_A

266M

0

133M

01200M

166M

1 00333M 1

400M

0 1 Reserved

B

3D3V_APWR_S0 3D3V_48MPWR_S0 3D3V_CLKGEN_S0

11

37

42

48

VDDA

VDD48

VDDPCI1VDDPCI

VDDREF

VDDCPU

CPU_STOP#

CPUCLKC0 CPUCLKC1

CPUCLKT0 CPUCLKT1

FSLA/USB_48MHZ

FSLB/TEST_MODE

96MHZ_SSC/SRCCLKC0 96MHZ_SST/SRCCLKT0

DOTC_96MHZ DOTT_96MHZ

IREF

ITP_EN/PCICLK_F08PCI/SRC_STOP#

PCICLK256PCICLK33PCICLK44PCICLK5

5

39

CLK_IREF

REQSEL

CLK_PCI3

CLK_PCI4

CLK_PCI5

CLK_CPU_BCLK

CLK_CPU_BCLK#

close to CPU

U57

54 43 40 35

44 41 36

12 16

18 17

15 14

ICS954206AG

R115

12

475R2F

R466 33R2R466 33R2

12

R123 33R2R123 33R2

12

R124 33R2R124 33R2

12

TP87 TPAD30TP87 TPAD30 TP88 TPAD30TP88 TPAD30

CLK_CPUC1 CLK_CPUT1

CLK_CPUC2 CLK_CPUT2

CLK_CPUT0 CLK_CPUC0

FS_A

CLK_SRCC0 CLK_SRCT0

DOT96C DOT96T

C

RN61

1 2 3

SRN33-2-U2

SRN33-2-U2 RN60

RN60

2 3

DY

1

SRN33-2-U2

SRN33-2-U2 RN59

RN59

1 2 3

SRN33-2-U2

RN56

1 2 3

SRN33-2-U2

PCLK_PCM 22 PCLK_LAN 25 PCLK_MINI 29

4

R117 33R2R117 33R2

12

R116 33R2R116 33R2

12

R459 10R2R459 10R2

1 2 1 2

R460 33R2R460 33R2

SB

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

PM_STPCPU# 17,36

CLK_XDP_CPU# 4 CLK_XDP_CPU 4

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK48_USB 17 CLK48_CARDBUS 22 CPU_SEL1 4,7

DREFSSCLK# 7 DREFSSCLK 7

DREFCLK# 7 DREFCLK 7

ICS954206AG Spread Spectrum Select

SS3 SS2 SS1 SS0 Spread Amount%

000 0000

0

1

0

1 1

0

11

0 1 +-0.3

0 00

1

001

1 1

0 1

1 1

1

11

1

11

0 1 0

1

1 0

0 1

0

1

1 0

0

1 0 1

1

0

1 0 1

1

-0.8

-1.0

-1.25

-1.5

-1.75

-2.0

-2.5

-3.0

+-0.4 +-0.5 +-0.6 +-0.8 +-1.0 +-1.25 +-1.5

D

DREFCLK DREFCLK# CLK_PCIE_NEW CLK_PCIE_NEW# CLK_XDP_CPU CLK_XDP_CPU# CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK#

DREFSSCLK DREFSSCLK# CLK_MCH_3GPLL CLK_MCH_3GPLL#

CLK_PCIE_ICH CLK_PCIE_ICH#

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Clock Generator (ICS954206AG )

3D3V_S0

12

R453

R453 10KR2

10KR2

H/L: 100/96MHz

SS_SEL

12

R455

R455 10KR2

10KR2

DY

R520

DY

DY DY

DY

E

R520

49D9R2F

R521

49D9R2F

R451

49D9R2F

R452

49D9R2F

R470

49D9R2F

R465

49D9R2F

R461

49D9R2F

R464

49D9R2F

R463

49D9R2F

R462

49D9R2F

R450

49D9R2F

R457

49D9R2F

R441

49D9R2F

R442

49D9R2F

R444

49D9R2F

R443

49D9R2F

341Monday, August 15, 2005

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

1 2 1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

-1

of

-1

A

H_A#[31..3]6

U45A

62.10055.011

H_A#3

4 4

H_ADSTB#06

H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#16

H_FERR#16

H_IGNNE#16

H_STPCLK#16

H_INTR16

H_NMI16

H_SMI#16

CPU

2 2

H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

U3

ADSTB#0

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

AE5

ADSTB#1

C2

A20M#

D3

FERR#

A3

IGNNE#

C6

STPCLK#

D1

LINT0

D4

LINT1

B4

SMI#

PZ47903

ITP Conn.

ADDR GROUP 0

ADDR GROUP 1

THERMTRIP#

HCLK THERM XTP/ITP SIGNALS CONTROL

TCK(PIN 5)

TCK(PIN A13)

FBO(PIN 11)

VCCP_GMCH_S0

H_CPURST# XDP_TDO CPU_PROCHOT#

1 1

XDP_TDI XDP_TMS XDP_TRST#

XDP_TCK

1 2 1 2 1 2 1 2

R283

12

54D9R2F

R275

12

54D9R2F

R274

12

56R2J

R277

150R2

R279

39D2R2F

R278

680R2

R280

27D4R2F

All place within 2" to CPU

A

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

PROCHOT#

THERMDA THERMDC

ITP_CLK1 ITP_CLK0

BCLK1 BCLK0

B

N2 L1 J3

L4 H2 M2

N4 A4

B5 J2 B11

H_RS#0

H1

H_RS#1

K1

H_RS#2

L2 M3

K3 K4

C8 B8 A9 C9 A10

XDP_BPM#5

B10

XDP_TCK

A13

XDP_TDI

C12

TDI

A12 C11 B13 A7

B17 B18 A18

C17 A15

A16 B14 B15

B

XDP_TDO XDP_TMS XDP_TRST# DBR#

CPU_PROCHOT#

H_ADS# 6 H_BNR# 6 H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_INIT# 16 H_LOCK# 6

H_TRDY# 6 H_HIT# 6

H_HITM# 6

THERMDP1 20 THERMDN 20 PM_THRMTRIP-A# 7,16

PM_THRMTRIP-I# 7,16 CLK_XDP_CPU# 3 CLK_XDP_CPU 3 CLK_CPU_BCLK# 3 CLK_CPU_BCLK 3

VCCP_GMCH_S0

12

R289

R289 56R2J

56R2J

H_IERR#

H_CPURST# 6

H_RS#[2..0] 6

VCCP_GMCH_S0

12

R285

R285 56R2J

56R2J

VCC_CORE_S0

12

R16

R16 150R2

150R2

Dothan A: R43,R44=DUMMY Dothan B: R43,R44=0R

Place testpoint on H_IERR# with a GND

0.1" away

PM_THRMTRIP# should connect to ICH6 and Alviso without T-ing

( No stub)

CPU_SEL03,7 CPU_SEL13,7

C

VCCP_GMCH_S0

1 2

C

R23

1KR2F

H_DSTBN#06 H_DSTBP#06

H_DINV#06

H_DSTBN#16 H_DSTBP#16

H_DINV#16

0R0402-PAD

R273

1 2

R276

1 2

0R0402-PAD

12

R22

R22 2KR2F

2KR2F

CPU_SEL0_CPU CPU_SEL1_CPU

TP1TPAD30 TP1TPAD30 TP5TPAD30 TP5TPAD30 TP6TPAD30 TP6TPAD30 TP38TPAD30 TP38TPAD30

Layout Note:

0.5" max length.

BSEL[1:0] Freq.(MHz) L H 100 L L 133

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

CPU_TP3 CPU_TP4 CPU_TP5 CPU_TP6

GTLREF

PSI#

C20 D24 C26

C25 C23 C22 D25

H23 G25

M26 H24

G24 M23

N24 M25 H26 N25

C16 C14

AF7 AC1

AD26

A19 A25 A22 B21 A24 B26 A21 B20

B24 E24 B23

E23

L23

F25

K25 K24 L24

E26

J23 J25

L26

J26

E1

C3

D

U45B

62.10055.011

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12#

DATA GRP 0DATA GRP 1

D13# D14# D15# DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

PSI# BSEL0

BSEL1

MISC

RSVD2 RSVD3 RSVD4 RSVD5

GTLREF0

PZ47903

D

Y26

D32#

AA24

D33#

T25

D34#

U23

D35#

V23

D36#

R24

D37#

R26

D38#

R23

D39#

AA23

D40#

U26

D41#

V24

D42#

U25

D43#

V26

D44#

DATA GRP 2

Y23

D45#

AA26

D46#

Y25

D47#

W25

DSTBN2#

W24

DSTBP2#

T24

DINV2#

AB25

D48#

AC23

D49#

AB24

D50#

AC20

D51#

AC22

D52#

AC25

D53#

AD23

D54#

AE22

D55#

AF23

D56#

AD24

D57#

AF20

D58#

AE21

D59#

AD21

D60#

DATA GRP 3

AF25

D61#

AF22

D62#

AF26

D63#

AE24

DSTBN3#

AE25

DSTBP3#

AD20

DINV3#

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

G1

DPRSTP#

B7

DPSLP#

C19

DPWR#

SLP#

TEST1 TEST2

E4 A6

C5 F23

NO STUFF

PWRGOOD

E

VCCP_GMCH_S05,6,7,9,10,16,18,36,40,41

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0

R302 27D4R2FR302 27D4R2FTP3TPAD30 TP3TPAD30

COMP1

R301 54D9R2FR301 54D9R2F

COMP2

R25 27D4R2FR25 27D4R2F

COMP3

R24 54D9R2FR24 54D9R2F

TEST1 TEST2

12

R18

R18 1KR2

1KR2

DY

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

1 2 1 2 1 2 1 2

H_DPRSLP# 16 H_DPSLP# 16 H_DPWR# 6

H_CPUSLP# 6,16

R284

R284 1KR2

1KR2

DY

H_D#[63..0] 6

VCCP_GMCH_S0

12

R288

R288 200R2J

200R2J

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

Leopard 3

441Monday, August 15, 2005

E

H_PWRGD 16

of

VCCP_GMCH_S0

3D3V_S0

-1

A

hexainf@hotmail.com

VCC_CORE_S0 VCC_CORE_S0

4 4

3 3

2 2

1 1

AA11 AA13 AA15 AA17 AA19 AA21

AA5 AA7

AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22

AB6

AB8 AC11 AC13 AC15 AC17 AC19

AC9 AD10 AD12 AD14 AD16 AD18

AD8 AE11 AE13 AE15 AE17 AE19

AE9

AF10 AF12 AF14 AF16 AF18

AF8 D18 D20 D22

D6

D8 E17 E19 E21

E5

E7

E9 F18 F20 F22

F6

F8

G21

Layout Note:

U45C

62.10055.011

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58

PZ47903

VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71

VCCA0 VCCA1 VCCA2 VCCA3

VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8

VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24

VCCQ0 VCCQ1

VID0 VID1 VID2 VID3 VID4 VID5

VCCSENSE

VSSSENSE

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

A

G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6

F26 B1 N1 AC26

D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21

P23 W4

E2 F2 F3 G3 G4 H4

AE7 AF6

CPU_D10

1.8V is for Dothan A2 before.

1D5V OR 1D8V

Intel suggest Dothan A2 or later only use

1.5V

1D5V_VCCA_S0

SCD01U16V3KX

TP_VCCA1 TP_VCCA2 TP_VCCA3

TP_VCCSENSE

1 2

TP_VSSSENSE

R34

54D9R2F

TP2 TPAD30TP2 TPAD30 TP4 TPAD30TP4 TPAD30 TP39 TPAD30TP39 TPAD30

H_VID0 36 H_VID1 36 H_VID2 36 H_VID3 36 H_VID4 36 H_VID5 36

DY

R286

R286 0R2-0

0R2-0

12

C15

12

VCCP_GMCH_S0

12

R33

R33 54D9R2F

54D9R2F

DY

B

12

C10

SC10U10V6ZY-U

B

AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25

AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26

AC2 AC5

AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24

AD1

AD4

AD7

AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25

AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26

AF11 AF13 AF15 AF17 AF19 AF21 AF24

A11 A14 A17 A20 A23 A26 AA1 AA4 AA6 AA8

AB3 AB5 AB7 AB9

AE3 AE6 AE8

AF2 AF5 AF9

B12 B16 B19 B22 B25

C10 C13 C15 C18 C21 C24

D11

U45D

A2

VSS0

A5

VSS1

A8

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74

B3

VSS75

B6

VSS76

B9

VSS77 VSS78 VSS79 VSS80 VSS81 VSS82

C1

VSS83

C4

VSS84

C7

VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91

D2

VSS92

D5

VSS93

D7

VSS94

D9

VSS95 VSS96

PZ47903

VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191

D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24

62.10055.011

C

VCCP_GMCH_S0

12

C18

SCD1U10V2MX-1

C

3D3V_S0

12

BC53

BC53 SC1U10V3ZY

SC1U10V3ZY

DY

0.1u *10 150u *1

12

C19

SCD1U10V2MX-1

VCC_CORE_S0

12

C16

C27

SC10U6D3V5MX

1 2 3

12

SCD1U10V2MX-1

12

C17

SC10U6D3V5MX

I max = 120 mA

U44

SHDN# GND IN

G913C-U

DY

12

C22

C33

SCD1U10V2MX-1

12

C21

C23

SC10U6D3V5MX

12

C29

SET

OUT

12

5 4

C11

SCD1U10V2MX-1

12

C31

SC10U6D3V5MX

1D5V_VCCA_S0

12

SC10U6D3V5MX

C28

12

C32

SCD1U10V2MX-1

12

DY

12

C36

SC10U6D3V5MX

D

12

BC54

BC54 SC22P

SC22P

DY

BC2

BC2 SC1U10V3ZY

SC1U10V3ZY

12

C34

C20

SCD1U10V2MX-1

12

C37

DY

SC10U6D3V5MX

D

1D5V_VCCA_SET

12

R296

R296 49K9R2F

49K9R2F

DY

12

C26

SCD1U10V2MX-1

12

C39

C38

DY

SC10U6D3V5MX

SC10U10V5ZY-L

E

VCC_CORE_S04,36

VCCP_GMCH_S04,6,7,9,10,16,18,36,40,41

3D3V_S03,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

12

DY

NO STUFF

12

TC1

TC1 ST100U6D3VM-U

ST100U6D3VM-U

12

C44

12

C277

C276

DY

SC10U10V5ZY-L

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

1D5V_VCCA_S0 1D5V_S0

R295

R295 12K7R3F

12K7R3F

12

C280

C279

DY

SC10U10V5ZY-L

R17

1 2

0R2-0

12

C282

C281

DY

SC10U10V5ZY-L

CPU (2 of 2)

Leopard 3

12

C284

C283

SC10U10V5ZY-L

DY

SC10U10V5ZY-L

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

of

541Monday, August 15, 2005

of

541Monday, August 15, 2005

of

541Monday, August 15, 2005

VCC_CORE_S0

VCCP_GMCH_S0

3D3V_S0

-1

A

12/12 Trace 10 mil wide with 20 mil spacing

H_XRCOMP

12

R69

R69 24D9R2F

24D9R2F

4 4

VCCP_GMCH_S0

R70

R70 54D9R2F

54D9R2F

1 2

H_XSCOMP

VCCP_GMCH_S0

12

R67

R67 221R3F

221R3F

H_XSWING

12

R68

R68 100R2F

3 3

100R2F

1 2

C73

C73 SCD1U16V

SCD1U16V

VCCP_GMCH_S0

12

1 2

12

H_YRCOMP

R87

R87 24D9R2F

24D9R2F

R89

R89 54D9R2F

54D9R2F

H_YSCOMP

R86

R86 221R3F

221R3F

H_YSWING

R88

R88 100R2F

100R2F

1 2

C91

C91 SCD1U16V

SCD1U16V

H_D#[63..0]4 H_A#[31..3] 4

12/12 Trace 10 mil wide with 20 mil spacing

Alviso Strapping Signals and Configuration

Pin Name

CFG[2:0]

CFG[4:3] Reserved CFG5 DMI x2 Select

2 2

CFG6 Reserved 0 = DDR2

CFG7

CFG8

CFG9

CFG[11:10] CFG[13:12]

CFG[15:14] Reversed CFG16

CFG17 CFG18

1 1

CFG19

CFG20 SDVOCRTL

_DATA

All strap signals are sampled with respect to the leading

NOTE:

edge of the Alviso GMCH PWORK In signal.

Strap Description Configuration

CPU Strap

Reserved PCI Express Graphics

Lane Reversal Reserved XOR/ALL Z test

straps

FSB Dynamic ODT

Reversed GMCH core VCC

Select CPU VTT Select

Reversed SDVO Present

A

REV.NO. 1.0 REF. NO. 15577

001 = FSB533FSB Frequency Select

101 = FSB400

others = Reversed

0 = DMI x2

1 = DMI x4

1 = DDR1

0 = Reserved

1 = Dothan

0 = Reserve Lanes

1 = Normal

00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled

11 = Normal Operation

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = 1.05V

1 = 1.5V

0 = 1.05V

1 = 1.2V

(Default)

0 = No SDVO device present

1= SDVO device present

page 183

(Default)

B

C

D

E

CORE_GMCH_S0

CORE_GMCH_S09,10,40,41

VCCP_GMCH_S0

VCCP_GMCH_S04,5,7,9,10,16,18,36,40,41

Power On Sequencing

U17A

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING

E4 E1 F4 H7 E2 F1 E3 D3 K7 F2

J7

J8 H6 F3 K8 H5 H1 H2 K5 K6

J4

G3

H3

J1 L5 K4

J5 P7 L7

J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6

W6

U3 V5

W8 W7

U2 U1 Y5 Y2 V4 Y7

W1 W3

Y3 Y6

W2

C1 C2 D1 T1 L1 P1

HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#

HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING

ALVISO-GM

HADSTB#0 HADSTB#1

HCPURST#

HOST

HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3

HCPUSLP#

HA3# HA4# HA5# HA6# HA7# HA8#

HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#

HADS#

HVREF HBNR#

HBPRI#

HBREQ0#

HCLKINN HCLKINP

HDBSY#

HDEFER#

HDINV#0 HDINV#1 HDINV#2 HDINV#3

HDPWR#

HDRDY#

HEDRDY#

HHIT# HHITM# HLOCK#

HPCREQ#

HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4

HRS0# HRS1# HRS2#

HTRDY#

G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13

F8 B9 E13 J11 A5 D5 E7 H10

AB1 AB2

C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 TP_H_EDRDY#

TP_H_PCREQ# H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_CPUSLP#_GMCH

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4

H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_CPURST# 4

CLK_MCH_BCLK# 3 CLK_MCH_BCLK 3

H_DBSY# 4 H_DEFER# 4

H_DPWR# 4 H_DRDY# 4

TP42 TPAD30TP42 TPAD30

H_HIT# 4 H_HITM# 4 H_LOCK# 4

TP9 TPAD30TP9 TPAD30

H_TRDY# 4

C308

SCD1U10V2KX

VCCP_GMCH_S0

12

R336

R336 100R2F

100R2F

H_VREF

12

R337

R337 200R2F

200R2F

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

0R0402-PAD

R311

1 2

For Banias/Celeron-M:R93=DUMMY For Dothan A:R93=DUMMY For Dothan B:R93=0R

ALVISO-GM:71.0GMCH.08U ALVISO-PM:71.0GMCH.0BU ALVISO-GML:71.0GMCH.0JU

B

C

D

VID

VR_ON

Vcc_core

Vccp

Vcc_mch

MCH_PWERGD

CLK_ENABLE#

VGATE TO ICH6

H_CPUSLP# 4,16

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

>3mS

10~30uS

Vboot

<10uS

CORE_GMCH_S0

12

H_DPWR#

GMCH (1 of 5)

Leopard 3

Vboot Vvid

>100uS

3~10mS

R391

R391 0R2-0

0R2-0

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

641Monday, August 15, 2005

of

E

of

-1

A

hexainf@hotmail.com

U17B

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

ALVISO-GM

Ref ALVISO EDS-1 Page 115

For Dothan-B

R50

R50 1KR2

1KR2

CFG2 CFG1 CFG0

R51

R51 4K7R2

4K7R2

CFG2=0(R51):133MHZ CFG2=1(R50):100MHZ

CPU_SEL0 3,4 CPU_SEL1 3,4

CFG(2..1) FREQ.(MHz) 10 400 00 533 11 Reserved

R404

40D2R2F

SCD1U10V2MX-1

R375 10KR2R375 10KR2

R378 10KR2R378 10KR2

FOR DDR2

R403

R403 80D6R2F

80D6R2F

M_RCOMPN M_RCOMPP

R429

R429 80D6R2F

80D6R2F

DMI_TXN[3..0]17

DMI_TXP[3..0]17

DMI_RXN[3..0]17

DMI_RXP[3..0]17

12

PM_EXTTS#0

PM_EXTTS#1

CLK_DDR011 CLK_DDR111

CLK_DDR311 CLK_DDR411

CLK_DDR0#11 CLK_DDR1#11

CLK_DDR3#11 CLK_DDR4#11

M_CKE0_R#11,12 M_CKE1_R#11,12 M_CKE2_R#11,12 M_CKE3_R#11,12

M_CS0_R#11,12 M_CS1_R#11,12 M_CS2_R#11,12 M_CS3_R#11,12

M_OCDCOMP0 M_OCDCOMP1

M_ODT011,12 M_ODT111,12 M_ODT211,12 M_ODT311,12

DDR_VREF_S3

12

C109

A

R344

10KR2

4 4

3 3

Layout Note: Route as short as possible

12

R405

40D2R2F

2 2

2D5V_S0

1 2

1D8V_S3

12

1 1

12

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2

DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

M_RCOMPN M_RCOMPP

SMXSLEW SMYSLEW

VCCP_GMCH_S0

12

10KR2

12

R48

4K7R2

DY

R49

12

DY

B

CFG/RSVD

RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27

BM_BUSY#

EXT_TS0# EXT_TS1#

THRMTRIP#

PM

PWROK

DREF_CLKN DREF_CLKP

DREF_SSCLKN

CLK

DREF_SSCLKP

NC

B

CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

RSTIN#

DMI

DDR MUXING

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8

NC9 NC10 NC11

G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25

J23 J21 H22 F5 AD30 AE29

A24 A23 C37 D37

AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C

Alviso will provide SDVO_CTRLCLK and CTRLDATA pulldowns on-die

CFG0 CFG1

R534

1 2

CFG3 PEG_COMP CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27

PM_EXTTS#0 PM_EXTTS#1

RST1#

1 2

GMCH_TP3 GMCH_TP4 GMCH_TP5 GMCH_TP6 GMCH_TP7 GMCH_TP8 GMCH_TP9 GMCH_TP10 GMCH_TP11 GMCH_TP12 GMCH_TP13

When Low 2.2K Ohm

R350

DY

DY DY

DY

DY DY

DY

R350

DUMMY-R2

R348

DUMMY-R2

R343

DUMMY-R2

R571

2K2R2

R352

DUMMY-R2

R340

DUMMY-R2

R347

DUMMY-R2

R349

DUMMY-R2

R52

DUMMY-R2

R345

DUMMY-R2

R338

DUMMY-R2

R346

DUMMY-R2

R342

DUMMY-R2

R339

DUMMY-R2

R341

DUMMY-R2

CFG2

1KR2

GMCH_DDCCLK15

GMCH_DDCDATA15

TP48TP48 TP44TP44 TP43TP43 TP11TP11 TP10TP10 TP47TP47 TP45TP45

PM_BMBUSY# 17

PM_THRMTRIP-A# 4,16 PWROK 20

100R2

R406

DREFCLK# 3 DREFCLK 3 DREFSSCLK# 3 DREFSSCLK 3

TP20 TPAD30TP20 TPAD30 TP18 TPAD30TP18 TPAD30 TP19 TPAD30TP19 TPAD30 TP15 TPAD30TP15 TPAD30 TP16 TPAD30TP16 TPAD30 TP17 TPAD30TP17 TPAD30 TP7 TPAD30TP7 TPAD30 TP8 TPAD30TP8 TPAD30 TP14 TPAD30TP14 TPAD30 TP13 TPAD30TP13 TPAD30 TP12 TPAD30TP12 TPAD30

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

COMP_VGA13 LUMA_VGA13 CRMA_VGA13

VGA_BLUE15

VGA_GREEN15

VGA_RED15

DY

1 2

DY

1 2

DY

1 2

VGA_VSYNC13

VGA_HSYNC13

PLT_RST1# 19,21

LCTLA_CLK

1

LCTLB_DATA

2

LDDC_CLK

3

LDDC_DATA

4 5

BL_ON LBKLT_CRTL LIBG

EDID_DAT14

Strapping

CFG[17:3] have internal pullup resistors.

Intel suggest NC Due to votusly DVO

TP46TPAD30 TP46TPAD30 TP49TPAD30 TP49TPAD30

CLK_MCH_3GPLL#3

CLK_MCH_3GPLL3

R53

150R2F

RN39

SRN2K2

1 2 1 2 1 2

EDID_CLK14

12

R59 150R2F

R59 150R2F R57 150R2F

R57 150R2F R56 150R2F

R56 150R2F

8 7 6

R382

100KR2

R381

100KR2

R379

1K5R2F

RN38

SRN4D7KJ

12

150R2F

LCDVDD_ON14

2D5V_S0

R54

Less than 0.5", trace impendance 37.5ohmTrace impendance 50ohm

1 2 1 2 1 2

BL_ON31

TP41TPAD30 TP41TPAD30 TP51TPAD30 TP51TPAD30 TP50TPAD30 TP50TPAD30

3D3V_S0

2

14

3

12

R55

150R2F

R60 39R2JR60 39R2J R58 39R2JR58 39R2J R374 255R2FR374 255R2F

NO STUFF

LDDC_CLK

1 2

TXACLK-14

TXACLK+14

TXBCLK-14

TXBCLK+14

TXAOUT0-14 TXAOUT1-14 TXAOUT2-14

TXAOUT0+14 TXAOUT1+14 TXAOUT2+14

TXBOUT0-14 TXBOUT1-14 TXBOUT2-14

TXBOUT0+14 TXBOUT1+14 TXBOUT2+14

SD 0817

R373

5 6

SDVO_DAT SDVO_CLK

4K99R2F

LBKLT_CRTL LCTLA_CLK

LCTLB_DATA LDDC_CLK LDDC_DATA

LIBG

2D5V_S0

U14

2N7002S

TV_REFSET

VSYNC HSYNC CRTIREF

L_LVBG L_VREFH L_VREFL

34 2 1

CFG[19:18] have internal pulldown resistors

C

H24

H25 AB29 AC29

A15

C16

A17

B15

B16

B17

E24

E23

E21

D21

C20

B20

A19

B19

H21

G21

E25

F25

C23

C22

F23

F22

F26

C33

C31

F28

F27

B30

B29

C25

C24

B34

B33

B32

A34

A33

B31

C29

D28

C27

C28

D27

C26

J18

J20

LDDC_DATA

D

U17G

SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP

TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC

DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET

LBKLT_CRTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL

LACLKN LACLKP LBCLKN LBCLKP

LADATAN0 LADATAN1 LADATAN2

LADATAP0 LADATAP1 LADATAP2

LBDATAN0 LBDATAN1 LBDATAN2

LBDATAP0 LBDATAP1 LBDATAP2

ALVISO-GM

D

E

2D5V_S09,15,18,40 1D8V_S39,10,11,12,38,39,40,41 1D5V_S05,9,17,18,21,38,39,41

CORE_GMCH_S06,9,10,40,41

DDR_VREF_S311,40

EXP_COMPI

EXP_ICOMPO

MISCTVVGALVDS

EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8

EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

PCI-EXPRESS GRAPHICS

EXP_TXN6

EXP_TXN7

EXP_TXN8

EXP_TXN9

EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D36 D34

E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34

D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34

E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36

D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36

GMCH (2 of 5)

Leopard 3

2D5V_S0

When High 1K Ohm

1 2

DY

1 2

DY

1 2

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

R380

DUMMY-R2

R376

DUMMY-R2

R377

DUMMY-R2

741Monday, August 15, 2005

2D5V_S0 1D8V_S3

1D5V_S0 CORE_GMCH_S0 DDR_VREF_S3

1D5V_S0

R71

12

24D9R2F

of

CFG18 CFG19 CFG20

-1

A

4 4

U17C

M_A_DATA[63..0]11

3 3

2 2

M_A_DATA0 M_A_DATA1 M_A_DATA2 M_A_DATA3 M_A_DATA4 M_A_DATA5 M_A_DATA6 M_A_DATA7 M_A_DATA8 M_A_DATA9 M_A_DATA10 M_A_DATA11 M_A_DATA12 M_A_DATA13 M_A_DATA14 M_A_DATA15 M_A_DATA16 M_A_DATA17 M_A_DATA18 M_A_DATA19 M_A_DATA20 M_A_DATA21 M_A_DATA22 M_A_DATA23 M_A_DATA24 M_A_DATA25 M_A_DATA26 M_A_DATA27 M_A_DATA28 M_A_DATA29 M_A_DATA30

M_A_DATA31 M_A_DATA32 M_A_DATA33 M_A_DATA34 M_A_DATA35 M_A_DATA36 M_A_DATA37 M_A_DATA38 M_A_DATA39 M_A_DATA40 M_A_DATA41 M_A_DATA42 M_A_DATA43 M_A_DATA44 M_A_DATA45 M_A_DATA46 M_A_DATA47 M_A_DATA48 M_A_DATA49 M_A_DATA50 M_A_DATA51 M_A_DATA52 M_A_DATA53 M_A_DATA54 M_A_DATA55 M_A_DATA56 M_A_DATA57 M_A_DATA58 M_A_DATA59 M_A_DATA60 M_A_DATA61 M_A_DATA62 M_A_DATA63

AG35 AH35

AL35 AL37

AH36

AJ35

AK37

AL34 AM36 AN35 AP32 AM31 AM34 AM35

AL32 AM32 AN31 AP31 AN28 AP28

AL30 AM30 AM28

AL28 AP27 AM27 AM23 AM22

AL23 AM24 AN22 AP22

AM9

AL9 AL6

AP7 AP11 AP10

AL7

AM7 AN5 AN6 AN3

AP3

AP6

AM6

AL4

AM3

AK2

AK3

AG2 AG1

AL3

AM2 AH3 AG3

AF3

AE3

AD6 AC4

AF2

AF1

AD4 AD5

U17C

SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63

ALVISO-GM

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

DDR SYSTEM MEMORY A

SA_RCVENIN#

SA_RCVENOUT#

SA_BS0# SA_BS1# SA_BS2#

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13

SA_CAS# SA_RAS#

SA_WE#

B

AK15 AK16 AL21

AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3

AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5

AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4

AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15

AN15 AP16 AF29 AF28 AP15

M_A_SDM0 M_A_SDM1 M_A_SDM2 M_A_SDM3 M_A_SDM4 M_A_SDM5 M_A_SDM6 M_A_SDM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

GMCH_TP48 GMCH_TP49

TP55TP55

M_A_BS0# 11,12 M_A_BS1# 11,12 M_A_BS2# 11,12 M_A_SDM[7..0] 11

M_A_DQS[7..0] 11

M_A_DQS#[7..0] 11

M_A_A[13..0] 11,12

M_A_CAS# 11,12 M_A_RAS# 11,12

M_A_WE# 11,12

M_B_DATA[63..0]11

C

U17D

M_B_DATA0 M_B_DATA1 M_B_DATA2 M_B_DATA3 M_B_DATA4 M_B_DATA5 M_B_DATA6 M_B_DATA7 M_B_DATA8 M_B_DATA9 M_B_DATA10 M_B_DATA11 M_B_DATA12 M_B_DATA13 M_B_DATA14 M_B_DATA15 M_B_DATA16 M_B_DATA17 M_B_DATA18 M_B_DATA19 M_B_DATA20 M_B_DATA21 M_B_DATA22 M_B_DATA23 M_B_DATA24 M_B_DATA25 M_B_DATA26 M_B_DATA27 M_B_DATA28 M_B_DATA29 M_B_DATA30 M_B_DATA31 M_B_DATA32 M_B_DATA33 M_B_DATA34 M_B_DATA35 M_B_DATA36 M_B_DATA37 M_B_DATA38 M_B_DATA39 M_B_DATA40 M_B_DATA41 M_B_DATA42 M_B_DATA43 M_B_DATA44 M_B_DATA45 M_B_DATA46 M_B_DATA47 M_B_DATA48 M_B_DATA49 M_B_DATA50 M_B_DATA51 M_B_DATA52 M_B_DATA53 M_B_DATA54 M_B_DATA55 M_B_DATA56 M_B_DATA57 M_B_DATA58 M_B_DATA59 M_B_DATA60 M_B_DATA61 M_B_DATA62 M_B_DATA63

AE31 AE32 AG32 AG36 AE34 AE33

AF31

AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31

AJ31 AK30

AJ30 AH29 AH28 AK29 AH30 AH27 AG28

AF24 AG23

AJ22 AK22 AH24 AH23 AG22

AJ21 AG10

AG9 AG8

AH8 AH11 AH10

AK9

AK6

AH5

AK8

AK4

AG5

AG4

AD8

AD9

AH4

AG6

AE8

AD7

AC5

AB8

AB6

AA8

AC8

AC7

AA4

AA5

AJ9 AJ7 AJ4

AJ8 AJ5

SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63

ALVISO-GM

D

AJ15

SB_BS0#

AG17

SB_BS1#

AG21

SB_BS2#

AF32

SB_DM0

AK34

SB_DM1

AK27

SB_DM2

AK24

SB_DM3

AJ10

SB_DM4

AK5

SB_DM5

AE7

SB_DM6

AB7

SB_DM7

AF34

SB_DQS0

AK32

SB_DQS1

AJ28

SB_DQS2

AK23

SB_DQS3

AM10

SB_DQS4

AH6

SB_DQS5

AF8

SB_DQS6

AB4

SB_DQS7

AF35

SB_DQS0#

AK33

SB_DQS1#

AK28

SB_DQS2#

AJ23

SB_DQS3#

AL10

SB_DQS4#

AH7

SB_DQS5#

AF7

SB_DQS6#

AB5

SB_DQS7#

AH17

SB_MA0

AK17

SB_MA1

AH18

SB_MA2

AJ18

SB_MA3

AK18

SB_MA4

AJ19

SB_MA5

AK19

SB_MA6

AH19

SB_MA7

AJ20

SB_MA8

DDR SYSTEM MEMORY B

SB_RCVENIN#

SB_RCVENOUT#

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13

SB_CAS# SB_RAS#

SB_WE#

AH20 AJ16 AG18 AG20 AG15

AH14 AK14 AF15 AF14 AH16

M_B_SDM0 M_B_SDM1 M_B_SDM2 M_B_SDM3 M_B_SDM4 M_B_SDM5 M_B_SDM6 M_B_SDM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

GMCH_TP50 GMCH_TP51

TP53TP53TP54TP54 TP52TP52

E

M_B_BS0# 11,12 M_B_BS1# 11,12 M_B_BS2# 11,12 M_B_SDM[7..0] 11

M_B_DQS[7..0] 11

M_B_DQS#[7..0] 11

M_B_A[13..0] 11,12

M_B_CAS# 11,12 M_B_RAS# 11,12

M_B_WE# 11,12

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

GMCH (3 of 5)

Leopard 3

E

-1

841Tuesday, July 12, 2005

of

-1

A

hexainf@hotmail.com

1D5V_TVDAC_S0

3D3V_S0

4 4

SC10U6D3V5MX

3 3

C465

SCD1U10V2MX-1

3D3V_VGA_S0

R35

1 2

0R3-U

3D3V_VGA_S0

12

C461

3D3V_S0 2D5V_CRTDAC_S0

U66

3

VIN

12

APL5308-25AC-TR

1 2

VOUT

GND

R36

1 2

10R2

R313

0R3-U

R312

0R3-U

R355

0R3-U

R356

0R3-U

2 1

TVDAC_PWR

12

SC10U6D3V5MX

D2

SSM5818SL

3D3V_ATVBG_S0

C310

C310 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_TVDACC_S0

C309

C309 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_TVDACB_S0

C311

C311 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_TVDACA_S0

C314

C314 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C466

U17E

1D5V_S0

21

1D5V_QTVDAC_S0

1D5V_DLVDS_S0

F17

E17

D18

C18

F18

E18

D19

H17

G18

B26

VSSA_TVBG

B25

VCCD_LVDS0

VCCD_TVDAC

VCCDQ_TVDAC

H18

VCCA_TVDACA0

VCCA_TVDACA1

VCCA_TVBG

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACC0

VCCA_TVDACC1

B

1D5V_S0

R354

0R3-U

Note: All VCCSM pins shorted internally

C125

1 2

SCD1U10V2MX-1

AK26

AC27

AP26

AN26

AM26

AL26

VCCSM5

VCCSM6

VCCSM7

VCCSM8

VCCSM9

VCCSM10

1 2

12

C54

C54 SCD1U10V2MX-1

SCD1U10V2MX-1

AJ26

AH26

AG26

AF26

VCCSM11

VCCSM12

VCCSM13

VCCSM14

0R3-U

AE26

VCCSM15

AP25

AN25

VCCSM16

VCCSM17

1 2

12

C55

C55 SC10U10V5ZY-L

SC10U10V5ZY-L

AM25

AL25

AK25

AJ25

VCCSM18

VCCSM19

VCCSM20

G9

GAP-CLOSE-PWR

AH25

AG25

VCCSM21

VCCSM22

VCCSM23

POWER

12

C299

C299 SCD1U10V2MX-1

SCD1U10V2MX-1

R353

1 2

12

C300

C300 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C127

C127 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C126

C126 SCD1U10V2MX-1

SCD1U10V2MX-1

V1.8_DDR_CAP1

V1.8_DDR_CAP2

V1.8_DDR_CAP5

A35

A25

VCCD_LVDS1

VCCD_LVDS2

AM37

AH37

AP29

AD28

B22

B21

A21

VCCHV0

VCCHV1

VCCA_LVDS

AD27

VCCHV2

VCCSM0

VCCSM1

VCCSM2

VCCSM3

VCCSM4

C351

AF25

VCCSM24

C

1D5V_S0

G10

1 2

GAP-CLOSE-PWR

2D5V_S0 2D5V_ALVDS_S0

GAP-CLOSE-PWR

2D5V_S02D5V_TVDAC_S0

2D5V_S0 2D5V_TXLVDS_S0

GAP-CLOSE-PWR

C59

SCD1U10V2MX-1

G12

1 2

C63

SCD1U10V2MX-1

G11

1 2

C61

SCD1U10V2MX-1

12

1D5V_DLVDS_S0

12

C58

C58 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C62

C62 SCD01U16V3KX

SCD01U16V3KX

12

C60

C60 SC4D7U10V5ZY

SC4D7U10V5ZY

FOR DDR2

1D8V_S3

Note: All VCCSM

AM12

VCCSM48

VCCSM49

AL12

AK12

AJ12

VCCSM50

VCCSM51

VCCSM52

pins shorted internally

1 2

SCD1U10V2MX-1

AH12

AG12

AF12

AE12

VCCSM53

VCCSM54

VCCSM55

TC7

12

C339

SC10U10V5ZY-L

AE25

AE24

AE23

AE22

AE21

AE20

AE19

AE18

AE17

AE16

AE15

AE14

VCCSM25

VCCSM26

VCCSM27

VCCSM28

VCCSM29

VCCSM30

VCCSM31

VCCSM32

VCCSM33

VCCSM34

VCCSM35

12

ST150U4VBM-L1

AP13

AN13

AM13

AL13

AK13

AJ13

AH13

AG13

AF13

AE13

AP12

AN12

VCCSM36

VCCSM37

VCCSM38

VCCSM39

VCCSM40

VCCSM41

VCCSM42

VCCSM43

VCCSM44

VCCSM45

VCCSM46

VCCSM47

D

12

C131

C131 ST100U6D3VM-U

ST100U6D3VM-U

12

C92

SC10U10V5ZY-L

1D5V_3GPLL_S0

12

C342

Y27

Y29

Y28

F37

VCCA_3GPLL2

VCCA_3GPLL0

VCCA_3GPLL1

1 2

G37

VSSA_3GBG

VCCA_3GBG

12

C340

SCD1U10V2MX-1

12

C343

SC10U10V5ZY-L

12

C123

C123 SCD1U10V2MX-1

SCD1U10V2MX-1

VCCA_SM3

AE37

VCC3G0

W37

VCC3G1

SCD1U10V2MX-1

U37

R37

N37

L37

VCC3G2

VCC3G3

VCC3G4

VCC3G5

J37

VCC3G6

12

C122

C122 SCD1U10V2MX-1

SCD1U10V2MX-1

C124

AD11

AC11

AB11

VCCSM56

VCCSM57

VCCSM58

2D5V_TXLVDS_S02D5V_ALVDS_S0

V1.8_DDR_CAP4

V1.8_DDR_CAP3

V1.8_DDR_CAP6

AB10

AB9

AP8

AM1

AE1

VCCSM59

VCCSM60

VCCSM61

VCCSM62

VCCSM63

AF20

AP19

AF19

B28

A28

VCCSM64

VCCTX_LVDS0

AF18

A27

VCCA_SM0

VCCA_SM1

VCCA_SM2

VCCTX_LVDS1

VCCTX_LVDS2

E

1D5V_S01D5V_DDRDLL_S0

G29

GAP-CLOSE-PWR

1D5V_S01D5V_PCIE_S0

G51

1 2

12

GAP-CLOSE-PWR

TC16

TC16 ST100U6D3VM-U

ST100U6D3VM-U

DY

1D5V_S0

G50

1 2

12

GAP-CLOSE-PWR

C330

C330 SC10U10V5ZY-L

SC10U10V5ZY-L

2D5V_3GBG_S0 2D5V_S0

1 2

12

C74

C74 SCD1U10V2MX-1

SCD1U10V2MX-1

G13

GAP-CLOSE-PWR

VCC0

VCC1

VCC2

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

VCC10

VCC11

VCC12

VCC13

VCC14

VCC15

VCC16

VCC17

VCC18

VCC19

VCC20

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

VCC27

VCC28

VCC29

VCC30

VCC31

VCC32

VCC33

VCC34

VCC35

VCC36

VCC37

VCC38

VCC39

VCC40

VCC41

VCC42

VCC43

VCC44

VCC45

VCC46

VCC47

VCC48

VCCH_MPLL1

VCCH_MPLL0

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCC_SYNC

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT14

VTT15

VTT16

VTT17

VTT18

VTT19

VTT20

VTT21

VTT22

VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51

J29

T29

R29

12

C329

C329 SCD1U10V2MX-1

SCD1U10V2MX-1

N29

2 2

CORE_GMCH_S0

12

1D5V_S0

2D5V_S0

1D8V_S3

1 1

VCCP_GMCH_S0

CORE_GMCH_S0

12

C341

C341 SC10U10V5ZY-L

SC10U10V5ZY-L

1D5V_S0 5,7,17,18,21,38,39,41

2D5V_S0 7,15,18,40

1D8V_S3 7,10,11,12,38,39,40,41

VCCP_GMCH_S0 4,5,6,7,10,16,18,36,40,41

CORE_GMCH_S0 6,10,40,41

12

C325

C325 SC10U10V5ZY-L

SC10U10V5ZY-L

A

C326

C326 SC10U10V5ZY-L

SC10U10V5ZY-L

K29

V28

U28

M29

12

C328

C328 SCD1U10V2MX-1

SCD1U10V2MX-1

GAP-CLOSE-PWR

T28

R28

GMCH_CORE_VCC

P28

N28

G43

J28

L28

K28

M28

12

C327

C327 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_S0

12

H28

G28

T27

V27

U27

B

L27

P27

R27

N27

M27

1 2

IND-D1UH

L4

1 2

IND-D1UH

L22

1 2

IND-D1UH

L14

1 2

IND-D1UH

L13

K27

J27

H27

J25

K26

K25

H26

12

C56

C56 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C302

C302 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C108

C108 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C107

C107 SC10U6D3V5MX

SC10U6D3V5MX

DY

K24

T20

K23

K22

K21

K20

U20

W20

12

V19

K19

V18

U19

W18

1D5V_HMPLL_S0

1D5V_DPLLA_S0

C57

C57 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_DPLLB_S0

C315

C315 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_HPLL_S0

C110

C110 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_MPLL_S0

C111

C111 SCD1U10V2MX-1

SCD1U10V2MX-1

T18

K18

K17

AC2

AC1

F19

B23

C

C35

AA1

AA2

E19

G19

SCD1U10V2MX-1

J13

K13

K12

H20

12

C312

SCD022U16V

VCCP_GMCH_S0

12

C72

V11

U11

W11

12

SC22U10V6MX

DY

ST100U6D3VM-U

T11

C459

12

R11

C88

P11

N11

M11

L11

K11

V10

W10

1 2

12

C301

C301 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C313

C313 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C89

C89 SC10U10V6ZY-U

SC10U10V6ZY-U

U10

R357

T10

J10

P10

K10

R10

N10

M10

2D5V_CRTDAC_S0

0R5J

Layout Notes: VSSA_CRTDAC Route caps within 250mil of Alviso. Route FB within 3" of Alviso.

R560

1 2

DY

0R3-U

R358

1 2

10R2

Route VSSA_CRTDAC gnd from GMCH to decoupling cap ground lead and then connect to the gnd plane.

D

VCCP_GMCH_CAP1

12

C53

SCD47U16V3ZY

2D5V_S0

VCCP_GMCH_S0

D22

21

SC4D7U10V5ZY

SSM5818SL

SC4D7U10V5ZY

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

C52

SCD47U16V3ZY

SCD22U16V3ZY

VCCP_GMCH_S0

C324

C90

12

G1

VCCP_GMCH_CAP2

VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

12

C71

C71 SCD22U16V3ZY

SCD22U16V3ZY

12

C323

C323 SC4D7U10V5ZY

SC4D7U10V5ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (4 of 5)

Leopard 3

941Tuesday, August 16, 2005

E

-1

of

-1

A

4 4

L29

H29

G29

F29

E29

D29

A29

AC28

AB28

AA28

W28

E28

AN27

AL27

AJ27

AG27

AF27

AB27

AA27

W27

G27

E27

B27

J26

G26

E26

A26

AN24

U17F

ALVISO-GM

3 3

AL24

VSS109

VSS110

VSS111

VSS112

VSS113

VSS114

VSS115

VSS116

VSS117

VSS118

VSS119

VSS120

VSS121

VSS122

VSS123

VSS124

VSS125

VSS126

VSS127

VSS128

VSS129

VSS261

VSS262

VSS263

VSS264

VSS265

VSS266

VSS267

VSS259P2VSS258T2VSS257V2VSS256

VSS255

VSS254

VSS253

VSS252

VSS251A3VSS250C3VSS249

VSS248

VSS247

VSS246

AA3

AB3

AC3

VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239

AJ3

AF4

AN4

VSSALVDS

B36

VSS260L2VSS268J2VSS269G2VSS270D2VSS271

Y1

AL2

AE2

AD2

AH2

AN2

B

W31

V31

U31

T31

R31

P31

N31

M31

L31

K31

J31

H31

G31

F31

E31

D31

AP30

AE30

AC30

AB30

AA30

Y30

C30

AM29

AJ29

AG29

AD29

AA29

W29

V29

U29

P29

VSS76

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

VSS102

VSS103

VSS104

VSS105

VSS106

VSS107

VSS108

VSS238

VSS237E5VSS236W5VSS235

VSS234

AL5

AP5

VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228

AA6

VSS227

VSS226

VSS225

VSS224G7VSS223V7VSS222

VSS221

VSS220

VSS219

VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213

AJ6

AE6

AA7

AC6

AK7

AN7

AG7

VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207

AL8

AA9

VSS206

AC9

AD31

AE9

VSS75

VSS205

AG31

VSS74

VSS

VSS204

AH9

C

AA34

C34

AL33

AF33

AD33

W33

V33

U33

T33

R33

P33

N33

M33

L33

K33

J33

H33

G33

F33

E33

D33

AN32

AJ32

AD32

AC32

AB32

AA32

Y32

C32

A32

AL31

VSS44

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

J12

L10

F11

Y11

Y10

D10

AN9

H11

AA11

AA10

B12

AJ11

AL11

AF11

AN11

AG11

D12

J14

F14

A14

B14

K14

AJ14

AG14

VSS174

K15

A16

C15

D16

AL14

H16

AN14

D

AJ36

AF36

AE36

AD36

AC36

AB36

AA36

C36

AE35

Y35

W35

V35

U35

T35

R35

P35

N35

M35

L35

K35

J35

H35

G35

F35

E35

D35

B35

AN34

AH34

AD34

AC34

AB34

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS163

VSS162

VSS161

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

J19

K16

A18

G17

B18

AJ17

AF17

AN17

C17

AL16

U18

T19

C19

H19

W19

AL18

F20

G20

F21

V20

A22

C21

AK20

E22

D22

AF21

AN21

A20

E20

D20

AN19

AG19

E

CORE_GMCH_S06,9,40,41

VCCP_GMCH_S04,5,6,7,9,16,18,36,40,41

1D8V_S37,9,11,12,38,39,40,41

AL36

AN36

VSS9

VSS10

VSS140

VSS139

J22

AH22

E37

AL22

H37

VSS8

VSS138

H23

K37

VSS7

VSS137

AF23

M37

VSS6

VSS136

B24

P37

VSS5

VSS135

D24

T37

VSS4

VSS134

F24

V37

VSS3

VSS133

J24

Y37

VSS2

VSS132

AG24

AG37

VSS1

VSS131

AJ24

VSS0

VSS130

CORE_GMCH_S0

VCCP_GMCH_S0

1D8V_S3

VCC_NCTF6

VSS_NCTF6

P26

VCC_NCTF5

VSS_NCTF5

Y25

R26

AA25

VCC_NCTF4

VSS_NCTF4

T26

VCC_NCTF3

VSS_NCTF3

AB25

CORE_GMCH_S0

W26

V26

U26

VCC_NCTF0

VCC_NCTF1

VCC_NCTF2

VSS_NCTF2

VSS_NCTF1

VSS_NCTF0

Y26

AA26

AB26

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (5 of 5)

Leopard 3

10 41Tuesday, July 12, 2005

E

-1

of

-1

AD14

AC14

AD13

VCCSM_NCTF24

VCCSM_NCTF25

VCCSM_NCTF26

VCCSM_NCTF27

VCCP_GMCH_S0

FOR DDR2

AC18

AD17

AC17

AD16

AC16

AD15

AC15

VCCSM_NCTF17

VCCSM_NCTF18

VCCSM_NCTF19

VCCSM_NCTF20

VCCSM_NCTF21

VCCSM_NCTF22

VCCSM_NCTF23

AD21

AC21

AD20

AC20

AD19

AC19

AD18

VCCSM_NCTF13

VCCSM_NCTF14

VCCSM_NCTF15

VCCSM_NCTF16

AD23

AC23

AD22

AC22

VCCSM_NCTF7

VCCSM_NCTF8

VCCSM_NCTF9

VCCSM_NCTF10

VCCSM_NCTF11

VCCSM_NCTF12

VTT_NCTF17

VTT_NCTF16

VTT_NCTF15

VTT_NCTF14

VTT_NCTF13

L12

T12

P12

N12

R12

M12

B

VCCSM_NCTF6

VTT_NCTF12

AC24

U12

VCCSM_NCTF5

VTT_NCTF11

AD24

V12

AC25

VCCSM_NCTF4

VTT_NCTF10

W12

VCCSM_NCTF3

VTT_NCTF9

AD26

AC26

AD25

VCCSM_NCTF0

VCCSM_NCTF1

VCCSM_NCTF2

VTT_NCTF8

VTT_NCTF7

VTT_NCTF6

L13

N13

M13

U17

T17

P17

N17

M17

L17

VCC_NCTF74

VCC_NCTF75

VCC_NCTF76

VCC_NCTF77

VCC_NCTF78

VTT_NCTF5

VTT_NCTF4

VTT_NCTF3

VTT_NCTF2

VTT_NCTF1

VTT_NCTF0

T13

P13

V13

R13

U13

W13

P18

N18

L18

W17

V17

M18

VCC_NTTF69

VCC_NCTF68

VCC_NCTF70

VCC_NCTF71

VCC_NCTF72

VCC_NCTF73

VSS_NCTF68

Y12

AA12

P19

N19

M19

L19

Y18

R18

VCC_NCTF62

VCC_NCTF63

VCC_NCTF64

VCC_NCTF65

VCC_NCTF66

VCC_NCTF67

VSS_NCTF67

VSS_NCTF66

VSS_NCTF65

VSS_NCTF64

VSS_NCTF63

VSS_NCTF62

L14

Y13

P14

N14

M14

AA13

P20

N20

M20

L20

Y19

R19

VCC_NCTF56

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF60

VCC_NCTF61

NCTF

VSS_NCTF61

VSS_NCTF60

VSS_NCTF59

VSS_NCTF58

VSS_NCTF57

VSS_NCTF56

T14

V14

Y14

R14

U14

W14

P21

N21

M21

L21

Y20

R20

VCC_NCTF53

VCC_NCTF54

VCC_NCTF55

VSS_NCTF55

VSS_NCTF54

VSS_NCTF53

L15

AA14

AB14

C

V21

U21

T21

VCC_NCTF49

VCC_NCTF50

VCC_NCTF51

VCC_NCTF52

VCC_NCTF47

VCC_NCTF48

VSS_NCTF52

VSS_NCTF51

VSS_NCTF50

VSS_NCTF49

VSS_NCTF48

VSS_NCTF47

T15

P15

N15

R15

U15

M15

R22

P22

N22

M22

L22

W21

VCC_NCTF41

VCC_NCTF42

VCC_NCTF43

VCC_NCTF44

VCC_NCTF45

VCC_NCTF46

VSS_NCTF46

VSS_NCTF45

VSS_NCTF44

VSS_NCTF43

VSS_NCTF42

VSS_NCTF41

L16

V15

Y15

W15

AA15

AB15

M23

L23

W22

V22

U22

T22

VCC_NCTF35

VCC_NCTF36

VCC_NCTF37

VCC_NCTF38

VCC_NCTF39

VCC_NCTF40

VSS_NCTF40

VSS_NCTF39

VSS_NCTF38

VSS_NCTF37

VSS_NCTF36

VSS_NCTF35

T16

P16

N16

R16

U16

M16

V23

U23

T23

R23

P23

N23

VCC_NCTF29

VCC_NCTF30

VCC_NCTF31

VCC_NCTF32

VCC_NCTF33

VCC_NCTF34

VSS_NCTF34

VSS_NCTF33

VSS_NCTF32

VSS_NCTF31

VSS_NCTF30

VSS_NCTF29

V16

Y16

R17

W16

AA16

AB16

R24

P24

N24

M24

L24

W23

VCC_NCTF23

VCC_NCTF24

VCC_NCTF25

VCC_NCTF26

VCC_NCTF27

VCC_NCTF28

VSS_NCTF28

VSS_NCTF27

VSS_NCTF26

VSS_NCTF25

VSS_NCTF24

VSS_NCTF23

Y17

AA17

AB17

AA18

AB18

AA19

M25

L25

W24

V24

U24

T24

VCC_NCTF17

VCC_NCTF18

VCC_NCTF19

VCC_NCTF20

VCC_NCTF21

VCC_NCTF22

VSS_NCTF22

VSS_NCTF21

VSS_NCTF20

VSS_NCTF19

VSS_NCTF18

VSS_NCTF17

Y21

R21

AB19

AA20

AB20

AA21

D

V25

U25

T25

R25

P25

N25

VCC_NCTF13

VCC_NCTF14

VCC_NCTF15

VCC_NCTF16

VSS_NCTF16

VSS_NCTF15

VSS_NCTF14

VSS_NCTF13

Y22

AB21

AA22

AB22

N26

M26

L26

W25

VCC_NCTF7

VCC_NCTF8

VCC_NCTF9

VCC_NCTF10

VCC_NCTF11

VCC_NCTF12

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

Y23

Y24

AA23

AB23

AA24

AB24

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

1D8V_S3

AC13

AB13

AD12

AC12

U17H

2 2

ALVISO-GM

1 1

A

AB12

VCCSM_NCTF28

VCCSM_NCTF29

VCCSM_NCTF30

VCCSM_NCTF31

M_B_A[13..0]8,12

hexainf@hotmail.com

M_B_BS2#8,12 M_B_BS0#8,12

M_B_BS1#8,12

M_B_DATA[63..0]8

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

M_ODT27,12 M_ODT37,12

12

C386

SCD1U16V

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_DATA0 M_B_DATA1 M_B_DATA2 M_B_DATA3 M_B_DATA4 M_B_DATA5 M_B_DATA6 M_B_DATA7 M_B_DATA8 M_B_DATA9 M_B_DATA10 M_B_DATA11 M_B_DATA12 M_B_DATA13 M_B_DATA14 M_B_DATA15 M_B_DATA16 M_B_DATA17 M_B_DATA18 M_B_DATA19 M_B_DATA20 M_B_DATA21 M_B_DATA22 M_B_DATA23 M_B_DATA24 M_B_DATA25 M_B_DATA26 M_B_DATA27 M_B_DATA28 M_B_DATA29 M_B_DATA30 M_B_DATA31 M_B_DATA32 M_B_DATA33 M_B_DATA34 M_B_DATA35 M_B_DATA36 M_B_DATA37 M_B_DATA38 M_B_DATA39 M_B_DATA40 M_B_DATA41 M_B_DATA42 M_B_DATA43 M_B_DATA44 M_B_DATA45 M_B_DATA46 M_B_DATA47 M_B_DATA48 M_B_DATA49 M_B_DATA50 M_B_DATA51 M_B_DATA52 M_B_DATA53 M_B_DATA54 M_B_DATA55 M_B_DATA56 M_B_DATA57 M_B_DATA58 M_B_DATA59 M_B_DATA60 M_B_DATA61 M_B_DATA62 M_B_DATA63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

12

C473

SC2D2U6D3V3MX-1

102 101 100

99 98 97 94 92 93 91

105

90 89

116

86 84 85

107 106

5

7 17 19

4

6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76

123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11 29 49 68

129 146 167 186

13 31 51 70

131 148 169 188

114 119

1

2

202

DM2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

/DQS0 /DQS1 /DQS2 /DQS3 /DQS4 /DQS5 /DQS6 /DQS7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF VSS

GND

DDR2-200P-4

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NORMAL TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

High 9.2mm

VSS VSS VSS VSS VSS VSS VSS VSS

GND

M_B_SDM0

10

M_B_SDM1

26

M_B_SDM2

52

M_B_SDM3

67

M_B_SDM4

130

M_B_SDM5

147

M_B_SDM6

170

M_B_SDM7

185 195

197 199

R575 10KR2R575 10KR2

198

1 2

200

1 2

R574 10KR2R574 10KR2

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

1D8V_S3

0329 SB

3D3V_S0

SCD1U16V

M_B_RAS# 8,12 M_B_WE# 8,12 M_B_CAS# 8,12

M_CS2_R# 7,12 M_CS3_R# 7,12

M_CKE2_R# 7,12 M_CKE3_R# 7,12

CLK_DDR3 7 CLK_DDR3# 7

CLK_DDR4 7 CLK_DDR4# 7 M_B_SDM[7..0] 8

SMBD_ICH 3,19 SMBC_ICH 3,19

C469

Hi 9.2 mm

12

3D3V_S0

12

C471

SC2D2U6D3V3MX-1

DY

DM1

M_A_A[13..0]8,12

M_A_BS2#8,12 M_A_BS0#8,12

M_A_BS1#8,12

M_A_DATA[63..0]8

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

M_ODT07,12

DDR_VREF_S3DDR_VREF_S3

M_ODT17,12

C182

SCD1U16V

12

SC2D2U6D3V3MX-1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

M_A_DATA0 M_A_DATA1 M_A_DATA2 M_A_DATA3 M_A_DATA4 M_A_DATA5 M_A_DATA6 M_A_DATA7 M_A_DATA8 M_A_DATA9 M_A_DATA10 M_A_DATA11 M_A_DATA12 M_A_DATA13 M_A_DATA14 M_A_DATA15 M_A_DATA16 M_A_DATA17 M_A_DATA18 M_A_DATA19 M_A_DATA20 M_A_DATA21 M_A_DATA22 M_A_DATA23 M_A_DATA24 M_A_DATA25 M_A_DATA26 M_A_DATA27 M_A_DATA28 M_A_DATA29 M_A_DATA30 M_A_DATA31 M_A_DATA32 M_A_DATA33 M_A_DATA34 M_A_DATA35 M_A_DATA36 M_A_DATA37 M_A_DATA38 M_A_DATA39 M_A_DATA40 M_A_DATA41 M_A_DATA42 M_A_DATA43 M_A_DATA44 M_A_DATA45 M_A_DATA46 M_A_DATA47 M_A_DATA48 M_A_DATA49 M_A_DATA50 M_A_DATA51 M_A_DATA52 M_A_DATA53 M_A_DATA54 M_A_DATA55 M_A_DATA56 M_A_DATA57 M_A_DATA58 M_A_DATA59 M_A_DATA60 M_A_DATA61 M_A_DATA62 M_A_DATA63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

C474

102 101 100

99 98 97 94 92 93 91

105

90 89

116

86 84 85

107 106

5

7 17 19

4

6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76

123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11 29 49 68

129 146 167 186

13 31 51 70

131 148 169 188

114 119

1

2

202

DM1

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

/DQS0 /DQS1 /DQS2 /DQS3 /DQS4 /DQS5 /DQS6 /DQS7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF VSS

GND

DDR2-200P-5

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NORMAL TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

Low5.2 mm

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

10 26 52 67 130 147 170 185

195 197

199 198

200 50

69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

M_A_SDM0 M_A_SDM1 M_A_SDM2 M_A_SDM3 M_A_SDM4 M_A_SDM5 M_A_SDM6 M_A_SDM7

SMBD_ICH SMBC_ICH

R573 10KR2R573 10KR2

1 2

R572 10KR2R572 10KR2

1D8V_S3

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

M_A_RAS# 8,12 M_A_WE# 8,12 M_A_CAS# 8,12

M_CS0_R# 7,12 M_CS1_R# 7,12

M_CKE0_R# 7,12 M_CKE1_R# 7,12

CLK_DDR0 7 CLK_DDR0# 7

CLK_DDR1 7 CLK_DDR1# 7

M_A_SDM[7..0] 8

0329 SB

SCD1U16V

DDR_VREF_S37,40

12

C470

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR Socket

Leopard 3

1D8V_S37,9,10,12,38,39,40,41

DDR_VREF_S3

3D3V_S03,5,7,9,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_S0

C472

C472 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

DY

11 41Tuesday, August 16, 2005

of

1D8V_S3

3D3V_S0

-1

PLACE CAPS BETWEEN AND NEAR DDR SKTS PLACE EACH 0.1UF CAP CLOSE TO POWER

1D8V_S3

12

C200

SC1U6D3V2KX

12

C146

C146 SC1U6D3V2KX

SC1U6D3V2KX

12

SC2D2U6D3V3MX-1

C203

C203 SCD1U16V

SCD1U16V

C355

12

C175

C175 SC1U6D3V2KX

SC1U6D3V2KX

12

C365

C365 SC1U6D3V2KX

SC1U6D3V2KX

12

C375

C375 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C366

SC2D2U6D3V3MX-1

12

C164

C164 SC1U6D3V2KX

SC1U6D3V2KX

12

C157

C157 SC1U6D3V2KX

SC1U6D3V2KX

12

C147

C147 SCD1U16V

SCD1U16V

C383

C383 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C384

SC2D2U6D3V3MX-1

C170

C170 SCD1U16V

SCD1U16V

12

C165

C165 SC1U6D3V2KX

SC1U6D3V2KX

12

C174

C174 SCD1U16V

SCD1U16V

12

EC39

EC39 SCD1U16V

SCD1U16V

12

C392

SC2D2U6D3V3MX-1

For 1GB Memory

12

C166

C166 SC1U6D3V2KX

SC1U6D3V2KX

12

C198

C198 SCD1U16V

SCD1U16V

12

EC36

EC36 SCD1U16V

SCD1U16V

12

C390

SC2D2U6D3V3MX-1

12

C364

C364 SC1U6D3V2KX

SC1U6D3V2KX

12

C192

C192 SCD1U16V

SCD1U16V

12

EC42

EC42 SCD1U16V

SCD1U16V

12

SC2D2U6D3V3MX-1

C389

12

C363

C363 SCD1U16V

SCD1U16V

C186

C186 SCD1U16V

SCD1U16V

EC44

EC44 SCD1U16V

SCD1U16V

12

TC23

TC23 ST100U4VBM-U

ST100U4VBM-U

M_CKE2_R#7,11

M_B_BS1#8,11

M_B_A08,11 M_B_A28,11

M_CS3_R#7,11 M_B_CAS#8,11

M_B_WE#8,11

M_B_BS0#8,11

M_B_A78,11

M_CKE3_R#7,11

Address / Command

M_A_BS1#8,11 M_A_RAS#8,11 M_CS0_R#7,11

M_A_A138,11

M_B_A98,11

M_B_BS2#8,11

M_B_A138,11

M_CS2_R#7,11 M_B_RAS#8,11

M_A_WE#8,11

M_A_BS0#8,11 M_A_CAS#8,11 M_CS1_R#7,11

M_CKE0_R#7,11

M_A_BS2#8,11

M_A_A128,11

M_A_A98,11

M_CKE1_R#7,11

M_A_A118,11

M_A_A88,11

M_A_A58,11

M_A_A18,11 M_A_A08,11 M_A_A38,11

M_A_A108,11

M_A_A78,11 M_A_A68,11 M_A_A48,11 M_A_A28,11

M_B_A48,11 M_B_A68,11

M_B_A88,11

M_B_A128,11

M_B_A118,11

M_B_A108,11

M_B_A18,11 M_B_A38,11 M_B_A58,11

Control

RN69

1 2 3 4 5

SRN56-1

RN70

1 2 3 4 5

SRN56-1

SRN56-1 RN71

RN71

1 2 3 4 5

SRN56-1

0D9V_S0

RN68

1 2 3 4 5

SRN56-1

8 7 6

RN22

1 2 3 4 5

SRN56-1

SRN56-1 RN7

RN7

1 2 3 4 5

SRN56-1

SRN56-1 RN49

RN49

1 2 3 4 5

SRN56-1

SRN56-1 RN21

RN21

1 2 3 4 5

SRN56-1

SRN56-1 RN50

RN50

1 2 3 4 5

RN48

1 2 3 4 5

SRN56-1

SRN56-1 RN67

RN67

1 2 3 4 5

SRN56-1

SRN56-1 RN8

RN8

1 2 3 4 5

SRN56-1

8 7 6

0D9V_S0

8 7 6

1 2

C180

C180 SCD01U16V2KX

SCD01U16V2KX

DY

C404

C404 SCD1U16V

SCD1U16V C358

C358 SCD01U16V2KX

SCD01U16V2KX

DY

C196

C196 SCD1U16V

SCD1U16V C356

C356 SCD01U16V2KX

SCD01U16V2KX

DY

C399

C399 SCD1U16V

SCD1U16V C197

C197 SCD01U16V2KX

SCD01U16V2KX

DY

C202

C202 SCD1U16V

SCD1U16V

C396

C396 SCD1U16V

SCD1U16V C403

C403 SCD01U16V2KX

SCD01U16V2KX

DY

C194

C194 SCD1U16V

SCD1U16V C357

C357 SCD01U16V2KX

SCD01U16V2KX

DY

C161

C161 SCD1U16V

SCD1U16V C388

C388 SCD01U16V2KX

SCD01U16V2KX

DY

C181

C181 SCD1U16V

SCD1U16V C385

C385 SCD01U16V2KX

SCD01U16V2KX

DY

C405

C405 SCD1U16V

SCD1U16V C177

C177 SCD01U16V2KX

SCD01U16V2KX

DY

C401

C401 SCD1U16V

SCD1U16V C187

C187 SCD01U16V2KX

SCD01U16V2KX

DY

C193

C193 SCD1U16V

SCD1U16V C387

C387 SCD1U16V

SCD1U16V

DY

C395

C395 SCD1U16V

SCD1U16V

C171

C171 SCD01U16V2KX

SCD01U16V2KX

DY

0D9V_S0

0D9V_S039

1D8V_S3

1D8V_S37,9,10,11,38,39,40,41

0D9V_S0

R585 56R2JR585 56R2J

M_ODT07,11 M_ODT17,11 M_ODT27,11 M_ODT37,11

1 2

R586 56R2JR586 56R2J

1 2

R587 56R2JR587 56R2J

1 2

R588 56R2JR588 56R2J

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

DDR Serial/Terminator Resistor

Leopard 3

12 41Thursday, August 18, 2005

of

-1

A

hexainf@hotmail.com

Digital Signal CONN

CN5

21

4 4

22

JST-CON20

USB_PP1

1

USB_PN1

2 3

USB_PP3

4

USB_PN3

5 6

CRMA_CN5

7

LUMA_CN5

8 9 10 11 12 13 14 15 16 17 18 19 20

5V_S3

DDC_DATA 15 DDC_CLK 15

JVGA_HS 7 JVGA_VS 7

5V_S0

CRT_R 15 CRT_G 15 CRT_B 15

USB_PP1 17 USB_PN1 17

USB_PP3 17 USB_PN3 17

LINE-OUT

LUMA_CN5

CRMA_CN5

BC12

SC3P50V2CN

12

SC3P50V2CN

Analog Signal CONN

CN6

11

MIC_PR

1 2 3 4 5

3 3

2 2

1 1

6 7 8 9 10 12

MOLEX-CON10-1

AUD_AGND

BC0EX126

BC0EX226

DOCK_PRESENT

EXT_MIC_1 27 EXT_MIC_2 27

HP_OUT_R 27 HP_OUT_L 27

EARPHONE 28 LID_SW 14

3D3V_S0

12

R432

R432 47KR2

47KR2

63.47334.1D1

1 2

DY

1 2

DY

Please close to ICH6

R63

1 2

47R2

12

R64

R64 2K2R2

2K2R2

EARPHONE

DUMMY-R2

5V_S0

1

MIC-IN

R495

R225

12

R309

R309 10KR2

10KR2

PR_INSERT#

3

Q17

Q17 S2N3904-U3

S2N3904-U3

2

PR_PRESENT#

ICH_PME# 17,25,29

PCI_AD24 17,22,25,29

PR_INSERT# 31

1 2

BLM11B750S

L12

1 2

L15

BC13

SC3P50V2CN

LID_SW

B

BLM11B750S

C99

DY

3

12

D31

BAV99LT1

12

C102

C102 SC3P50V2CN

SC3P50V2CN

DY

3D3V_S3

2

1

LUMA

CRMA

R94

R94 150R2F

150R2F

AUD_AGND

D29

VOL_UP_DK# VOL_DWN_DK#

12

R91

R91 150R2F

150R2F

1 2

3

BAV99LT1

DY

5V_S3 AD+

12

C337

C337 SCD1U16V

SCD1U16V

SPDIF_OUT27

EC124

EC124 SCD1U16V

SCD1U16V

DY

C

5V_S0 5V_S0

D30

2

1

AUD_AGND DK_SPKR_R+28 DK_SPKR_L+28

VOL_DWN_DK#31

12

R65

R65 1KR2

1KR2

5V_S0

12

C70

SCD1U25V3KX

SPDIF_OUT

VOL_UP_DK#31

DCBATOUT_BEAD

12

D30

2

3

1

BAV99LT1

DY

PR_PRESENT#

RJ45-426 RJ45-526 RJ45-126 RJ45-226

USB_PN717 USB_PP717

TP40TPAD30 TP40TPAD30

R333

1 2

0R2-0

5V_DOCK

DCBATOUT_BEAD

C458

SCD1U16V

1 2

L19

C464

C464 SC470P25V2KN

SC470P25V2KN

CRMA_PR

CIR_PR

AD+ AD+

12

C69

C69 SCD1U25V3KX

SCD1U25V3KX

SPDIF

BLM18PG600SN1

D

Docking Connector

CN12

MIC_PR

USB_PN7 USB_PP7

IR_OUT

COMP_PR

LUMA_PR

5V_S0

12

SC470P25V2KN

CN12

MH1

MH2

C338

C338 SCD1U16V

SCD1U16V

C51

Place near the DOCK

60

5556

12 34

56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546 4748 4950 5152 5354

5758

59

FOX-CONN58D-U3

LUMA_PR

C296

SC47P50V2JN

COMP_PR

12

C295

SC47P50V2JN

SPDIF

5V_Dock_S0

1 2

DOCK_PRESENT

HIGH B1

1 2

L26

12

SC47P50V2JN

CRMA_PR

1 2

L24

12

C294

SC47P50V2JN

1 2

IND-1D2UH

L25

C298

SC47P50V2JN

IND-1D2UH

C297

IND-1D2UH

12

R335

150R2F

0R2-0

FUNCTIONINPUT

R43

5V_DOCK

B0LOW

LUMA_PR_1

12

R334

150R2F

CRMA_PR_1

12

C307

SC47P50V2JN

12

RJ45-7 26 RJ45-8 26

RJ45-3 26 RJ45-6 26 JACK_DETECT# 28

5V_S0

MUTE_LED 14,31

1394_TPA1P_PR 26 1394_TPA1N_PR 26 1394_TPB1P_PR 26 1394_TPB1N_PR 26

LUMA

12

R372

R372 150R2F

150R2F

JACK_DETECT# MUTE_LED

AUD_AGND

MIC_PR DK_SPKR_R+ DK_SPKR_L+ COMP_PR VOL_UP_DK# VOL_DWN_DK# DOCK_PRESENT PR_PRESENT#

BT_LED

BT_LED 14,26

Place near the GMCH

U7

1

B1

2

GND B03A

U8

1

B1

2

GND B03A

VCC

NC7SB3157P6X-U

VCC

NC7SB3157P6X-U

R536

1 2

0R2-0

6

S

5 4

6

S

5 4

E

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

5V_S0

3D3V_S03,5,7,9,11,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

5V_S014,18,19,20,21,23,24,27,28,29,32,36,39,40,41

5V_S314,26,28,30,32,37,38,40,41

DCBATOUT14,35,37,38,39,40,41

5V_AUX14,15,35,37,38,39

PR_INSERT#

PR_INSERT#CRMA

DCBATOUT

EC8

EC8 SCD1U16V

SCD1U16V EC11

EC11 SCD1U16V

SCD1U16V EC93

EC93 SCD1U16V

SCD1U16V EC95

EC95 SC1000P16V2KX

SC1000P16V2KX EC94

EC94 SC1000P16V2KX

SC1000P16V2KX EC102

EC102 SC1000P16V2KX

SC1000P16V2KX EC100

EC100 SC1000P16V2KX

SC1000P16V2KX EC101

EC101 SC1000P16V2KX

SC1000P16V2KX EC103

EC103 SC1000P16V2KX

SC1000P16V2KX EC20

EC20 SC1000P16V2KX

SC1000P16V2KX EC92

EC92 SC1000P16V2KX

SC1000P16V2KX EC19

EC19 SC1000P16V2KX

SC1000P16V2KX

LUMA_VGA 7

CRMA_VGA 7

COMP_VGA 7

3D3V_S0

5V_S0

5V_S3

5V_AUX

5V_S3

F3

1 2

FUSE-2A6V

12

A

5V_DOCK

12

C305

C306

SCD1U16V

SC4D7U10V5ZY

100 mil

12

TC15

TC15 ST47U6D3V-U1

ST47U6D3V-U1

DY

Wistron Corporation

R259

C

1 2 1 2

0R2-0

0R2-0 R371

R371 0R2-0

0R2-0

CIR_KBC 31

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet

Board to board conn/ Docking

CIR15

CIR_PR

CIR,CIR_PR,CIR_KBC are connect togather. default setting 12/12

B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

E

-1

of

13 41Monday, August 15, 2005

-1

A

INVERTER/LCD

3D3V_LCD_S0

12

BC11

4 4

3 3

BRIGHTNESS31

FPBACK31

SC1000P16V2KX

2 2

PR

Botton

PA

Top

change R from 100 to 200 ohm

5V_S0_PR

R546

1 2

1K2R2J-1

5V_S0_PR

R547

1 2

1K2R2J-1

5V_S0_PR

1 1

5V_AUX_PR

5V_S3_PR

R258

1 2

R256

1 2

1K2R2J-1

R257

SCD1U16V

C292

Amber

LED4

Blue

LED8

LED10

1 2

LED-O-10

LED-O-10 LED11

LED11

1 2

LED-O-10

1K2R2J-1

A

BC11

SC10U10V6ZY-U

TXAOUT0+7

TXAOUT1-7

TXAOUT1+7

TXAOUT2-7

TXAOUT2+7

TXACLK-7

TXACLK+7

TXBOUT0-7

TXBOUT0+7

TXBOUT1-7

TXBOUT1+7

TXBOUT2-7

TXBOUT2+7

TXBCLK-7

TXBCLK+7

EDID_CLK7

EDID_DAT7

12

BC55

SC1000P16V2KX

Amber

LED5 LED6 LED2LED1

Blue

LED9

LED7

CAPS_LED#

7421_LED#

LED-O-11-U

NC

LED4

LED-O-11-U

BC10

5V_S0

12

C291

SCD1U16V

NC

LED6

NC

LED5

12

3D3V_S0

DCBATOUT

12

BC56

SCD1U16V

IRCHRPWR HDD

U42

U64

IDE_LED#

12

PWR_LED#

CHG_LED#

41 43

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

12

BC59

BC59 SCD1U

SCD1U

40

CAPS 7421

Amber Amber

Blue Blue

LED1 LED2

CN3

IPEX-CON40-1-U1

5V_S0_PA

5V_AUX_PA

B

ID_DET31,32

B

MH1

45

46 MH2 4442

1 2

5V_S3_PA

1 2

R93

100R2

R112

200R2J

R549

200R2J

R550

1 2

R548

200R2J

5V_AUX

12

2N7002-F-GP

200R2J

LCDVDD_ON7

R543

R543 100KR2

100KR2

Q38

G

LCDVDD_ON

7421_LED22

CAPS_LED31

NUM_LED31

12

DY

ID_DET

S D

LED1

1 2

LED-B-53

LED-B-53 LED2

LED2

1 2

LED-B-53

LED-B-54-U

R542

R542 10KR2

10KR2

NC

LED9

NC

LED8

LED-B-54-U

NC

LED7

1 2

2

IN

12

ID_DET#

12

R315

Q18

R1

R2

DTC114EUA-U1

2

IN

2

IN

2

IN

R544

R544 47KR2

47KR2

1 2

CAPS_LED#

7421_LED#

12

C

LCDVDD_ON_1

1KR2

SC1U10V3ZY

OUT

3

GND

1

Q9

R1

R2

DTC114EUA-U1

DTC114EUA-U1 Q6

Q6

R1

R2

DTC114EUA-U1

DTC114EUA-U1 Q22

Q22

R1

R2

DTC114EUA-U1

5V_AUX

1

R545

47KR2

IDE_LED#

CHG_LED#

PWR_LED#

C

BC60

5V_S5

3 1

Q37

Q37 2N3906-2-U

2N3906-2-U

3 2

1

OUT

GND

OUT

GND

OUT

GND

3D3V_S0

1 2

12

R314

R314 10KR2

10KR2

Q39

Q39 2N3906-2-U

2N3906-2-U

3 2

R317

R317 270KR2F

270KR2F

12

BC57

SCD1U16V

2N7002-F-GP

7421_LED#

CAPS_LED#

NUM_LED# 32

5V_AUX_PA

5V_AUX_PR

SI3865_R1C1

U49

6

R1/C1

5

ON/OFF

4

S2

SI3865DV-U

84.03865.03D

3D3V_LCD_S0

12

G

S D

MUTE_LED13,31

Q19

R316

R316 150R2

150R2

1 2

ID_DET

ID_DET#

BC61

BC61 SC6800P50V3KX

SC6800P50V3KX

1

R2

2

D2

3

D2

802_BT_LED#32

R538

1 2

SI3865_R2

1

47KR2

R540

1 2

Q20

R1

2

IN

DTC114EUA-U1

D

3D3V_LCD_S0

12

R318

R318 47KR2

47KR2

5V_S3

3 2

47KR2

R2

D

OUT

3

GND

1

Q33

Q33 2N3906-2-U

2N3906-2-U

1

3 2

OUT

3

GND

1

Q21

R1

R2

DTC114EUA-U1

5V_S3_PA

5V_S3_PR

Q35

Q35 2N3906-2-U

2N3906-2-U

E

3D3V_S03,5,7,9,11,13,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_S313,30,40

5V_S013,18,19,20,21,23,24,27,28,29,32,36,39,40,41

5V_S518,20,36,38

3D3V_S3

12

R431

1 2

100KR2

802_BT_LED

1 2

CHG_LED31

PWR_LED31

100KR2

R539

47KR2

1 2

IDE_LED#

D19

3

CH715F

5V_S0

1

3 2

R541

47KR2

Q14

R1

2

IN

DTC114EUA-U1

DTC114EUA-U1 Q13

Q13

R1

2

IN

DTC114EUA-U1

Inverter/LCD

Leopard 3

12

C352

C352 SC1000P50V

SC1000P50V

2

IN

ID_DET

ID_DET#

MUTE_LED# 32

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DCBATOUT35,37,38,39,40,41TXAOUT0-7

R430

R430 4K7R2

4K7R2

LID_SW

2

1

Q34

Q34 2N3906-2-U

2N3906-2-U

1

R2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Q36

Q36 2N3906-2-U

2N3906-2-U

3 2

OUT

3

GND

1

OUT

3

GND

1

E

LID_SW 13KBC_LID#31

802_ACT_LED 29

BT_LED 13,26

5V_S0_PA

5V_S0_PR

HDD_LED# 21 CDROM_LED# 21

CHG_LED#

14 41Monday, August 15, 2005

of

3D3V_S0

3D3V_S3

5V_S0

5V_S5

DCBATOUT

PWR_LED# 32

-1

A

hexainf@hotmail.com

B

C

D

E

PA & PR diffent parts

PA PR

LED1 LED2 LED4 LED5

4 4

LED6 LED7 LED8 LED9 U64 U42 R256 R257 R258 R93 R112

CBUS1 R176 R177 Dummy

3 3

83.00190.Y70

83.00190.Y70 Dummy Dummy Dummy

83.00110.E70

56.15006.001 Dummy

63.20134.1D1

83.00190.W70

83.00110.D70

83.00110.D70 Dummy Dummy Dummy Dummy

56.15006.001

63.12234.1D1

21.H0088.001 21.H0088.001 Dummy63.10334.1D1

63.10334.1D1

2D5V_S0

CRT

DDC_CLK13 DDC_DATA13

12

R92

75R2F

JVGA_HS JVGA_VS

12

75R2F

JVGA_HS7,13 JVGA_VS7,13

VGA_BLUE7

VGA_GREEN7

VGA_RED7

R85

12

R84

75R2F

1 2 1 2

L8

L8 L7

L7

C101

12

SC10P50V2JN-1

DDC_CLK_CON

BLM11B750S

DDC_DATA_CON

BLM11B750S

C100

12

SC10P50V2JN-1

VGA_HSYNC 7,13 VGA_VSYNC 7,13

C84

12

SC10P50V2JN-1

1 2

BLM11B750S

L6

1 2

BLM11B750S

L5

1 2

BLM11B750S

L9

U12

2N7002DW

34 2 1

GMCH_DDCDATA7

DDC_CLK_CON

C87

C86

C103

12

SBSB

SC10P50V2JN-1

C86

12

SC10P50V2JN-1

CRT_B CRT_G

CRT_R

SC10P50V2JN-1

5 6

Close to CN5

2D5V_S0

DDC_DATA_CON

CRT_B 13

CRT_G 13

CRT_R 13

4

RN37

RN37 SRN2K2J

SRN2K2J

1

2 3

GMCH_DDCCLK 7

Close to U17 (N/B)

2 2

CIR

DY

1 1

A

FOR FF

IR-TSOP6236-U

GND GND

VS

OUT

U64

IR-TSOP6236-U

GND GND

VS

OUT

U42

10KR2

1 2 3 4

R260

5V_AUX

12

CIR

R261

R261 100R2

100R2

1 2

C273

C273 SC4D7U10V5ZY

SC4D7U10V5ZY

CIR 13

B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

C

D

Date: Sheet

CRT/ CIR

Leopard 3

E

-1

of

15 41Monday, August 15, 2005

A

3D3V_AUX RTC_AUX_S5

D13

21

CH751H-40-U

RTC_VCC

D14

4 4

RTC1

RTC1 ETY-CON3-S1

ETY-CON3-S1

The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103

3 3

2 2

12

R250

R250 1KR2

1KR2

BAT

12345

D14

CH751H-40-U

1 2

21

12

R508

R508 1MR2

1MR2

RSMRST#20,31,39 AC97_BITCLK27,30

R507

20KR2

C455

C455 SC1U10V3ZY

SC1U10V3ZY

3D3V_S0

12

C257

C257 SC1U10V3ZY

SC1U10V3ZY

RTC circuitry

21

12

G66

G66 GAP-OPEN

GAP-OPEN

R249

R249 10KR2

10KR2

G

S D

Q11

Q11 2N7002-F-GP

2N7002-F-GP

DY

B

XTAL-32D768K-4P

AC97_SYNC27,30

AC97_RST#27,30

AC97_DIN027 AC97_DIN130

AC97_DOUT27,30

Place within 500 mils of ICH6 ball

1 2

R194

1 2

DY

R195

R195 0R2-0

0R2-0

C256

C256 SC4D7P50V3CN

SC4D7P50V3CN

X4

2 3

C255

SC3D9P50V3CN

10KR2

R192

1 2

33R2

33R2 R191

R191

1 2

33R2

1 2

41

R493

33R2

1 2

IDE_IORDY21

IDE_IRQ1421

IDE_DACK#21

IDE_IOW#21

IDE_IOR#21

12

R228

R228 10MR2J

10MR2J

RCT_RST# INTRUDER#

TP67TPAD30 TP67TPAD30

LAN_RSTSYNC

AC97_SYNC_ICH AC97_RST#_ICH

AC97_DOUT_ICH

R496

0R2-0

SATA_RBIAS_PN

RCT_X1 RCT_X2

ICH_TP5

AA2 AA3

AA5

D12 B12 D11

B11 E12

E11 C13

C12 C11 E13

C10

A10

B10

AC19

AE3 AD3 AG2

AF2 AD7

AC7

AF6 AG6

AC2 AC1

AG11

AF11

AF16 AB16 AB15 AC14 AE16

Y1 Y2

F13 F12

B9

F11 F10

C9

C

RTCX1 RTCX2

RTCRST# INTRUDER#

INTVRMEN

EE_CS EE_SHCLK EE_DOUT EE_DIN

LAN_CLK LAN_RSTSYNC LANRXD[0]

LANRXD[1] LANRXD[2]

LANTXD[0] LANTXD[1] LANTXD[2]

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST# ACZ_SDIN[0]

ACZ_SDIN[1] ACZ_SDIN[2]

ACZ_SDO

SATALED# SATA[0]RXN

SATA[0]RXP SATA[0]TXN SATA[0]TXP

SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP

SATA_CLKN SATA_CLKP

SATARBIAS# SATARBIAS

IORDY IDEIRQ DDACK# DIOW# DIOR#

U35A

LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]

LPC

RTCLAN

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

CPUSLP# DPRSLP#

DPSLP#

CPU

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

STPCLK#

THRMTRIP#

SATA AC-97/AZALIA

IDE

DDREQ

ICH6M

A20M#

FERR#

INIT#

INTR

RCIN#

NMI

SMI#

DA[0] DA[1] DA[2]

DCS1# DCS3#

DD[0] DD[1] DD[2] DD[3] DD[4] DD[5] DD[6] DD[7] DD[8]

DD[9] DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]

P2 N3 N5 N4

N6 P4

P3

AF22 AF23

AE27 AE24

AD27 AF24 AG25 AG26

AE22 AF27 AG24

AD23 AF25

AG27 AE26 AE23

AC16 AB17 AC17

AD16 AE17

AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13

AB14

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LDRQ1#

H_CPUSLP#_ICH H_DPRSLP#_R

H_DPSLP#_R H_FERR_R

H_THERMTRIP_R

D

LPC_LAD[3..0] 31

LPC_LDRQ0# 31

LPC_LFRAME# 31

ICH_A20GATE 31 H_A20M# 4

R310 0R2-0

1 2

R160 0R2-0R160 0R2-0

1 2

R148 0R2-0R148 0R2-0

1 2

R159 56R2JR159 56R2J

1 2

H_PWRGD 4 H_IGNNE# 4 H_INIT# 4

H_INTR 4 RCIN# 31 H_NMI 4

H_SMI# 4 H_STPCLK# 4

1 2

IDE_A0 21 IDE_A1 21 IDE_A2 21

IDE_CS#0 21 IDE_CS#1 21

IDE_D0 21 IDE_D1 21 IDE_D2 21 IDE_D3 21 IDE_D4 21 IDE_D5 21 IDE_D6 21 IDE_D7 21 IDE_D8 21 IDE_D9 21 IDE_D10 21 IDE_D11 21 IDE_D12 21 IDE_D13 21 IDE_D14 21 IDE_D15 21

IDE_DREQ 21

Open J5G1 for Dothan A step Shunt for Dothan B step & all Yonah

DY

R158

56R2J

R6V7

Layout Note: R6V7 needs to placed within 2" of ICH6, R6V9 must be placed within 2" of R6V7 w/o stub.

H_CPUSLP# 4,6 H_DPRSLP# 4

H_DPSLP# 4

VCCP_GMCH_S0

H_DPSLP#

VCCP_GMCH_S0

12

R162

R162 56R2J

56R2J

VCCP_GMCH_S0

R6V9

12

R149

R149 56R2J

56R2J

DY

E

3D3V_AUX20,31,32,34,35,36,37

VCCP_GMCH_S04,5,6,7,9,10,18,36,40,41

RCIN# LPC_LDRQ1#

12/12 INTEL check list

H_FERR# 4

Dothan A

R157

R157 75R2

75R2

PM_THRMTRIP-I# 4,7

VCCP_GMCH_S0

Dothan B

12

R161

R161 56R2J

56R2J

DY

12

H_DPRSLP#

3D3V_S03,5,7,9,11,13,14,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

1 2 1 2

R501

R717 R388

DUMMY0R56R

VCCP_GMCH_S0

R488

10KR2

10KR2 10KR2

10KR2

0R

3D3V_S0

3D3V_AUX

3D3V_S0

R370

0R

DUMMY

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

ICH6-M (1 of 4)

Leopard 3

E

-1

16 41Tuesday, July 12, 2005

of

-1

A

hexainf@hotmail.com

U35B

PCI_AD[31..0]13,22,25,29

4 4

PCI_FRAME#22,25,29

3 3

TP79TPAD30 TP79TPAD30 TP80TPAD30 TP80TPAD30 TP34TPAD30 TP34TPAD30 TP33TPAD30 TP33TPAD30 TP78TPAD30 TP78TPAD30

PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP#

3D3V_S0

PCI_SERR# PCI_DEVSEL# PCI_PERR# PCI_LOCK#

3D3V_S0

2 2

PCI_REQ#5 INT_PIRQA# INT_PIRQC# INT_PIRQB#

3D3V_S0

1 1

1 2 3 4 5 6

DY

10KR2

RP4

SRP10K

SRP10K RP1

RP1

SRP10K

SRP10K RP2

RP2

SRP10K

R590

12

R591

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

ICH_TP8 ICH_TP9 ICH_TP10 ICH_TP11 ICH_TP12

3D3V_S0

10KR2

DUMMY-R2

DY

R245

12

R246

12

E2 E5 C2 F5 F3 E9 F2 D6 E6 D3 A2 D2 D5 H3 B4

J5 K2 K5 D4 L6

G3

H4 H2 H5 B3

M6

B2 K6 K3 A5 L1 K4

J3

N2 L2

M1

L3

AC5 AD5

AF4 AG4 AC9

10

INT_PIRQD#

9

INT_PIRQG#

8

INT_PIRQF#

7

INT_PIRQE#

10

INT_PIRQH#

9

PCI_REQ#2

8

PCI_REQ#3

7

PM_CLKRUN#

10

PCI_SERIRQ

9

MCH_SYNC#

8

PCI_REQ#0

7

PM_THRM#

10KR2

DUMMY-R2

12

R247

12

R248

AD[0] AD[1] AD[2] AD[3] AD[4] AD[5] AD[6] AD[7] AD[8] AD[9] AD[10] AD[11] AD[12] AD[13] AD[14] AD[15] AD[16] AD[17] AD[18] AD[19] AD[20] AD[21] AD[22] AD[23] AD[24] AD[25] AD[26] AD[27] AD[28] AD[29] AD[30] AD[31]

FRAME#

PIRQ[A]# PIRQ[B]# PIRQ[C]# PIRQ[D]#

RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]

3D3V_S0

U35B

PCI

Interrupt I/F

RESERVED

REQ[0]# GNT[0]# REQ[1]# GNT[1]# REQ[2]# GNT[2]# REQ[3]# GNT[3]#

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#

IRDY#

PCIRST# DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

PLTRST#

PCICLK

PIRQ[E]#/GPI[2]

PIRQ[F]#/GPI[3] PIRQ[G]#/GPI[4] PIRQ[H]#/GPI[5]

RSVD[6] RSVD[7] RSVD[8]

ICH6M

ICH6 Pullups

PM_SUS_STAT#31

SB

PCB_VER2 PCB_VER0 PCB_VER1

DY

DUMMY-R2

L5 C1 B5 B6 M5 F1 B8 C8 F7 E7 E8 F6 B7 D8

J6 H6 G4 G2

A3 E1

PAR

R2 C3 E3 C5 G5 J1 J2

R5 G6 P6

PME#

D9 C7 C6 M3

AD9 AF8 AG8 U3

TP[3]

PM_RI# SMB_LINK_ALERT# SMLINK0 SMLINK1

PCIE_WAKE# PM_BATLOW#_R

PM_SUS_STAT#

PCI_REQ#1 ICH_GPI7 GPI12

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

ICH_GNT3 PCB_VER2 ICH_GPO48 PCI_REQ#5 ICH_GPO17 ICH_GPI0_R ICH_GPO16

1 2 3 4 5

PUMA Board Version Setting

Ver. SA

SC 0

-1

1D5V_S0 3D3V_S5 3D3V_S0

1D5V_S0 5,7,9,18,21,38,39,41 3D3V_S5 18,19,21,25,29,31,35,37,39,40 3D3V_S0 3,5,7,9,11,13,14,16,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

A

-2

B

PCI_LOCK#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

ICH_TP13 ICH_TP14 ICH_TP15 ICH_TP16ICH_TP16

1 2 3 4 5

R504 5K6R2R504 5K6R2

1 2

R505 8K2R2R505 8K2R2

1 2

R506 10KR2

1 2

R190 10KR2R190 10KR2

1 2

R172 10KR2R172 10KR2

1 2

R500 10KR2R500 10KR2

1 2

RN36

8 7 6

SRN0

PCB_VER0

B

PCI_REQ#0 29 PCI_GNT#0 29 PCI_REQ#1 22 PCI_GNT#1 22 PCI_REQ#2 25 PCI_GNT#2 25

TP72 TPAD30TP72 TPAD30

TP75 TPAD30TP75 TPAD30 TP74 TPAD30TP74 TPAD30

R193

TP73 TPAD30TP73 TPAD30

PCI_C/BE#0 22,25,29 PCI_C/BE#1 22,25,29 PCI_C/BE#2 22,25,29 PCI_C/BE#3 22,25,29

PCI_IRDY# 22,25,29 PCI_PAR 22,25,29 ICH_PCIRST# 19 PCI_DEVSEL# 22,25,29 PCI_PERR# 22,25,29

PCI_SERR# 22,25,29 PCI_STOP# 22,25,29 PCI_TRDY# 22,25,29

PLT_RST# 19 CLK_ICHPCI 3 ICH_PME# 13,25,29

INT_PIRQE# 25,29 INT_PIRQF# 22 INT_PIRQG# 22

TP81 TPAD30TP81 TPAD30 TP31 TPAD30TP31 TPAD30 TP32 TPAD30TP32 TPAD30 TP83 TPAD30TP83 TPAD30

RN35

SRN10K

DY

ICH_TP16ICH_TP16 ICH_TP9 ICH_TP8 ICH_TP13

PCB_VER1

0 1 1

1 2

3D3V_S5

8 7 6

3D3V_S0

00 1SB

1

10KR2

PM_DPRSLPVR36

3D3V_S0

PCB_VER2

0 0 0 0 100

3D3V_S5

R227

R227 10KR2

10KR2

CPPE#21

C

3D3V_S0

RN33

1 2 3 4 5

SRN100K

13

TP76TPAD30 TP76TPAD30

1 2

R489

PM_PWRBTN#31

RSMRST#_KBC31

C

TP68TPAD30 TP68TPAD30

TP69TPAD30 TP69TPAD30 TP89TPAD30 TP89TPAD30

SRN100K

100R2

PM_SUS_CLK

SMB_LINK_ALERT# SMLINK0 SMLINK1 MCH_SYNC#

PM_SUS_STAT# SYS_RESET#

PCB_VER0 PCB_VER1

SMB_CLK19,21

SMB_DATA19,21

12

ICH_SPKR27

PM_BMBUSY#7

NEWCARD_RST#21

D34

S1N4148-U2

SB

DY

PM_STPPCI#3

PM_STPCPU#3,36

BT_EN26 WIRELESS_EN#29

PM_CLKRUN#22,25,29,31

PCIE_WAKE#21

PCI_SERIRQ22,29,31

PM_THRM#20

VRM_PWRGD20

CLK_ICH143 CLK48_USB3

TP77TPAD30 TP77TPAD30

PM_SLP_S3#21,28,31,37,38,40 PM_SLP_S4#21,31,37,38

ICH6_PWROK20

12

R481

R481 100KR2

100KR2

PM_RI#

8

SATA0_R1

7

SATA0_R2

6

SATA0_R3

ICH_GPI7

ECSMI# ECSCI# GPI12

ECSWI#

ICH6_GPO19

ICH6_GPO21

ICH_GPO27

ICH_SLP_S5#

PM_DPRSLPVR_R PM_BATLOW#_R

PLT_RST#

ECSMI#

ECSCI#

ECSWI#

R226

100KR2

T2

RI#

AF17

SATA[0]GP/GPI[26]

AE18

SATA[1]GP/GPI[29]

AF18

SATA[2]GP/GPI[30]

AG18

SATA[3]GP/GPI[31]

Y4

SMBCLK

W5

SMBDATA

Y5

LINKALERT#

W4

SMLINK[0]

U6

SMLINK[1]

AG21

MCH_SYNC#

F8

SPKR

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#

AD19

BMBUSY#

AE19

GPI[7]

R1

GPI[8]

W6

SMBALERT#/GPI[11]

M2

GPI[12]

R6

GPI[13]

AC21

STP_PCI#

AB21

GPO[19]

AD22

STP_CPU#

AD20

GPO[21]

AD21

GPO[23]

V3

GPIO[24]

P5

GPIO[25]

R3

GPIO[27]

T3

GPIO[28]

AF19

CLKRUN#

AF20

GPIO[33]

AC18

GPIO[34]

U5

WAKE#

AB20

SERIRQ

AC20

THRM#

AF21

VRMPWRGD

E10

CLK14

A27

CLK48

V6

SUSCLK

T4

SLP_S3#

T5

SLP_S4#

T6

SLP_S5#

AA1

PWROK

AE20

DPRSLPVR

V2

BATLOW#

U1

PWRBTN#

V5

LAN_RST#

Y3

RSMRST#

3D3V_S5

12

R502

R502 100KR2

100KR2

12

D

U35C

H25

PERn[1]

H24

PERp[1]

G27

PETn[1]

G26

PETp[1]

K25

PERn[2]

K24

PERp[2]

J27

PETn[2]

J26

PETp[2]

M25

PERn[3]

M24

PERp[3]

L27

PETn[3] PETp[3]

PERn[4] PERp[4] PETn[4] PETp[4]

DMI[0]RXN

DMI[0]RXP DMI[0]TXN DMI[0]TXP

DMI[1]RXN

DMI[1]RXP DMI[1]TXN DMI[1]TXP

DMI[2]RXN

DMI[2]RXP DMI[2]TXN DMI[2]TXP

DMI[3]RXN

DMI[3]RXP DMI[3]TXN DMI[3]TXP

DMI_CLKN

DMI_CLKP

OC[0]# OC[1]# OC[2]# OC[3]#

USBP[0]N USBP[0]P USBP[1]N USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N USBP[7]P

USBRBIAS

L26 P24

P23 N27 N26

T25 T24 R27 R26

V25 V24 U27 U26

Y25 Y24 W27 W26

AB24 AB23 AA27 AA26

AD25 AC25

F24 F23 C23

D23 C25 C24

C27 B27 B26 C26

C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15 A14 B14

A22 B22

ECSMI#_KBC 31

ECSCI#_KBC 31

ECSWI#_KBC 31

GPIO

PCI-EXPRESSDirect Media Interface

DMI_ZCOMP

DMI_IRCOMP

OC[4]#/GPI[9] OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]

USB

POWER MGT CLOCKS

USBRBIAS#

ICH6M

R503

R503 100KR2

100KR2

D12

1

6

2

5

34

CH731U-U

D

E

PCIE AC coupling caps need to be within 250 mils of the driver.

PCIE_RXN0 21

PCIE_TXN0_RSATA0_R0 PCIE_TXP0_R

USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

USB_OC#0

USB_OC#1 USB_OC#2 USB_OC#3

Place within 500 mils of ICH

PCIE_RXP0 21

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R

TP27 TPAD30TP27 TPAD30 TP28 TPAD30TP28 TPAD30

USB_PN1 13 USB_PP1 13 USB_PN2 26 USB_PP2 26 USB_PN3 30 USB_PP3 30 USB_PN4 30 USB_PP4 30 USB_PN5 21 USB_PP5 21 USB_PN6 13 USB_PP6 13 USB_PN7 13 USB_PP7 13

USB_RBIAS_PN

1 2

C207 SCD1U16VC207 SCD1U16V

1 2

SCD1U16V

C208

3D3V_S5

R156

1 2

22D6R2F

SCD1U16V

Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.

1D5V_S0

Place within 500 mils of ICH

12

R479

R479 24D9R2F

24D9R2F

RP3

USB_OC#0 USB_OC#1 USB_OC#3 USB_OC#4 USB_OC#2

RP3

1 2 3 4 5 6

SRP10K

Intel 22.6 ohm 1%

ICH6-M Strapping Options

FUNCTION

REF

No Reboot

R7F9

R7F8

A16 Swap Override

R7F7

Boot BIOS

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

DEFAULT OPTIONAL OVERRIDE

NO_STUFF

ICH6-M (2 of 4)

Leopard 3

STUFF

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

17 41Monday, August 15, 2005

E

PCIE_TXN0 21 PCIE_TXP0 21

10

USB_OC#5

9 8

USB_OC#7

7

USB_OC#6

of

3D3V_S5

-1

A

Layout Note: Place above caps within 100 mils of ICH near F27, P27, AB27

1D5V_S0

C442

DY

1D5V_S0

C444

DY

12

1D5V_S0

1 2

GAP-CLOSE-PWR

3D3V_S0

12

C409

SCD1U10V2MX-1

12

SCD1U10V2MX-1

12

SCD1U10V2MX-1

C211

C211 SCD01U16V3KX

SCD01U16V3KX

G37

12

TC9

4 4

Layout Note: IDE decoupling

3D3V_S0

Layout Note: PCI decoupling

3D3V_S0

3 3

Place within 100 mils of ICH near pin AG5

Place within 100

mils of ICH near pin AG9

2 2

1 1

1D5V_S0

Place within 100 mils of ICH

Place within 100 mils of ICH near E26, E27

Place within 100 mils of ICH pin AG10

G32

1 2

GAP-CLOSE-PWR

1D5V_GPLL_ICH_S0

SC10U10V5ZY-L

3D3V_S0

12

C236

C236 SCD1U10V2MX-1

SCD1U10V2MX-1

A

ST220U10V-U

DY

12

SCD1U10V2MX-1

12

C210

12

C426

SCD1U10V2MX-1

Place within 100 mils of ICH pin AE1

Intel dummy

Place within 100 mils of ICH pin A13

TC9

C252

C252 SC10U10V5ZY-L

SC10U10V5ZY-L

C225

C225 SC10U10V5ZY-L

SC10U10V5ZY-L

3D3V_S5

12

C424

SCD1U10V2MX-1

12

NO_STUFF NO_STUFF

C445

SCD1U10V2MX-1

DY

12

NO_STUFF NO_STUFF

C238

SCD1U10V2MX-1

DY

1D5V_ICH_S0

12

C456

SCD1U10V2MX-1

DY

Place within 100 mils of ICH pin V7

12

C441

C441 SCD1U10V2MX-1

SCD1U10V2MX-1

B

12

C209

SCD1U10V2MX-1

12

C237

DY

12

C443

DY

ICH6_VCCLAN3D3V

B

AA22

VCC1_5_B

AA23

VCC1_5_B

AA24

VCC1_5_B

AA25

VCC1_5_B

AB25

VCC1_5_B

AB26

VCC1_5_B

AB27

VCC1_5_B

F25

VCC1_5_B

F26

VCC1_5_B

F27

VCC1_5_B

G22

VCC1_5_B

G23

VCC1_5_B

G24

VCC1_5_B

G25

VCC1_5_B

H21

VCC1_5_B

H22

VCC1_5_B

J21

VCC1_5_B

J22

VCC1_5_B

K21

VCC1_5_B

K22

VCC1_5_B

L21

VCC1_5_B

L22

VCC1_5_B

M21

VCC1_5_B

M22

VCC1_5_B

N21

VCC1_5_B

N22

VCC1_5_B

N23

VCC1_5_B

N24

VCC1_5_B

N25

VCC1_5_B

P21

VCC1_5_B

P25

VCC1_5_B

P26

VCC1_5_B

P27

VCC1_5_B

R21

VCC1_5_B

R22

VCC1_5_B

T21

VCC1_5_B

T22

VCC1_5_B

U21

VCC1_5_B

U22

VCC1_5_B

V21

VCC1_5_B

V22

VCC1_5_B

W21

VCC1_5_B

W22

VCC1_5_B

Y21

VCC1_5_B

Y22

VCC1_5_B

AA6

VCC1_5_A

AB4

VCC1_5_A

AB5

VCC1_5_A

AB6

VCC1_5_A

AC4

VCC1_5_A

AD4

VCC1_5_A

AE4

VCC1_5_A

AE5

VCC1_5_A

AF5

VCC1_5_A

AG5

VCC1_5_A

AA7

VCC1_5_A

AA8

VCC1_5_A

AA9

VCC1_5_A

AB8

VCC1_5_A

AC8

VCC1_5_A

AD8

VCC1_5_A

AE8

VCC1_5_A

AE9

VCC1_5_A

AF9

VCC1_5_A

AG9

VCC1_5_A

AC27

VCCDMIPLL

E26

VCC3_3

AE1

VCCSATAPLL

AG10

VCC3_3

A13

VCCLAN3_3/VCCSUS3_3

F14

VCCLAN3_3/VCCSUS3_3

G13

VCCLAN3_3/VCCSUS3_3

G14

VCCLAN3_3/VCCSUS3_3

A11

VCCSUS3_3

U4

VCCSUS3_3

V1

VCCSUS3_3

V7

VCCSUS3_3

W2

VCCSUS3_3

Y7

VCCSUS3_3

A17

VCCSUS3_3

B17

VCCSUS3_3

C17

VCCSUS3_3

F18

VCCSUS3_3

G17

VCCSUS3_3

G18

VCCSUS3_3

U35E

COREIDEPCI

PCIE

VCCSUS1_5 VCCSUS1_5

VCCSUS1_5

SATA

USB CORE USB

PCI/IDE

REF

V5REF_SUS

VCCUSBPLL

VCCSUS3_3

VCCLAN1_5/VCCSUS1_5 VCCLAN1_5/VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

ICH6M

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A

VCC2_5 VCC2_5

V5REF V5REF

VCCRTC

V_CPU_IO V_CPU_IO V_CPU_IO

F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19

AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12

P1 M7 L7 L4 J7 H7 H1 E4 B1 A6

U7 R7

G19 G20

F20 E24 E23 E22 E21 E20 D27 D26 D25 D24

G8 AB18

P7

AA18 A8

F21 A25

A24 AB3

G11 G10

AG23 AD26 AB22

G16 G15 F16 F15 E16 D16 C16

C

12

C417

C417 SCD1U10V2MX-1

SCD1U10V2MX-1

ICH_VCC1_5

SCD1U10V2MX-1

ICH6_VCCLAN1D5V

12

SCD1U10V2MX-1

C

12

C438

SCD1U10V2MX-1

DY

Place within 100 mils of ICH pin AG13, AG16

C224

Layout Note: Distribute in PCI section near pin A2-A6 near D1-H1

12

C435

12

C407

V2D5S_PCI_IDE

12

V5REF_S0 V5REF_S5

C416

C420

C420 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C439

SCD1U10V2MX-1

DY

3D3V_S0

12

C226

C226 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C253

SCD1U10V2MX-1

1D5V_ICH_S5

SCD1U10V2MX-1

12

C406

C406 SCD1U10V2MX-1

SCD1U10V2MX-1

G65

1 2

C427

GAP-CLOSE-PWR

SCD1U10V2MX-1

Layout Note:

Place within 100 mils of ICH pin G10

12

C410

C410 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C419

SCD1U10V2MX-1

NO_STUFF NO_STUFF

1D5V_S0

12

C423

C423 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C422

SCD1U10V2MX-1

DY

3D3V_S0

12

C254

C254 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C437

1D5V_ICH_S5

1D5V_S0

Place both within 100 mils of ICH near D27

2D5V_S0

VCCP_GMCH_S0

Layout Note: Place near AG23

12

C415

SCD1U10V2MX-1

D

12

C428

C428 SCD1U10V2MX-1

SCD1U10V2MX-1

12

SCD1U10V2MX-1

DY

ALL NO_STUFF Caps do not have layout requirements but if layout allows then place next to ICH6

12

C440

SCD1U10V2MX-1

12

C418

C418 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S5

12

SCD1U10V2MX-1

12

C425

C425 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C436

C421

Place within 100 mils of ICH

C218

C218 SCD1U10V2MX-1

SCD1U10V2MX-1

C453

C223

C223 SCD1U10V2MX-1

SCD1U10V2MX-1

C436

SCD1U10V2MX-1

DY

1D5V_ICH_S5 1D5V_S5

Layout Note: Place near U7

1D5V_ICH_S0

RTC_AUX_S5

12

DY

3D3V_S5

Place within 100 mils of ICH

pin A17

D

12

C239

DY

Place within 100

12

mils of ICHPlace near AB18

C217

C217 SCD01U16V3KX

SCD01U16V3KX

Layout Note: Place near AB3

12

C454

C454 SCD1U10V2MX-1

SCD1U10V2MX-1

E

3D3V_S03,5,7,9,11,13,14,16,17,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41 3D3V_S517,19,21,25,29,31,35,37,39,40

Layout Note:

Place near pin AA19

VCCP_GMCH_S04,5,6,7,9,10,16,36,40,41

SCD1U10V2MX-1

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

3D3V_S0

D8

CH751H-40-U

V5REF_S0

V5REF_S5

ICH6_VCCLAN1D5V

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

2 1 12

C235

C235 SCD1U16V

SCD1U16V

D28

CH751H-40-U

2 1

12

C391

C391 SCD1U16V

SCD1U16V

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH6-M (3 of 4)

Leopard 3

1D5V_S05,7,9,17,21,38,39,41 1D5V_S539 2D5V_S07,9,15,40

5V_S0

D11

D11 CH751H-40-U

CH751H-40-U

2 1

12

R189

R189 100R2

100R2

Intel 10 ohm

12

C234

C234 SC1U10V3ZY

SC1U10V3ZY

5V_S53D3V_S5

12

R480

R480 10R2

10R2

Intel 10 ohm

12

C408

C408 SC1U10V3ZY

SC1U10V3ZY

1D5V_S0

18 41Monday, August 15, 2005

E

5V_S013,14,19,20,21,23,24,27,28,29,32,36,39,40,41

VCCP_GMCH_S0

of

3D3V_S0 3D3V_S5 5V_S0 1D5V_S0 1D5V_S5 2D5V_S0

-1

A

hexainf@hotmail.com

4 4

3 3

2 2

SMBUS(ICH6 ---> SODIMM,CLKGEN)

3D3V_S0

3D3V_S5

2

14

3

SMB_ICH_CTL

U32

5 6

2N7002DW

34 2 1

RN32

1 1

SMB_CLK17,21

SMB_DATA17,21

SRN10KJ

A

RN32

2

14

3

RN31

RN31 SRN4D7KJ

SRN4D7KJ

B

SMBD_ICH 3,11

SMBC_ICH 3,11

B

C

5V_S0

U61A

PLT_RST#

147

1 2

3

TSAHCT32

RSTDRV#_R

1 2

R511

33R2

PCIRST# 3V to 5V level shift for HDD & CDROM

3D3V_S0

U37B

147

4

PLT_RST#17

ICH_PCIRST#17

5

3D3V_S0

147

9

10

6

TSLCX08-U

U37C

ICH_PCIRST#_R

8

TSLCX08-U

PLT_RST#_R

1 2

33R2

R187

ICH6 asserts PLTRST# to reset devices on the platform.

1 2

33R2

R188

Secondary PCI Bus reset signal.

PCIRST# Buffer to enhance the driving strength

C

D

3D3V_S03,5,7,9,11,13,14,16,17,18,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_S517,18,21,25,29,31,35,37,39,40

5V_S013,14,18,20,21,23,24,27,28,29,32,36,39,40,41

RSTDRV#_5 21

PLT_RST1# 7,21

PCIRST1# 22,23,25,29,31

D

3D3V_S0

3D3V_S5

5V_S0

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

E27

VSS

Y6

VSS

Y27

VSS

Y26

VSS

Y23

VSS

W7

VSS

W25

VSS

W24

VSS

W23

VSS

W1

VSS

V4

VSS

V27

VSS

V26

VSS

V23

VSS

U25

VSS

U24

VSS

U23

VSS

U15

VSS

U13

VSS

T7

VSS

T27

VSS

T26

VSS

T23

VSS

T16

VSS

T15

VSS

T14

VSS

T13

VSS

T12

VSS

T1

VSS

R4

VSS

R25

VSS

R24

VSS

R23

VSS

R17

VSS

R16

VSS

R15

VSS

R14

VSS

R13

VSS

R12

VSS

R11

VSS

P22

VSS

P16

VSS

P15

VSS

P14

VSS

P13

VSS

P12

VSS

N7

VSS

N17

VSS

N16

VSS

N15

VSS

N14

VSS

N13

VSS

N12

VSS

N11

VSS

N1

VSS

M4

VSS

M27

VSS

M26

VSS

M23

VSS

M16

VSS

M15

VSS

M14

VSS

M13

VSS

M12

VSS

L25

VSS

L24

VSS

L23

VSS

L15

VSS

L13

VSS

K7

VSS

K27

VSS

K26

VSS

K23

VSS

K1

VSS

J4

VSS

J25

VSS

J24

VSS

J23

VSS

H27

VSS

H26

VSS

H23

VSS

G9

VSS

G7

VSS

G21

VSS

G12

VSS

G1

VSS

ICH6-M (4 of 4)

Leopard 3

E

U35D

F4

VSS

F22

VSS

F19

VSS

F17

VSS

E25

VSS

E19

VSS

E18

VSS

E15

VSS

E14

VSS

D7

VSS

D22

VSS

D20

VSS

D18

VSS

D14

VSS

D13

VSS

D10

VSS

D1

VSS

C4

VSS

C22

VSS

C20

VSS

C18

VSS

C14

VSS

B25

VSS

B24

VSS

B23

VSS

B21

VSS

B19

VSS

B15

VSS

B13

VSS

AG7

VSS

AG3

VSS

AG22

VSS

AG20

VSS

AG17

VSS

AG14

VSS

AG12

VSS

AG1

VSS

AF7

VSS

AF3

VSS

AF26

VSS

AF12

VSS

AF10

VSS

AF1

VSS

AE7

VSS

AE6

VSS

AE25

VSS

AE21

VSS

AE2

VSS

AE12

VSS

AE11

VSS

AE10

VSS

AD6

VSS

AD24

VSS

AD2

VSS

AD18

VSS

AD15

VSS

AD10

VSS

AD1

VSS

AC6

VSS

AC3

VSS

AC26

VSS

AC24

VSS

AC23

VSS

AC22

VSS

AC12

VSS

AC10

VSS

AB9

VSS

AB7

VSS

AB2

VSS

AB19

VSS

AB10

VSS

AB1

VSS

AA4

VSS

AA16

VSS

AA13

VSS

AA11

VSS

A9

VSS

A7

VSS

A4

VSS

A26

VSS

A23

VSS

A21

VSS

A19

VSS

A15

VSS

A12

VSS

A1

VSS

ICH6M

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

19 41Monday, August 15, 2005

E

-1

of

-1

A

5V_S0 5V_G768_S0

G8

4 4

G8

1 2

GAP-CLOSE-PWR

SC1000P50V

EC12

12

Close to G768D

12

SCD1U16V

BC7

12

BC5

BC5 SC10U10V6ZY-U

SC10U10V6ZY-U

DY

RUNPWROK

Put these two Caps near the thermal diode.

3 3

THERMDP2

12

BC9

SC470P50V3JN

DY

THERMDN

3

Q5

S2N3904-U3

2

1

SYSTEM SENSOR

THERMDP2THERMDP1

12

BC8

BC8 SC2K2P

SC2K2P

THERMDP1/DP2/THERMDN ON THE SAME LAYER W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS

2 2

CAPS CLOSE TO G768B

THERMDP1

12

BC1

BC1 SC470P50V3JN

SC470P50V3JN

DY

VGATE36

BC4

BC4 SC2K2P

SC2K2P

1 2

THERMDNTHERMDN

VCCP_PWGD38

180 ms after VCC_G768 > 4.38v, p2, 7

5V_S0

12

R435

R435 10KR2

FAN1

5 3 2

1 4

ETY-CON3-S1

1 1

The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103

FAN_FB

VCC_FAN

10KR2

D26

D26 S1N4148-U2

S1N4148-U2

1 3

A

12

BC65

SC10U10V6ZY-U

12

BC66

SCD1U16V

12

BC67

BC67 SCD1U16V

SCD1U16V

THERMDP14

THERMDN4

B

Reserve for G768B works at High Speed

1 2

R31

12

R32

R32 10KR2

10KR2

RUNPWROK

B

VCC_FAN

THERMDP2

1 2

12 13

SMBC_KBC31

G768_RST#

4K7R2

CLK_PWRGD#3,36

0R0402-PAD

R532

0R0402-PAD

R533

3D3V_S0

147

SMBD_KBC31

5V_G768_S0

SD 0817

U6

1

FANVCC

2

VCC

3

DXP1

4

DXN

5

DXP2

6

RESET#

7

GND

8

AGND

G768DU6G768D

U37D

11

TSLCX08-U

TH_SHUT

VCC

SMBCLK

NC

SMBDATA

ALERT#

FG

CLK

SD 0817

U65

1

NC

2

A GND3Y

NC7S14-U

DY

PWROK 7

VRM_PWRGD 17

ICH6_PWROK 17

16 15 14 13 12 11 10 9

C

VCC

C

SMBC_G768D SMBD_G768D FAN_FB

3D3V_S0

5

VRM_PWRGD

4

CLK32_G768 31

5V_S0

2

14

RN1

RN1 SRN10KJ

SRN10KJ

3

10KR2

SMBD_G768D

SMBC_G768D

PM_THRM# 17

3D3V_AUX

12

R47

R47:5K SET TO 120°C Must close to MAX6509

R19

22KR3F

3

D3

D3 BAT54-1

BAT54-1

DY

1

2

12

BC6

BC6 SCD1U16V

SCD1U16V

DY

D

U4

1

SET

2

GND OUT#3HYST

MAX6509HAUK-T-U

VCC

5 4

12

M6509_SET

E

5V_S5

12

C30

C30 SCD1U25V3KX

SCD1U25V3KX

3D3V_S0

3D3V_S03,5,7,9,11,13,14,16,17,18,19,21,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_S517,18,19,21,25,29,31,35,37,39,40

3D3V_AUX16,31,32,34,35,36,37

5V_S013,14,18,19,21,23,24,27,28,29,32,36,39,40,41

5V_S514,18,36,38

3D3V_S5

3D3V_AUX

5V_S0

5V_S5

Put under CPU Socket

RSMRST# 16,31,39

U13

1

A

VCC

S5_ENABLE31

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet of

2

B GND3Y

NC7S08-U

G768D

Leopard 3

3D3V_AUX

5

4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

20 41Monday, August 15, 2005

E

1999_S5ENABLE 37,38

-1

A

hexainf@hotmail.com

HDD Connector

IDE_D[15..0]16

IDE_D8 IDE_D9 IDE_D10

5V_S0

IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15

DIAG

SCD1U16V

4 4

HDDCSEL1

12

R400

R400 470R2

470R2

IDE_A216

IDE_CS#116

3 3

C354

HDD1

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44

SPD-CONN44D-3-U1

20.F0362.044

12

SC10U10V5ZY-L

47 45 1

3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 46 48

12

C353

1013 -1

NEWCARD Connector

Place them Near to Chip Place them Near to Connector

3D3V_S5 1D5V_S0 3D3V_NEW_LAN_S53D3V_NEW_S0 1D5V_NEW_S0

DY

C215

12

C216

C216 SCD1U16V

SCD1U16V

DY

12

C232

SC10U10V5ZY-L

12

SCD1U16V

2 2

SCD1U16V

PBRSTDRV1#_5 IDE_D7

IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0

PBIDDACK#

21

D25

D25 SSM24L-U

SSM24L-U

DY

12

C231

SCD1U16V

B

IDE_DREQ 16 IDE_IOW# 16 IDE_IOR# 16

12

SC10U10V5ZY-L

IDE_A1 16 IDE_A0 16 IDE_CS#0 16

C221

RSTDRV#_5 19

3D3V_S0

12

R425

4K7R2

DY

R424 0R0402-PADR424 0R0402-PAD

1 2

HDD_LED#

C220

12

SCD1U16V

5V_S0

12

C219

SCD1U16V

3D3V_S0

R421

R421 4K7R2

4K7R2

C

D

E

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_LAN_S525,41

5V_S013,14,18,19,20,23,24,27,28,29,32,36,39,40,41

1D5V_S05,7,9,17,18,38,39,41

3D3V_S0 3D3V_LAN_S5 5V_S0 1D5V_S0

CDROM

CN16

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48

12

50

PIN 49,50 DON'T USE

SYN-CONN50-4R3GP

The symbol use 2nd source The P/N is the main source Main source:20.10150.050 2nd source:20.B0040.050

R423

R423 10KR2

10KR2

R422

R422 2K7R2J

2K7R2J

2

CD_AUDR27

5V_S0

12

TP35TPAD30 TP35TPAD30

SCD1U16V

BC38

BC38 SC10U10V6ZY-U

SC10U10V6ZY-U

IDE_D8 IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15 IDE_DREQ IDE_IOR#

IDE_DACK# BAY_ID0 DIAG IDE_A2 IDE_CS#1

C258

12

R401

R401 4K7R2

4K7R2

IDE_IORDY 16 IDE_DACK# 16 IDE_IRQ14 16

HDD_LED# 14

5V_S0

1 2 12

DY

SKT3

1

3 4

CARD-SKT21-U2

For Newcard socket

51 MH1 1

3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 MH2 52

RSTDRV#_5 IDE_D7 IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0

IDE_IOW# IDE_IORDY IDE_IRQ14 IDE_A1 IDE_A0 IDE_CS#0

CSEL

CDROM_CSEL

IDE_IRQ14

CD_AUDL 27 CD_AGND 27

CDROM_LED# 14

5V_S0

1 2

R229

8K2R2

5V_S0

3D3V_S0

1 2 12

R230

R230 10KR2

10KR2

R196

R196 DUMMY-R2

DUMMY-R2

DY

CN14

MH2

MH1

26 25 24

23 22 21 20 19 18 17 16 15 14 13 12 11 10

SMBUS(ICH6--NEWCARD,LAN)

9 8 7 6 5 4

3 2

1

JAE-CON26-U

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

HDD / CDROM/NEWCARD

A3

Leopard 3

of

21 41Tuesday, July 12, 2005

E

-1

3D3V_S5

U34

CPUSB#

1D5V_S0

1D5V_NEW_S0

3D3V_S0

3D3V_NEW_S0

NEWCARD_OC#

TP26TP-2 TP26TP-2

3D3V_S5

1 1

3D3V_NEW_LAN_S5

PERST#

19

1.5VIN

18

1.5VIN

17

1.5VOUT

16

1.5VOUT

5

3.3VIN

6

3.3VIN

7

3.3VOUT

8

3.3VOUT

23

OC#

21

3.3VAUX_IN

9

PERST#

20

AUX_OUT

TPS2231

A

CPUTSB#

CPPE#

STBY#

SHDN#

SYSRST#

RCLKEN

NC#1 NC#10 NC#12 NC#13 NC#24

GND GND

14

CPPE#

15 4 3

TPS2231_RST#

2 22

R183

1 10 12 13 24

11 25

NEWCARD_RST#17

1 2

PLT_RST1#7,19

RN30

2 1 4

SRN100KJ

PLT_RST1#

0R2-0

PREQ2# 3

CPPE#

3

CPUSB#

PM_SLP_S3# 17,28,31,37,38,40 PM_SLP_S4# 17,31,37,38

2N7002-F-GP

Q30

SD

G

SD 0817

U68

1

A

VCC

2

B GND3Y

NC7SZ08-U

DY

B

DY

3D3V_S0

12

CONN_CLKREQ#

3D3V_S5

5

TPS2231_RST#

4

R569

R569 10KR2

10KR2

PCIE_RXP017 PCIE_RXN017

PCIE_WAKE#17

SMB_DATA17,19 SMB_CLK17,19

PCIE_TXP017

PCIE_TXN017

CLK_PCIE_NEW3

CLK_PCIE_NEW#3

CPPE#17

TP65TPAD30 TP65TPAD30

3D3V_NEW_S0

3D3V_NEW_LAN_S5

1D5V_NEW_S0

USB_PP617 USB_PN617

C

TP66TPAD30 TP66TPAD30 TP61TPAD30 TP61TPAD30

PCIE_RXP0_R PCIE_RXN0_R

CONN_CLKREQ#

PERST# CONN_WAKE#

SMB_DATA_C SMB_CLK_C CONN_TP2 CONN_TP3 CPUSB#

A

3D3V_S0

PCI_AD[31..0]13,17,25,29

4 4

3 3

2 2

1 1

12

PCI_FRAME#17,25,29

PCI_DEVSEL#17,25,29

PCI_AD22

3D3V_S0

R236

R236 150R2

150R2

3D3V_S0

PCI_C/BE#017,25,29 PCI_C/BE#117,25,29 PCI_C/BE#217,25,29 PCI_C/BE#317,25,29

PCI_TRDY#17,25,29

PCI_IRDY#17,25,29 PCI_STOP#17,25,29

PCI_PERR#17,25,29 PCI_SERR#17,25,29 PCI_REQ#117

PCI_GNT#117 PCLK_PCM3

CB_CLOCK23

CB_LATCH23

PCI_SPKR27

PCI_PAR17,25,29

PCIRST1#19,23,25,29,31

3D3V_S0

CB_DATA23

TP82TPAD30 TP82TPAD30

1 2 1 2

R234

1 2

R211

TP85TPAD30 TP85TPAD30 TP84TPAD30 TP84TPAD30

TP86TPAD30 TP86TPAD30 TP37TPAD30 TP37TPAD30

1 2

R210

7421_PME#

10KR2

R233

R233 10KR2

10KR2

PCI7421_TP1

PCI7421_TP2 PCI7421_TP3

PCI7421_TP5

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

CS_IDSEL

100R2

CS_SUSPEND#

B_USB_EN A_USB_EN

W10

V10 U10 R10 N10 V11 U11 R11

W12

V12 U12 N11

W13 W11

W17

T19 P12

W3

U2

V1

V2

U3

W2

V3

U4

V4

V5

U5

R6

P6

W6

V6

U6

R7

V9

U9

R9

N9

W9 W7 W4

P9

V7

R8

U7

W8

N8

W5

V8

U8

U1

T2

P5

R3

T1

T3

R2

N1

L6

N2

L7

E1

E2

M2 M3

L5

L2

K5

K3

K7

L1

L3

U39A

VCCP VCCP

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

C/BE0# C/BE1# C/BE2# C/BE3#

PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# PCLK PRST# GRST# RI_OUT#/PME#

SUSPEND# DATA

CLOCK LATCH SPKROUT

B_USB_EN# A_USB_EN#

SDA SCL

NC#W17 RSVD TEST0

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

PCI7411

U1-1

CARD BUS

U1-10

U1-5

MS_SDIO(DATA0)/SD_DAT0/SM_D0

U1-6

U1-9

UNUSED TERMINALS

B

1 of 4

U1-7

VDPLL_33

VDPLL_15

1394

U1-8

MS_CLK/SD_CLK/SM_EL_WP#

SD/SDIO

PHY_TEST_MA

PC0(TEST1) PC1(TEST2) PC2(TEST3)

MC_PWR_CTRL_0 MC_PWR_CTRL_1

MS_BS/SD_CMD/SM_WE#

MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1

SD_CLK/SM_RE# SD_CMD/SM_ALE

SD_DAT0/SM_D4 SD_DAT1/SM_D5 SD_DAT2/SM_D6 SD_DAT3/SM_D7

SD_WP/SM_CE

SM_PHYS_WP#

MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6

CLK_48

AVDD AVDD AVDD

VSSPLL

TPBIAS0

TPA0P TPA0N

TPB0P TPB0N

CPS CNA

AGND AGND AGND

TPBIAS1

TPA1P TPA1N

TPB1P TPB1N

SD_CD# MS_CD# SM_CD#

SM_CLE

SM_R/B#

XO

R0 R1

XI

N3

PCM_INTB#

M5 P1 P2 P3

CB_MFUNC5

N5 R1

M1

R13 R14 V17

VDPLL_33

V19 P14

T18 T17

1394_R0

U18

1394_R1

U19 U15 V15

W15 V14

W14

1394_PHYTEST

R17

1394_CPS

M11

1394_CNA

P15 R19

R18

PC[2:0]=000

R12 U13 V13

N12 U14 U16

U17 V18

W18 V16

W16

F1 F2

E3 F5 F6 G5 F3

H5 G3 G2

G1 J5 J3

H3 J6 J1 J2

H7 J7 K1 K2

INT_PIRQG#

VDPLL_15

R198

1 2

1394_XO

1394_XI

1394_TPB1P 1394_TPB1N

MC_PWR_CTRL-1

1 2

R570

CLK48_CARDBUS 3

1 2

6K34R3F

R231

R231 4K7R2

4K7R2

1 2

1394_TPBIAS1

1394_TPA1P 26 1394_TPA1N 26

0R2-0

C

INTA# CARBUS 1 INTB# NONE INTC# 1394 INTD# CARD READER

3D3V_S0

* All 1394 signals must be routed on top side only * Differential pairs of each ports should have equal trace length * Stubs must be keep as short as possible

1394_TPBIAS1 26

C240

C240 SCD1U16V

SCD1U16V

1394_TPB1P 1394_TPB1N

1394_TPB1P 26 1394_TPB1N 26

SD MS/MS_pro

XD

1 2

3D3V_S0

MS/MS_pro

SM

INT_PIRQG# 17 INT_PIRQF# 17

PCI_SERIRQ 17,29,31 7421_LED 14

PM_CLKRUN# 17,25,29,31

1394_TPBIAS0 26 1394_TPA0P 26

1394_TPA0N 26 1394_TPB0P 26

1394_TPB0N 26

12

MC_PWR_CTRL#

1 2

0R2-0

R237

3D3V_PLL_S0

C242 SCD1U16VC242 SCD1U16V

R232

R232 4K7R2

4K7R2

1 2

C243 SC12PC243 SC12P

X2

X-24D576M-2

1 2

C259 SC15PC259 SC15P

TP36 TPAD30TP36 TPAD30

SD_CD# 24 MS_CD# 24 SM_CD# 24 MS_CLK 24 MS_BS 24

MS_D3 24 MS_D2 24 MS_D1 24

MS_SDIO 24 SM_RE# 24 SM_ALE 3,4,5,6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41

SM_D4 24 SM_D5 24 SM_D6 24 SM_D7 24

SD_WP 24 SM_CLE 24 SM_R/B# 3,4,5,6,7,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41

D

SD_CD#

1

SM_CD# 7421_LED

2

D9

BAW56-1D9BAW56-1

3D3V_S0

3

Bypass/Decupoling Capacitors Should be places as close to PCI7421 as possible

3D3V_S0

12

34

12

C247

C247 SCD1U16V

SCD1U16V

12

C271

C271 SCD1U16V

SCD1U16V

12

C228

C228 SC10U10V5ZY-L

SC10U10V5ZY-L

R184

R184 10KR2

10KR2

1

2

5

6

U36

U36 2N7002DW

2N7002DW

12

DY

3D3V_S0

12

G34

1 2

GAP-CLOSE-PWR

MC_PWR_CTRL#

R180

R180 100KR2

100KR2

1 2

C270

C270 SC1000P50V

SC1000P50V

C269

C269 SC1000P50V

SC1000P50V

12

C248

C248 SCD1U16V

SCD1U16V

12

C260

C260 SCD1U16V

SCD1U16V

DY

12

C229

C229 SC1000P50V

SC1000P50V

3D3V_S0

E

12

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,23,24,25,27,29,30,31,32,36,38,40,41

12

3D3V_PLL_S03D3V_S0

12

R182

R182 10KR2

10KR2

MC_PWR_CTRL 24

C249

C249 SCD1U16V

SCD1U16V

DY

C261

C261 SCD1U16V

SCD1U16V

DY

C227

C227 SC1U10V3KX

SC1U10V3KX

3D3V_S0

Wistron Corporation

7411:71.07411.00U 7421:71.07421.00U

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TI SNC1Q21 (1 of 2)

Leopard 3

22 41Monday, August 15, 2005

E

-1

of

-1

A

hexainf@hotmail.com

A5 A11

D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14

C5 F9 B10 G12

G10 C8

A8 B8 A9 C9 E10

F10 B3

E7 B9

B2 C3 E9

C4 A6

A2 C15

E5 A3 E8

B13 D2 C10

VCC_ASKT_S0

2 of 4

U39B

4 4

3 3

2 2

1 1

U39B

U1-2

CARDBUS A

A_CSTSCHG/A_BVD1(STSCHG#/RI#)

PCI7411

2 of 4

VCCA VCCA

A_CAD31/A_D10

A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6

A_CAD19/A_A25

A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17

A_CAD15/A_IOWR#

A_CAD14/A_A9

A_CAD13/A_IORD#

A_CAD12/A_A11

A_CAD11/A_OE#

A_CAD10/A_CE2#

A_CAD9/A_A10

A_CAD8/A_D15

A_CAD7/A_D7

A_CAD6/A_D13

A_CAD5/A_D6

A_CAD4/A_D12

A_CAD3/A_D5

A_CAD2/A_D11

A_CAD1/A_D4 A_CAD0/A_D3

A_CC/BE3#/A_REG#

A_CC/BE2#/A_A12

A_CC/BE1#/A_A8

A_CC/BE0#/A_CE1#

A_CPAR/A_A13

A_CFRAME#/A_A23

A_CTRDY#/A_A22

A_CIRDY#/A_A15

A_CSTOP#/A_A20

A_CDEVSEL#/A_A21

A_CBLOCK#/A_A19

A_CPERR#/A_A14

A_CSERR#/A_WAIT#

A_CREQ#/A_INPACK#

A_CGNT#/A_WE#

A_CCLKRUN#/A_WP(IOIS16#)

A_CCLK/A_A16

A_CINT#/A_READY(IREQ#)

A_CRST#/A_RESET

A_CAUDIO/A_BVD2(SPKR#)

A_CCD1#/A_CD1# A_CCD2#/A_CD2#

A_CVS1/A_VS1# A_CVS2/A_VS2#

A_RSVD/A_D14

A_RSVD/A_D2

A_RSVD/A_A18

A

1 2

C448

C448 SCD01U16V3KX

SCD01U16V3KX

CBB_D10 24 CBB_D9 24 CBB_D1 24 CBB_D8 24 CBB_D0 24 CBB_A0 24 CBB_A1 24 CBB_A2 24 CBB_A3 24 CBB_A4 24 CBB_A5 24 CBB_A6 24 CBB_A25 24 CBB_A7 24 CBB_A24 24 CBB_A17 24 CBB_IOWR# 24 CBB_A9 24 CBB_IORD# 24 CBB_A11 24 CBB_OE# 24 CBB_CE2# 24 CBB_A10 24 CBB_D15 24 CBB_D7 24 CBB_D13 24 CBB_D6 24 CBB_D12 24 CBB_D5 24 CBB_D11 24 CBB_D4 24 CBB_D3 24

CBB_REG# 24 CBB_A12 24 CBB_A8 24 CBB_CE1# 24

CBB_A13 24 CBB_A23 24

CBB_A22 24 CBB_A15 24 CBB_A20 24 CBB_A21 24 CBB_A19 24

CBB_A14 24 CBB_WAIT# 24

CBB_INPACK# 24 CBB_WE# 24

CBB_BVD1# 24 CBB_WP 24 CBB_A16 24

CBB_RDY 24 CBB_RESET 24

CBB_BVD2# 24 CBB_CD1# 24

CBB_CD2# 24 CBB_VS1# 24 CBB_VS2# 24

CBB_D14 24 CBB_D2 24 CBB_A18 24

B

3 of 4

U39C

D19

RSVD

K19

RSVD

B15

RSVD

A16

RSVD

B16

RSVD

A17

RSVD

C16

RSVD

D17

RSVD

C19

RSVD

D18

RSVD

E17

RSVD

E19

RSVD

G15

RSVD

F18

RSVD

H14

RSVD

H15

RSVD

U1-3

PCI7411

B

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

CARDBUS B

RSVD RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD

G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19

F15 G18 K14 M18

K13 G19

H17 J13 J17 H19 J19

J18 B18

E18 J15

F14 A18 H18

B19 F17 C17

N13 B17 C18 F19

N17 A15 K15

C

D

E

3D3V_S0

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,24,25,27,29,30,31,32,36,38,40,41

5V_S013,14,18,19,20,21,24,27,28,29,32,36,39,40,41

5V_S0

Power switch

VCC_ASKT_S0VPP_ASKT_S0

9 10

8

15

24 23 22 19 18 17 16 14 6

E

12

VCC_ASKT_S0

23 41Tuesday, July 12, 2005

C433

C433 SC4D7U10V5ZY

SC4D7U10V5ZY

VPP_ASKT_S0

of

-1

U60

DATA CLOCK LATCH RESET# SHDN#

3.3V

5V 5V

12V 12V

GND GND

Leopard 3

12

C449

C449 SCD1U16V

SCD1U16V

AVCC AVCC

AVPP

OC#

NC NC NC NC NC NC NC NC NC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PS_SHDN#

12

C262

C262 SCD1U16V

SCD1U16V

12

R497

R497 100KR2

100KR2

3 4

5 12 21

13

1

2

7 20

11 25

TSP2220A

TI PCI7411 GHK (2 of 2)

12

C450

C450 SCD1U16V

SCD1U16V

PCIRST1#

12

C451

C451 SC100P50V2JN-U

SC100P50V2JN-U

DY

5V_S0

3D3V_S0

M10 M12

H10 H11 H12

K12

G13 H13

K10 K11

J12

J10 J11

L10 L11 L12

H8 H9

J8

M7 M9

K8 N7

G7 G8

J9

K9

L8 L9

M8

12

SC4D7U10V5ZY

U39D

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

PCI7411

12

C452

C452 SCD1U16V

SCD1U16V

3D3V_S0

C

CB_DATA22

CB_CLOCK22

CB_LATCH22

PCIRST1#19,22,25,29,31

1 2

R498

5V_S0

C434

DY

12

C447

SCD1U16V

4 of 4

M19

VR_PORT

H1

VR_PORT

H2

VR_EN#

C263

SCD1U16V

POWER TERMINALS

U1-4

D

10KR2

12

C446

C446 SC1U10V3ZY

SC1U10V3ZY

PT_PORT VR_PORT

12

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

A

PCMCIA Socket

4 4

CBB_D3 CBB_D4

CBB_D11 CBB_D5 CBB_D12 CBB_D6 CBB_D13 CBB_D7 CBB_D14

CBB_D15

VCC_ASKT_S0

12

C431

SC1000P50V

12

C429

SCD1U16V

12

C432

SC22U10V6ZY-U

3 3

VPP_ASKT_S0

12

C430

C430 SCD1U16V

SCD1U16V

CBB_A16

12

R186

R186 DUMMY-R2

DUMMY-R2

DY

Place close to pin 19.

12

C233

2 2

DY

C233 DUMMY-C2

DUMMY-C2

CBB_D0 CBB_D8 CBB_D1 CBB_D9 CBB_D2 CBB_D10

CBB_A10

CBB_A11 CBB_A9 CBB_A8

CBB_A17 CBB_A13 CBB_A18 CBB_A14 CBB_A19

CBB_A20 CBB_A21

CBB_A16 CBB_A22 CBB_A15 CBB_A23 CBB_A12 CBB_A24 CBB_A7 CBB_A25 CBB_A6

CBB_A5 CBB_A4 CBB_A3 CBB_A2 CBB_A1 CBB_A0

Clock AC termination 33MHz clock for 32-bit Cardbus card I/F

1 1

A

CBB_CD1#

CBB_CE1#

CBB_CE2# CBB_OE# CBB_VS1#

CBB_IORD# CBB_IOWR#

CBB_WE# CBB_RDY

CBB_VS2# CBB_RESET CBB_WAIT# CBB_INPACK# CBB_REG# CBB_BVD2# CBB_BVD1#

CBB_WP CBB_CD2#

B

69

1

35

2

36

3

37

4

38

5

39

6

40

7

41

8

42

9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68

70

SKT1

1 2 3 4

CARDBUS-SKT45-U1

B

CBUS1

CARDBUS68P-9

62.10024.491

Cardbus I/F

CBB_D[0..15] 23 CBB_A[0..25] 23

CBB_IORD# 23 CBB_IOWR# 23 CBB_OE# 23 CBB_WE# 23 CBB_REG# 23 CBB_RDY 23 CBB_WP 23 CBB_RESET 23 CBB_WAIT# 23 CBB_INPACK# 23

CBB_CE1# 23 CBB_CE2# 23 CBB_BVD1# 23 CBB_BVD2# 23 CBB_CD1# 23 CBB_CD2# 23 CBB_VS1# 23 CBB_VS2# 23

VCC_ASKT_S0

12

R212

R212 DUMMY-R2

DUMMY-R2

DY

47K

CBB_RESET

12

C250

C250 SCD01U16V3KX

SCD01U16V3KX

3D3V_CR_S0 3D3V_CR_S0

12

R562

R562 22KR2J

22KR2J

SM_RE# MS_BS

3D3V_CR_S0 3D3V_CR_S0

12

R565

R565 22KR2J

22KR2J

DY

SM_ALE SM_CLE

3D3V_CR_S0

12

R567

R567 22KR2J

22KR2J

SM_R/B#

DY

3D3V_CR_S0

C

D

E

3D3V_S0

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,25,27,29,30,31,32,36,38,40,41

DCBATOUT

DCBATOUT14,35,37,38,39,40,41

6 in 1 Connector

3D3V_CR_S0

12

1 2 1 2 1 2 1 2

SM_CD#

MS_SDIO

12

C169

SCD1U16V

12

C360

SCD01U16V3KX

MS_SDIO MS_D1 MS_D2 MS_D3

MS_D1 MS_D2

MS_D3 SM_D4 SM_D5 SM_D6 SM_D7

DY

1 2

R555

U67

1

A

2

B GND3SE

NC7SZ66P5X

12

C370

SCD01U16V3KX

SKT2

40 29 20

9

7

6 12 11

15 14 16 18

33 32 31 21 22 23 24

25 30

0R2-0

34

12

VCC

D

XD-VCC S.M-VCC MS-VCC SD-VCC

SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

S.M/XD-D1 S.M/XD-D2 S.M/XD-D3 S.M/XD-D4 S.M/XD-D5 S.M/XD-D6 S.M/XD-D7

S.M-LVD S.M-CD# S.M-D0

SKT-MEMO-12-GP

U30

1

OUT

2

GND SET3ON#

AAT46101GV-1

R583

R583 15KR2

15KR2

5V_S0

5

DY

SD_CD#

4

SM-CD-COM

SM-CD-SW

SM-WP-SW

SD-CD-COM

SD-CD-SW

SD-WP-SW

S.M#/XD-CLE S.M#/XD-ALE

S.M#/XD-WE

S.M#/XD-CE S.M#/XD-RE

S.M#/XD-R/B

S.M/XD-WP-IN

2 3 43

13

MS-BS

17

MS-INS

19

MS-SCLK

4

RSV#4

39

XD-CD

41 42 5 8

SD-CLK

10

SD-CMD

38 37 36 28 27 26 35

46

GND

45

GND

44

GND

1

GND

5

IN

4

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

SM_CD#

MS_CLK_R0

MS_BS_1 MS_CD#

MS_CLK_R MS_CLK

1 2

33R2

R449

SM_CD#

SD_CD# SD_WP

MS_CLK

1 2

33R2

R584

SM_CLE SM_ALE

MS_BS_1

1 2

SD_WP

R564

SM_RE#

SM_R/B#

MS_CLK_R0

R440 330R2R440 330R2

3D3V_S0

MC_PWR_CTRL

C185

SC1U10V3ZY

PCMCIA SLOT/ CARDBUS SKT

Leopard 3

SD_CD# 22 SD_WP 22

MS_BS

SM_CLE 22 SM_ALE 22

22R2

SM_RE# 22 SM_R/B# 22

1 2

22

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

MS_CLK_R

24 41Tuesday, July 12, 2005

MS_CD# 22

MS_CLK 22

MS_BS 22

of

-1

12

C359

SCD01U16V3KX

MS_SDIO MS_D1 MS_D2 MS_D3

12

R563

R563 22KR2J

22KR2J

SM_CD#22

12

R566

R566 22KR2J

22KR2J

12

R568

R568 47KR2

47KR2

SD_WP

C

C377

SCD01U16V3KX

R576 33R2R576 33R2 R577 33R2R577 33R2 R578 33R2R578 33R2 R579 33R2R579 33R2

MS_SDIO22 MS_D122 MS_D222 MS_D322

SM_D422 SM_D522 SM_D622 SM_D722

3D3V_CR_S0

12

R589

R589 4K7R2

4K7R2

MS_CLK MS_CLK_R

A

hexainf@hotmail.com

Close to RTL8100C Pin121,Pin122

LAN_X1

R110

LAN_X2

4 4

Close to LAN chip

3 3

2 2

1 1

INT_PIRQE#17,29

PCIRST1#19,22,23,29,31 PCLK_LAN3 PCI_GNT#217

PCI_REQ#217

ICH_PME#13,17,29

1 2

XTAL-25MHZ-43

12

C145

SC12P50V2JN

TX+26

TX-26

RX+26

RX-26

ISOLATE

R110

DUMMY-R2

X5

R106

12

49D9R2F

49D9R2F R107

R107 49D9R2F

49D9R2F

12

C140

C140 SCD1U16V

SCD1U16V

3D3V_LAN_S5

3D3V_S0

12

C144

C144 SC12P50V2JN

SC12P50V2JN

TX- RX-TX+ RX+

12

R102

R102 1KR2

1KR2

R101

R101 15KR2

15KR2

DY

A

12

R104

R104 49D9R2F

49D9R2F

12

C137

C137 SCD1U16V

SCD1U16V

AVDD33

AVDD33 CTRL25

AVDD25

AVDD33

ISOLATE

VDD25 PCI_AD31 PCI_AD30

PCI_AD29 PCI_AD28

12

R105

R105 49D9R2F

49D9R2F

U28

1

MDI0+

2

MDI0-

3

AVDDL

4

VSS

5

MDI1+

6

MDI1-

7

AVDDL

8

CTRL25

9

VSS

10

AVDDH

11

HSDAC+

12

HSDAC-

13

VSS

14

MDI2+

15

MDI2-

16

AVDDL

17

VSS

18

MDI3+

19

MDI3-

20

AVDDL

21

VSSPST

22

GND

23

ISOLATE#

24

VDD18

25

INTA#

26

VDD33

27

PCIRST#

28

PCICLK

29

GNT#

30

REQ#

31

PME#

32

VDD18

33

PCIAD31

34

PCIAD30

35

GND

36

PCIAD29

37

PCIAD28

38

VSSPST

RTL8100CL-U

R108

R108 5K6R3F

5K6R3F

12

TX+ TXAVDD33 GND RX+ RXAVDD33

NC NC NC AVDD25 NC NC NC NC GND NC NC AVDD33 GND NC ISOLATEB NC INTAB

PCIRSTB GNTB

REQB PMEB VDD25

GND

3D3V_LAN_S5

128

VSS

GND

B

3D3V_LAN_S5

1 2

3K6R3

R111

U29

LAN_X2

122

XTAL2

NC

PCI_AD23

LAN_IDSEL

1 2

U29

1

CS

2

SK

3

DI

4

DO

M93C46-W-3

LAN_X1

121

120

XTAL1

AVDDH

NCNCNCNCNC

GND

PCI_AD20

PCI_AD22

PCI_AD21

VCC

DC ORG GND

TP21

TPAD30

LAN_LED0

119

118

117

GND

VSSPST

GND

VDD25

PCI_AD19

VDD25

TP23

TP23 TPAD30

TPAD30

LAN_LED1

116

115

LED0

VDD18

PCI_AD18

PCI_AD17

8 7 6 5

TP22

TP22 TPAD30

TPAD30

LAN_LED2

114

113

LED1

LED2

PCI_C/BE#2

PCI_AD16

3D3V_LAN_S5

EESK

111

112

110

GND

LED3

EESK

NC

FRAMEB

IRDYB

109

VDD18

NC

64

EEDI

EECS_3 EESK EEDI EEDO

127

126

125

124

123

VSS

GND

VSS

GND

RSET

NC

AVDD18

CTRL18

NC

PCIAD2739PCIAD2640VDD3341PCIAD2542PCIAD2443CBEB344VDD1845IDSEL46PCIAD2347GND48PCIAD2249PCIAD2150VSSPST51GND52PCIAD2053VDD1854PCIAD1955VDD3356PCIAD1857PCIAD1758PCIAD1659CBEB260FRAME#61GND62IRDY#63VDD18

PCI_C/BE#3

PCI_AD25

PCI_AD26

PCI_AD24

PCI_AD27

R109

R109 100R2

100R2

PCI_AD23

B

C

12

C168

C168 SCD1U16V

SCD1U16V

EEDO

EECS_3

PCI_AD1

PCI_AD0

105

108

107

106

104

103

EECS

EEDO

VDD33

PCIAD0

PCIAD1

LANWAKE

GND

VDD25

GND

NC

GND

VDD25

SERRB

NC

PERRB STOPB

DEVSELB

TRDYB

GND

CLKRUNB

PCI_IRDY# 17,22,29 PCI_FRAME# 17,22,29

C

PCIAD2

VSSPST

GND

VDD18 PCIAD3 PCIAD4 PCIAD5 PCIAD6

VDD33 PCIAD7

CBEB0

VSSPST

PCIAD8 PCIAD9

M66EN PCIAD10 PCIAD11 PCIAD12

VDD33 PCIAD13 PCIAD14

VSSPST

GND

PCIAD15

VDD18

CBEB1

PAR

SERR#

GND

VDD33

PERR# STOP#

DEVSEL#

TRDY#

VSSPST

CLKRUN#

D

PCI_C/BE#[0..3] 17,22,29 PCI_AD[0..31] 13,17,22,29

3D3V_LAN_S5

12

C148

3

2

12

C139

CHP69Q8CHP69 Q8

C148

SCD1U16V

1 2

GAP-CLOSE-PWR

3D3V_LAN_S5

12

G31

1 2

GAP-CLOSE-PWR

Leopard 3

C143

SCD1U16V

3D3V_LAN_S5

CTRL25 LAN_PWR_CTRL

1 2

0R2-0

R103

102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74

NC

73 72

NC

71 70 69 68 67 66 65

PCI_AD2

VDD25 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6

PCI_AD7

PCI_C/BE#0

PCI_AD8 PCI_AD9

PCI_AD10 PCI_AD11 PCI_AD12

PCI_AD13 PCI_AD14

PCI_AD15

VDD25

PCI_C/BE#1 PCI_PAR PCI_SERR#

PCI_PERR# PCI_STOP# PCI_DEVSEL# PCI_TRDY#

PCI_PAR 17,22,29 PCI_SERR# 17,22,29

PCI_PERR# 17,22,29 PCI_STOP# 17,22,29 PCI_DEVSEL# 17,22,29 PCI_TRDY# 17,22,29

PM_CLKRUN# 17,22,29,31

D

1

C130

SC22U10V6ZY-U

SCD1U16V

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

LAN RTL8100C

E

AVDD25

1 2

R100

12

C135

C135 SCD1U16V

SCD1U16V

12

C150

C141

SCD1U16V

G30

12

C132

SCD1U16V

12

L16

L16 BLM11A601S

BLM11A601S

12

C138

SCD1U16V

DY

3D3V_LAN_S53D3V_S5

3D3V_LAN_S541

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

C151

SCD1U16V

C142

C142 SCD1U16V

SCD1U16V

12

C136

C136 SCD1U16V

SCD1U16V

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,27,29,30,31,32,36,38,40,41

3D3V_S517,18,19,21,29,31,35,37,39,40

25 41Wednesday, July 13, 2005

12

SCD1U16V

12

C149

C149 SCD1U16V

SCD1U16V

of

C153

12

VDD25

0R3-U

12

C133

SCD1U16V

VDD25

12

SCD1U16V

AVDD33

C134

C134 SCD1U16V

SCD1U16V

3D3V_S0

3D3V_S5

3D3V_LAN_S5

C152

-1

A

Blue thumb

R556 100R2R556 100R2

BT_PRIOR29 WLAN_ACT29

4 4

POWER SWITCH

12

C322

SC1U10V3ZY

78.10593.4B1

C24

78.10593.4B1

XFR_RDC XFR_CMT XFR_RXC XFR_TDC

12

C25

C25 SCD1U16V

SCD1U16V

DY

A

G

10/100M Lan Transformer

U3

3

CT

11

CT

14

CT

6

CT

8

TD-

7

TD+

XFORM-187-U

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

3 3

BT_EN17

2 2

TXTX+

SCD1U16V

1 1

1 2 1 2

R557

R557 100R2

100R2

I max = 150 mA

U55

1

SHDN#

2

GND

3

IN

G913C-U

5V_S3

12

R390

R390 10KR2

10KR2

BT_EN#

QB4

QB4 2N7002-F-GP

2N7002-F-GP

S D

RX-

RX+ RD-

RD+

TX-

TX+

XFR_RXC XFR_CMT

BC0EX213

BC0EX113 BT_LED13,14 USB_PN217 USB_PP217

3D3V_BT_S0

BC0EX2 connect to PCI_AD22 on main board. BC0EX1 connect to ICH_PME# on main board.

5V_S3

3D3V_BT_SETBT_EN#

5

SET

4

OUT

SC4D7U10V5ZY

78.47593.411

15 16

2 1

9 10

C321

1 2

R298

1 2

R297

12

75R2F

75R2F 75R2F

75R2F

B

Place on bottom side

CN4

10

8 7 6 5 4 3 2

1 9

JST-CON8-7

MAX 150mA

3D3V_BT_S0

12

C304

C304 SC20P

SC20P

78.20034.1B1

12

C85

C85 SCD1U16V

SCD1U16V

RXRX+

TXTX+

12

R370

R370 18KR3F

18KR3F

12

3D3V_BT_S0

R369

R369 11KR3F

11KR3F

TD+ --> TX+ RJ45-1 TD- --> TX-

RD+ --> RX+ RD- --> RX-

RX- 25 RX+ 25

12

R300

R300 75R2F

75R2F

RJ45_END

LAN_TERMINAL

CN1

1 2

ETY-CON2-R1

B

3 4

20.D0151.102

BC0EX2 BC0EX1 BT_LED

12

EC18

SCD1U

DY

12

EC17

SCD1U

DY

3D3V_BT_S0

12

EC16

SCD1U

DY

12

EC110

EC110 SCD1U

SCD1U

DY

Close to CN20

RJ45 PIN10/100 LAN Transformer

RJ45-2

RJ45-3 RJ45-6

RJ45_END1

RJ45_END2

12

R299

R299 75R2F

75R2F

C278

1 2

SC1500P2KV8KX

TIP_MDC TIP RING_MDC

L20 MLB160808L20 MLB160808

1 2 1 2

L21 MLB160808L21 MLB160808

C

1394 Connector

1394_TPA0P22

1394_TPA0N22

1394_TPB0P22

1394_TPB0N22

1394_TPBIAS022

SC1U10V3KX

1394_TPA1P22

1394_TPA1N22

1394_TPB1P22

1394_TPB1N22

1394_TPBIAS122

SC1U10V3KX

These components near to chip side.

RJ45-8 RJ45-7 RJ45-6 RJ45-5 RJ45-4 RJ45-3 RJ45-2 RJ45-1

RING

C

RJ45-8 13 RJ45-7 13 RJ45-6 13 RJ45-5 13 RJ45-4 13 RJ45-3 13 RJ45-2 13 RJ45-1 13

RJ45-1 RJ45-2

RJ45-3 RJ45-4 RJ45-5 RJ45-6 RJ45-7 RJ45-8

TIP RING

12

R205

R205 56R2F

56R2F

C245

R201

R201 56R2F

56R2F

C241

RJ45_1 RJ45_2

RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8

RJ11_1 RJ11_2

12

R206

R206 56R2F

56R2F

12

R200

R200 56R2F

56R2F

12

JK1

RJ45-74-U1

12

D

R207

R207 56R2F

56R2F

1394_TPB0_T

C246

C246 SC220P

SC220P

R203

R203 56R2F

56R2F

1394_TPB1_T

C244

C244 SC220P

SC220P

9

10

D

12

R208

R208 56R2F

56R2F

R209

R209 5K1R2

5K1R2

R202

R202 56R2F

56R2F

R204

R204 5K1R2

5K1R2

E

3D3V_LAN_S525,41

0R0402-PAD

R98

1 2

0R0402-PAD

R96

1 2

0R0402-PAD

R97

1 2

0R0402-PAD

R99

1 2

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

0R0402-PAD

R66

1 2

0R0402-PAD

R45

1 2

0R0402-PAD

R62

1 2

0R0402-PAD

R42

1 2

TPA0+

TPA0-

TPB0TPB0+

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

LAN / 1394 Connector

Leopard 3

1394_1

6 3

1 5

SKT-1394-4P-6-U1

1394_TPA1P_PR 13 1394_TPA1N_PR 13 1394_TPB1P_PR 13

1394_TPB1N_PR 13

26 41Monday, August 15, 2005

E

of

3D3V_LAN_S5

4 2

-1

A

hexainf@hotmail.com

12

BC82

BC82 SCD1U16V

SCD1U16V

4 4

5V_AUDIO_S0

12

BC73

SCD1U16V

1 2 1 2

CDAUDL

CDAUDR

CDAGND

R217

R217 150KR2J

150KR2J

DY

AUD_AGND

HP_OUT_L13 HP_OUT_R13

AUD_BEEP1

AUD_BEEP2

BC31 SC1U10V3ZYBC31 SC1U10V3ZY

12 12

BC32 SC1U10V3ZYBC32 SC1U10V3ZY

BC42

BC42 SCD1U16V

SCD1U16V BC36

BC36 SCD1U16V

SCD1U16V

1 2

BC35

BC35 SC1U25V5ZY

SC1U25V5ZY

1 2

BC33

BC33 SC1U25V5ZY

SC1U25V5ZY

1 2

BC34

12

SC1U25V5ZY

R222

R222 150KR2J

150KR2J

DY

4 5

AUD_MICIN1 AUD_MICIN2

5V_AUDIO_S0

AUD_AGND

EXT_MIC_1 EXT_MIC_2

AUD_LOL28 AUD_LOR28

U39_PL

1 2

AUD_AGND

AUD_MDC_OUT30

AUD_PHONE30

1 2

R219

R252

R252 10KR2

10KR2

1 2

R221

1 2

R218

22R2

5V_AUDIO_S0

1 2

AUD_AGND

5V_AUDIO_S0

9

10

AUD_AGND

A

22R2

12

R220

R220 150KR2J

150KR2J

DY

147

12

U40A

3

TSAHCT86

U40C

8

TSAHCT86

3 3

CD_AUDL21

CD_AUDR21

CD_AGND21

2 2

PCI_SPKR22

ICH_SPKR17

KBC_BEEP31

1 1

12

BC41

SCD1U16V

AUD_MDC_CODEC AUD_PHONE_CODEC

CDAUD_L CDAUD_R CDAUD_GND

AUD_PC_BEEP

U40B

147

6

TSAHCT86

BC44

12

21

MIC1

22

MIC2

23

LINE_IN_L

35

LINE_OUT_L

24

LINE_IN_R

36

LINE_OUT_R

37

MONO_OUT

13

PHONE_IN

18

CD_L

20

CD_R

19

CD_GND_REF

39

HP_OUT_L

41

HP_OUT_R

14

AUX_L

15

AUX_R

B

BC81

BC81 SCD1U16V

SCD1U16V

BC43

BC43 SCD1U16V

SCD1U16V

B

AUD_AGND

1 2

R238

34

AVDD125AVDD238AVDD343AVDD4

AVSS126AVSS240AVSS344AVSS4

33

10KR2

C272

SCD1U16V

3D3V_S0

9

DVDD11DVDD2

DVSS14DVSS2

7

AUD_BEEP

12

AUD_AGND

12

CODECVREF

ADAF2

ADAF1

VREFOUT

27

28

VREF

AFILT129AFILT230AFILT331AFILT4

VREFOUT

ID0#45ID1#

46

C264 SCD1U16VC264 SCD1U16V

1 2

12

R251

R251 1KR2

1KR2

BC80

BC80 SC1U10V3ZY

SC1U10V3ZY

1 2

ADAF4

ADAF3

32

XTL_IN

XTL_OUT

SDATA_IN

SDATA_OUT

BIT_CLK RESET#

SPDIF

NC12NC

42

AUD_PC_BEEPAUD_SYS_BEEP

AUD_AGND

C267

C267 SC270P50V3JN

SC270P50V3JN

1 2

C266

C266 SC270P50V3JN

SC270P50V3JN

1 2

U41

17

JS0

16

JS1

47

EAPD

2 3

8 5

6 10

SYNC

11 48

AD1981B-AS

C

12

BC79

BC79 SCD1U16V

SCD1U16V

C265

C265 SC270P50V3JN

SC270P50V3JN

C268

C268 SC270P50V3JN

SC270P50V3JN

AD1981_JS0

XTALOUT_CODEC AC97_DIN0_CODEC

AC97_CBITCLK

SPDIF_OUT

12

EXT_MIC_213

EXT_MIC_113

C

AUD_AGNDAUD_AGND

1 2

R223

1 2

R224

R241

R241 4K7R2

4K7R2

1 2

R499

R243 0R2-0R243 0R2-0

1 2

22R2

33R2

DY

AUD_AGND

2K2R2

DY

12

BC29

SC1U10V3ZY

12

BC30

SC1U10V3ZY

DY

3D3V_S0

R213

R213 10KR2

10KR2

1 2

D10

1 3

S1N4148-U2

HPSENSE 28

EAPD 28,31

CLK_CODEC 3

BC37

12

DUMMY-C2

AC97_BITCLK 16,30 AC97_SYNC 16,30 AC97_RST# 16,30 SPDIF_OUT 13

AC97_DIN0 16 AC97_DOUT 16,30

VREFOUT

12

R215

R215 3KR2F

3KR2F

MIC2 PREAMP

12

AUD_AGND

12

BC27

BC27 SC1000P50V3KX

SC1000P50V3KX

R216

R216 3KR2F

3KR2F

CLOSE TO CODEC

VREFOUT

MIC1 PREAMP

12

AUD_AGND

BC28

BC28 SC1000P50V3KX

SC1000P50V3KX

CLOSE TO CODEC

D

HPSENSE_1 28

12

R242

1 2

DUMMY-R2

DY

D

E

BC46

1 2

SC22P

DY

X3

X3 X-24D576MHZ-3-U1

X-24D576MHZ-3-U1

DY

XTALOUT_CODEC_R

SC1U10V3ZY

BC45

1 2

SC22P

DY

12

BC85

UNDER CODEC

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

1 2

5V_S0

AUD_AGND

1 2

BC47

DUMMY-C2

DY

U63

1

SHDN#

2

GND

3

IN

MAX8863-S

For High limit --> H45

G68

GAP-CLOSE

G40

GAP-CLOSE

CUT MOAT

AUD_AGND

SB-27-02

AUDIO CODEC AD1981B

BC84

BC84 SC22P

SC22P

5

SET

5V_AUDIO_S0

4

OUT

BC83

SC10U10V6ZY-U

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

E

12

5VA_SET

12

G38

GAP-CLOSE

G36

GAP-CLOSE

G35

GAP-CLOSE

G39

GAP-CLOSE

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,29,30,31,32,36,38,40,41

5V_S013,14,18,19,20,21,23,24,28,29,32,36,39,40,41

5V_AUDIO_S0

12

AUD_AGND

27 41Tuesday, July 12, 2005

R515

R515 28K7R3F

28K7R3F

R516

R516 10KR3F

10KR3F

of

3D3V_S0

5V_S0

12

EC156

EC156 SCD1U16V

SCD1U16V

-1

A

4 4

AUD_LOL27

12

BC87

SC10U10V6ZY-U

3 3

B

R519

BC78

CSOUTL2AUD_LOL

1 2

SC4D7U10V5ZY

1 2

SCD1U16V3KX

5VA_OP_S0

12

BC74

SCD1U16V3KX

AUD_AGND

AUD_AGND AUD_AGND

1 2

BC50

12

BC86

BC86 SCD1U16V3KX

SCD1U16V3KX

R519

15KR2

SB

CSOUTL1

R254

1 2

15KR2

L_BYPASS

G1420_SHUTDOWN#

AUD_AGND

R_BYPASS

HP_R

L_LINE_IN

HP_L

C

BC88

1 2

SC10P50V2JN-1

1 2

R518 20KR2R518 20KR2

U62

4

LLINEIN

5

LHPIN

6

LBYPASS

7

LVDD

8

SHUTDOWN

2

TJ

17

HP-IN

23

VOL

18

RVDD

19

RBYPASS

20

RHPIN

21

RLINEIN

G1421BF3U

1 2

R253 18KR2JR253 18KR2J

MUTEOUT

GND

25

SPKR_L+

BC49

BC49 SC220P

SC220P

LOUT+

LOUT-

SE/BTL#

HP/LINE#

MUTEIN GND/HS

GND/HS GND/HS GND/HS

ROUT-

ROUT+

SPKR_L+

3 10

14 16 11 9 1 12 13 24

15 22

SB

SPKR_L+ SPKR_L-

AUD_MUTE

AUD_AGND

SPKR_R-

SPKR_R+

1 2

TC21 SE100U16VGM-2TC21 SE100U16VGM-2

HPSENSE_1

D

DK_SPKR_L+ 13

17,21,31,37,38,40

G1420_SHUTDOWN#

PM_SLP_S3#

R517 10KR2

1 2

DY

5V_S0

G

12

R561

R561 100KR2

100KR2

G1420_SHUTDOWN#

Q40

Q40 2N7002-F-GP

2N7002-F-GP

S D

AUD_AGND

E

5V_S0

5V_S013,14,18,19,20,21,23,24,27,29,32,36,39,40,41

AUD_LOR27

BC77 SC4D7U10V5ZYBC77 SC4D7U10V5ZY

1 2

5V_S0

12

R510

R510 100KR2

2 2

JACK_DETECT#13

1 1

KBC_MUTE31

EAPD27,31

A

5V_S0

12

SC1U10V3ZY

12

R512

R512 10KR2

10KR2

R509

R509 100KR2

100KR2

C457

100KR2

HPSENSE_1

Q29

Q29 2N7002-F-GP

S D

5V_S0

147

2N7002-F-GP

U61B

6

TSAHCT32

AUD_MUTE_1

HPSENSE

G

4 5

BC40 SCD1U16V3KXBC40 SCD1U16V3KX

CSOUTR2AUD_LOR

HPSENSE_1 27

EARPHONE13 HPSENSE 27

5V_S0

9

10

B

1 2

147

CSOUTR1

1 2

R513

1 2

R214

U61C

8

TSAHCT32

R240

15KR2

22KR2J

AUD_MUTE

1 2

12

C251

C251 SC1U10V3ZY

SC1U10V3ZY

R_LINE_IN

15KR2

EARPHONE_R

1 2

R514

SPKR_R+ SPKR_R-

SPKR_L+ SPKR_L-

AUD_AGND

1 2

R239 18KR2JR239 18KR2J

1 2

20KR2

BC76

1 2

SC10P50V2JN-1

Speaker

12

EC152

EC152 SC220P

SC220P

C

12

BC39

BC39 SC220P

SC220P

SPKR_R+

EC154

EC154 SC220P

SC220P

12

EC159

EC159 SC220P

SC220P

SPKR_R+

12

EC153

EC153 SC220P

SC220P

1 2

TC22 SE100U16VGM-2TC22 SE100U16VGM-2

SPK1

6 4

3 2

1 5

ETY-CON4-11-U

20.D0151.104

DK_SPKR_R+ 13

D

G67

R_BYPASS

12

AUD_AGND

A3

5VA_OP_S0

BC48

SC4D7U10V5ZY

AUD_AGND

12

BC75

BC75 SC4D7U10V5ZY

SC4D7U10V5ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AUDIO

Leopard 3

E

5V_S0

1 2

GAP-CLOSE-PWR

L_BYPASS

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

-1

28 41Monday, August 15, 2005

of

-1

A

hexainf@hotmail.com

MINI-PCI

4 4

B

3D3V_S0

C

D

E

3D3V_S0

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,30,31,32,36,38,40,41

5V_S013,14,18,19,20,21,23,24,27,28,32,36,39,40,41

5V_S0

BC72

BC72 SCD1U16V

SCD1U16V

ICH_PME# 13,17,25

12

BC70

BC70 SCD1U16V

SCD1U16V

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet

MINI-PCI

Leopard 3

-1

of

29 41Tuesday, July 12, 2005

E

-1

12

BC69

BC69 SCD1U16V

SCD1U16V

5V_S0

INT_PIRQE# 17,25

PCIRST1# 19,22,23,25,31

3D3V_S0

PCI_GNT#0 17

DY

0R2-0

BT_PRIOR 26

1201 -2

PCI_AD21

R485

R485 10R2

10R2

PCI_PAR 17,22,25

PCI_FRAME# 17,22,25 PCI_TRDY# 17,22,25 PCI_STOP# 17,22,25

PCI_DEVSEL# 17,22,25

PCI_SERIRQ 17,22,31

3D3V_S5

C

PCI_AD30 PCI_AD28

PCI_AD26

PCI_AD22 PCI_AD20PCI_AD19

PCI_AD18 PCI_AD16

PCI_AD15 PCI_AD13 PCI_AD11

PCI_AD9 PCI_C/BE#0

PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0

12

3D3V_S5

1 2

R484

1 2

12

BC71

RINGTIP

MOD_IDSEL

BC71 SC4D7U10V5ZY

SC4D7U10V5ZY

MINI_PME#

PCI_AD[31..0] 13,17,22,25 PCI_C/BE#[3..0] 17,22,25

3D3V_S0

3 3

WIRELESS_EN#17

2 2

1 1

G

PCI_PERR#17,22,25

A

12

R244

R244 10KR2

10KR2

WIRELESS_EN

Q12

Q12 2N7002-F-GP

2N7002-F-GP

S D

3D3V_S0

12

R477

R477 10KR2

10KR2

3D3V_S5

1 2

R476

R476 DUMMY-R2

DUMMY-R2

DY

CN13

125

1

2

3

4

5

6

7

8

9

802_ACT_LED14

3D3V_S0

TP25TPAD30 TP25TPAD30

PCLK_MINI3

PCI_REQ#017

WLAN_ACT26

PCI_IRDY#17,22,25

PM_CLKRUN#17,22,25,31

PCI_SERR#17,22,25

5V_S0

WIRELESS_EN

INT_PIRQE# MINI_PIN21

PCI_AD31 PCI_AD29

PCI_AD27 PCI_AD25

PCI_C/BE#3 PCI_AD24 PCI_AD23

PCI_AD21

PCI_AD17 PCI_C/BE#2

PCI_C/BE#1 PCI_AD14

PCI_AD12 PCI_AD10

PCI_AD8 PCI_AD7

PCI_AD5 PCI_AD3 PCI_AD1

B

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121

123

The symbol use 2nd source The P/N is the main source Main source:62.10032.001 2nd source:62.10032.031

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122

124 126

PCIMODEM124A1U1

62.10032.001

A

5V_S3

4 4

3 3

F1

1 2

MINISMDC110-U

SC4D7U10V5ZY

C106

B

USB POWER

12

5V_USB1_S3

12

C105

C105 SCD1U16V

SCD1U16V

0329 SB

USB_PN417 USB_PP417

100 mil

12

C104

C104 SC1000P50V

SC1000P50V

12

TC6

TC6 ST100U6D3VBM-6GP

ST100U6D3VBM-6GP

5V_USB1_S3

USB1

11

9 1

2 3

4 10 12

SKT-USB-76-U

C

5 6

7 8

USB_PN5 17 USB_PP5 17

D

E

5V_AUX

5V_AUX14,15,35,37,38,39

5V_S313,14,26,28,32,37,38,40,41

3D3V_S313,14,40

5V_S3

3D3V_S3

2 2

MDC Connector

R155

DUMMY-R2

3D3V_S0

12

AUD_MDCIN

MDC_S3_1

12

C411

C411 SCD1U16V

SCD1U16V

CN9

35

31

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29

33

32 2

4 6 8 10 12 14 16 18 20 22 24 26 28 30

34

AMP-CONN30A-1

36

20.F0099.030

B

ACSDATAIN1_A ACSDATAIN1_B

Check with Ambit

1 2

22R2

R168

1 2

DY

R169

22R2

AUD_PHONE 27

AC97_SYNC 16,27

AC97_BITCLK 16,27

12

C222

C222 SC22P

SC22P

DY

C

D

Title

Size Document Number Rev

A3

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

USB / MDC CONN.

Leopard 3

30 41Tuesday, July 12, 2005

E

-1

of

-1

12

G64

GAP-CLOSE-PWR

12

C413

C413 SCD1U16V

SCD1U16V

SC4D7U10V5ZY

DY

1 2

DY

C412

AUD_MDC_OUT27

3D3V_S3

R486

DUMMY-R2

DY

1 1

AC97_DOUT16,27 AC97_DIN1 16 AC97_RST#16,27

A

hexainf@hotmail.com

3D3V_AUX KBC_3D3V_AUX

G33

1 2

GAP-CLOSE-PWR

CN15

MOLEX-CON8-2

DY

SC3P50V2CN

12

BC19

KBC_32KX2_1

12

LPC_LAD[0..3]16

KBC_3D3V_AUX 9 1

2 3 4 5 6 7 8

10

X1

3

X4P-32D768KHZ-3

BC18

BC18 SC3P50V2CN

SC3P50V2CN

ECSWI#_KBC

KBC_D0 TINT# TCK TDO TDI TMS

3D3V_S0

45

3D3V_S5

1 2

R134

SC1U10V3ZY

123

RN28

RN28 SRN10K-2

SRN10K-2

678

12 4

R140

100KR2

BC14

KBC_3D3V_AUX

A5/SHBM

A

1 2

DY

20MR3

1 2

VOL_DWN_DK#13 CHG_I_PRE_SEL35

12

1 2

R143

R173

DUMMY-R2

R141

0R2-0

VOL_UP_DK#13

CHG_I_SEL35

RSMRST#_KBC17

KBCBIOS_CS#33

10KR2

PCI_SERIRQ17,22,29

LPC_LDRQ0#16

LPC_LFRAME#16

PCLK_KBC3 RSMRST#16,20,39

ECSMI#_KBC17

ECSCI#_KBC17

ICH_A20GATE16

3D3V_S0

LI/NI#35

BL_ON7 ID_DET14,32 FPBACK14

NI_BAT35

AD_OFF34

RCIN#16

TCLK_532

TDATA_532

R151

CHG_I_SEL CHG_I_PRE_SEL

CHG_ON#

TP59TPAD30 TP59TPAD30 TP70TPAD30 TP70TPAD30

KROW[1..8]32

KCOL[1..16]32

12

CHG_ON#35

S5_ENABLE20

PSCLK1 PSDAT1 PSCLK2 PSDAT2

1 2

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

KBC_PWUREQ#

KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8

KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16

TINT# TCK TDO TDI TMS

10KR2

KBC_32KX1 KBC_32KX2

VCC_+3VSB

4 4

3 3

2 2

1 1

3D3V_S0

PSDAT4

KBC_SEL1 KBC_CLK

B

D7

SSM5818SL

12

BC22

SCD1U16V

7 8

9 15 14 13 10 18 19 22 23

31

5

6

71 72 73 74 77 78 79 80

49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68

105 106 107 108 109

110 111 114 115 116 117 118 119

158 160

62 63 69 70 75 76

148 149 155 156

3

4 27 28

173 174

47

PC97551-VPC-U

B

KBC_3D3V_AUX

12

BC15

BC15 SCD1U16V

SCD1U16V

DY

2 1

U33

16

SERIRQ IOPQ0/LDRQ# LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# IOPQ1/SMI# IOPQ2/PWUREQ#

IOPD3/ECSCI

IOPB5/(GA20) IOPB6/KBRST#

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15/XOR_OUT

TINT# TCK TDO TDI TMS

IOPF0/PSCLK1 IOPF1/PSDAT1 IOPF2/PSCLK2 IOPF3/PSDAT2 IOPF4/PSCLK3 IOPF5/PSDAT3 IOPF6/PSCLK4 IOPF7/PSDAT4

32KX1/32KCLKIN 32KX2

IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO#

IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15

SEL0# SEL12_SEL2# IOPQ3/CLK

VDD

JTAG Debug Port

GND17GND35GND46GND

1 2

L18

123

136

VCC34VCC45VCC

Host Interface

PWM or PortA

Key Matrix Scan

PortB

PortC

PortD-1

PortE

PS2 Interface

PortJ-2

PortM

GND

122

159

167

137

BLM11P600S

157

166

VCC

AD input

DA Output

PortH

PortP

PortJ-1

PortD-2

PortK

PortL

AGND

96

KBC_RTC_VCC

12

BC25

SCD1U16V

KBC_AVCC

95

161

VCC

VBAT

AVCC

IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7

IOPB0/URXD1 IOPB1/UTXD1

IOPB2/USCLK1

IOPB7/RING#/PFAIL#/RESET2#

IOPC4/TB1/EXWINT22 IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1#/EXWINT20

IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/RESET2#

IOPE5/A20//EXWINT40

IOPE6/LPCPD#/EXWINT45

IOPE7/CLKRUN#/EXWINT46

NC#1111NC#1212NC#2020VCORF21NC#8585NC#8686NC#9191NC#9292NC#9797NC#98

12

BC17

BC17 SCD1U16V

SCD1U16V

AD0 AD1 AD2

AD3 IOPE0 IOPE1 IOPE2 IOPE3 NC#93 NC#94

DA0

DA1

DA2

DA3

IOPB3/SCL1

IOPB4/SDA1

IOPC0

IOPC1/SCL2 IOPC2/SDA2

IOPC3/TA1 IOPC5/TA2

IOPE4/SWIN

A0/ENV0

A1/ENV1 A2/BADDR0 A3/BADDR1

A4/TRIS

A5/SHBM

RD#

WR0#

SELIO#

IOPD4 IOPD5 IOPD6 IOPD7

A10 A11

A12 A13_BE0 A14_BE1

A15_CBRD

A16

A17

A18

IOPL3/A19

IOPL4/WR1#

98

1 2

R139

81 82 83 84 87 88 89 90 93 94

99 100 101 102

32 33 36 37 38 39 40 43

153 154 162 163 164 165

168 169 170 171 172 175 176 1

26 29 30

2 44 24 25

124 125 126 127 128 131 132

A6

133

A7

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

150 151

152 41

42 54 55

143

A8

142

A9

135 134 130 129 121 120

113 112 104 103 48

C

RTC_AUX_S5

1KR2

DA_BRI

PWM_BRI

KBC_PME#

R164

KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7

KBC_SEIO#

KBC_PIN21

C

BT_SENSE

THERMAL_DP THERMAL_DN

1 2

CHG_ICTL CHG_VCTL

1 2

R559

BT_SCL BT_SDA

1 2

WR1#

KBC_3D3V_AUX

12

BT_TH 34,35 AIRLINE_VOLT 35 AD_IA 35 PM_SUS_STAT# 17 KBC_MATRIX1 32 KBC_MATRIX2 32 EAPD 27,28

TP30 TPAD30TP30 TPAD30

R558 0R2-0

0R2-0

TP29 TPAD30TP29 TPAD30

DY

TP63

TP63 TPAD30

TPAD30TP62

TP62

KBC_BEEP 27

TPAD30

PWR_LED 14 CHG_LED 14 VOL_UP_BTN# 32 VOL_DWN_BTN# 32

802_BT_BTN# 32

0R2-0

BRIGHTNESS

CAPS_LED 14 NUM_LED 14 MUTE_LED 13,14 BT_SCL 34 BT_SDA 34 PCIRST1# 19,22,23,25,29

PM_PWRBTN# 17 SMBC_KBC 20 SMBD_KBC 20 MAINTAIN_CHG 35 DVD_BT# 32 PM_SLP_S4# 17,21,37,38 PM_SLP_S3# 17,21,28,37,38,40 CLK32_G768 20

CDROM_BT# 32 CIR_KBC 13 AC_IN# 35

KBC_PWRBTN# 32 KBC_LID# 14

PM_CLKRUN# 17,22,25,29 A0/ENV0 33

A1/ENV1 33 A2/BADDR0 33 A3/BADDR1 33 A4/TRIS 33 A5/SHBM 33 A6 33 A7 33

KBCBIOS_RD# 33 KBCBIOS_WE# 33

TP60 TPAD30TP60 TPAD30

PR_INSERT# 13 KBC_MUTE 28 ECSWI#_KBC 17

A8 33 A9 33 A10 33 A11 33 A12 33 A13 33 A14 33 A15 33

A16 33 A17 33 A18 33

TP64 TPAD30TP64 TPAD30

TP71 TPAD30TP71 TPAD30

12

C214

C214 SCD1U16V

SCD1U16V

For NS97551 use only

BC21

BC21 SCD1U16V

SCD1U16V

BRIGHTNESS 14

MUTE_BTN# 32

KBC_D[0..7] 33

12

BC16

BC16 SCD1U16V

SCD1U16V

12

BT_SENSE

AD_IA

D

BC20

BC20 SCD1U16V

SCD1U16V

D

12

BC23

BC23 SCD1U16V

SCD1U16V

BT+

12

R174

R174 560KR3F

560KR3F

1 2

R175

1 2

DVD_BT# CDROM_BT#

E

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,32,36,38,40,41

12

100KR3F

C230

C230 SCD1U16V3KX

SCD1U16V3KX

1 2

R137

1 2

R166

BC24

BC24 SCD1U16V

SCD1U16V

KBC_3D3V_AUX

10KR2

10KR2 10KR2

10KR2

BC26

BC26 SCD1U16V

SCD1U16V

VOL_UP_BTN#

VOL_UP_DK# VOL_DWN_DK#

SMBC_KBC SMBD_KBC

VOL_DWN_BTN#

BT_SCL BT_SDA KBC_PME#

PM_PWRBTN#

RSMRST#_KBC

S5_ENABLE

3D3V_AUX16,20,32,34,35,36,37

5V_AUX14,15,35,37,38,39

3D3V_S517,18,19,21,25,29,35,37,39,40

RN34

1

8

2

7

3

6

4 5

SRN10K

SRN10KJ

RN15

2

3

DY

1 4

1 2

6K8R2F

R136

1 2

6K8R2F

R135

1 2

10KR2

R165

R138 DUMMY-R2

DY

1 2

R150

1 2

R142

KBC HARDWARE SETTING

KBC_3D3V_AUX

DY

R152

A0/ENV0

A1/ENV1 A2/BADDR0

A3/BADDR1

A4/TRIS

IRE OBD

PROG

SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use

BADDR1-0 Index

0 0

1 0 1 1

Title

Size Document Number Rev

Custom

Date: Sheet

KBC NS97551

R152

1 2

DUMMY-R2

RN29

2

3

1 4

SRN10KJ

R153

1 2

DY

DUMMY-R2

R144

1 2

DY

DUMMY-R2

TRIS

ENV0

ENV1

00

0 00

1 0DEV

0

1

0

I/O Address

2E 4E

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

(HCFGBAH, HCFGBAL)+1(HCFGBAH, HCFGBAL)

Reserved

E

Data

31 41Wednesday, July 13, 2005

3D3V_S0

KBC_3D3V_AUX

12

100KR2

10KR2

2F 4F0 1

of

3D3V_S0

3D3V_AUX

5V_AUX

3D3V_S5

-1

A

INTERNAL KEYBOARD CONNECTOR

4 4

CN7

25

3 3

26

ETY-CON24-1

20.K0170.001

2 2

KCOL[1..16] 31KROW[1..8] 31

KROW2

1

KROW8

2

KROW7

3

KCOL10

4

KROW5

5

KROW6

6

KCOL1

7

KROW3

8

KROW4

9

KCOL6

10

KCOL2

11

KROW1

12

KCOL3

13

KCOL5

14

KCOL8

15

KCOL9

16

KCOL7

17

KCOL4

18

KCOL13

19

KCOL14

20

KCOL15

21

KCOL12

22

KCOL11

23

KCOL16

24

R179 10KR2

DY

12 12

R176 10KR2

DY

MATRIXID1#

KBC_3D3V_AUX

R178

10KR2

DY

B

3D3V_S0

12

R319

R319 10KR2

10KR2

802_BT_BTN# MUTE_BTN#

the matrix table for PCB

R177

R177 10KR2

10KR2

DY

1 2

KBC_MATRIX2 31 KBC_MATRIX1 31

Quick PlayNONE Quick Play

01

3D3V_S0

12

R321

R321 10KR2

10KR2

KBC_MATRIX2,KBC_MATRIX1

PA PR

FFDF001001

11

C

POWER BUTTON

KBC_PWRBTN#31

VOL_UP_BTN#

VOL_DWN_BTN#

LAUNCH Board

3D3V_AUX

12

R303

R303 10KR2

10KR2

1 2

470R2

R322

12

BC58

BC58 SCD1U16V

SCD1U16V

DVD_BT#31

CDROM_BT#31

3D3V_S0

D32

2

3

1

BAV99LT1

DY

3D3V_S0

D33

2

3

1

BAV99LT1

DY

D

PWR_LED#14

MUTE_LED#14

802_BT_LED#14

VOL_UP_BTN#31

VOL_DWN_BTN#31

5V_S0

C290

SCD1U10V2MX-1

12

PWRBTN#

DVD_BT# CDROM_BT#

802_BT_BTN#31

NUM_LED#14

MUTE_BTN#31

12

EC89

SC1000P16V2KX

VOL_DWN_BTN# VOL_UP_BTN# 802_BT_LED# MUTE_LED# PWR_LED# NUM_LED#

ID_DET14,31

12

TouchPad Connector

EC88

EC88 SC1000P16V2KX

SC1000P16V2KX

C289

1 2

SCD1U10V2MX-1

12

EC82

12

EC87

SC1000P16V2KX

5V_S3

12

EC83

EC84

EC84 SC1000P16V2KX

SC1000P16V2KX

E

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,36,38,40,41

3D3V_AUX16,20,31,34,35,36,37

5V_S013,14,18,19,20,21,23,24,27,28,29,36,39,40,41

CN2

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

JST-CON20

3D3V_S0

3D3V_AUX

5V_S0

21

22

EC86

12

EC85

SC1000P16V2KX

12

R434

R433

10KR2

12

BC63

12

BC64

BC64 SC47P50V2JN

SC47P50V2JN

DY

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

KEYBOARD/TOUCH PAD/Launch key

A3

12

BC68

SC1U10V3ZY

DY

12

BC62

BC62 SCD1U16V

SCD1U16V

CN8

9 8 7 6 5 4 3 2

1

10

ETY-CON8-5

20.K0121.008

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

32 41Tuesday, July 12, 2005

E

-1

of

-1

123

678

4 5

678

4 5

KCOL14 KCOL13

KCOL4 KCOL7

RC2

RC2 SRC100P50V-U

SRC100P50V-U

for EMI

KROW3 KCOL1 KROW6

KROW5

RC6

RC6 SRC100P50V-U

SRC100P50V-U

for EMI

B

KCOL9

KCOL8

KCOL5

KCOL3

678

RC4

RC4 SRC100P50V-U

SRC100P50V-U

123

4 5

for EMI

1 1

A

123

678

4 5

KROW1 KCOL2 KCOL6

KROW4

RC3

RC3 SRC100P50V-U

SRC100P50V-U

123

678

4 5

678

4 5

KCOL16

KCOL11 KCOL12 KCOL15

RC1

RC1 SRC100P50V-U

SRC100P50V-U

KCOL10 KROW7 KROW8

KROW2

RC5

RC5 SRC100P50V-U

SRC100P50V-U

TDATA_531

TCLK_531

SC47P50V2JN

C

D

A

hexainf@hotmail.com

4 4

B

KBC_D[0..7] 31

C

D

E

3D3V_S0

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

5V_S013,14,18,19,20,21,23,24,27,28,29,32,36,39,40,41

5V_S0

3 3

A0/ENV031 A1/ENV131 A2/BADDR031 A3/BADDR131 A4/TRIS31 A5/SHBM31 A631 A731 A831 A931 A1031 A1131 A1231 A1331 A1431 A1531

KBC_3D3V_AUX

2 2

1 1

A1631 A1731 A1831

A0/ENV0 A1/ENV1 A2/BADDR0 KBC_D2 A3/BADDR1 A4/TRIS A5/SHBM

A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18

512KB Flash

U38

20

A0

19

A1

18

A2

17

A3

16

A4

15

A5

14

A6

13

A7

3

A8

2

A9

31

A10

1

A11

12

A12

4

A13

5

A14

11

A15

10

A16

6

A17

9

A18

8

VDD

PM39LV040-70VC

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

CE#

WE#

OE#

VSS

KBC_D0

21

KBC_D1

22 23

KBC_D3

25

KBC_D4

26

KBC_D5

27

KBC_D6

28

KBC_D7

29

30

7

32

24

KBCBIOS_CS# 31

KBCBIOS_WE# 31

KBCBIOS_RD# 31

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

A

B

C

D

Date: Sheet

BIOS/GF

Leopard 3

-1

of

33 41Tuesday, July 12, 2005

E

-1

A

B

C

D

E

Adaptor in to generate DCBATOUT

D15

R14

R14 100KR2

100KR2

3 1

MMBZ5252B

U1

S

D

S

1 2 3 4 5

D

1 2

8

D

7

D

6

C274

C274 SCD1U50V5KX

SCD1U50V5KX

S

S S

S GD

GD

AO4407

Layout 200mil

DCIN1

4 4

3 3

DCIN1

DC-JACK92

BT_SCL

Q2

R1

R2

DTC114EUA-U1

AD_JK

3 1

3

OUT

GND

D18

BAV99LT1

AD_OFF#

2

1

BC52

SC1000P50V

1

12

BC51

BC51 SCD1U50V3ZY

SCD1U50V3ZY

3D3V_AUX

D16

BAV99LT1

AD+_2

12

2

1

12

B

R15

200KR2J

2

E

Q1

PDTA124EU

C

3

12

3

1 3 2 4 5

AD_OFF31

12

EC1

EC1 SCD1U50V3ZY

SCD1U50V3ZY

2

IN

3D3V_AUX 3D3V_AUX

D17

2

3

BAV99LT1

1

BT_SDA BT_TH

AD+

12

EC165

EC165 SCD1U50V3ZY

SCD1U50V3ZY

3D3V_AUX16,20,31,32,35,36,37

AD+13,35,41

BT+31,35,41

5V_AUX14,15,35,37,38,39

3D3V_AUX

AD+

BT+

5V_AUX

2 2

G5

BT+SENSE35

1 1

A

1 2

GAP-CLOSE

BT+

FUSE-10A125V

1 2

CN11

F2

BT_SCL31 BT_SDA31 BT_TH31,35

12

BCC1

BCC1 SCD1U

SCD1U

B

12

BC3

BC3 SC1000P50V

SC1000P50V

C

BAT+

7 1

2 3 4 5 6 8

SYN-CON6-2-U2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

Adaptor/ Bettery conn.

Leopard 3

E

-1

34 41Tuesday, July 12, 2005

of

-1

BATTERY CONNECTOR

A

hexainf@hotmail.com

CB1

1 2

SCD1U

1 2

15K4R2F-GP

R368

AD+

12

C275

4 4

AC_IN Threshold 2.089V Max. AC_IN > 2.089V --> AC

LI/NI#31

DETECT

R305

22K6R3F

AD_IA31

3/19 HM1-SD Detect adaptor input current

CHG_I_PRE_SEL31

MAX1909_LDO

12

R304

R304 54K9R3F

54K9R3F

12

MAX1909_ICTL

SET Vout MAX VCELL= 4.1998V/CELL VBAT=CELL*VCELL==>VCELL=VBAT/CELL =VREF+(VVCTL-1.8) /9.52 =4.1998V

3 3

When V(ICTL)<0.8V or DCIN<7V

-->Charge Disable

2 2

SET CHG OFF BAT_CHG_I = (0.075/R624)*(VICTL/3.6) LI BAT : CHG_I_SET = H(6cell), Charge current = 3A CHG_I_SET = L(12cell), Charge current = 3.3A NI-MH BAT : NI_BAT = H, Charge current = 2.5A Pre-Charge (or Maintain Charge) : MAX8725 MAX1909 : Pre-Charge current = 300mA, MAX8725 : CHG_I_PRE_SEL = H, Pre-Charge current = 200mA Maintain charge current = 12.5mA ==> H 4sec, L 60sec

1 1

C275 SC1000P50V

SC1000P50V

DY

AD+

12

R329

R329 100KR3

100KR3

12

R330

R330 49K9R3F

49K9R3F

CHG_I_SEL31

QB1

QB1 2N7002-F-GP

2N7002-F-GP

G

S D

G6

1 2

GAP-CLOSE-PWR

SCD1U16V3KX

1 2 3 4

RB1

RB1 100KR3F

100KR3F

DY

1 2

CHG_ON#31

UB1

UB1 2N7002S

2N7002S

DY

-1

D4

CH521S-30D4CH521S-30

2N7002-F-GP

C43

6

R332

5

12

21

R41

20KR3F

Q24

G

2N7002-F-GP

12

DY

1 2

R366

R366 100KR2F

100KR2F

R367

R367 100KR2F

100KR2F

MAX1909_ACIN

R365

R365 19K1R3F

19K1R3F

HM1-SB ACOK is 13V

12

C50

C50 SCD1U

SCD1U

12

S D

Q23

G

12

R27

R27 16K5R3F

16K5R3F

-1

1K5R3F

NI_BAT 31

AIRLINE_VOLT 31

U43

D

8

D

7

D

6

AO4407

MAX1909_REF

MAX1909_LDO

S D

12

R26

R26 10KR2

10KR2

12

SCD01U16V3KX

HM1-SB AD<=17V, disable charger function

12

PKPRES#

C41

If Charger is MAX1909,dummy them.

A

S

S S

S GD

GD

R39

R39 39KR3F

39KR3F

R40

R40 28K7R3F

28K7R3F

1 2

R328

12

C42

C42 SCD01U16V3KX

SCD01U16V3KX

B

DB1

2

3

1

BAV99LT1

1 2 3 45

AC_OK

1 2

R38

12

AD+_TO_SYS

GAP-CLOSE-PWR

12

EC166

EC166 SCD1U25V3KX

SCD1U25V3KX

C66

C66 SCD1U25V3KX

SCD1U25V3KX

2/24 Close to

U11

MAX1909 pin 24

MAX1909_PDS

27

PDS

AD+_TO_SYS

24

MAX1909_DC_IN

MAX1909_VCTL

MAX1909_ICTL

MAX1909_MODE

MAX1909_IINP MAX1909_CLS

31K6R2F

1 2

R327

1KR2

MAX1909_CCV MAX1909_CCI MAX1909_CCS

C40

C40 SCD01U16V3KX

SCD01U16V3KX

SRC

1

DCIN

11

VCTL

10

ICTL

7

MODE

3

ACIN

8

IINP

9

CLS

6

ACOK

49K9R2F

5

PKPRES

13

CCV

12

CCI

14

CCS

MAX1909ETI

MAX1909_REF

12

Maintain Charge Current = 12.2mA MAINTAIN_CHG is H 4sec, L 1sec So, Avg. Current = 9.76mA

If Charger is MAX8725,dummy them.

B

3D3V_S5

R272

1 2

D01R3720F

G41

G42

GAP-CLOSE-PWR

1 2

12

C68

C68 SCD1U

SCD1U

CSSN1

26

25

CSSP

CSSN

DHIV

PDL LDO

DLOV

DHI

DLO

PGND PGND

CSIP

CSIN BATT

GND

REF

4

V_REF :4.2235V (<500uA)

12

R325

R325 27KR3F

27KR3F

MAX1909_CLS

12

C48

C48 SC1U10V3ZY

SC1U10V3ZY

R326

R326 19K6R3F

19K6R3F

DCBATOUT

MAINTAIN_CHG31

C

MAX1909_LDO

QB2

RB4

RB4 49K9R2F

49K9R2F

QB3

QB3 2N7002-F-GP

2N7002-F-GP

DY

DCBATOUT

Near MAX1909 Pin 2

1 2

R37

R37 33R2

33R2

1 2

Near MAX1909 Pin 21

12

C64

C64 SC1U10V3ZY

SC1U10V3ZY

32

1 2

D

RB2

C

C49

C49 SC1U10V3ZY

SC1U10V3ZY

BT+SENSE 34

499R5F

DY

DCBATOUT_BEAD

12

L35

1 2

HI1806T600R-00

AD+_TO_SYS

C67

12

SCD1U

C65

C65 SCD1U25V3KX

SCD1U25V3KX

MAX1909_DHIV

22 28 2

MAX1909_DLOV

21

MAX1909_DHI

23

MAX1909_DLO

20

19 29 18

17 16 15

ISOURCE_MAX = (0.075/R615)*(VCLS/VREF) = 3.16A

So,Constant Power=18.5*3.16=58.46W (90%)

TP0610K-U

S

DY

G

1

RB3

RB3 100KR2

100KR2

1 2

DY

12

DY

G

S D

MAX1909_PDL

1 2

GAP-CLOSE-PWR

BT+

45

GD

4 5

G7

AC_IN#31

123

SSGD

S

SSGD

S

U9

U9 SI4431BDY

SI4431BDY

DDD

678

DDD

U10

U10 SI4800BDY

SI4800BDY

SSS

123

12

5V_AUX

12

U46

S

1

S

2

S

3

GD

4 5

AO4407

12

C45

C47

SC10U25V0KX

SCD1U

1 2

IND-15UH-35

L23

R306

R306 100KR2

100KR2

U47

5 6

2N7002S

CHG_PWR-3CHG_PWR-2

D

8

D

7

D

6

12

C46

C46 SC10U25V0KX

SC10U25V0KX

34 2 1

D

12

C288

C288 SCD1U

SCD1U

DCBATOUT

R324 D015R3720F-1R324 D015R3720F-1

1 2

BT_TH31,34

MAX1909_ICTL

AC_OK

D

E

3D3V_AUX

3D3V_AUX16,20,31,32,34,36,37

5V_AUX14,15,37,38,39

BT+

12

SC10U25V0KX

12

R308

R308 100KR2

100KR2

TC12

MAX1909_LDO

PKPRES#

12

TC13

TC13 SC10U25V0KX

SC10U25V0KX

12

U48

R331

R331 100KR2

100KR2

5 6

2N7002S

Title

CHARGER MAX1999

Size Document Number Rev

C

Date: Sheet

DCBATOUT14,37,38,39,40,41

3D3V_AUX

34 2 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

E

5V_AUX

DCBATOUT

AD+

AD+13,34,41

BT+

BT+31,34,41

12

R307

R307 100KR2

100KR2

-1

of

35 41Thursday, August 18, 2005

A

5V_S5 5V_S0 5V_S5

B

C

D

E

CPU_CORE-MAX1907

C2

C2 SC4D7U10V5ZY

SC4D7U10V5ZY

10

VCC

DPSLP#

20

0R2-0

DY

R582

12

R535

R535 10R3

10R3

SUS

35

12

DCBATOUT_BEAD

C7

1 2

SCD1U25V3KX

78.10422.2B1

U2

V+

VDD

BST

DH

LX DL

PGND

CSP CSN

OAIN+ OAIN-

FB

NEG

POS

GND

NC

TIME

MAX1907AETL-U

R3 47KR3R347KR3

U2

30

31

33 32 29

28

18 19

17 16

15

14

13

11 41

34

39

12

SC4D7U10V5ZY

1 2

R10

MAX1907_DH

MAX1907_LX

MAX1907_DL

1907_CSP1 1907_CSN1

MAX1907_OAIN+ MAX1907_OAIN-

MAX1907_NEG MAX1907_POS

C12

0R3-0-U

1 2

12

R9

MAX1907_VCC

3D3V_S0

1 2

4 4

1 2

CLK_PWRGD#3,20

VGATE20

H_VID05 H_VID15 H_VID25 H_VID35 H_VID45 H_VID55

R553

100KR2

3 3

2 2

CPU_SHDN#38

Ton=NC, Freq.=300KHz

DUMMY-R2

MAX1907_REF

SC1U10V3KX

R269

12

DY

12

C3

R13

R13 2K2R2F

2K2R2F

12

1 2

R11

R11 100KR2

100KR2

1 2

SYSPOK

MAX1907_S0 MAX1907_S1 MAX1907_S2

MAX1907_B0 MAX1907_B1 MAX1907_B2

1 2

1KR2R21KR2

R2

C1 SC270P50V2JNC1 SC270P50V2JN

MAX1907_CC

1 2

MAX1907_ILIM

R270

R270 150KR2F

150KR2F

PM_STPCPU#3,17

PM_DPRSLPVR17

R271

R271 100KR2

100KR2

R12

R12 100KR2

100KR2

1 2

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5

38

CLKEN#

36

SYSPOK

37

IMVPOK

4

S0

5

S1

6

S2

26

D0

25

D1

24

D2

23

D3

22

D4

21

D5

1

B0

2

B1

3

B2

7

SHDN#

40

TON

12

CC

8

REF

9

ILIM

27

DDO#

PM_STPCPU#

R581

1 2

DUMMY-R2

12

21

C5

C5 SC1000P50V

SC1000P50V

C6

C6 SC470P50V2KX

SC470P50V2KX

1 2

C4

C4 SC100P50V2JN-U

SC100P50V2JN-U

130R3FR9130R3F

offset 1.2%

OCP=30A, Vally current = 27.5A, Vilim=550mV(55mVp-p*10)

Deeper Sleep Voltage : 0.940V , S0=L, S1=L, S2=Open,

5V_S05V_S0 5V_S0 5V_S0 5V_S05V_S0

12

R264

DY

DUMMY-R2

1 1

12

R287

R287 20KR2

20KR2

A

DY

12

R263

R263 DUMMY-R2

DUMMY-R2

MAX1907_S2MAX1907_S0 MAX1907_S1 MAX1907_B0 MAX1907_B1 MAX1907_B2

12

R282

R282 20KR2

20KR2

DY

12

R262

R262 DUMMY-R2

DUMMY-R2

R281

R281 DUMMY-R2

DUMMY-R2

Boot-up Voltage : 1.2V , B0=L, B1=L, B2=Open

DY

12

B

R267

R267 DUMMY-R2

DUMMY-R2

R292

R292 20KR2

20KR2

DY

12

R266

R266 DUMMY-R2

DUMMY-R2

R291

R291 20KR2

20KR2

R537

R537 0R3-0-U

0R3-0-U

DY

D1

D1 SSM5818SL

SSM5818SL

1 2

R5

1 2

R8

1 2

R7

R6 698R2FR6698R2F

12

R294

R294 1K18R3F

1K18R3F

R268

DY

12

R554

R554 0R3-0-U

0R3-0-U

C8

C8 SCD1U25V3KX

SCD1U25V3KX

200R2FR5200R2F

200R2FR8200R2F

110R2FR7110R2F

1 2

12

R265

R265 DUMMY-R2

DUMMY-R2

12

R290

R290 DUMMY-R2

DUMMY-R2

100KR2F

D

Q15

Q15 IRFR3707Z

1

G

1

G

LS/IRFR3709Z/8.2mOhm/@4.5V

1907_CSP

IRFR3707Z

3 4

S

D

Q16

Q16 IRFR3709Z

IRFR3709Z

3 4

S

VID

VID2

VID3 VID1 VID0

VID4

VID5

0 0

0 0 0 1

1 1

C

0

1

1 1

1

1 0

0 0

011 0

1

0 0

1

0

1 0

1

0

1

0 1

0

1

0

1

0

1 110 0

0

1

0 1 0

0

1 0 00 0 1 1 1 1 0 1 1 01 0

G

Vcore

1.340

1.324

1.292

1.260

1.244

1.212

1.180

1.148

1.100

1.052

1.020

0.972

0.940

DCBATOUT_BEAD

12

D

Q4

Q4 IRFR3707Z

1

IRFR3707Z

3 4

S

12

C14

SCD1U

C286

SC4D7U25V6KX-L

HS/IRFR3707Z/12.5mOhm/@4.5V

1 2

12

R21

R21 698R2F

1907_CSP_G

12

G4

GAP-CLOSE-PWR

3D3V_AUX

12

R529

R529 4K7R2

4K7R2

1

12

R530

R530 22KR2J

22KR2J

D

698R2F

1 2

DY

1 2

R4

1 2

R293

1

V

D

Q3

Q3 IRFR3709Z

IRFR3709Z

3 4

S

1 2

GAP-CLOSE

C462

SCD1U10V2MX-1

G1

VCCP_GMCH_S0

12

DCBATOUT_BEAD

12

C285

SC4D7U25V6KX-L

IND-D68UH-10

L1

R20

DUMMY-R3

C35

C35 SCD47U10VKX

SCD47U10VKX

130R3F

DY

698R2F

3D3V_S0

12

R528

R528 10KR2

10KR2

G

3

Q32

Q32 S2N3904-U3

S2N3904-U3

2

12

C13

SC4D7U25V6KX-L

12

GAP-CLOSE-PWR

12

R527

R527 100KR2

100KR2

DY

Q31

Q31 2N7002-F-GP

2N7002-F-GP

S D

Title

Size Document Number Rev

A3

Date: Sheet

12

C9

SC4D7U25V6KX-L

G3

SYSPOK

IMVP IV-CPU POWER-MAX1907

12

C287

C287 SCD1U

SCD1U

12

G2

GAP-CLOSE-PWR

VCC_CORE_S0_G92

Leopard 3

TC10

TC10 SE100U25V-U1

SE100U25V-U1

VCC_CORE_S0

12

TC11

TC3

ST220U2VDM-1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

36 41Thursday, August 18, 2005

12

TC4

ST220U2VDM-1

of

12

TC2

ST220U2VDM-1

-1

A

hexainf@hotmail.com

SYSTEM DC/DC 3D3V_S5 / 5V_S5

4 4

Sanyo / 6*7.7 / CV-AX

12

3V = 4Arms, OCP>6A

3D3V_DC_S5

1 2

IND-8UH-2

3 3

12

TC19

ST220U4VDM-L3

SC100P50V2JN-U

These components should be located near by MAX1977

2 2

5V_DC_S3

1 1

5V_S3

3D3V_S53D3V_DC_S5

C78

12

BL3#39

MAX1999_V+

A

IND-8UH-2

L30

12

R80

R80 6K98R3F

6K98R3F

12

R82

R82 10KR3F

10KR3F

D6 1SS400

2 1

DY

2 1

DY

D5 1SS400

12

R76

R76 300KR3

300KR3

12

PM_SLP_S3#17,21,28,31,38,40

PM_SLP_S3# high = PWM PM_SLP_S3# low = Ultrasonic

R74

R74 150KR3

150KR3

3D3V_S5

SKIP# > 2.4V : PWM mode SKIP# = GND( ,0.8V) : SKIP MODE SKIP# = REF (1.7V~2.3V)/FloatING Ultrasonic MODE(25KHz min)

C121

C121 SCD1U

SCD1U

C96

C96 SC47P50V2JN

SC47P50V2JN

R90

R90 2MR3

2MR3

1999_S5ENABLE20,38

Q26

R1

2

IN

DTC115EE-U

C120

C120 SC4D7U25V-U

SC4D7U25V-U

PM_SLP_S4#17,21,31,38

R2

OUT

3

GND

1

DCBATOUT

678

SSS

123

678

SSS

123

5V_AUX

12

B

DDD

U24

U24 AO4422

AO4422

GD

4 5

DDD

U25

U25 AO4422

AO4422

GD

Rds(on) = 24 mohm

4 5

R393

R393 R386

R386

R384

R384 300KR2J

300KR2J

B

1 2

R83

1 2 1 2

4D7R5

SC1U25V5ZY

1KR2

1KR2 1KR2

1KR2

MAX1999_REF

C

1 2

R387

3

D21

D21 BAW56-1

BAW56-1

2

5V_S5 spec. = 10mA

C

MAX1999_VCC

47R2

U54

17

VCC

BST5

DH5

LX5 DL5

OUT5

FB5

PRO#

NC

ILIM5

ILIM3

PGOOD

GND

LDO5

MAX1999EEI

18

MAX1999_LDO5

12

C318

C318 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

1 2

12

C319

C319 SC1U10V3ZY

SC1U10V3ZY

14

16 15 19 21 9

10 1

11

5

2

23

G21

GAP-CLOSE

5V_AUX

MAX1999_V+

12

C80

MAX1999_BST3

12

C336

C336 SCD1U50V5KX

SCD1U50V5KX

MAX1999_FB3 MAX1999_FB5

Vref = 2V

C316

C316 SCD22U10V3KX

SCD22U10V3KX

1 2

MAX1999_SKIP#

3D3V_AUX

12

DY

12

C81

C81 SCD1U

SCD1U

1

R399

R399 0R3-U

0R3-U

1 2

MAX1977_BST3R MAX1999_BST5R

MAX1999_DH3

MAX1999_DL3 MAX1999_DL5

MAX1999_ON3 MAX1999_ON5

MAX1999_SHDN#

MAX1999_LDO3

G45

1 2

GAP-CLOSE-PWR

EC167

EC167 SCD1U25V3KX

SCD1U25V3KX

MAX1999_ON3 MAX1999_ON5

12

C317

C317 DUMMY-C2

DUMMY-C2

DY

28

26 27 24 22

13

12

7

3 4

6

8

BST3

DH3 LX3 DL3 OUT3 FB3

ON3 ON5

SHDN#

TON

REF

SKIP#

12

C320

C320 SC1U10V3KX

SC1U10V3KX

12

20

V+

25

C331

C331 DUMMY-C2

DUMMY-C2

LDO3

R362

R362 0R3-U

0R3-U

1 2

MAX1999_DH5 MAX1999_LX5MAX1999_LX3

MAX1999_PRO#

1 2

R385

MAX1999_ILIM

G44

1 2

GAP-CLOSE-PWR

5V = 5Arms, OCP>6.8A

12

C303

C303 SCD1U50V5KX

SCD1U50V5KX

CLOSE TO CMOS

100KR2

5V_LDO=100mA3V_LDO=100mA

5V_AUX

R77

R75

R75 200KR3

200KR3

1 2

D

DCBATOUT

12

678

U16

DDD

AO4422

SSS

GD

SSS

GD

123

4 5

678

U19

DDD

AO4422

SSS

GD

SSS

GD

123

4 5

MAX1999_VCC

12

300KR3

ILIM5: 5V * 200K / (200K+300K) = 2.0V 200mV / 24 = 8.3A OCP point = 8.3A +1/2Iripple

ILIM3: 5V * 200K / (200K+300K) = 2.0V 200mV / 24 = 8.3A OCP point = 8.3A +1/2Iripple OCP point = 20A +1/2Iripple

ILIM*=Vcc 100mV ILIM*=Vref 200mV OCP= 0.1Vth/Rds(on) + 0.5Iripple

D

SC4D7U25V-U

Rds(on) = 24 mohm

12

C83

C82

C83

C98

C98 SCD1U

SC4D7U25V-U

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

SCD1U

1 2

IND-8UH-2

L28

12

C79

C79 SC47P50V2JN

SC47P50V2JN

12

R81

R81 2MR3

2MR3

DC/DC 3V_S5/5V_S5

E

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,40,41

3D3V_S517,18,19,21,25,29,31,35,39,40

3D3V_AUX16,20,31,32,34,35,36

5V_S514,18,20,36,38

5V_AUX14,15,35,38,39

DCBATOUT14,35,38,39,40,41

5V_DC_S3

ST150U6D3VDM-9

12

R79

12

15K4R3

C77

C77 SC100P50V2JN-U

SC100P50V2JN-U

12

R78

R78 10KR3F

10KR3F

These components should be located near by MAX1977

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

37 41Monday, August 15, 2005

E

TC14

3D3V_S0 3D3V_S5 3D3V_AUX 5V_S5 5V_AUX DCBATOUT

12

-1

of

-1

A

B

C

D

E

For 1.5V SETTING=1.517V

1 2

10KR3F

R416

R409

3K9R2F

4 4

C349

SC4700P50V3KX

For 1.8V SETTING=1.8V

1 2

10K2R3F

R415

R414

2KR2F

C350

SC3300P50V2KX

3 3

5V_AUX

PM_SLP_S3#

5V_AUX

12

1 2

R360

1 2

R359

1 2

R413

5130_INV1 5130_FB1

1 2

R411

5130_INV2 5130_FB2

100KR2

6

123 4

R410

5

100KR2

1 2

680R2

1 2

680R2

1 2

R412 11K5R2FR412 11K5R2F

SB

U51

U51 2N7002S

2N7002S

7K87R2F

PWM_1D5V

C348

SC4700P50V3KX

PWM_1D8V

C347

C347 SC5600P25V2KX

SC5600P25V2KX

5130_SS_STBY1

12

C119

C119 SC1500P50V3KX

SC1500P50V3KX

1999_S5ENABLE20,37

(1D5V=>CH1 , 1D8V=>CH2 , 1D05V =>CH3)

For 1.05V SETTING=1.061V

1 2

80K6R3F

R398

R397

2K7R2J

C334

SC3300P50V2KX

12

1 2

R392

1 2

R396

5130_INV3 5130_FB3

5130_FLT

12

C116

C116 SCD01U16V3KX

SCD01U16V3KX

1KR3

680R2

1 2

R395

5130_FB1 5130_SS_STBY1 5130_INV2 5130_FB2 5130_SS_STBY2

5130_PWM_SEL

5130_CT 5130_REF STBY_REF

1 2

20KR2F

C333

C333 SC5600P25V2KX

SC5600P25V2KX

1 2 3 4 5 6 7 8

9 10 11 12

TI TPS5130 for 1D8V, 1.5V, 1.05V.

PWM_1D05V

5V_DC_S5

3

D24

D24 BAW56-1

1

2

1 2

R552

C463

C463 SCD1U

SCD1U

1 2

BAW56-1

5130_LH2

close to IC

5130_OUT2U

0R2-0

5130_FLT 5130_INV1

FB1 SS_STBY1 INV2 FB2 SS_STBY2 PWM_SEL CT GND REF STBY_VREF5 STBY_VREF3.3 STBY_LDO

C115 SCD1U50V5KXC115 SCD1U50V5KX

1 2

44

45

LL1

LH1

TRIP141TRIP2

OUT1_D43OUT2_D

OUT1_U

OUTGND142OUTGND2

40

VIN_SENSE12

47

46

48

FLT

INV1

TPS5130

5130_LH1

5130_LL1

5130_OUT1U 5130_OUT1D

5130_TRIP1 5130_TRIP2

5130_OUT2D

38

39

37

DCBATOUT

OUT2_U

LH2

VREF3.3

VREF5

REG5V_IN

LDO_IN

LDO_CUR

LDO_GATE

LDO_OUT

INV_LDO

5130_LL1 39

5130_OUT1U 39 5130_OUT1D 39

U23

36

LL2

35 34 33

VIN

32 31 30 29 28 27 26 25

5130_OUT2D 39

5130_TRIP1

5130_TRIP2

5130_TRIP3

C114 SCD1U50V5KXC114 SCD1U50V5KX

1 2

5130_LL2

5130_OUT2U 39

5V_S3

15KR3

DCBATOUT

OCP_1.05V

1 2

15KR3

R408

C346

1 2

SCD1U16V3KX

close to IC

OCP_1.8V

R407

1 2

C345

1 2

SCD1U16V3KX

close to IC

OCP_1D5V

1 2

20KR3

R394

C332

1 2

SCD1U16V3KX

close to IC

5130_LL2 39

C344

1 2

SCD1U

DCBATOUT

-1

DCBATOUT

5V_DC_S5

12

C93

C93 SC4D7U10V5ZY

SC4D7U10V5ZY

5V_S5

G52

1 2

GAP-CLOSE-PWR

G28

1 2

GAP-CLOSE

5

6

2 2

123 4

PM_SLP_S4#17,21,31,37

1 2

5V_AUX

R361

1 1

PM_SLP_S3#

A

100KR2

6

123 4

U50

U50 2N7002S

2N7002S

5130_SS_STBY2

12

C118

C118 SC4700P50V3KX

SC4700P50V3KX

5

U53

U53 2N7002S

2N7002S

5130_SS_STBY3

12

C335

C335 SC1500P50V3KX

SC1500P50V3KX

B

5130_CT

12

C117

C117 SC47P50V2JN

SC47P50V2JN

5130_REF

12

C97

C97 SCD1U16V3KX

SCD1U16V3KX

VCCP_PWGD20

5130_SS_STBY3 5130_FB3 5130_INV3

3D3V_S0

FB3

INV3

SS_STBY3

TRIP3

VIN_SENSE3

PGOUT16PG_DELAY

14

15

13

18

19

17

12

C95

SC1000P25V

12

R170

R170 10KR2

10KR2

PM_SLP_S3#

1 2

HW Thermal Throttling

C

LH3

LL3

OUT3_U

20

22

23

21

5130_LH3

3

5130_TRIP3

3D3V_S0

147

OUT3_D

OUTGND3

TPS5130PT-U

24

5130_OUT3D 5130_LL3 5130_OUT3U

1 2

C94 SCD1U50V5KXC94 SCD1U50V5KX

5V_DC_S5

D23

2 1

BAT54-1

U37A

3

TSLCX08-U

DCBATOUT

For 1.5V SETTING=1.505V

5130_OUT3D 39 5130_OUT3U 39 5130_LL3 39

CPU_SHDN# 36

5V_AUX

12

R383

R383 300KR2J

300KR2J

Q25

R1

PM_SLP_S3#17,21,28,31,37,40

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

2

IN

R2

DTC115EE-U

DC/DC 2D5V/1D5V/1D05V

5130_PWM_SEL

OUT

3

GND

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

38 41Monday, August 15, 2005

of

E

of

-1

A

hexainf@hotmail.com

TI TPS5130 for 2.5V, 1.5V, 1.05V

(1D5V=>CH1 , 2D5V=>CH2 , 1D05V =>CH3)

12

C128

4 4

SI4800BDY

5130_OUT1U38 5130_LL138

5130_OUT1U

5130_LL1

IRF7807Z

Rds(on)=16mOhm

5130_OUT1D38

3 3

5130_OUT2U38 5130_LL238

2 2

5130_OUT2D38

5130_OUT1D

SI4800BDY

5130_OUT2U 5130_LL2

IRF7807Z

Rds(on)=16mOhm

IRF7807Z

5130_OUT2D

678

U27

DDD

GD

4 5

678

5

U26

DDD

GD

S

GD

S

4

678

U22

DDD

GD

4 5

678

5

U21

DDD

GD

S

GD

S

4

SSS

123

S

123

SSS

123

S

123

C128 SCD1U

SCD1U

1 2

L31

12

C112

C112 SCD1U

SCD1U

1 2

L29

IND-4D7UH-56

DCBATOUT

12

DCBATOUT

12

DCBATOUT

B

C129

C129 SC4D7U25V6KX-L

SC4D7U25V6KX-L

PWM_1D5V

12

C113

C113 SC4D7U25V6KX-L

SC4D7U25V6KX-L

PWM_1D8V

TC18

TC18 ST220U2VDM-1

ST220U2VDM-1

12

TC17

ST330U3VDM-1-GP

1D5V/5A OCP=10A

PWM_1D5V 1D5V_S0

PWM_1D8V 1D8V_S3

C

D

1.5V_S5 (For ICH6)

PWM_1D05V

Power budget:0D9V/2.2Apeak (For DDR2_VTT)

SE220U16VM-U

1D05V_S0

0D9V / 1A

12

TC8

DY

0D9V_S0

12

C460

C460 SC10U10V5ZY-L

SC10U10V5ZY-L

3D3V_S5

TC20

12

ST150U4VBM-L1

U59

3

VIN

G9131-15T73UF-GP

U58

4

VOUT

8

NC

7

NC NC5GND

APL5331KAC-TR

VOUT

GND

Imax=300mA

12

C367

C367 SC10U10V5ZY-L

SC10U10V5ZY-L

1

VIN

3

VREF

6

VCNTL

2 9

GND

1D5V_S5

2 1

12

C414

C414 SC10U10V6ZY-U

SC10U10V6ZY-U

1D8V_S3

5V_S0

12

C376

SCD1U10V2MX-1

APL533_VREF1

12

C368

SCD1U10V2MX-1

L3# circuit

5V_AUX

1D8V_S3

12

R446

R446 1KR2F

1KR2F

1 2

R133

12

R447

R447 1KR2F

1KR2F

R446,R447 for 1G Memory

DCBATOUT14,35,37,38,40,41

0R2-0

3D3V_S517,18,19,21,25,29,31,35,37,40

1D5V_S518 1D8V_S37,9,10,11,12,38,40,41

0D9V_S012

E

5V_AUX14,15,35,37,38

5V_S013,14,18,19,20,21,23,24,27,28,29,32,36,40,41

DCBATOUT 3D3V_S5 5V_AUX 1D5V_S5 1D8V_S3 5V_S0 0D9V_S0

DDR_VREF_1 40

12

C75

678

DDD

U18

SI4800BDY

SSS

GD

SSS

GD

123

4 5

5130_OUT3U38

5130_LL338

1 1

Rds(on)=16mOhm

5130_OUT3D38

5130_OUT3U

5130_LL3

5130_OUT3D

A

U15

IRF7807Z

678

5

DDD

S

GD

S

GD

S

123

4

C75 SCD1U

SCD1U

1 2

L27

12

IND-4D7UH-56

C76

C76 SC4D7U25V6KX-L

SC4D7U25V6KX-L

PWM_1D05V

12

R73

R73 1KR2

1KR2

DY

B

1D05V/5A OCP=10A

12

TC5

TC5 ST220U4VDM-10

ST220U4VDM-10

L3# at 8.13V

HTH

DCBATOUT

12

R363

R363 1MR2F

1MR2F

R364

R364 6K04R2F

6K04R2F

R323

R323 174KR2F

174KR2F

C

HTH

U52

1

HTH

2

GND LTH3RESET#/RESET

G680LT1

BL3#37

VCC

12

C293

C293 SCD1U10V2MX-1

SCD1U10V2MX-1

D20

5 4

D20

D

BAT54-1

2 1

RSMRST# 16,20,31

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

39.DC/DC 1D8V/1D5V/1D05V-2

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Leopard 3

E

of

39 41Thursday, August 18, 2005

-1

3

A

FOR GMCH Power

G27

1 2

GAP-CLOSE-PWR

4 4

CORE_GMCH_S0 1D05V_S0

VCCP_GMCH_S0 1D05V_S0

3 3

GAP-CLOSE-PWR G26

G26

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G25

G25

1 2

GAP-CLOSE-PWR

G14

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G15

G15

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G16

G16

1 2

GAP-CLOSE-PWR

B

DDR_VREF_139

C

1D8V_S3

12

C183

C183 SCD1U16V3KX

SCD1U16V3KX

12

C184

C184 SCD1U16V3KX

SCD1U16V3KX

12

R130

R130 220R3F

220R3F

12

R132

R132 220R3F

220R3F

U31

1

IN+

2

VSS IN-3OUT

G1214

R131

D

VDD

DY

1 2

0R3-U

5 4

5V_S3

1 2

E

3D3V_S03,5,7,9,11,13,14,16,17,18,19,20,21,22,23,24,25,27,29,30,31,32,36,38,41 3D3V_S313,14,30 3D3V_S517,18,19,21,25,29,31,35,37,39

5V_S013,14,18,19,20,21,23,24,27,28,29,32,36,39,41 5V_S313,14,26,28,30,32,37,38,41

5V_S514,18,20,36,38 2D5V_S07,9,15,18 1D8V_S37,9,10,11,12,38,39,41

DDR_VREF_S37,11

DCBATOUT14,35,37,38,39,41

1D05V_S038,39,41

VCCP_GMCH_S04,5,6,7,9,10,16,18,36,41 CORE_GMCH_S06,9,10,41

DDR_VREF_S3 need 10 mil and

C206

C206 SCD1U16V

SCD1U16V

must neat NB and DIMM

DDR_VREF_S3

12

C167

C167 SCD1U16V

SCD1U16V

VREFOUT = 0.9V

3D3V_S0 3D3V_S3 3D3V_S5 5V_S0 5V_S3 5V_S5 2D5V_S0 1D8V_S3

DDR_VREF_S3

DCBATOUT

1D05V_S0 VCCP_GMCH_S0 CORE_GMCH_S0

FOR DDR 2 Power

Q27

TP0610K-U

G

R448

R448 100KR2

100KR2

S

TP0610K-U

G

1

12

S D

R436

R436 1KR2

1KR2

32

D

12

C369

C369 SCD22U50V5KX

SCD22U50V5KX

12

RB5

RB5 100R2

100R2

QB5

QB5 2N7002-F-GP

G

2N7002-F-GP

S D

PWR_S0_CTL

21

D27

D27 MMGZ5242B

MMGZ5242B

SCD1U10V2MX-1

B

5V_S0 5V_S3

U20

1

S

2

S

3

S

4 5

GD

AO4422

3D3V_S0

3D3V_S0 2D5V_S0

12

C467

AO4422

U56

1

S

2

S

3

S

4 5

GD

AO4422

U69

VOUT

3

VIN

GND

APL5308-25AC-TR

8

D

7

D

6

D

3D3V_S5

8

D

7

D

6

D

2 1

12

C468

C468 SC10U6D3V5MX

SC10U6D3V5MX

C

Suspend Power

3D3V_S53D3V_S3

12

0R3-U

R95

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D

Date: Sheet

PWRPLANE&RESETLOGIC

Leopard 3

40 41Tuesday, July 12, 2005

E

-1

of

-1

Run Power

DCBATOUT

1 2

10KR2

R437

2 2

1 1

R437

1 2

R438

PM_SLP_S3#17,21,28,31,37,38

330KR2

Q28

Q28 2N7002-F-GP

2N7002-F-GP

A

1 2

A

hexainf@hotmail.com

B

C

DCBATOUT_BEAD

D

DCBATOUT

E

AD+

12

EC79

EC98

EC132

SCD1U16V

4 4

12

SPR4

SPRING-18-U

1

SPR15

SPRING-4

1

12

EC171

EC171 SCD1U16V

SCD1U16V

SPR16

SPRING-4

1

H10H10

EC75

SCD1U16V

5V_S0

U61D

147

12 13

3 3

SPR8

SPRING-18-U

SPR12

SPRING-4

2 2

H19H19

11

TSAHCT32

SPR2

SPRING-18-U

1

SPR13

SPRING-4

1

H17

H17 HOLE

HOLE

5V_AUDIO_S0

147

12 13

AUD_AGND AUD_AGND

SPR3

SPR7

SPRING-18-U

1

SPR14

SPRING-4

1

H14

H14 HOLE

HOLE

1

SPR17

SPRING-4

1

H8 HOLEH8HOLE

U40D

11

TSAHCT86

SPR11

SPRING-4

1

H11

H11 HOLE

HOLE

DY

AUD_AGND

12

EC128

EC128 SCD1U16V

SCD1U16V

SPR1

SPRING-18-U

1

SPR10

SPRING-4

1

H12

H12 HOLE

HOLE

SCD1U16V

DY

12

EC132

12

EC35

EC157

SCD1U16V

DY

AUD_AGND AUD_AGND AUD_AGND

12

EC107

EC73

SCD1U16V

SPR9

SPRING-18-U

1

K70

K70 GNDPAD

GNDPAD

H15

H15 HOLE

HOLE

12

EC125

SCD1U16V

DY

12

EC2

SCD1U16V

1

K71

K71 GNDPAD

GNDPAD

12

EC136

EC136 SCD1U16V

SCD1U16V

DY

12

EC6

EC6 SCD1U16V

SCD1U16V

1

K72

K72 GNDPAD

GNDPAD

1

K69

K69 GNDPAD

GNDPAD

12

EC145

SCD1U16V

DY

12

EC13

SCD1U16V

3D3V_S0

12

EC158

EC158 SCD1U16V

SCD1U16V

DY

12

EC15

EC15 SCD1U16V

SCD1U16V

EC140

EC140 SCD1U16V

SCD1U16V

EC151

EC151 SCD1U16V

SCD1U16V

DY

AUD_AGND

5V_S0

12

EC97

SCD1U16V

12

AUD_AGND AUD_AGND

12

EC55

SCD1U16V

DY

12

EC67

EC67 SCD1U16V

SCD1U16V

DY

12

EC78

EC78 SCD1U16V

SCD1U16V

EC155

EC155 SCD1U16V

SCD1U16V

12

EC131

EC131 SCD1U16V

SCD1U16V

12

DY

12

EC147

EC147 SCD1U16V

SCD1U16V

DY

EC50

EC50 SCD1U16V

SCD1U16V

12

EC139

EC139 SCD1U16V

SCD1U16V

DY

5V_S3

12

EC53

SCD1U16V

DY

12

1D05V_S0

5V_S3

12

EC62

EC62 SCD1U16V

SCD1U16V

DY

12

EC59

SCD1U16V

DY

EC74

EC74 SCD1U25V3KX

SCD1U25V3KX

12

EC169

EC169 SCD1U25V3KX

SCD1U25V3KX

12

EC21

EC21 SCD1U16V

SCD1U16V

EC98

SCD1U25V3KX

12

EC161

EC160

SCD1U25V3KX

12

EC57

EC41

EC41 SCD1U16V

SCD1U16V

DY

12

EC48

SCD1U16V

DY

12

EC66

SCD1U16V

DY

12

EC162

SCD1U25V3KX

EC65

12

EC72

SCD1U16V

12

EC129

EC105

SCD1U25V3KX

12

EC164

EC163

EC163 SCD1U25V3KX

SCD1U25V3KX

12

EC32

EC32 SCD1U16V

SCD1U16V

12

EC150

EC137

EC137 SCD1U16V

SCD1U16V

DY

12

EC58

SCD1U16V

DY

12

EC64

SCD1U16V

12

EC119

SCD1U16V

EC47

12

SCD1U16V

DY

12

EC108

EC108 SCD1U25V3KX

SCD1U25V3KX

BT+

12

EC52

EC52 SCD1U25V3KX

SCD1U25V3KX

12

EC26

EC26 SCD1U16V

SCD1U16V

12

EC141

SCD1U16V

DY

3D3V_S0

12

EC43

SCD1U16V

DY

5V_S3

12

EC29

SCD1U16V

DY

12

EC99

SCD1U25V3KX

12

EC91

SCD1U25V3KX

12

EC28

SCD1U16V

12

EC71

SCD1U16V

DY

12

EC46

EC46 SCD1U16V

SCD1U16V

12

EC38

EC51

SCD1U16V

DY

EC76

EC106

EC106 SCD1U25V3KX

SCD1U25V3KX

12

EC168

EC104

SCD1U25V3KX

SCD1U16V

12

EC27

EC27 SCD1U16V

SCD1U16V

12

EC143

EC143 SCD1U16V

SCD1U16V

DY

12

EC45

EC45 SCD1U16V

SCD1U16V

DY

12

EC109

EC109 SCD1U25V3KX

SCD1U25V3KX

12

EC14

EC14 SCD1U16V

SCD1U16V

12

EC25

SCD1U16V

12

EC127

SCD1U16V

DY

5V_S3

12

EC24

EC24 SCD1U16V

SCD1U16V

12

EC123

EC123 SCD1U16V

SCD1U16V

DY

12

DY

12

EC90

EC81

EC81 SC1000P50V

SC1000P50V

SCD1U25V3KX

12

EC9

EC9 SCD1U16V

SCD1U16V

12

EC117

SCD1U16V

3D3V_S03D3V_S0

12

EC130

EC130 SCD1U16V

SCD1U16V

DY

EC23

EC23 SCD1U16V

SCD1U16V

VCCP_GMCH_S0

12

EC96

SCD1U16V

1D8V_S3

12

EC122

EC122 SCD1U16V

SCD1U16V

12

EC3

EC3 SCD1U25V3KX

SCD1U25V3KX

12

EC7

EC7 SCD1U16V

SCD1U16V

12

EC116

EC116 SCD1U16V

SCD1U16V

12

EC70

SCD1U16V

DY

12

EC77

SCD1U25V3KX

12

EC118

SCD1U16V

12

EC138

EC138 SCD1U16V

SCD1U16V

DY

12

EC5

EC5 SCD1U25V3KX

SCD1U25V3KX

12

EC111

EC111 SCD1U16V

SCD1U16V

3D3V_LAN_S5

12

SCD1U16V

3D3V_S0

12

DY

12

EC4

12

EC134

EC30

EC144

SCD1U16V

12

EC170

EC113

SCD1U25V3KX

SCD1U16V

C

CORE_GMCH_S0

12

EC120

EC112

EC112 SCD1U16V

SCD1U16V

12

EC126

EC148

EC148 SCD1U16V

SCD1U16V

12

EC61

EC61 SCD1U16V

SCD1U16V

DY

12

EC34

EC34 SCD1U16V

SCD1U16V

12

EC146

SCD1U16V

12

EC60

EC60 SCD1U16V

SCD1U16V

DY

12

EC149

EC149 SCD1U16V

SCD1U16V

12

EC121

SCD1U16V

5V_S0 5V_S0 5V_S0

12

EC49

SCD1U16V

DY

1D5V_S0

12

EC135

EC135 SCD1U16V

SCD1U16V

D

12

EC54

EC54 SCD1U16V

SCD1U16V

DY

12

EC114

SCD1U16V

12

EC142

EC142 SCD1U16V

SCD1U16V

DY

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

12

EC63

EC37

SCD1U16V

DY

MISC & EMI

12

EC40

EC40 SCD1U16V

SCD1U16V

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard 3

41 41Tuesday, July 12, 2005

E

12

EC68

SCD1U16V

DY

of

12

EC69

SCD1U16V

DY

-1

1

H5 HOLEH5HOLE

1

1 1

H1 HOLEH1HOLE

1

H13

H13 HOLE

HOLE

H9H9

1

A

H6 HOLEH6HOLE

H2 HOLEH2HOLE

1

H7 HOLEH7HOLE

H3 HOLEH3HOLE

1

H4 HOLEH4HOLE

H22

H22 HOLE

HOLE

1

H16

H16 HOLE

HOLE

H20

H20 HOLE

HOLE

1

B

H21

H21 HOLE

HOLE

H18H18

1

H23

H23 HOLE

HOLE

H24

H24 HOLE

HOLE

1

H25

H25 HOLE

HOLE

1

12

EC115

EC133

EC133 SCD1U16V

SCD1U16V

1

EC10

EC10 SCD1U16V

SCD1U16V

EC33

SCD1U16V

HP DV1000 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual