HP CQ61 AMD Schematics
1
2
3
4
5
6
7
8
3&%67$&.83
/$<(5723
/$<(5,1
A A
/$<(5,1
/$<(59&&
/$<(5,1
/$<(5%27
B B
SYSTEM CHARGER(ISL6251)
PAGE 40
SYSTEM POWER ISL6237
PAGE 34
DDR II SMDDR_VTERM
1.8V/1.8VSUS(RT8207)
C C
VCCP +1.1V AND +1.2V(RT8204)
PAGE 37
DDRII-SODIMM1
PAGE 6,7
DDRII-SODIMM2
PAGE 6,7
;
/$1
5HDOWHN
3&,(/$1
RTL8103E
(10/100)
PAGE 30
5-
PAGE 30
6$7$+''
PAGE 29
6$7$&'520
PAGE 29
(6$7$
PAGE 29
DDRII 667/800 MHz
DDRII 667/800 MHz
PCI-E
;
0LQL3&,(
&DUG
:LUHOHVV/$1
PAGE 33
6$7$0%
6$7$0%
6$7$0%
AMD
Tigris
S1G2 Processor
638P (uPGA)/35W
PAGE 3,4,5
HT3
NORTH BRIDGE
RS880
A12
PP;PPSLQ%*$
PAGE 8,9,10,11
ALINK X4
SOUTH BRIDGE
SB710 A14
PP;PPSLQ%*$
4.5W(Ext)
4.3W(Int)
PAGE 12,13.14.15.16
Lion
Sabie
CPU THERMAL
SENSOR
PAGE 5
3&,([SUHVV;
+'0,
PAGE 25
&57
PAGE 24
/9'6
6LGHSRUW
PE5$0
IRU80$RQO\
PAGE 8
PAGE 23
86%
1,8,9
PAGE 29 PAGE 29
;
$]DOLD
CPU_CLK
NBGFX_CLK
NBGPP_CLK
SBLINK_CLK
5
%OXHIODPH86%3RUWV
$7,06
IRU
'LVFUHWH
RQO\
64 Bit,DDR2*4
M92-S2
PAGE 17,18,19
20,21,22
SBSRC_CLK
:HEFDP
;
CLOCK GEN
ICS9LPRS476AKLFT-->HP
SLG8SP628VTR-->HP
RTM880N-796 -->HP
2
PAGE 23
14.318MHz
10
3&,(:/$1&DUG[
OP8 SYSTEM DIAGRAM
01
PAGE 2
PAGE 33
3
)ODVK0HGLD
576
PAGE 26
PAGE 35
PAGE 28PAGE 28
,'7
+'%
PAGE 27
$8',2
$PSOLILHU
73$$
PAGE 28
$XGLR
Conn
PAGE 27
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
6
1%5'
Block Diagram
Date: Sheet
7
142Friday, March 20, 2009
8
1A
of
VGACORE(1.1V~1.2V)Oz8118
PAGE 38
CPU CORE ISL6265HRTZ-T
.H\ERDUG
7RXFK3DG
PAGE 32
PAGE 32
/3&
(1(.%&
.%'[
0'&&211
PAGE 28
PAGE 36
SMBUS TABLE
Clock gen/Robson/TV tuner
SB--SCL0/SD0
D D
EC --SCL/SD
EC--SCL2/SD2
/DDR2/DDR2 thermal/Accelerometer
epress card
Wlan Card
Battery charge/discharge
VGA thermal/system thermal
1
+3V
+3VS5
+3VPCU
+3V
2
3
PAGE 28
)$1
PAGE 32
63,
PAGE 35
http://hobi-elektronika.net
4
5
$8',2&211$QJ0,&
3KRQH0,&
5
4
3
2
1
600 ohm, 0.5A
C494
C491
0.1U/10V_4
+1.2V_CLKVDDIO
C490
0.1U/10V_4
+3V_CLKVDD
C479
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C428
C446
0.1U/10V_4
0.1U/10V_4
C485
C423
0.1U/10V_4
C412
0.1U/10V_4
C424
NBGFX_CLKP
NBGFX_CLKN
EXT_GFX_CLKP
EXT_GFX_CLKN
SBLINK_CLKP
SBLINK_CLKN
CLK_VGA_27M_SS
CLK_VGA_27M_NSS To M92-S 27Mhz - RX780 only
L45
+1.2V
BLM18PG181SN1D(180,1.5A)_6
D D
600 ohm, 0.5A
L46
+3V
BLM18PG181SN1D(180,1.5A)_6
C492
22U/6.3V_8
+3V_CLKVDD
C511
22U/6.3V_8
0.1U/10V_4
C430
2.2U/6.3V_6
C489
0.1U/10V_4
0.1U/10V_4
C434
C468
C481
0.1U/10V_4
0.1U/10V_4
RX780 RS780CLOCKS name
RP48 STUFF
RP47 STUFF to M92-S external reference clock -RX780 only
RP48 STUFF
RP47 NC
RP43 STUFF RP43 STUFF
R213,R215
STUFF
R213,R215
NC
to NB for VGA reference clock
to NB for AC-LINK reference clock
Clock pin function
02
Need check the net name for the short pad
U11
+3V_CLKVDD
Place very
close to
1 2
C/G
CG_XIN
CG_XOUT
+3V_CLK_VDDA
C396
2.2U/6.3V_6
PCLK_SMB6,7,13,33
PDAT_SMB6,7,13,33
+3V
R207 *8.2K_4
R190 8.2K_4
+3V
R247 *8.2K_4
R212 *8.2K_4
R222 *8.2K_4
R231 *8.2K_4
if use clock
request pin , need
to pull Hi for
default sttting
C411
0.1U/10V_4
+1.2V_CLKVDDIO
CG_XIN
CG_XOUT
PCLK_SMB
PDAT_SMB
CLK_PD#
CLKREQ1#
CLK_PD#
CLKREQ0#
CLKREQ2#
CLKREQ3#
CLKREQ4#
CLKREQ0#
CLKREQ4#
CLKREQ3#
CLKREQ2#
CLKREQ1#
4
+3V_CLKVDD
C C
C406 33P/50V_4
C405 33P/50V_4
can remove MOSFET level shift
SB/clock gen / DDR2 is 3.3V/S0
power level
B B
L35
BLM18PG181SN1D(180,1.5A)_6
Y1
14.318MHZ
For EMI
C399 *10P/50V_4
C404 *10P/50V_4
C440 *10P/50V_4
C456 *10P/50V_4
A A
EXT_NB_OSC
CLK_48M_USB
EVGA-XTALI
OSC_SPREAD
5
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB
40
VDD_SATA
48
VDDCPU
55
VDDHTT
56
VDDREF
63
VDD48
11
VDDSRC_IO
17
VDDSRC_IO
25
VDDATIG_IO
34
VDDSB_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC
18
GNDSRC
24
GNDATIG
33
GNDSB
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
*CLKREQ0#
38
*CLKREQ4#
39
*CLKREQ3#
44
*CLKREQ2#
45
*CLKREQ1#
RTM880N-796_QFN64
SLG
CPUK8_0T
CPUK8_0C
ATIG0T
ATIG0C
ATIG1T
ATIG1C
SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C
SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
QFN64
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C
SRC7T/27M_SS
SRC7C/27M
SRC6T/SATAT
SRC6C/SATAC
HTT0T/66M
HTT0C/66M
48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
TGND
65
SLG8SP628VTR--AL8SP628000
RTM880N-796-- AL000880001RTL
* default
SEL_HTT66
SEL_SATA
SEL_27 1027MHz non-spreading singled clock
66 MHz 3.3V single ended HTT clock
1
*01100 MHz differential HTT clock
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
*0
*
100 MHz spreading differential SRC clock
http://hobi-elektronika.net
CPUCLKP
50
CPUCLKN
49
NBGFX_CLKP
30
NBGFX_CLKN
29
28
EXT_GFX_CLKN_L EXT_GFX_CLKN
27
37
36
SBSRC_CLKP SBSRC_CLKP
32
SBSRC_CLKN SBSRC_CLKN
31
PCIE_MINI1_CLKP
22
PCIE_MINI1_CLKN
21
20
19
15
14
13
PCIE_LAN_CLKN
12
9
8
6
CLK_VGA_27M_NSS
5
42
41
54
53
64
59
58
57
3
NBHTREFCLK0P
NBHTREFCLK0N NBHT_REFCLKN
CLK48MUSB
SEL_HT66SEL_HT66SEL_HT66SEL_HT66
SEL_SATA
SEL_27
T25
Place within 0.5"
of CLKGEN
RP42 *0_4P2R_4
4
2
RP48 *0_4P2R_4
4
2
RP47 0_4P2R_4
4
2
RP43 *0_4P2R_4
4
2
RP46 *0_4P2R_4
4
2
RP45 *0_4P2R_4
4
2
RP44 *0_4P2R_4
4
2
R217 33_4
R213 75/F_4
R215 100/F_4
R188 *0_4/S
R189 *0_4/S
R174 22_4
R191 22_4
R186 33_4
SI change 1.2V to 3.3V from AMD request
R173
*8.2K_4
R192
8.2K_4
R178 *261_4
3
1
3
1
3
1
Clock for Dis only
3
1
3
1
3
1
3
1
NBHT_REFCLKP
CLK_48M_USB
CLK_48M_CR
+3V_CLKVDD
RS780M/RX780M
CPUCLKP
CPUCLKN
NBGFX_CLKP
NBGFX_CLKN
EXT_GFX_CLKPEXT_GFX_CLKP_L
SBLINK_CLKPSBLINK_CLKP
SBLINK_CLKNSBLINK_CLKN
PCIE_MINI1_CLKP
PCIE_MINI1_CLKN
PCIE_LAN_CLKPPCIE_LAN_CLKP
PCIE_LAN_CLKN
OSC_SPREADCLK_VGA_27M_SS
27Mhz for Dis only
R176
8.2K_4
SEL_27
SEL_SATA
SEL_HT66
not need to
stuff ,
R185
*8.2K_4
R169 have
pull LOW
2
CPUCLKP 3
CPUCLKN 3
NBGFX_CLKP 10
NBGFX_CLKN 10
EXT_GFX_CLKP 17
EXT_GFX_CLKN 17
SBLINK_CLKP 10
SBLINK_CLKN 10
SBSRC_CLKP 12
SBSRC_CLKN 12
PCIE_MINI1_CLKP 33
PCIE_MINI1_CLKN 33
PCIE_LAN_CLKP 30
PCIE_LAN_CLKN 30
OSC_SPREAD 18
EVGA-XTALI 18
NBHT_REFCLKP 10
NBHT_REFCLKN 10
CLK_48M_USB 13
CLK_48M_CR 26
EXT_SB_OSC 12
to NB for external Graphics
reference clock
to M92-S -RX780 only
to NB for AC-LINK reference clock
to SB
to WLAN
SSIN - for M82 - 3.3V level input
X_TALIN --for M92 -1.8V level input
Ra
R171 158/F_4
R169 90.9/F_4
Rb
1.8V
82.5RRa
130RRb
RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
Clock chip has internal serial
terminations
for differencial pairs, external resistors
are
reserved for debug purpose.
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1%5'
Clock Generator
Date: Sheet
RS880RX880
1
1.1V
158R
90.9R
EXT_NB_OSC 10
of
242Friday, March 20, 2009
1A
5
VLDT use 1.5A Max current
+1.2V +1.2V_VLDT
R384 *0_6/S
R383 *0_6/S
+1.2V_VLDT
BLM21PG221SN1D(220,100M,2A)_8
+2.5V
C340
4.7U/6.3V_6
SI Change from AMD request SI Change from AMD request
C645 10U/6.3V_8 C76610U/6.3V_8
D D
HT_NB_CPU_CAD_H[15..0]8
HT_NB_CPU_CAD_L[15..0]8
HT_NB_CPU_CLK_H[1..0]8
HT_NB_CPU_CLK_L[1..0]8
HT_NB_CPU_CTL_H[1..0]8
HT_NB_CPU_CTL_L[1..0]8
HT_CPU_NB_CAD_H[15..0]8
HT_CPU_NB_CAD_L[15..0]8
HT_CPU_NB_CLK_H[1..0]8
HT_CPU_NB_CLK_L[1..0]8
C C
HT_CPU_NB_CTL_H[1..0]8
HT_CPU_NB_CTL_L[1..0]8
FOX PZ63826-284R-41F
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2)
MLX 47296-4131
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
C662 10U/6.3V_8
C676 0.22U/6.3V_4
C671 180P/50V_4
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1
HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
L32
LS0805-100M-N
U24A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
4
HT LINK
+CPUVDDA
C313
4.7U/6.3V_6
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
W/S= 15 mil/20mil
C294
0.22U/6.3V_4
+1.2V_VLDT
AE2
+1.2V_VLDT
AE3
+1.2V_VLDT
AE4
+1.2V_VLDT
AE5
HT_CPU_NB_CAD_H0
AD1
HT_CPU_NB_CAD_L0
AC1
HT_CPU_NB_CAD_H1
AC2
HT_CPU_NB_CAD_L1
AC3
HT_CPU_NB_CAD_H2
AB1
HT_CPU_NB_CAD_L2
AA1
HT_CPU_NB_CAD_H3
AA2
HT_CPU_NB_CAD_L3
AA3
HT_CPU_NB_CAD_H4
W2
HT_CPU_NB_CAD_L4
W3
HT_CPU_NB_CAD_H5
V1
HT_CPU_NB_CAD_L5
U1
HT_CPU_NB_CAD_H6
U2
HT_CPU_NB_CAD_L6
U3
HT_CPU_NB_CAD_H7
T1
HT_CPU_NB_CAD_L7
R1
HT_CPU_NB_CAD_H8
AD4
HT_CPU_NB_CAD_L8
AD3
HT_CPU_NB_CAD_H9
AD5
HT_CPU_NB_CAD_L9
AC5
HT_CPU_NB_CAD_H10
AB4
HT_CPU_NB_CAD_L10
AB3
HT_CPU_NB_CAD_H11
AB5
HT_CPU_NB_CAD_L11
AA5
HT_CPU_NB_CAD_H12
Y5
HT_CPU_NB_CAD_L12
W5
HT_CPU_NB_CAD_H13
V4
HT_CPU_NB_CAD_L13
V3
HT_CPU_NB_CAD_H14
V5
HT_CPU_NB_CAD_L14
U5
HT_CPU_NB_CAD_H15
T4
HT_CPU_NB_CAD_L15
T3
HT_CPU_NB_CLK_H0
Y1
HT_CPU_NB_CLK_L0
W1
HT_CPU_NB_CLK_H1
Y4
HT_CPU_NB_CLK_L1
Y3
HT_CPU_NB_CTL_H0
R2
HT_CPU_NB_CTL_L0HT_NB_CPU_CTL_L0
R3
HT_CPU_NB_CTL_H1
T5
HT_CPU_NB_CTL_L1
R5
3300P/50V_4
3
CPU CLK
CPUCLKP2
CPUCLKN2
Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"
CPUCLKIN
C7450.22U/6.3V_4
C757180P/50V_4
SideBand Temp sense I2C
+1.8VSUS
CPUCLKP
CPUCLKN
R125 169/F_4
C326 3900P/25V_4
C327 3900P/25V_4
+1.2V_VLDT
CPUCLKP
CPUCLKN
CPUCLKIN#
CPU_LDT_RST#10,12
CPU_PWRGD12
CPU_LDT_STOP#10,12
CPU_SIC5
CPU_SID5
CPU_ALERT5
R74 44.2/F_4
R123 44.2/F_4
CPU_VDD0_RUN_FB_H36
CPU_VDD0_RUN_FB_L36
CPU_VDD1_RUN_FB_H36
CPU_VDD1_RUN_FB_L36
R36 300/F_4
+1.8VSUS
R73 300/F_4
R376 300/F_4
R372 *300_4
2
+CPUVDDA
W/S= 15 mil/20mil
CPU_LDT_RST#
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU
place them to CPU within 1.5"
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPUTEST23
T12
T17
R133 510/F_4
R87 510/F_4
place them to CPU within 1.5"
T64
T1
R440 *0_4/S
CPU_THERMDC
CPU_THERMDA
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#
250mA
+CPUVDDA
+CPUVDDA
CPUCLKIN
CPUCLKIN#
CPU_PWRGD
CPU_SIC
CPU_SID
CPU_ALERT
CPU_HTREF0
CPU_HTREF1
CPUTEST18
CPUTEST19
CPUTEST25H
CPUTEST25L
CPUTEST21
CPUTEST20
CPUTEST24
CPUTEST22
CPUTEST12
CPUTEST27
U24D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SOCKET_638_PIN
KEY1
KEY2
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
R128300_4
R136300_4C292
R132300_4
R458300/F_4
H_THRMDC 5
H_THRMDA 5
+1.8V
M11
W18
CPU_SVC_R
A6
CPU_SVD_R
A4
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
VDDIO_FB_H
W9
VDDIO_FB_L
Y9
H6
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
CPUTEST28H
J7
CPUTEST28L
H8
CPUTEST17
D7
CPUTEST16
E7
CPUTEST15
F7
CPUTEST14
C7
C3
R525 *300/F_4
K8
C4
CPUTEST29H
C9
CPUTEST29L
C8
H18
H19
AA7
D5
C5
1
03
VDDIO_FB_H 37
VDDIO_FB_L 37
CPU_VDDNB_RUN_FB_H 36
CPU_VDDNB_RUN_FB_L 36
R143 300/F_4
T13
T14
T19
T18
T16
T21
+1.2V_VLDT
SI Add from AMD request
T20
T22
+1.8V
CNTR_VREF
B B
A A
R146 20K/F_4
+3V
1
R463 *0_4/S
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
R26 10K/F_4
R35 300_4
CPU_MEMHOT_L# CPU_MEMHOT#
R370 10K/F_4
R369 300_4
CPU_PROCHOT_L#
C776 0.1U/10V_4
R152 34.8K/F_4
CNTR_VREF
2
3
2
2
Q39
1 3
MMBT3904
5
CPU_LDT_REQ# 10
Q10
MMBT3904
13
CNTR_VREF 5
CPU_THERMTRIP_L#5
CPU_PROCHOT# 12
CPU_LDT_RST#
12
G1
*SHORT_ PAD1
for debug only
CPU_MEMHOT# 7,13
+1.8VSUS
+1.8VSUS
R129
*0_4/S
1
R29 10K/F_4
R371 300_4
CPU_THERMTRIP_L#
4
2
3
Q20
BSS138_NL/SOT23
2
1 3
+3V
Q9
MMBT3904
R144
1K/F_4
CPU_LDT_RST_HTPA#CPU_LDT_REQ#_CPU
Serial VID
SI Change from AMD request
+1.8V
CPU_SVC_R
CPU_SVD_R CPU_SVD
CPU_PWRGD
R137 *2.2K_4
R456 1K/F_4
R457 1K/F_4
R444 *0_4/S
R443 *0_4/S
R138 *0_4/S
R453 *220_4Q46 *BSS138_NL/SOT23
R452 *220_4
R139 *220_4
HDT Connector
CPU_DBREQ#
CPU_DBRDY
3
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
C28 *0.1U/10V_4
CPU_THERMTRIP# 13
http://hobi-elektronika.net
+1.8VSUS
CPU_SVC
CPU_PWRGD_SVID_REG
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
KEY
CN5 *HDT CONN
25
CPU_SVC 36
CPU_SVD 36
CPU_PWRGD_SVID_REG 36
CPU_LDT_RST_HTPA#
2
1%5'
VFIX MODE
VID Override Circuit
SVC SVD Voltage Output
00
0
1
0
1
11
CPUTEST20
CPUTEST22
CPUTEST12
CPUTEST15
CPUTEST14
CPUTEST19
CPUTEST18
R28 300/F_4
R30 300/F_4
R70 *300/F_4
R86 *300/F_4
R116 *300/F_4
R83 *300/F_4
R85 *300/F_4
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
S1G2 HT,CTL I/F 1/3
Date: Sheet
1
1.4V
1.2V
1.0V
0.8V
1A
of
342Friday, March 20, 2009
A
B
C
D
E
+0.9VSMVTT +0.9VSMVTT
PLACE THEM CLOSE TO
CPU WITHIN 1"
R374 39.2/F_4
MEM_MA0_ODT06,7
MEM_MA0_ODT16,7
MEM_MA0_CS#06,7
MEM_MA0_CS#16,7
MEM_MA_CLK1_P6
MEM_MA_CLK1_N6
MEM_MA_CLK7_P6
MEM_MA_CLK7_N6
MEM_MA_BANK06,7
MEM_MA_BANK16,7
MEM_MA_BANK26,7
MEM_MA_RAS#6,7
MEM_MA_CAS#6,7
MEM_MA_WE#6,7
MEM_MA_CKE06,7
MEM_MA_CKE16,7
R373 39.2/F_4
T15
A
+1.8VSUS
4 4
MEM_MA_ADD[0..15]6,7
3 3
2 2
1 1
M_ZP
M_ZN
MEM_MA_RESET#
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MB_CLK7_P
MEM_MB_CLK7_N
MEM_MB_CLK1_P
MEM_MB_CLK1_N
U24B
D10
C10
B10
AD10
AF10
AE10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
AA16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
SOCKET_638_PIN
+0.9VSMVTT
4.7U/6.3V_6
+0.9VSMVTT
1000P/50V_4
C640
1.5P/50V_4
C291
1.5P/50V_4
VTT1
MEM:CMD/CTRL/CLK
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
Place close to socket
C198
C23
4.7U/6.3V_6
C204
C155
1000P/50V_4
Close to CPU within 1500 mils
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
W10
VTT5
AC10
VTT6
AB10
VTT7
AA10
VTT8
A10
VTT9
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
C22
4.7U/6.3V_6
C117
1000P/50V_4
CPU_VTT_SENSE
MEMVREF_CPU
MEM_MB_RESET#
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
4.7U/6.3V_6
C142
1000P/50V_4
B
C119
750 mA
CPU_VTT_SENSE 37
T23
MEM_MB0_ODT0 6,7
MEM_MB0_ODT1 6,7
MEM_MB0_CS#0 6,7
MEM_MB0_CS#1 6,7
MEM_MB_CKE0 6,7
MEM_MB_CKE1 6,7
MEM_MB_CLK1_P 6
MEM_MB_CLK1_N 6
MEM_MB_CLK7_P 6
MEM_MB_CLK7_N 6
MEM_MB_BANK0 6,7
MEM_MB_BANK1 6,7
MEM_MB_BANK2 6,7
MEM_MB_RAS# 6,7
MEM_MB_CAS# 6,7
MEM_MB_WE# 6,7
C167
0.22U/6.3V_4
C140
180P/50V_4
MEM_MA_CLK7_P
MEM_MA_CLK7_N
MEM_MA_CLK1_P
MEM_MA_CLK1_N
R68
*0_4
C154
0.1U/10V_4
0.22U/6.3V_4
180P/50V_4
MEM_MB_DATA[0..63]6
+0.9VSMVREF 6,37
Reserved
C133
1000P/50V_4
MEM_MB_DM[0..7]6
C136
C116
C
+1.8VSUS
R67
2K/F_4
R62
2K/F_4
MEM_MB_ADD[0..15] 6,7
C201
0.22U/6.3V_4
C147
180P/50V_4
1.5P/50V_4
1.5P/50V_4
C636
C293
C115
0.22U/6.3V_4
C208
180P/50V_4
http://hobi-elektronika.net
Processor Memory Interface
U24C
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DQS0_P6
MEM_MB_DQS0_N6
MEM_MB_DQS1_P6
MEM_MB_DQS1_N6
MEM_MB_DQS2_P6
MEM_MB_DQS2_N6
MEM_MB_DQS3_P6
MEM_MB_DQS3_N6
MEM_MB_DQS4_P6
MEM_MB_DQS4_N6
MEM_MB_DQS5_P6
MEM_MB_DQS5_N6
MEM_MB_DQS6_P6
MEM_MB_DQS6_N6
MEM_MB_DQS7_P6
MEM_MB_DQS7_N6
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
A12
B16
A22
E25
AB26
AE22
AC16
AD12
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
SOCKET_638_PIN
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DATA[0..63] 6
MEM_MA_DM[0..7] 6
MEM_MA_DQS0_P 6
MEM_MA_DQS0_N 6
MEM_MA_DQS1_P 6
MEM_MA_DQS1_N 6
MEM_MA_DQS2_P 6
MEM_MA_DQS2_N 6
MEM_MA_DQS3_P 6
MEM_MA_DQS3_N 6
MEM_MA_DQS4_P 6
MEM_MA_DQS4_N 6
MEM_MA_DQS5_P 6
MEM_MA_DQS5_N 6
MEM_MA_DQS6_P 6
MEM_MA_DQS6_N 6
MEM_MA_DQS7_P 6
MEM_MA_DQS7_N 6
04
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
D
1%5'
S1G2 DDRII MEMORY I/F 2/3
Date: Sheet
E
442Friday, March 20, 2009
1A
of
5
4
3
2
1
U24F
AA4
VSS1
U24E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
3
R141
10K/F_4
5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
2
Q23
1
3
*BSS138_NL/SOT23
R142
10K/F_4
R450 *10K/F_4
CPU_THERMTRIP_L# SMBALERT#
D D
+CPUVDDNB
3A
+1.8VSUS
2A
C C
CNTR_VREF3
MBCLK218,32
MBDATA218,32
B B
PM_THERM#13
A A
MBCLK2
*BSS138_NL/SOT23
MBDATA2
*BSS138_NL/SOT23
SMBALERT#
MBCLK218,32
MBDATA218,32
+1.8VSUS
CPU_THERMTRIP_L#3
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
2
Q24
1
2
3
R140
10K/F_4
+VCORE1+VCORE0 +VCORE0
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
Q22
1
8
7
6
4
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
CPU_SIC
CPU_SID
CPU_ALERT
U6
SCLK
SDA
ALERT#
OVERT#
G786P8
2
1 3
MSOP
Q43
*MMBT3904
R156
390_4
VCC
DXP
DXN
GND
+1.8VSUS
1
2
3
5
+1.8VSUS
+3V+3V
R157
390_4
C355
0.1U/10V_4
SMBALERT#
4
R158
1K/F_4
CPU_SIC 3
CPU_SID 3
CPU_ALERT 3
H_THRMDA 3
C325
1000P/50V_4
H_THRMDC 3 ECPWROK 16,32
PQ56
*2N7002E-G
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SOCKET_638_PIN
PROCESSOR POWER AND GROUND
R162 *0_4
reserve for
power shutdown
( if can )
R161 *0_4/S
Q26
MMBT3904
2
1 3
3
1
R459 *10K/F_4
2
ADD VGA TEMP_ FAIL function
M92 is active Hi
http://hobi-elektronika.net
J6
VSS66
J8
VSS67
J10
VSS68
J12
VSS69
J14
VSS70
J16
VSS71
J18
VSS72
K2
VSS73
K7
VSS74
K9
VSS75
K11
VSS76
K13
VSS77
K15
VSS78
K17
VSS79
L6
VSS80
L8
VSS81
L10
VSS82
L12
VSS83
L14
VSS84
L16
VSS85
L18
VSS86
M7
VSS87
M9
VSS88
AC6
VSS89
M17
VSS90
N4
VSS91
N8
VSS92
N10
VSS93
N16
VSS94
N18
VSS95
P2
VSS96
P7
VSS97
P9
VSS98
P11
VSS99
P17
VSS100
R8
VSS101
R10
VSS102
R16
VSS103
R18
VSS104
T7
VSS105
T9
VSS106
T11
VSS107
T13
VSS108
T15
VSS109
T17
VSS110
U4
VSS111
U6
VSS112
U8
VSS113
U10
VSS114
U12
VSS115
U14
VSS116
U16
VSS117
U18
VSS118
V2
VSS119
V7
VSS120
V9
VSS121
V11
VSS122
V13
VSS123
V15
VSS124
V17
VSS125
W6
VSS126
Y21
VSS127
Y23
VSS128
N6
VSS129
SYS_SHDN#
D26
*CH500H
2 1
3920_RST#
D25
2 1
R165 10K/F_4
ECPWROK
CH501H-40PT
3
TEMP_FAIL 18
BOTTOM SIDE DECOUPLI NG
C262
22U/6.3V_8
22U/6.3V_8
C220
C184
C261
22U/6.3V_8
22U/6.3V_8
C237
22U/6.3V_8
C221
+1.8VSUS
C260
22U/6.3V_8
22U/6.3V_8
C193
22U/6.3V_8
C218
C241
0.22U/6.3V_4
C620
0.22U/6.3V_4
C240
22U/6.3V_8
C242
0.01U/16V_4
C180
0.01U/16V_4
C263
0.22U/6.3V_4
C255
180P/50V_4
C619
180P/50V_4
C191
0.22U/6.3V_4
C244
22U/6.3V_8
+VCORE1
+CPUVDDNB
C181
22U/6.3V_8
C215
22U/6.3V_8
22U/6.3V_8
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
+1.8VSUS
SYS_SHDN# 34,40
3920_RST# 32,40
+3V
*0.1U/10V_4
C669
4.7U/6.3V_6
C107
0.22U/6.3V_4
EC11
0.22U/6.3V_4
*0.1U/10V_4
C722
4.7U/6.3V_6
C700
EC9
C720
4.7U/6.3V_6
C670
0.01U/16V_4
+1.8VSUS +3VPCU
+1.8V
+3VPCU
+5V
+VGA_CORE +1.8V
+3V +1.8V+3VS5 +3VS5
EC6
*0.1U/10V_4
2
C721
0.01U/16V_4
EC3
*0.1U/10V_4
C667
4.7U/6.3V_6
EC7 0.01U/16V_4
EC4 0.01U/16V_4
EC2 0.01U/16V_4
EC10 0.01U/16V_4
EC1 *0.01U/16V_4
EC14 *0.01U/16V_4
EC13 *0.01U/16V_4
EC12 *0.01U/16V_4
0.22U/6.3V_4
C708
180P/50V_4
1%5'
C73
C194
0.22U/6.3V_4
+3VPCU+1.8V
+3V
+3V
+1.8VSUS +5V
+3V
For fix HyperTransport nets
across plane splits
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
S1G2 PWR & GND 3/3
Date: Sheet of
C185
0.01U/16V_4
C668
180P/50V_4
+VCORE0 +VCORE1
EC8 0.01U/16V_4
EC5 0.01U/16V_4
1
05
C719
180P/50V_4
C37 0.01U/16V_4
C39 0.01U/16V_4
C35 0.01U/16V_4
C31 0.01U/16V_4
542Friday, March 20, 2009
+3VPCU+5V
1A
5
+1.8VSUS +1.8VSUS
117
103
111
104
MEM_MA_ADD[0..15]4,7
D D
MEM_MA_BANK[0..2]4,7
MEM_MA_DQS0_P4
MEM_MA_DQS1_P4
MEM_MA_DQS2_P4
MEM_MA_DQS3_P4
MEM_MA_DQS4_P4
MEM_MA_DQS5_P4
MEM_MA_DQS6_P4
C C
B B
A A
MEM_MA_DQS7_P4
MEM_MA_DQS0_N4
MEM_MA_DQS1_N4
MEM_MA_DQS2_N4
MEM_MA_DQS3_N4
MEM_MA_DQS4_N4
MEM_MA_DQS5_N4
MEM_MA_DQS6_N4
MEM_MA_DQS7_N4
MEM_MA_CLK1_P4
MEM_MA_CLK1_N4
MEM_MA_CLK7_P4
MEM_MA_CLK7_N4
MEM_MA_CKE04,7
MEM_MA_CKE14,7
MEM_MA_RAS#4,7
MEM_MA_CAS#4,7
MEM_MA_WE#4,7
MEM_MA0_CS#04,7
MEM_MA0_CS#14,7
MEM_MA0_ODT04,7
MEM_MA0_ODT14,7
PDAT_SMB2,7,13,33
PCLK_SMB2,7,13,33
+3V
C324
0.1U/10V_4
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
DIM1_SA0
DIM1_SA1
PDAT_SMB
PCLK_SMB
C622
0.1U/10V_4
C323
1000P/50V_4
102
A0
101
A1
100
105
116
107
106
130
147
170
185
131
148
169
188
129
146
167
186
164
166
108
113
109
110
115
114
119
198
200
195
197
199
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
A10
90
A11
89
A12
A13
86
A14
84
A15
BA0
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
DM4
DM5
DM6
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
DQS4
DQS5
DQS6
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
DQS4
DQS5
DQS6
DQS7
30
CK0
32
CK0
CK1
CK1
79
CKE0
80
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
GND
GND
59
201
202
DDR SO-DIMM SOCKET 1.8V
H=5.2
R22 10K/F_4
R20 10K/F_4
112
VDD8
VDD7
VDD9
VDD10
SO-DIMM
(Normal)
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
127
122
121
SMbus address A0
5
118
VDD11
NC/TEST
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
132
128
DIM1_SA0
DIM1_SA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
CN17
4
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA36
123
MEM_MA_DATA37
125
MEM_MA_DATA35
135
MEM_MA_DATA39
137
MEM_MA_DATA38
124
MEM_MA_DATA32
126
MEM_MA_DATA33
134
MEM_MA_DATA34
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA46
151
MEM_MA_DATA47
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA42
152
MEM_MA_DATA43
154
MEM_MA_DATA52
157
MEM_MA_DATA49
159
MEM_MA_DATA54
173
MEM_MA_DATA55
175
MEM_MA_DATA53
158
MEM_MA_DATA48
160
MEM_MA_DATA51
174
MEM_MA_DATA50
176
MEM_MA_DATA61
179
MEM_MA_DATA60
181
MEM_MA_DATA63
189
MEM_MA_DATA62
191
MEM_MA_DATA56
180
MEM_MA_DATA57
182
MEM_MA_DATA58
192
MEM_MA_DATA59
194
MEMHOT_SODIMM#_1
50
MEM_MA_RESET#1
69
83
120
MEM_MA_NC5
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
4
3
MEM_MA_DATA[0..63] 4
R88 *0_4/S
T68
+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM
+0.9VSMVREF_DIMM
+0.9VSMVREF4,37
R131 *0_4
Only for reserved
MEM_MB_ADD[0..15]4,7 MEM_MB_DATA[0..63] 4
MEM_MB_BANK[0..2]4,7
MEM_MB_DM[0..7]4MEM_MA_DM[0..7]4
MEM_MB_DQS0_P4
MEM_MB_DQS1_P4
MEM_MB_DQS2_P4
MEM_MB_DQS3_P4
MEM_MB_DQS4_P4
MEM_MB_DQS5_P4
MEM_MB_DQS6_P4
MEM_MB_DQS7_P4
MEM_MB_DQS0_N4
MEM_MB_DQS1_N4
MEM_MB_DQS2_N4
MEM_MB_DQS3_N4
MEM_MB_DQS4_N4
MEM_MB_DQS5_N4
MEM_MB_DQS6_N4
MEM_MB_DQS7_N4
MEM_MB_CLK1_P4
MEM_MB_CLK1_N4
MEM_MB_CLK7_P4
MEM_MB_CLK7_N4
MEM_MB_CKE04,7
MEM_MB_CKE14,7
MEM_MB_RAS#4,7
MEM_MB_CAS#4,7
MEM_MB_WE#4,7
MEM_MB0_CS#04,7
MEM_MB0_CS#14,7
MEM_MB0_ODT04,7
MEMHOT_SODIMM# 7
+0.9VSMVREF_DIMM
MEM_MB0_ODT14,7
+3V
C321
0.1U/10V_4
+1.8VSUS
R130
2K/F_4
R119
2K/F_4
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
DIM2_SA0
DIM2_SA1
PDAT_SMB
PCLK_SMB
C26
0.1U/10V_4
C318
1000P/50V_4
102
A0
101
A1
99
98
97
94
92
93
91
90
89
86
84
85
10
26
52
67
13
31
51
70
11
29
49
68
30
32
79
80
1
2
o
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
o
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
GND
202
201
GND
DIM2_SA0
DIM2_SA1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
59
100
105
116
107
106
130
147
170
185
131
148
169
188
129
146
167
186
164
166
108
113
109
110
115
114
119
198
200
195
197
199
SMbus address A2
http://hobi-elektronika.net
3
2
117
118
103
111
104
112
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
SO-DIMM
(REVERSE)
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
R19 10K/F_4
R21 10K/F_4
2
CN18
MEM_MB_DATA4
5
DQ0
MEM_MB_DATA5
7
DQ1
MEM_MB_DATA2
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA0
4
DQ4
MEM_MB_DATA1
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA7
16
DQ7
MEM_MB_DATA13
23
DQ8
MEM_MB_DATA12
25
DQ9
MEM_MB_DATA11
35
DQ10
MEM_MB_DATA10
37
DQ11
MEM_MB_DATA8
20
DQ12
MEM_MB_DATA9
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA15
38
DQ15
MEM_MB_DATA16
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA18
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA20
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA22
56
DQ22
MEM_MB_DATA23
58
DQ23
MEM_MB_DATA24
61
DQ24
MEM_MB_DATA25
63
DQ25
MEM_MB_DATA26
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA29
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA31
76
DQ31
MEM_MB_DATA37
123
DQ32
MEM_MB_DATA36
125
DQ33
MEM_MB_DATA34
135
DQ34
MEM_MB_DATA35
137
DQ35
MEM_MB_DATA33
124
DQ36
MEM_MB_DATA32
126
DQ37
MEM_MB_DATA38
134
DQ38
MEM_MB_DATA39
136
DQ39
MEM_MB_DATA40
141
DQ40
MEM_MB_DATA45
143
DQ41
MEM_MB_DATA47
151
DQ42
MEM_MB_DATA46
153
DQ43
MEM_MB_DATA44
140
DQ44
MEM_MB_DATA41
142
DQ45
MEM_MB_DATA43
152
DQ46
MEM_MB_DATA42
154
DQ47
MEM_MB_DATA52
157
DQ48
MEM_MB_DATA53
159
DQ49
MEM_MB_DATA50
173
DQ50
MEM_MB_DATA51
175
DQ51
MEM_MB_DATA48
158
DQ52
MEM_MB_DATA49
160
DQ53
MEM_MB_DATA54
174
DQ54
MEM_MB_DATA55
176
DQ55
MEM_MB_DATA56
179
DQ56
MEM_MB_DATA60
181
DQ57
MEM_MB_DATA58
189
DQ58
MEM_MB_DATA59
191
DQ59
MEM_MB_DATA61
180
DQ60
MEM_MB_DATA57
182
DQ61
MEM_MB_DATA62
192
DQ62
MEM_MB_DATA63
194
DQ63
MEMHOT_SODIMM#_2
50
NC1
MEM_MB_RESET#2
69
NC2
83
NC3
120
NC4
MEM_MB_NC5
163
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
DDR SO-DIMM SOCKET 1.8V
H=9.2
+3V
1%5'
1
06
R82 *0_4/S
T69
T62T63
Size Document Number Rev
Custom
Date: Sheet
MEMHOT_SODIMM#
352-(&723
4XDQWD&RPSXWHU,QF
DDR2 SODIMMS: A/B CHANNEL
1
of
642Friday, March 20, 2009
1A
5
4
3
2
1
4
2
4
2
2
4
2
4
4
2
4
2
4
2
4
2
4
2
4
2
4
2
2
4
4
2
4
2
MEM_MA_ADD[0..15]
MEM_MA_BANK[0..2]
+0.9VSMVTT
3
1
3
1
1
3
1
3
3
1
3
1
3
1
3
1
3
1
3
1
3
1
1
3
3
1
3
1
C132 0.1U/10V_4
C192 0.1U/10V_4
C178 0.1U/10V_4
C70 0.1U/10V_4
C169 0.1U/10V_4
C66 0.1U/10V_4
C93 0.1U/10V_4
C213 0.1U/10V_4
C98 0.1U/10V_4
C68 0.1U/10V_4
C158 0.1U/10V_4
C69 0.1U/10V_4
C74 0.1U/10V_4
C212 0.1U/10V_4
C87 0.1U/10V_4
C214 0.1U/10V_4
+1.8VSUS
C79
0.1U/10V_4
C177
0.1U/10V_4
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C150
0.1U/10V_4
MEM_MB_CKE04,6
MEM_MB_WE#4,6
MEM_MB_CAS#4,6
MEM_MB0_ODT14,6
MEM_MB0_CS#14,6
MEM_MB_CKE14,6
MEM_MB0_CS#04,6MEM_MA0_CS#04,6
MEM_MB_RAS#4,6
MEM_MB0_ODT04,6
C714
0.1U/10V_4
C137
0.1U/10V_4
MEM_MB_ADD[0..15]4,6
MEM_MB_BANK[0..2]4,6
MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
MEM_MB_ADD15
MEM_MB_ADD7
MEM_MB_ADD14
MEM_MB_ADD6
MEM_MB_ADD11
MEM_MB_ADD2
MEM_MB_ADD4
MEM_MB_BANK1
MEM_MB_ADD0
MEM_MB0_CS#0
MEM_MB_RAS#MEM_MA_RAS#
MEM_MB0_ODT0
MEM_MB_ADD13
C75
0.1U/10V_4
MEM_MA_ADD[0..15]4,6
MEM_MA_BANK[0..2]4,6
MEM_MA_CKE04,6
D D
MEM_MA_WE#4,6
MEM_MA_CAS#4,6
MEM_MA0_ODT14,6
MEM_MA0_CS#14,6
MEM_MA_CKE14,6
C C
MEM_MA_RAS#4,6
MEM_MA0_ODT04,6
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_ADD10
MEM_MA_BANK0
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_CKE1
MEM_MA_ADD7
MEM_MA_ADD14
MEM_MA_ADD6
MEM_MA_ADD11
MEM_MA_ADD2
MEM_MA_ADD4
MEM_MA_BANK1
MEM_MA_ADD0
MEM_MA0_CS#0
MEM_MA_ADD13
MEM_MA0_ODT0
RP36 47_4P2R_4
RP32 47_4P2R_4
RP26 47_4P2R_4
RP24 47_4P2R_4
RP19 47_4P2R_4
RP16 47_4P2R_4
RP10 47_4P2R_4
RP35 47_4P2R_4
RP30 47_4P2R_4
RP27 47_4P2R_4
RP22 47_4P2R_4
RP20 47_4P2R_4
RP14 47_4P2R_4
RP12 47_4P2R_4
MEM_MB_ADD[0..15]
MEM_MB_BANK[0..2]
RP33 47_4P2R_4
4
3
2
RP29 47_4P2R_4
RP25 47_4P2R_4
RP23 47_4P2R_4
RP17 47_4P2R_4
RP15 47_4P2R_4
RP9 47_4P2R_4
RP34 47_4P2R_4
RP31 47_4P2R_4
RP28 47_4P2R_4
RP21 47_4P2R_4
RP18 47_4P2R_4
RP13 47_4P2R_4
RP11 47_4P2R_4
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
+0.9VSMVTT
C106 0.1U/10V_4
C197 0.1U/10V_4
C159 0.1U/10V_4
C67 0.1U/10V_4
C85 0.1U/10V_4
C63 0.1U/10V_4
C148 0.1U/10V_4
C62 0.1U/10V_4
C101 0.1U/10V_4
C206 0.1U/10V_4
C129 0.1U/10V_4
C207 0.1U/10V_4
C81 0.1U/10V_4
C205 0.1U/10V_4
C135 0.1U/10V_4
C71 0.1U/10V_4
07
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
PLACE CLOSE TO SOCKET( PER EMI/EMC)
B B
+3V
R363
*10K/F_4
Close DDR2 socket
+VS
O.S
GND
+3V
C27 0.1U/10V_4
8
MEMHOT_SODIMM#
3
4
Address:92h
2
Q36
*2N7002E-G
MEMHOT_SODIMM# 6
R361 *33_4
3
1
U2
7
A0
+3V
+3V
PDAT_SMB
PCLK_SMB
PDAT_SMB2,6,13,33
PCLK_SMB2,6,13,33
A A
6
A1
5
A2
1
SDA
2
SCL
*DS75U+T&R
R360 10K/F_4
MEMHOT_SODIMM#
2
Q35
*2N7002E-G
+3VS5
3
1
R362
*10K/F_4
CPU_MEMHOT# 3,13
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
5
4
http://hobi-elektronika.net
3
2
1%5'
DDR2 SODIMMS TERMINATIONS
Date: Sheet
1
742Friday, March 20, 2009
1A
of
5
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
D D
C C
SPM_BA0
SPM_BA1
SPM_A12
SPM_A10
SPM_A9
SPM_A8
SPM_A7
SPM_A6
SPM_A5
SPM_A4
SPM_A3
SPM_A2 SPM_DQ7
SPM_A1
SPM_A0
SPM_CLKN
R41
R34
SPM_CLKP
SPM_CKE
SPM_CS#
SPM_WE#
SPM_RAS#
SPM_CAS#
SPM_DM0
SPM_DM1
SPM_ODT
SPM_DQS0P
SPM_DQS0N
SPM_DQS1P
SPM_DQS1N
SPM_VREF
SPM_BA2
SPM_A13
B B
*0.1U/10V_4
A A
*0.1U/10V_4
R24 *100_4
Within 200mils
+1.8V_MEM_VDDQ
C65
C57
*1K/F_4
*1K/F_4
SI add A13 for side port function
5
U19
L2
L3
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K8
J8
K2
L8
K3
K7
L7
F3
B3
K9
F7
E8
B7
A8
J2
A2
E2
L1
R3
R7
R8
*HYB18T512161B2F-25
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1
HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1
R430 1.21K/F_4
BA0
BA1
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
CK
CKE
CS
WE
RAS
CAS
LDM
UDM
ODT
LDQS
LDQS
UDQS
UDQS
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
HT_RXCALP
HT_RXCALN
SPM_DQ15
SPM_DQ14
SPM_DQ9
SPM_DQ12
SPM_DQ8SPM_A11
SPM_DQ10
SPM_DQ13
SPM_DQ11
SPM_DQ5
SPM_DQ3
SPM_DQ4
SPM_DQ1
SPM_DQ0
SPM_DQ2
SPM_DQ6
MEM_VDDQ_VDDL
4
U25A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS880
+1.8V_MEM_VDDQ
L61
*BLM18PG181SN1D(180,1.5A)_6
C675
*1U/10V_4
4
3
HT_NB_CPU_CAD_H0
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
D24
HT_NB_CPU_CAD_L0
D25
HT_NB_CPU_CAD_H1
E24
HT_NB_CPU_CAD_L1
E25
HT_NB_CPU_CAD_H2
F24
HT_NB_CPU_CAD_L2
F25
HT_NB_CPU_CAD_H3
F23
HT_NB_CPU_CAD_L3
F22
HT_NB_CPU_CAD_H4
H23
HT_NB_CPU_CAD_L4
H22
HT_NB_CPU_CAD_H5
J25
HT_NB_CPU_CAD_L5
J24
HT_NB_CPU_CAD_H6
K24
HT_NB_CPU_CAD_L6
K25
HT_NB_CPU_CAD_H7
K23
HT_NB_CPU_CAD_L7
K22
HT_NB_CPU_CAD_H8
F21
HT_NB_CPU_CAD_L8
G21
HT_NB_CPU_CAD_H9
G20
HT_NB_CPU_CAD_L9
H21
HT_NB_CPU_CAD_H10
J20
HT_NB_CPU_CAD_L10
J21
HT_NB_CPU_CAD_H11
J18
HT_NB_CPU_CAD_L11
K17
HT_NB_CPU_CAD_H12
L19
HT_NB_CPU_CAD_L12
J19
HT_NB_CPU_CAD_H13
M19
HT_NB_CPU_CAD_L13
L18
HT_NB_CPU_CAD_H14
M21
HT_NB_CPU_CAD_L14
P21
HT_NB_CPU_CAD_H15
P18
HT_NB_CPU_CAD_L15
M18
HT_NB_CPU_CLK_H0
H24
HT_NB_CPU_CLK_L0
H25
HT_NB_CPU_CLK_H1
L21
HT_NB_CPU_CLK_L1
L20
HT_NB_CPU_CTL_H0
M24
HT_NB_CPU_CTL_L0
M25
HT_NB_CPU_CTL_H1
P19
HT_NB_CPU_CTL_L1
R18
HT_TXCALP
B24
HT_TXCALN
B25
R434 1.21K/F_4
This block is for UMA RS880 only , RX880 can
remove all component
U25D
R400 *40.2/F_4
R397 *40.2/F_4
+1.8V_MEM_VDDQ
SPM_A0
SPM_A1 SPM_DQ1
SPM_A2
SPM_A3
SPM_A4
SPM_A5
SPM_A6
SPM_A7
SPM_A8
SPM_A9
SPM_A10
SPM_A11
SPM_A12
SPM_A13
SPM_BA0
SPM_BA1
SPM_BA2
SPM_RAS#
SPM_CAS#
SPM_WE#
SPM_CS#
SPM_CKE
SPM_ODT
SPM_CLKP
SPM_CLKN
http://hobi-elektronika.net
SPM_COMPP
SPM_COMPN
3
AB12
AE16
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
V11
Y14
Y12
V14
V15
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
RS880
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]
signals
HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
2
HT_CPU_NB_CAD_H[15..0] 3
HT_CPU_NB_CAD_L[15..0] 3
HT_CPU_NB_CLK_H[1..0] 3
HT_CPU_NB_CTL_H[1..0] 3
HT_NB_CPU_CAD_H[15..0] 3
HT_NB_CPU_CAD_L[15..0] 3
HT_NB_CPU_CLK_H[1..0] 3
HT_NB_CPU_CTL_H[1..0] 3
RS880 RX880
R430
301 ohm 1%
R434
301 ohm 1%
SPM_DQ0
AA18
AA20
SPM_DQ2
AA19
SPM_DQ3
Y19
SPM_DQ4
V17
SPM_DQ5
AA17
SPM_DQ6
AA15
SPM_DQ7
Y15
SPM_DQ8
AC20
SPM_DQ9
AD19
SPM_DQ10
AE22
SPM_DQ11
AC18
SPM_DQ12
AB20
SPM_DQ13
AD22
SPM_DQ14
AC22
SPM_DQ15
AD21
SPM_DQS0P
Y17
SPM_DQS0N
W18
SPM_DQS1P
AD20
SPM_DQS1N
AE21
SPM_DM0
W17
SPM_DM1
AE19
AE23
AE24
AD23
SPM_VREF1
AE18
R394 *1K/F_4
C695 *0.1U/10V_4
2
HT_CPU_NB_CLK_L[1..0] 3
HT_CPU_NB_CTL_L[1..0] 3
HT_NB_CPU_CLK_L[1..0] 3
HT_NB_CPU_CTL_L[1..0] 3
R430
1.21k ohm 1%
R434
1.21k ohm 1%
40mils wdith or more
C38
*1U/10V_4
C47
*0.1U/10V_4
C680
*2.2U/6.3V_6
R393 *1K/F_4
C694 *0.1U/10V_4
Size Document Number Rev
1%5'
Custom
Date: Sheet
1
RES CHIP 1.21K 1/16W +-1%(0402)
P/N : CS21212FB18
RES CHIP 301 1/16W +-1%(0402)
P/N : CS13012FB14
+1.8V_MEM_VDDQ
R385 *0_6
C646
*10U/6.3V_8
C44
*0.1U/10V_4
IOPLLVDD18 - memory PLL
not applicable to RX780
C43
*10U/6.3V_8
C42
*1U/10V_4
SI stage add L71 , L72
L71*BLM18PG181SN1D(180,1.5A)_6
+1.8V
L72*BLM18PG181SN1D(180,1.5A)_6
C681
*2.2U/6.3V_6
+1.1V
IOPLLVDD- memory PLL
not applicable to RX780
+1.8V_MEM_VDDQ
352-(&723
4XDQWD&RPSXWHU,QF
RS740/RS780-HT LINK I /F 1/5
1
08
of
842Friday, March 20, 2009
+1.8V
1A
5
AE3
AD4
AE2
AD3
AD1
AD2
AA8
AA7
AA5
AA6
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
V5
W6
U5
U6
U8
U7
Y8
Y7
W5
Y5
J6
J5
J7
J8
U25B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
PEG_RX15
PEG_RX#15
PEG_RX14
PEG_RX#14
PEG_RX13
PEG_RX#13
PEG_RX12
PEG_RX#12
PEG_RX11
PEG_RX#11
PEG_RX10
D D
PCIE_RXP2_LAN30
PCIE_RXN2_LAN30
C C
PCIE_SB_NB_RX0P12
PCIE_SB_NB_RX0N12
PCIE_SB_NB_RX1P12
PCIE_SB_NB_RX1N12
PCIE_SB_NB_RX2P12
PCIE_SB_NB_RX2N12
PCIE_SB_NB_RX3P12
PCIE_SB_NB_RX3N12
PEG_RX#10
PEG_RX9
PEG_RX#9
PEG_RX8
PEG_RX#8
PEG_RX7
PEG_RX#7
PEG_RX6
PEG_RX#6
PEG_RX5
PEG_RX#5
PEG_RX4
PEG_RX#4
PEG_RX3
PEG_RX#3
PEG_RX2
PEG_RX#2
PEG_RX1
PEG_RX#1
PEG_RX0
PEG_RX#0
PCIE_RXP133
PCIE_RXN133
PCIE_RXP1
PCIE_RXN1
PCIE_RXP2_LAN
PCIE_RXN2_LAN PCIE_TXN2_C
4
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX11
C_PEG_TX#11
C_PEG_TX10
C_PEG_TX#10
C_PEG_TX9
C_PEG_TX#9
C_PEG_TX8
C_PEG_TX#8
C_PEG_TX7
C_PEG_TX#7
C_PEG_TX6
C_PEG_TX#6
C_PEG_TX5
C_PEG_TX#5
C_PEG_TX4
C_PEG_TX#4
C_PEG_TX#3
C_PEG_TX2
C_PEG_TX#2
C_PEG_TX1
C_PEG_TX0
C_PEG_TX#0
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
NB_PCIECALRP
NB_PCIECALRN
C332 0.1U/10V_4
C333 0.1U/10V_4
C339 0.1U/10V_4
C338 0.1U/10V_4
C336 0.1U/10V_4
C337 0.1U/10V_4
C335 0.1U/10V_4
C334 0.1U/10V_4
C735 0.1U/10V_4
C734 0.1U/10V_4
C729 0.1U/10V_4
C730 0.1U/10V_4
C727 0.1U/10V_4
C724 0.1U/10V_4
C726 0.1U/10V_4
C725 0.1U/10V_4
C723 0.1U/10V_4
C718 0.1U/10V_4
C716 0.1U/10V_4
C717 0.1U/10V_4
C710 0.1U/10V_4
C712 0.1U/10V_4
C713 0.1U/10V_4
C715 0.1U/10V_4
C707 0.1U/10V_4
C709 0.1U/10V_4
C706 0.1U/10V_4
C705 0.1U/10V_4
C703 0.1U/10V_4
C704 0.1U/10V_4
C699 0.1U/10V_4
C701 0.1U/10V_4
C88 0.1U/10V_4
C89 0.1U/10V_4
C679 0.1U/10V_4
C696 0.1U/10V_4
C686 0.1U/10V_4
C687 0.1U/10V_4
C685 0.1U/10V_4
C684 0.1U/10V_4
C90 0.1U/10V_4
C91 0.1U/10V_4
C688 0.1U/10V_4
C689 0.1U/10V_4
R390 1.27K/F_4
R389 2K/F_4
PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
PEG_TX13
PEG_TX#13
PEG_TX12
PEG_TX#12
PEG_TX11
PEG_TX#11
PEG_TX10
PEG_TX#10
PEG_TX9
PEG_TX#9
PEG_TX8
PEG_TX#8
PEG_TX7
PEG_TX#7
PEG_TX6
PEG_TX#6
PEG_TX5
PEG_TX#5
PEG_TX4
PEG_TX#4
PEG_TX3C_PEG_TX3
PEG_TX#3
PEG_TX2
PEG_TX#2
PEG_TX1
PEG_TX#1C_PEG_TX#1
PEG_TX0
PEG_TX#0
PCIE_TXP1 33
PCIE_TXN1 33
PCIE_TXP2_LAN 30
PCIE_TXN2_LAN 30
PCIE_NB_SB_TX0P 12
PCIE_NB_SB_TX0N 12
PCIE_NB_SB_TX1P 12
PCIE_NB_SB_TX1N 12
PCIE_NB_SB_TX2P 12
PCIE_NB_SB_TX2N 12
PCIE_NB_SB_TX3P 12
PCIE_NB_SB_TX3N 12
3
+1.1V
PEG_RX#[15:0]17
PEG_RX[15:0]17
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
To HDMI CONN
TO WLAN
TO PCIE-LAN
2
PEG_RX#[15:0] PEG_TX#[15:0]
PEG_TX[15:0]PEG_RX[15:0]
Close to North Bridge
C_PEG_TX15 25
C_PEG_TX#15 25
C_PEG_TX14 25
C_PEG_TX#14 25
C_PEG_TX13 25
C_PEG_TX#13 25
C_PEG_TX12 25
C_PEG_TX#12 25
PEG_TX#[15:0] 17
PEG_TX[15:0] 17
1
9
RS880
RS880 Display Port Support (muxed on GFX)
DP0
B B
A A
DP1
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
5
4
http://hobi-elektronika.net
3
2
1%5'
RS740/RS780-PCIE I/F 2/5
Date: Sheet
1
942Friday, March 20, 2009
1A
of
5
D D
+1.1V
R108
RS780
4.7K_4
C C
RS780
R94
4.7K_4
4
+3V_AVDD_NB
+1.8V_AVDDDI_NB
R91 for UMA use 140 ohm
for DIS use 150 ohm
140ohm CS11402FB19
150ohm CS11502FB21
CRT_R18,24
CRT_G18,24
CRT_B18,24
HSYNC_COM18,19,24
VSYNC_COM18,19,24
DDCDATA18,24
DDCCLK18,24
R58 *0_4
R91 *140/F_4
R49 *0_4
R92 *150/F_4
R46 *0_4
R93 *150/F_4
R120 *0_4
R106 *0_4
R104 *0_4
R105 *0_4
R102 *715/F_6
Only for UMA
NB_PLTRST#12
NB_PWRGD_IN16
NBHT_REFCLKP2
NBHT_REFCLKN2
EXT_NB_OSC2
NBGFX_CLKP2
NBGFX_CLKN2
T8
T4
SBLINK_CLKP2
SBLINK_CLKN2
EDIDDATA18,23
EDIDCLK18,23
HDMI_DDC_DATA25
HDMI_DDC_CLK25
T78
T77
DYN_PWR_EN35
T81
R14 *0_4/S
+1.8V_AVDDQ_NB
CRT_R_1
CRT_G_1
CRT_B_1
HSYNC_INTHSYNC_INT
VSYNC_INTVSYNC_INT
DDCDATA_INTDDCDATA_INT
DDCCLK_INTDDCCLK_INT
DAC_RSET_NBDAC_RSET_NB
+1.1V_PLLVDD
+1.8V_PLLVDD18
+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL
NB_RST#_IN
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
NBHT_REFCLKP
NBHT_REFCLKN
NB_REFCLK_N DISP_ON
NBGFX_CLKP
NBGFX_CLKN
NBGPP_CLKP
NBGPP_CLKN
SBLINK_CLKP
SBLINK_CLKN
NB_I2C_DATA
NB_I2C_CLK
RS740_DFT_GPIO1
STRP_DATA
RS780_AUX_CAL
3
U25C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PW M_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN)
G14
DAC_RSET(PW M_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
A9
I2C_DATA
B9
I2C_CLK
B8
DDC_DATA/AUX0N(NC)
A8
DDC_CLK/AUX0P(NC)
B7
AUX1P(NC)
A7
AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS880
2
LA_DATAP0
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
HPD(NC)
TESTMODE
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9
D10
D12
AE8
AD8
D13
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
LA_DATAP3
LA_DATAN3
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAP2
LB_DATAN2
LB_DATAP3
LB_DATAN3
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
+1.8V_VDDLTP18_NB
+1.8V_VDDLT_18_NB
TMDS_HPD0
TMDS_HPD1
SUS_STAT#_NB
TEST_EN
RS880 only
R124 *0_4
R103 *0_4
R101 *0_4
SI Remove for AMD request
R117 *0_4/S
R441
1.8K_4
PART 3 OF 6
TXOUT_U1P(PCIE_RESET _GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET _GPIO5)
CRT/TVOUT
LVTM
I
I/O
I/O
PM
I
CLOCKs PLL PWR
MIS.
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1 )
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET _GPIO1)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
TVCLKIN(PW M_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
LA_DATAP0 23
LA_DATAN0 23
LA_DATAP1 23
LA_DATAN1 23
LA_DATAP2 23
LA_DATAN2 23
T75
T79
LB_DATAP0 23
LB_DATAN0 23
LB_DATAP1 23
LB_DATAN1 23
LB_DATAP2 23
LB_DATAN2 23
T80
T76
LA_CLK 23
LA_CLK# 23
LB_CLK 23
LB_CLK# 23
Change from AMD request
DPST_PWM
LVDS_BLON
R438
*0_4/S
T74
TMDS_HPD 18,25
SUS_STAT# 13
1
DISP_ON 19,23
DPST_PWM 19,23
LVDS_BLON 18,23
10
RX780 -->NC / RS780 --- ADD
L28
+3V
*BLM18PG181SN1D(180,1.5A)_6
AVDD-DAC Analog
not applicable to RX780
Enables Debug Bus acess
B B
through memory T/O pads and GPIO.
0 : Enable RS780 , Default
1 : Disable RS780
(RS780 use VSYNC#)
Indicates if memory Side port
is available or not
0: available RS780 , Default
1: Not available RS780
( RS780 use HSYNC#)
VSYNC_INT
HSYNC_INT
For extrnal EEPROM Debug only
STRP_DATA
R447 2K/F_4
RS780
R107 3K_4
RS780
R122 3K_4
R121 *3K_4
RS780/RX780
+3V
+3V
MV change:
A A
5
+1.8V
L26
*BLM18PG181SN1D(180,1.5A)_6
C316
10U/6.3V_8
PLLVDD18 - Graphics PLL
not applicable to RX780
+1.8V
VDDA18PCIEPLL -PCIE PLL
L25
BLM18PG181SN1D(180,1.5A)_6
VDDA18HTPLL -HT LINK PLL
L24
BLM18PG181SN1D(180,1.5A)_6
4
+3V_AVDD_NB
C278
0_6
+1.8V_PLLVDD18
C275
0_6
20mils width
+1.8V_VDDA18PCIEPLL
C282
2.2U/6.3V_6
20mils width
+1.8V_VDDA18HTPLL
C288
2.2U/6.3V_6
*BLM18PG181SN1D(180,1.5A)_6
+1.1V
L65
+1.8V
R84 *0_6
0_4
*BLM18PG181SN1D(180,1.5A)_6
L27
CPU_LDT_STOP#3,12
CPU_LDT_REQ#3
ALLOW_LDTSTOP12
http://hobi-elektronika.net
3
+1.8V_AVDDDI_NB
C271
+1.1V_PLLVDD
C762
0_6
+1.8V_AVDDQ_NB
C279
0_6
PLLVDD - Graphics PLL
not applicable to
RX780
AVDDI-DAC Digital
not applicable to RX780
AVDDQ-DAC Bandgap Reference
not applicable to RX780
R154 *0_4/S
R159 0_4
+1.8V
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
2
*BLM18PG181SN1D(180,1.5A)_6
L66
*BLM21PG221SN1D(220,100M,2A)_8
L68
C769
0_6
C761
0_6
C758
*0.1U/10V_4
1%5'
+1.8V_VDDLTP18_NB
+1.8V_VDDLT_18_NB
VDDLTP18 - LVDS or DVI/HDMI PLL
not applicable to RX780
VDDLT18 - LVDS or
DVI/HDMI digital
not applicable to
RX780
SI Remove for AMD request
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
RS740/RS780-SYSTEM I/F 3/5
Date: Sheet
1
10 42Friday, March 20, 2009
1A
of
5
4
3
2
1
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
AE1
VSSAPCIE36
VSSAPCIE37
U25F
D D
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
GROUND
AE4
AB2
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
AE14
VSS1
D11
VSS2
VSS3G8VSS4
L15
E14
E15
J12
K14
M11
J15
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
PIN NAME
VDDHT
VDDHTRX
VDDHTTX
VDDA18PCIE
PART 6/6
VDD18_MEM
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AB15
AB17
AB19
C238
0.1U/10V_4
C759
0.1U/10V_4
C151
0.1U/10V_4
C188
0.1U/10V_4
AE20
VSS33
AB21
VSS34
K11
U25E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2)
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS880
PART 5/6
VSSAHT20
J22
L17
L22
L24
A25
E22
D23
G22
G24
VDDHT - HT
C C
VDDHTTX - HT
LINK TX I/O for
RX780/RS780
B B
VDDA18PCIE PCIE TX stage
I/O for
RX780/RS780
A A
LINK digital
I/O for
RX780/RS780
VDDHTRX - HT
LINK RX I/O for
RX780/RS780
+1.2V
L13
+1.8V 1A for RS780M+SB700
+1.8V
BLM21PG221SN1D(220,100M,2A)_8
L25
H19
G25
*0_8/S
L17
VDD18 - RS780 I/O
transform
P20
N22
R19
R22
R24
R25
M20
+1.1V
H20
+1.1V 2A for RS880M
0.6A
L58
*0_8/S
0.45A
L64
*0_8/S
0.5A
+1.2V 2A for RS780M+SB700
C80
4.7U/6.3V_6
600mA
C141
4.7U/6.3V_6
+1.8V
VDD18_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform
+1.8V
U22
V19
Y21
W22
W24
W25
AD25
C152
0.1U/10V_4
C126
4.7U/6.3V_6
R110 *0_6/S
R395 *0_6/S
L12
N13
M14
C693
4.7U/6.3V_6
C770
4.7U/6.3V_6
C209
0.1U/10V_4
P12
P15
R11
R14
C139
0.1U/10V_4
T12
U14
U11
C224
0.1U/10V_4
C272
0.1U/10V_4
C166
0.1U/10V_4
0.005A
C267
1U/10V_4
0.005A
C692
1U/10V_4
U15
V12
W11
Y18
W15
AA14
AB11
AC12
+1.1V_VDDHT
C265
0.1U/10V_4
+1.1V_VDDHTRX
C763
0.1U/10V_4
+1.2V_VDDHTTX
C195
0.1U/10V_4
+1.8V_VDDA18PCIE
C257
0.1U/10V_4
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
VDDPCIE
VDDC
VDD_MEM
VDDG33
IOPLLVDD18
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
POWER
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDDG33_1(NC)
VDDG33_2(NC)
RX780/RS780 POWER DIFFERENCE TABLE
RX780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8VVDDG18
NC
+1.1V +1.1V +1.8V
+1.1V
NC
+1.8V/1.5V
NC
+1.1V_VDD_PCIE
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
C226
0.1U/10V_4
C203
0.1U/10V_4
C239
0.1U/10V_4
+1.8V_VDD_MEM
C149
0.1U/10V_4
+3V_VDDG33
C276
0.1U/10V_4
RS780
+1.1V
+1.1V
+1.2V
+1.8V
+1.8V
+1.8V
+1.1V
+3.3V
+1.8VNC
C277
0.1U/10V_4
C250
0.1U/10V_4
C128
0.1U/10V_4
C274
0.1U/10V_4
PIN NAME
IOPLLVDD
AVDDDI
AVDDQ
PLLVDD
PLLVDD18
VDDA18PCIEPLL
VDDA18HTPLL
VDDLTP18
VDDLT18
VDDLT33
C268
1U/10V_4
C252
0.1U/10V_4
C232
0.1U/10V_4
C127
1U/10V_4
R111 *0_6/S
RX780 RS780
NC
+1.1V
+3.3VAVDD
NC
NC +1.8V
NC +1.8V
+1.1V
NC
NC
+1.8V
+1.8V
+1.8V
+1.8V
NC
+1.8V
NC
+1.8V
NC
NC
0.7A
C273
1U/10V_4
C258
0.1U/10V_4
C202
0.1U/10V_4
1.8V(0.15A)
C168
1U/10V_4
RS780
3.3V(0.03A)
VDD33 - 3.3V I/O
Not applicable to RX780
VDDPCIE - PCIE-E Main power
R99 *0_8/S
C281
4.7U/6.3V_6
VDDC - Core Logic power
7A
C29
10U/6.3V_8
C30
10U/6.3V_8
BLM21PG221SN1D(220,100M,2A)_8
L18
C138
10U/6.3V_8
+3V
+1.1V
+1.1V_DYN
VDD_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform
+1.8V
11
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
5
4
http://hobi-elektronika.net
3
2
1%5'
RS740/RS780-POWER5/5
Date: Sheet
1
11 42Friday, March 20, 2009
1A
of
5
4
3
2
1
D29
RB500V-40
D28
RB500V-40
20MIL
R508
1K/F_4
20MIL
BT1
BAT_CONN
for EMI
suggestion
12
+3VPCU
+VCCRTC_2+BAT
1 2
12
NB_PLTRST#10
PCIE_RST#17
LAN_PLTRST#30
MINI_PLTRST#33
PCIE_SB_NB_RX0P9
D D
PLACE THESE
PCIE AC
COUPLING CAPS
CLOSE TO U600
+1.2V
PCIE_SB_NB_RX0N9
PCIE_SB_NB_RX1P9
PCIE_SB_NB_RX1N9
PCIE_SB_NB_RX2P9
PCIE_SB_NB_RX2N9
PCIE_SB_NB_RX3P9
PCIE_SB_NB_RX3N9
PCIE_NB_SB_TX0P9
To RS780
PCIE_NB_SB_TX0N9
PCIE_NB_SB_TX1P9
PCIE_NB_SB_TX1N9
PCIE_NB_SB_TX2P9
PCIE_NB_SB_TX2N9
PCIE_NB_SB_TX3P9
PCIE_NB_SB_TX3N9
+1.2V_PCIE_VDDR
L37 BLM18PG181SN1D(180,1.5A)_6
PCIE_PVDD-- PCIE PLL POWER
C C
SBSRC_CLKP2
Y5
R305
*20M_6
B B
A A
4
32.768KHZ
R321 20M_6
C569
18P/50V_4
EXT_SB_OSC2
RTC_X1
23
RTC_X2
1
C579
18P/50V_4
SBSRC_CLKN2
+3VS5
ALLOW_LDTSTOP10
CPU_PROCHOT#3
CPU_PWRGD3
CPU_LDT_STOP#3,10
CPU_LDT_RST#3,10
R223 33_4
R224 33_4
R225 33_4
R505 33_4
C807 0.1U/10V_4
C806 0.1U/10V_4
C800 0.1U/10V_4
C799 0.1U/10V_4
C809 0.1U/10V_4
C808 0.1U/10V_4
C802 0.1U/10V_4
C801 0.1U/10V_4
R476 562/F_4
R477 2.05K/F_4
C439
10U/6.3V_8
PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N
+1.2V_PCIE_PVDD
Change for SB710 chip
FOR A14 chip
R201 10K/F_4
ALLOW_LDTSTOP
CPU_PROCHOT#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#
A_RST#_SB
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
PCIE_CALRP_SB
PCIE_CALRN_SB
40mA
C467
1U/10V_4
SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP
SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN
T125
T35
RTC_X1
RTC_X2
U31A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB710
IC CTRL(528P) SB710 A14(218-0660017)
P/N : AJ066000T01
100MHZ
RTC XTAL
SB710
Part 1 of 5
PCI EXPRESS INTERFACE
CPU
CLOCK GENERATOR
LPC
RTC
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCIRST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
PCI INTERFACE
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
P4
P3
PCI_CLK_TPM
P1
PCI_CLK3
P2
PCI_CLK4
T4
PCI_CLK5
T3
PCIRST#_L
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
C2
B2
R486 33_4
AD23
AD24
AD25
AD26
AD27
AD28
All the PCI bus has
build-in Pull-UP/Down
resistors
SERR#
R285 *0_4/S
PE_GPIO1
CLKRUN#_R
INTE#
INTF#
INTG#
INTH#
LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#_SB
LDRQ1#_SB
SB_GPIO65
SERIRQ
RTC_CLK
INTRUDER_ALERT#
+AVBAT
PE_GPIO1
R313 8.2K_4
R328 *8.2K_4
SB_GPIO65
SERR# 32
T45
R482 *0_4/S
R480 *0_4/S
T42
T114
T55
T112
T59
R236 22_4
R202 10_4
T28
T39
T51
LAD0 32,33
LAD1 32,33
LAD2 32,33
LAD3 32,33
LFRAME# 32,33
SERIRQ 32
RTC_CLK 16
20MIL
T53
T111
PCIRST#
R284 *100K/F_4
R297 10K/F_4
AD23 16
AD24 16
AD25 16
AD26 16
AD27 16
AD28 16
+AVBAT
20MIL
C834
1U/10V_4
RF_OFF# 33
LCD_BK 23
CLKRUN# 32
R493 *1M/F_4
12
G3
*SHORT_ PAD1
PCI_CLK_TPM 16
PCI_CLK3 16
PCI_CLK4 16
PCI_CLK5 16
PCIRST# 32
+3V
+3V
R510 499/F_4
LPC_CLK0 16
LPC_CLK1 16
PCLK_LPC_KB3920 32
C420
5.6P/50V_6
+AVBAT
C826
0.1U/10V_4
+3VRTC_1
R512 10_4
+3VRTC
20MIL20MIL
Change from
0ohm to 1K
for safty
issue
PCLK_LPC_DEBUG 33
C464
22P/50V_4
+AVBAT
INTRUDER_ALERT# Left not connected (Southbridge
has 50-kohm internal pull-up to VBAT).
352-(&723
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
5
4
http://hobi-elektronika.net
3
2
1%5'
SB700-PCIE/PCI/CPU/LPC 1/4
Date: Sheet
1
12 42Friday, March 20, 2009
1A
of
Loading...