HP CQ40-AMD Schematics

A

B

C

D

E

1 1

2 2

Compal confidential

Schematics Document

Mobile AMD S1G2 CPU with ATI RX781(NB) & SB700(SB) core logic

3 3

2008-05-14

REV:1.0

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

154Friday, February 13, 2009

E

of

F

A

Compal Confidential

B

C

D

E

1 1

Accelerometer LIS3LV02DL-TR

VRAM 256MB

page 19, 20

DDR2 400MHz

Page 37

Discrete

OPP Rachman AMD 14" Discrete - LA-4112P

Thermal Sensor ADM1032ARMZ

Page 6

Fan conn

Page 4

PCI-E Lane*16

AMD S1G2 CPU

638-PIN uFCPGA 638

Page 4, 5, 6, 7

Hyper Transport Link

16X16

DDR2 800MHz 1.8V

Dual Channel

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

PC2-5300 (DDR2/667) PC2-6400 (DDR2/800)

Page 8, 9

72QFN

Clock Generator SLG8SP626VTR

Page 22

ATI M82-SCE

Page 15,16,17,18,21

ATI RS780, RX781

LVDS Panel Interface

2 2

CRT

HDMI

Page 24

Page 23

1600x1200 max resolution at 75Hz

Page 25

A-Link Express II 4X PCI-E

PCI-E BUS*5

CardReader-JM385 5 in 1

Page 34

CardReader CONN

3 3

5 in 1:SD/MMC/MS/MSPro/XS Support for RS-MMC, Memory Stick Duo and Memory Stick Duo Pro, Micro-M2, Mini-SD, and MicroSD

Page 34

Realtek 8102EL(10/100M)

Page 32

RJ45/11 CONN

Page 32

Mini-Card* 1

WLAN Card

802.11a/b/g/n

Page 34

LED

Page 41

Touch Pad CONN. Int.KBD

RS780MN/CE

Page 10, 11, 12, 13, 14

ATI SB700

Page 26,27,28,29,30

KBC

ENE KB926

Page 41

LPC BUS

Page 40

Azalia (HDA I/F) SATA Master-1 SATA Master-2 SATA Slave SATA Slave

Page 40

USB2.0 X12

USB conn x3

BT Conn

USB WebCam

Chicony CNF7047

MDC V1.5

Page 38

Page 24

Page 41

Audio CKT

Codec_IDT9271B7

SATA HDD Connector

SATA ODD Connector

Page 35 Page 36

Page 31

daughter board

AMP & Audio Jack

TPA6017A2

RTC CKT.

SPI ROM

C

SPI

25LF080A

Page 39

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

e-SATA Connector

D

Page 38

Vista 32&64 bit supporttive Energy star 4.0/EPEAT request compliant

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

254Friday, February 13, 2009

E

of

F

Page 26

4 4

Consumer IR

Page 36/42

Power On/Off CKT.

P41

DC/DC Interface CKT.

Page 43

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

Voltage Rails

1 1

State

2 2

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

3 3

4 4

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.) ACCELEROMETER 3A 0 0 1 1 1 0 1 0

EC SM Bus1 address

Device

Smart Battery

24C16

CPU SIC interface

A

O MEANS ON X MEANS OFF

power plane

HEX

A0

D2

+B +3VL +5VL

O O O O O

X

+5VALW

+3VALW

+1.2VALW

O O O O

X XX X

ADDRESS

1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0

+1.8V

+0.9V

EC SM Bus2 address

HEX HEX

Address Address

0001 011X b

16H

1010 000X b

A0H

1001 100X b

98H

Device

ADI1032-2 CPU ADI1032-1 VGA

B

9AH 98H

+5VS +3VS +2.5VS +1.8VS +1.5VS +1.1VS +VGA_CORE +1.2V_HT +CPU_CORE_0 +CPU_CORE_1 +CPU_CORE_NB

OO OO

O

X XX X

1001 101X b 1001 100X b

X

SMBUS Control Table

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 SCL SDA DDC4CLK DDC4DATA DDC3CLK DDC3DATA SCL0 SDA0 SCL1 SDA1 SCL2 SDA2 SCL3 SDA3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SOURCE

KB926

VGA M82-SE

SB700

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build DEBUG@ : means just reserve for debug.

THERMAL SENSOR

VGA M82-SE ADM1032

X

V

SERIAL SENSOR

BATT EEPROM

X

V

XX XXX X X X X XXX X X XXX X X XXX X X

XXXX XXXX XXXX

Compal Secret Data

2007/10/11 200810/11

C

Compal Secret Data

THERMAL

CPU & ADM1032

XX

V

Deciphered Date

SODIMM CLK CHIP

I / II

WL

MINI CARD

Slot 1

XX

XXXX

XXX

LCD

X

V

HDMI

X X X

V

XXX X

VV

XX

D

V

X X

Title

Size Document Number Rev

Custom

Date: Sheet

XX XXXX XXXX XX

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

CRT

X X X X

V

X X X X

G-Sensor

X X X X X

V

X X X

of

354Friday, February 13, 2009

F

A

B

C

D

E

1 1

+VLDT_B

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

H_CADOP[0..15] H_CADON[0..15]

1 2

C7 4.7U_0805_10V4ZC7 4.7U_0805_10V4Z

If VLDT is connected only on one side, one

4.7uF cap should be added to the island

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

side.

H_CADOP[0..15] <10> H_CADON[0..15] <10>H_CADIN[0..15]<10>

H_CLKOP0 <10> H_CLKON0 <10> H_CLKOP1 <10> H_CLKON1 <10>

H_CTLOP0 <10> H_CTLON0 <10>H_CTLIN0<10>

H_CTLON1 <10>

PWM Fan Control circuit

H_CADIP[0..15]<10>

2 2

H_CLKIP0<10> H_CLKIN0<10> H_CLKIP1<10>

3 3

H_CLKIN1<10> H_CTLIP0<10> H_CTLIP1<10> H_CTLOP1 <10>

H_CTLIN1<10>

H_CADIP[0..15] H_CADIN[0..15]

1.5A(+-60mV_dc, +-75mV_ac)

+1.2V_HT

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

JCPUA

HT LINK

D1 D2 D3 D4

E3 E2 E1 F1 G3 G2 G1 H1

J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5

J3

J2

J5 K5

N1 P1 P3 P4

HT LINK

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

FOX_PZ6382A-284S-41F_GRIFFIN

CONN@

Athlon 64 S1 Processor Socket

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1 L0_CTLOUT_H0

L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

+1.2V_HT

250 mil

1

C1

4.7U_0805_10V4Z

2

FAN_PWM<40>

1

C2

4.7U_0805_10V4Z

2

CH751H-40PT_SOD323-2

VLDT CAP.

1

C3

0.22U_0603_16V4Z

2

Near CPU Socket

+5VS

D1

2 1

6

2

1

D

Q1

G

3

S

SI3456BDV-T1-E3_TSOP6

4 5

1

C4

0.22U_0603_16V4Z

2

1

C8

4.7U_0805_10V4Z

2

+VCC_FAN

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

1

C9

@C9

@

0.1U_0402_16V4Z

2

12

D2

@D2

@

RLZ5.1B_LL34

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

JP2

1

2

3

GND

4

GND

ACES_88231-02001

CONN@

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

454Friday, February 13, 2009

E

of

F

A

B

C

D

E

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR

1 1

2 2

D10 C10

Place them close to CPU within 1"

MEMZP/N=W/S=5mil/10mil

DDR_CS0_DIMMA#<8> DDR_CS1_DIMMA#<8> DDR_CS0_DIMMB# <9>

DDR_CKE0_DIMMA<8> DDR_CKE1_DIMMA<8>

3 3

4 4

DDR_A_CLK#0<8> DDR_A_CLK#1<8>

DDR_A_MA[15..0]<8> DDR_B_MA[15..0] <9>

+1.8V

DDR_A_ODT0<8> DDR_A_ODT1<8>

DDR_A_CLK0<8> DDR_A_CLK1<8>

DDR_A_BS#0<8> DDR_A_BS#1<8> DDR_A_BS#2<8>

DDR_A_RAS#<8> DDR_A_CAS#<8> DDR_A_WE#<8>

R4 39.2_0402_1%

1 2 1 2

R3 39.2_0402_1%

T2 PADT2 PAD

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

A

B10

AD10

MEMZP

AF10

MEMZN VTT_SENSE

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

J22 J20

N19 N20 E16 F16 Y16

AA16

P19 P20

N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19

R20 R23

J21

R19 T22 T24

WITHIN 1.5 INCH

DDR_A_CLK0

DDR_A_CLK#0 DDR_A_CLK1

DDR_A_CLK#1

DDR_B_CLK0

DDR_B_CLK#0 DDR_B_CLK1

DDR_B_CLK#1

JCPUB

VTT1

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

FOX_PZ6382A-284S-41F_GRIFFIN

Athlon 64 S1 Processor Socket

CONN@

B

1

2

1

2

1

2

1

2

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C10

1.5P_0402_50V9C

C11

1.5P_0402_50V9C

C14

1.5P_0402_50V9C

C15

1.5P_0402_50V9C

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

+0.9V+0.9V

750mA(+-50mV_dc, +-75mV_ac)

+MCH_REF

DDR_B_ODT0 DDR_B_ODT1

DDR_CS1_DIMMB#

DDR_CKE0_DIMMB DDR_CKE1_DIMMB

DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1DDR_A_CLK#1

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

JCPUC

DDR_B_D[63..0]<9>

+1.8V

R1

1K_0402_1%

1 2

+MCH_REF

1

R2

C12

1K_0402_1%

C12

1 2

0.1U_0402_16V4Z

VTT_SENSE=W/S=10mil/10mil

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 <9> DDR_B_ODT1 <9>

DDR_CS1_DIMMB# <9>

DDR_CKE0_DIMMB <9> DDR_CKE1_DIMMB <9>

DDR_B_CLK0 <9> DDR_B_CLK#0 <9> DDR_B_CLK1 <9> DDR_B_CLK#1 <9>

DDR_B_BS#0 <9> DDR_B_BS#1 <9> DDR_B_BS#2 <9>

DDR_B_RAS# <9> DDR_B_CAS# <9> DDR_B_WE# <9>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C13

2

1000P_0402_25V8J

C

1

2

DDR_B_DM[7..0]<9> DDR_A_DM[7..0] <8>

DDR_B_DQS0<9> DDR_B_DQS#0<9> DDR_B_DQS1<9> DDR_B_DQS#1<9> DDR_B_DQS2<9> DDR_B_DQS#2<9> DDR_B_DQS3<9> DDR_B_DQS#3<9> DDR_B_DQS4<9> DDR_B_DQS#4<9> DDR_B_DQS5<9> DDR_B_DQS#5<9> DDR_B_DQS6<9> DDR_B_DQS#6<9> DDR_B_DQS7<9> DDR_B_DQS#7<9>

2007/10/11 200810/11

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

Compal Secret Data

Deciphered Date

JCPUC

C11

MB_DATA0

A11

MB_DATA1

A14

MB_DATA2

B14

MB_DATA3

G11

MB_DATA4

E11

MB_DATA5

D12

MB_DATA6

A13

MB_DATA7

A15

MB_DATA8

A16

MB_DATA9

A19

MB_DATA10

A20

MB_DATA11

C14

MB_DATA12

D14

MB_DATA13

C18

MB_DATA14

D18

MB_DATA15

D20

MB_DATA16

A21

MB_DATA17

D24

MB_DATA18

C25

MB_DATA19

B20

MB_DATA20

C20

MB_DATA21

B24

MB_DATA22

C24

MB_DATA23

E23

MB_DATA24

E24

MB_DATA25

G25

MB_DATA26

G26

MB_DATA27

C26

MB_DATA28

D26

MB_DATA29

G23

MB_DATA30

G24

MB_DATA31

AA24

MB_DATA32

AA23

MB_DATA33

AD24

MB_DATA34

AE24

MB_DATA35

AA26

MB_DATA36

AA25

MB_DATA37

AD26

MB_DATA38

AE25

MB_DATA39

AC22

MB_DATA40

AD22

MB_DATA41

AE20

MB_DATA42

AF20

MB_DATA43

AF24

MB_DATA44

AF23

MB_DATA45

AC20

MB_DATA46

AD20

MB_DATA47

AD18

MB_DATA48

AE18

MB_DATA49

AC14

MB_DATA50

AD14

MB_DATA51

AF19

MB_DATA52

AC18

MB_DATA53

AF16

MB_DATA54

AF15

MB_DATA55

AF13

MB_DATA56

AC12

MB_DATA57

AB11

MB_DATA58

Y11

MB_DATA59

AE14

MB_DATA60

AF14

MB_DATA61

AF11

MB_DATA62

AD11

MB_DATA63

A12

MB_DM0

B16

MB_DM1

A22

MB_DM2

E25

MB_DM3

AB26

MB_DM4

AE22

MB_DM5

AC16

MB_DM6

AD12

MB_DM7

C12

MB_DQS_H0

B12

MB_DQS_L0

D16

MB_DQS_H1

C16

MB_DQS_L1

A24

MB_DQS_H2

A23

MB_DQS_L2

F26

MB_DQS_H3

E26

MB_DQS_L3

AC25

MB_DQS_H4

AC26

MB_DQS_L4

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF12

MB_DQS_H7

AE12

MB_DQS_L7

FOX_PZ6382A-284S-41F_GRIFFIN

Athlon 64 S1 Processor Socket

CONN@

D

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

Title

Size Document Number Rev

Custom

Date: Sheet

DDR_A_D1

F12

DDR_A_D2

H14

DDR_A_D3

G14

DDR_A_D4

H11

DDR_A_D5

H12

DDR_A_D6

C13

DDR_A_D7

E13

DDR_A_D8

H15

DDR_A_D9

E15

DDR_A_D10

E17

DDR_A_D11

H17

DDR_A_D12

E14

DDR_A_D13

F14

DDR_A_D14

C17

DDR_A_D15

G17

DDR_A_D16

G18

DDR_A_D17

C19

DDR_A_D18

D22

DDR_A_D19

E20

DDR_A_D20

E18

DDR_A_D21

F18

DDR_A_D22

B22

DDR_A_D23

C23

DDR_A_D24

F20

DDR_A_D25

F22

DDR_A_D26

H24

DDR_A_D27

J19

DDR_A_D28

E21

DDR_A_D29

E22

DDR_A_D30

H20

DDR_A_D31

H22

DDR_A_D32

Y24

DDR_A_D33

AB24

DDR_A_D34

AB22

DDR_A_D35

AA21

DDR_A_D36

W22

DDR_A_D37

W21

DDR_A_D38

Y22

DDR_A_D39

AA22

DDR_A_D40

Y20

DDR_A_D41

AA20

DDR_A_D42

AA18

DDR_A_D43

AB18

DDR_A_D44

AB21

DDR_A_D45

AD21

DDR_A_D46

AD19

DDR_A_D47

Y18

DDR_A_D48

AD17

DDR_A_D49

W16

DDR_A_D50

W14

DDR_A_D51

Y14

DDR_A_D52

Y17

DDR_A_D53

AB17

DDR_A_D54

AB15

DDR_A_D55

AD15

DDR_A_D56

AB13

DDR_A_D57

AD13

DDR_A_D58

Y12

DDR_A_D59

W11

DDR_A_D60

AB14

DDR_A_D61

AA14

DDR_A_D62

AB12

DDR_A_D63

AA12

DDR_A_DM0

E12

DDR_A_DM1

C15

DDR_A_DM2

E19

DDR_A_DM3

F24

DDR_A_DM4

AC24

DDR_A_DM5

Y19

DDR_A_DM6

AB16

DDR_A_DM7

Y13

DDR_A_DQS0

G13

DDR_A_DQS#0

H13

DDR_A_DQS1

G16

DDR_A_DQS#1

G15

DDR_A_DQS2

C22

DDR_A_DQS#2

C21

DDR_A_DQS3

G22

DDR_A_DQS#3

G21

DDR_A_DQS4

AD23

DDR_A_DQS#4

AC23

DDR_A_DQS5

AB19

DDR_A_DQS#5

AB20

DDR_A_DQS6

Y15

DDR_A_DQS#6

W15

DDR_A_DQS7

W12

DDR_A_DQS#7

W13

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

DDR_A_D0

G12

DDR_A_D[63..0] <8>

DDR_A_DQS0 <8> DDR_A_DQS#0 <8> DDR_A_DQS1 <8> DDR_A_DQS#1 <8> DDR_A_DQS2 <8> DDR_A_DQS#2 <8> DDR_A_DQS3 <8> DDR_A_DQS#3 <8> DDR_A_DQS4 <8> DDR_A_DQS#4 <8> DDR_A_DQS5 <8> DDR_A_DQS#5 <8> DDR_A_DQS6 <8> DDR_A_DQS#6 <8> DDR_A_DQS7 <8> DDR_A_DQS#7 <8>

E

F

of

554Friday, February 13, 2009

A

250mA(+-100mV_dc, +-150mV_ac)

1 1

CLK_CPU_BCLK<22>

LDT_RST#=4mil/12mil

2 2

LDT_RST#<26>

H_PWRGD_CPU=4mil/12mil

H_PWRGD_CPU<26,50>

3 3

LDT_STOP#=4mil/12mil

LDT_STOP#<11,26>

0718 AMD , need check with AMD

+1.8VS

4 4

CPU_LDT_REQ#=4mil/12mil

R30

R30 300_0402_5%

300_0402_5%

1 2

CPU_LDT_REQ#

1

C24

0.01U_0402_25V4Z

@

2

+1.8VS

R15

R15 300_0402_5%

300_0402_5%

1 2

LDT_RST#

1

C22

0.01U_0402_25V4Z

@

2

+1.8VS

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD_CPU

1

C23

0.01U_0402_25V4Z

@

2

+1.8VS

R36

R36 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C25

0.01U_0402_25V4Z

@

2

CPU_LDT_REQ# <11,26>

A

0718 Silego -- 216 ohm

CLK_CPU_BCLK#<22>

+CPU_CORE_0

+CPU_CORE_1

+1.8V

C27

1 2

2200p change to 1000p for ADT7421

+2.5VS

100U_D2_10VM

R487 10_0402_5%

1 2 1 2

R486 10_0402_5% R486 10_0402_5%

R489 10_0402_5%

1 2 1 2

R488 10_0402_5%

@R175

@

+3VS

20K_0402_5%

R18

2.2K_0402_5%

2.2K_0402_5% R19

R19

2.2K_0402_5%

CPU_SIC

+3VS

1

C26

2

0.1U_0402_16V4Z

2200P_0402_50V7K

C16

@+C16

@

Place close to CPU wihtin 1.5"

C20

C21 3900P_0402_50V7K

CPU_VDD0_FB_H/L(Differential pair)=10/5/5/5/10

CPU_VDD1_FB_H/L(Differential pair)=10/5/5/5/10

CPU_VDD0_FB_H CPU_VDD0_FB_L

Close to CPU

CPU_VDD1_FB_H CPU_VDD1_FB_L

R175

12

G

S

Q127

@

Q127

@

12

FDV301N_NL_SOT23-3

12

FDV301N_NL_SOT23-3

FDV301N_NL_SOT23-3 Q129

@

Q129

@

THERMDA_CPU THERMDC_CPU

B

L1

1 2

FBM_L11_201209_300L_0805

1

+

2

3900P_0402_50V7K

1 2

12

R8

R8 169_0402_1%

169_0402_1%

1 2

C939 0.1U_0402_16V4Z@C939 0.1U_0402_16V4Z@

R814

@R814

@

12

34.8K_0402_1%~N

2

SMB_EC_DA1CPU_SID

13

D

G

2

SMB_EC_CK1

13

D

S

D

S

EC is PU to 5VALW

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

U2

1

VDD D+

SDATA

ALERT#

DTHERM#4GND

B

SCLK

2 3

ADM1032ARMZ-2REEL_MSOP8

Address:100_1101

+2.5VDDA

VDDA=300mA

3300P_0402_50V7K

1

C174.7U_0805_10V4Z C174.7U_0805_10V4Z

2

Address:100_1100

R13 44.2_0402_1%R13 44.2_0402_1% R14 44.2_0402_1%R14 44.2_0402_1%

+1.2V_HT

2.09V for Gate

SMB_EC_DA1 <39,40,44>

SMB_EC_CK1 <39,40,44>

8 7 6 5

1

C19

C18

0.22U_0603_16V4Z

2

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

LDT_RST# H_PWRGD_CPU LDT_STOP# CPU_LDT_REQ#

CPU_SIC CPU_SID

1 2 1 2

CPU_VDD0_FB_H<50> CPU_VDD0_FB_L<50>

CPU_VDD1_FB_H<50> CPU_VDD1_FB_L<50>

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_TEST23_TSTUPD

CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN

R25 0_0402_5%R25 0_0402_5%

1 2

SMB_EC_CK2 <21,40> SMB_EC_DA2 <21,40>

C

D

CPU_THERMTRIP#_R/ENTRIP2/H_THERMTRIP#=4mil/12mil

+1.8V

JCPUD

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_FB_H CPU_VDD0_FB_L

CPU_VDD1_FB_H

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

FOX_PZ6382A-284S-41F_GRIFFIN

CONN@

12

C

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

+1.8V

R39220_0402_5%@ R39220_0402_5%@

R37220_0402_5%@ R37220_0402_5%@

R38220_0402_5%@ R38220_0402_5%@

R40220_0402_5%@ R40220_0402_5%@

12

2007/10/11 200810/11

M11

KEY1

W18

KEY2

CPU_SVC

A6

SVC

CPU_SVD

A4

SVD

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7

CPU_MEMHOT#_1.8V

AA8

MEMHOT_L

THERMDC_CPU

W7

THERMDC THERMDA

DBREQ_L

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST10

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

R41300_0402_5% R41300_0402_5%

THERMDA_CPU

W8

VDDIO_FB_H

W9

VDDIO_FB_L

Y9

VDD_NB_FB_H

H6

VDD_NB_FB_LCPU_VDD1_FB_L

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

TDO

CPU_TEST28_H_PLLCHRZ_P

J7

CPU_TEST28_L_PLLCHRZ_N

H8

CPU_TEST17_BP3

D7

CPU_TEST16_BP2

E7

CPU_TEST15_BP1

F7

CPU_TEST14_BP0

C7 C3

TEST7

K8 C4

TEST8

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

H18 H19 AA7 D5 C5

HDT Connector

@SAMTEC_ASP-68200-07

@

9/20 SP020016900

Compal Secret Data

Deciphered Date

CPU_SVC <50> CPU_SVD <50>

VDD_NB_FB_H <50> VDD_NB_FB_L <50>

JP3

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

R17

12

300_0402_5%@

+1.8V sense no support

T42PAD T42PAD

VDDIO_FB_H/L=10mil/10mil

T43PAD T43PAD

D

+1.8V

VDD_NB_FB_H/L(Differential pair)=10/5/5/5/10

T5PAD T5PAD T6PAD T6PAD

testpoint under package

T7PAD T7PAD T8PAD T8PAD T10PAD T10PAD T12PAD T12PAD

CPU_TEST29_H_FBCLKOUT_P /CPU_TEST29_L_FBCLKOUT_N (85ohm

T13PAD T13PAD T14PAD T14PAD

Differential pair)

U1

HDT_RST#

4

1 2

R10 10K_0402_5%

1 2

R5 300_0402_5%

CPU_THERMTRIP#_R

B

2

Q3

E

3 1

C

MMBT3904_NL_SOT23-3

+1.8V

MMBT3904_NL_SOT23-3

1 2

R9 300_0402_5% R9 300_0402_5%

CPU_PROCHOT#_1.8

CPU_PROCHOT#_1.8/H_PROCHOT#=4mil/12mil

route as differential as short as possible

+3VS

5

P

B

Y

A

G

NC7SZ08P5X_NL_SC70-5@U1NC7SZ08P5X_NL_SC70-5@

3

CPU_TEST28_H_PLLCHRZ_P /CPU_TEST28_L_PLLCHRZ_N (85ohm Differential pair)

CPU_TEST25_L_BYPASSCLK_L CPU_TEST27_SINGLECHAIN

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0 CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_TEST23_TSTUPD CPU_TEST25_H_BYPASSCLK_H

LDT_RST#

2 1

Title

Size Document Number Rev

Custom

Date: Sheet

SB_PWRGD <27,40,50>

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

R6 0_0402_5%@R6 0_0402_5%@

1 2 1 2

R7 0_0402_5%R7 0_0402_5%

1 2

R11 0_0402_5%@R11 0_0402_5%@

R22 1K_0402_5%R22 1K_0402_5%

CPU_SVC

1 2

CPU_SVD

1 2

R23 1K_0402_5%R23 1K_0402_5%

0718 AMD --> 1K ohm

R484 10_0402_5%

VDD_NB_FB_H VDD_NB_FB_L

R484 10_0402_5%

1 2 1 2

R485 10_0402_5% R485 10_0402_5%

Close to CPU

R59 300_0402_5%@R59 300_0402_5%@

1 2

R24 300_0402_5%@R24 300_0402_5%@

1 2

R26 300_0402_5%R26 300_0402_5%

1 2

R27 300_0402_5%@R27 300_0402_5%@ R28 300_0402_5%R28 300_0402_5% R29 300_0402_5%@R29 300_0402_5%@ R31 300_0402_5%@R31 300_0402_5%@ R32 300_0402_5%@R32 300_0402_5%@ R33 300_0402_5%@R33 300_0402_5%@ R34 300_0402_5%@R34 300_0402_5%@ R35 300_0402_5%@R35 300_0402_5%@

R60 300_0402_5%@R60 300_0402_5%@ R61 300_0402_5%@R61 300_0402_5%@

E

EN0 <44,46> H_THERMTRIP# <27,40>

H_PROCHOT# <26>

+1.8V

+CPU_CORE_NB

+1.8V

12 12 12 12 12 12 12 12

12 12

of

654Friday, February 13, 2009

F

A

VDD(+CPU_CORE) decoupling.

+CPU_CORE_0

1

+

C30

1 1

C30 330U_X_2VM_R6M

330U_X_2VM_R6M

2

+CPU_CORE_0

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE_0

1

C40

0.22U_0603_16V4Z

2

2 2

1

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C41

0.01U_0402_25V4Z

2

1

+

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C42

C42 180P_0402_50V8J

180P_0402_50V8J

2

C28

C28 330U_X_2VM_R6M

330U_X_2VM_R6M

Near CPU Socket

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

VDDIO decoupling.

+1.8V

1

C46

C46 22U_0805_6.3V6M

22U_0805_6.3V6M

2

3 3

+1.8V

1

C55

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C60

0.01U_0402_25V4Z

2

4 4

+1.8V

1

2

C74

4.7U_0805_10V4Z

1

C47

C47 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C48

0.22U_0603_16V4Z

2

Under CPU Socket

Between CPU Socket and DIMM

1

C57

0.22U_0603_16V4Z

2

1

2

1

2

1

C56

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V4Z

2

1

C75

4.7U_0805_10V4Z

2

A

1

C49

0.22U_0603_16V4Z

2

1

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

C62

C62 180P_0402_50V8J

180P_0402_50V8J

C76

4.7U_0805_10V4Z

1

2

1

180P_0402_50V8J

2

C58

0.22U_0603_16V4Z

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

A: Add C165 and C176 to follow AMD Layout review recommand for EMI

C77

4.7U_0805_10V4Z

B

+CPU_CORE_1

1

+

2

+CPU_CORE_1

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C50

1

C51

C51 180P_0402_50V8J

180P_0402_50V8J

2

1

C64

C64 180P_0402_50V8J

180P_0402_50V8J

2

1

C: Change to NBO CAP

+

C78

C78 220U_Y_4VM

220U_Y_4VM

@

2

B

C31

C31 330U_X_2VM_R6M

330U_X_2VM_R6M

1

2

+CPU_CORE_1

1

C43

0.22U_0603_16V4Z

2

1

C65

C65 180P_0402_50V8J

180P_0402_50V8J

2

C37

C37 22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

C29

C29 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

C38

C38 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C44

0.01U_0402_25V4Z

2

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C45

C45 180P_0402_50V8J

180P_0402_50V8J

2

C

VDD_dc & VDDNB_dc transient < 5us

0.8V~1.1V, 3A(+-25mV_dc, +-125mV_ac)

2A(+-100mV_dc, +-150mV_ac)

0.7V~1.2V, 18A/35W,

18A/7200mil/36vias 18A/7200mil/36vias

+CPU_CORE_NB

+1.8V

10A/20W(+-25mV_dc, +-125mV_ac)

JCPUE

G4 H2

J9 J11 J13 J15

K6 K10 K12 K14

L4

L7

L9 L11 L13 L15

M2 M6 M8

M10

N7 N9

N11

K16

M16

P16 T16 V16

H25

J17 K18 K21 K23 K25 L17

M18 M21 M23 M25 N17

FOX_PZ6382A-284S-41F_GRIFFIN

Athlon 64 S1 Processor Socket

CONN@

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

D

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

+CPU_CORE_NB decoupling.

+CPU_CORE_NB

1

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C53

C53 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VTT decoupling.

+0.9V

1

C66

4.7U_0805_10V4Z

2

+0.9V

1

C79

4.7U_0805_10V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C67

4.7U_0805_10V4Z

2

Near CPU Socket Right side.

1

C80

4.7U_0805_10V4Z

2

Near CPU Socket Left side.

C

2007/10/11 200810/11

1 @C54

@

2

1

C68

0.22U_0603_16V4Z

2

1

C81

0.22U_0603_16V4Z

2

C54 22U_0805_6.3V6M

22U_0805_6.3V6M

+0.9V

Near Power Supply

1

C: Change to NBO CAP

+

C59

C59 220U_Y_4VM

220U_Y_4VM

2

1

C69

0.22U_0603_16V4Z

2

1

C82

0.22U_0603_16V4Z

2

Compal Secret Data

Deciphered Date

1

C70

C70 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C83

C83 1000P_0402_25V8J

1000P_0402_25V8J

2

D

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

1

C71

C71 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C84

C84 1000P_0402_25V8J

1000P_0402_25V8J

2

E

JCPUF

AA4

+CPU_CORE_1+CPU_CORE_0

+1.8V

1

C72

C72 180P_0402_50V8J

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

Title

Size Document Number Rev

Custom

Date: Sheet

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ6382A-284S-41F_GRIFFIN

Athlon 64 S1 Processor Socket

CONN@

1

C73

C73 180P_0402_50V8J

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

E

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

F

of

754Friday, February 13, 2009

A

DDR_A_D0 DDR_A_D1

1 1

2 2

DDR_CKE0_DIMMA<5>

DDR_A_BS#2<5>

DDR_A_BS#0<5> DDR_A_WE#<5>

DDR_A_CAS#<5> DDR_CS1_DIMMA#<5>

DDR_A_ODT1<5>

3 3

SMB_CK_DAT0<9,22,27,37> SMB_CK_CLK0<9,22,27,37>

4 4

+3VS

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_A_ODT0 DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59

1

C103

0.1U_0402_16V4Z

2

A

B

+V_DDR_MCH_REF

JP4

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

GND

TYCO_292527-4

CONN@

DQ12 DQ13

CK0#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

NC/CKE1

NC/A15 NC/A14

RAS#

ODT0

NC/A13

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

GND

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS

VSS DM1 VSS CK0

VSS

VSS DM2

VSS

VSS VDD

VDD

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS CK1

VSS DM6 VSS

VSS

VSS SAO SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202

9/20 SP07000ET00/SP07000GN00

B

+1.8V+1.8V

C

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1

DDR_A_D14 DDR_A_D15

DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53

DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_A_D[0..63]

DDR_A_DM[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_CLK0 <5> DDR_A_CLK#0 <5>

+V_DDR_MCH_REF

1

C95

2

1000P_0402_25V8J

0.1U_0402_16V4Z

DDR_CKE1_DIMMA <5>

DDR_A_BS#1 <5> DDR_A_RAS# <5> DDR_CS0_DIMMA# <5>

DDR_A_ODT0 <5>

DDR_A_CLK1 <5> DDR_A_CLK#1 <5>

C

DDR_A_D[0..63] <5>

DDR_A_DM[0..7] <5>

DDR_A_DQS[0..7] <5>

DDR_A_MA[0..15] <5>

DDR_A_DQS#[0..7] <5>

+1.8V

R43

R43 1K_0402_1%

1K_0402_1%

1 2

1

C96

2

2007/10/11 200810/11

+V_DDR_MCH_REF <9>

R44

R44 1K_0402_1%

1K_0402_1%

1 2

Compal Secret Data

Deciphered Date

D

+0.9V

RP1

DDR_A_MA11 DDR_A_MA14 DDR_A_MA7 DDR_A_MA6

DDR_A_MA15 DDR_CKE1_DIMMA DDR_CKE0_DIMMA DDR_A_BS#2

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_BS#1

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3

DDR_CS1_DIMMA# DDR_A_ODT1 DDR_A_CAS# DDR_A_WE#

DDR_A_RAS# DDR_A_ODT0 DDR_A_MA13 DDR_CS0_DIMMA#

D

RP1

18 27 36

47_0804_8P4R_5%

Cross between +1.8V and +0.9V power plan

Title

Size Document Number Rev

Custom

Date: Sheet

45

RP2

18 27 36 45

RP3

18 27 36 45

RP4

18 27 36 45

RP5

18 27 36 45

RP6

18 27 36 45

RP7

18 27 36 45

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

1 2

C87 0.1U_0402_16V4Z

1 2

C88 0.1U_0402_16V4Z

1 2

C90 0.1U_0402_16V4Z

1 2

C89 0.1U_0402_16V4Z

1 2

C91 0.1U_0402_16V4Z

1 2

C92 0.1U_0402_16V4Z

1 2

C93 0.1U_0402_16V4Z

1 2

C94 0.1U_0402_16V4Z

1 2

C98 0.1U_0402_16V4Z

1 2

C97 0.1U_0402_16V4Z

1 2

C100 0.1U_0402_16V4Z

1 2

C99 0.1U_0402_16V4Z

1 2

C102 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4Z

E

+1.8V

F

of

854Friday, February 13, 2009

A

B

C

D

E

JP5

+V_DDR_MCH_REF<8>

1

C104

1 1

2

1000P_0402_25V8J

2 2

3 3

4 4

DDR_CKE0_DIMMB<5>

DDR_B_BS#2<5>

DDR_B_BS#0<5>

DDR_B_CAS#<5> DDR_CS1_DIMMB#<5>

DDR_B_ODT1<5>

SMB_CK_DAT0<8,22,27,37> SMB_CK_CLK0<8,22,27,37>

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D13

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D21 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59

+3VS

C119

0.1U_0402_16V4Z

1

2

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-N8RN-7F

CONN@

9/20 SP07000BZ00/SP07000EU00 DDR2 SOCKET H9.2 (REV)

VSS

201

NC/CKE1

NC/A15 NC/A14

NC/A13

VSS

202

DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

VDD

VDD RAS#

VDD ODT0

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

VSS DQ4 DQ5 VSS

CK0

A11

BA1 S0#

CK1

SA0 SA1

NC

A7 A6

A4 A2 A0

NC

A

B

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D9 DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D16

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_ODT0 DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53

DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_B_D[0..63]

DDR_B_DM[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

DDR_B_CLK0 <5> DDR_B_CLK#0 <5>

DDR_CKE1_DIMMB <5>

DDR_B_BS#1 <5> DDR_B_RAS# <5> DDR_CS0_DIMMB# <5>DDR_B_WE#<5>

DDR_B_ODT0 <5>

DDR_B_CLK1 <5> DDR_B_CLK#1 <5>

2007/10/11 200810/11

DDR_B_D[0..63] <5>

DDR_B_DM[0..7] <5>

DDR_B_DQS[0..7] <5>

DDR_B_MA[0..15] <5>

DDR_B_DQS#[0..7] <5>

Compal Secret Data

Deciphered Date

D

DDR_B_MA6 DDR_B_MA2 DDR_B_MA0 DDR_CS0_DIMMB#

DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA4

DDR_CKE1_DIMMB DDR_B_MA15 DDR_CKE0_DIMMB DDR_B_BS#2

DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12

DDR_B_MA10 DDR_B_BS#0 DDR_B_MA1 DDR_B_MA3

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_B_RAS# DDR_B_BS#1 DDR_B_ODT0 DDR_B_MA13

47_0804_8P4R_5%

Cross between +1.8V and +0.9V power plan

Title

Size Document Number Rev

Custom

Date: Sheet

+0.9V

RP8

18 27 36 45

RP9

18 27 36 45

RP10

18 27 36 45

RP11

18 27 36 45

RP12

18 27 36 45

RP13

18 27 36 45

RP14

18 27 36 45

Compal Electronics, Inc.

12

C105 0.1U_0402_16V4Z

1 2

C106 0.1U_0402_16V4Z

12

C108 0.1U_0402_16V4Z

1 2

C107 0.1U_0402_16V4Z

12

C109 0.1U_0402_16V4Z

1 2

C110 0.1U_0402_16V4Z

12

C111 0.1U_0402_16V4Z

1 2

C112 0.1U_0402_16V4Z

12

C114 0.1U_0402_16V4Z

1 2

C113 0.1U_0402_16V4Z

12

C116 0.1U_0402_16V4Z

1 2

C115 0.1U_0402_16V4Z

12

C118 0.1U_0402_16V4Z

1 2

C117 0.1U_0402_16V4Z

SCHEMATIC MB A4112

401568

E

+1.8V

F

of

954Friday, February 13, 2009

A

SB_RX0P<26> SB_RX0N<26> SB_RX1P<26> SB_RX1N<26> SB_RX2P<26> SB_RX2N<26> SB_RX3P<26> SB_RX3N<26>

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

PCIE_GTX_C_MRX_P[0..15]<15> PCIE_GTX_C_MRX_N[0..15]<15>

1 1

PCIE_PTX_C_IRX_P1<34> PCIE_PTX_C_IRX_N1<34> PCIE_PTX_C_IRX_P2<33> PCIE_PTX_C_IRX_N2<33> PCIE_PTX_C_IRX_P3<32>

2 2

PCIE_PTX_C_IRX_N3<32>

RS780M Display Port Support (muxed on GFX)

DP0

DP1

3 3

SA00001ZG00(A11) S IC 216-0674001-00/RS780M FCBGA528P 0FH SA00001ZG20(A12) S IC 216-0674008-00 A12 RS780M FCBGA 0FH

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

SA00002DT10(A12) S IC 215-0674024 A12 RX781 FCBGA528P 0FH

B

GFX_TX0P

GFX_TX0N

GFX_TX1P

GFX_TX1N

GFX_TX2P

GFX_TX2N

GFX_TX3P

GFX_TX3N

GFX_TX4P

GFX_TX4N

GFX_TX5P

GFX_TX5N

GFX_TX6P

GFX_TX6N

GFX_TX7P

GFX_TX7N

GFX_TX8P

GFX_TX8N

GFX_TX9P

GFX_TX9N

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5

PCIE_MTX_GRX_N0

B5

PCIE_MTX_GRX_P1

A4 B4

PCIE_MTX_GRX_P2

C3

PCIE_MTX_GRX_N2

B2

PCIE_MTX_GRX_P3

D1 D2

PCIE_MTX_GRX_P4

E2

PCIE_MTX_GRX_N4

E1

PCIE_MTX_GRX_P5

F4 F3

PCIE_MTX_GRX_P6

F1 F2

PCIE_MTX_GRX_P7

H4 H3

PCIE_MTX_GRX_P8

H1 H2

PCIE_MTX_GRX_P9

J2

PCIE_MTX_GRX_N9

J1 K4

PCIE_MTX_GRX_N10

K3

PCIE_MTX_GRX_P11

K1

PCIE_MTX_GRX_N11

K2

PCIE_MTX_GRX_P12

M4

PCIE_MTX_GRX_N12

M3

PCIE_MTX_GRX_P13

M1 M2

PCIE_MTX_GRX_P14

N2

PCIE_MTX_GRX_N14

N1

PCIE_MTX_GRX_P15

P1 P2

AC1 AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5

CALRP

AC8

CALRN

AB8

Place them close to NB within 1"

C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K C125 0.1U_0402_16V7KC125 0.1U_0402_16V7K C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K C131 0.1U_0402_16V7KC131 0.1U_0402_16V7K C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K C141 0.1U_0402_16V7KC141 0.1U_0402_16V7K C143 0.1U_0402_16V7KC143 0.1U_0402_16V7K C145 0.1U_0402_16V7KC145 0.1U_0402_16V7K C147 0.1U_0402_16V7KC147 0.1U_0402_16V7K C149 0.1U_0402_16V7KC149 0.1U_0402_16V7K C151 0.1U_0402_16V7KC151 0.1U_0402_16V7K

C162 0.1U_0402_16V7K C162 0.1U_0402_16V7K C163 0.1U_0402_16V7K C163 0.1U_0402_16V7K C164 0.1U_0402_16V7K C164 0.1U_0402_16V7K C165 0.1U_0402_16V7K C165 0.1U_0402_16V7K C166 0.1U_0402_16V7K C166 0.1U_0402_16V7K C168 0.1U_0402_16V7K C168 0.1U_0402_16V7K C169 0.1U_0402_16V7K C169 0.1U_0402_16V7K C167 0.1U_0402_16V7K C167 0.1U_0402_16V7K

R55 1.27K_0402_1% R55 1.27K_0402_1%

1 2

R56 2K_0402_1% R56 2K_0402_1%

1 2

CALRP/N=W/S=5mil/10mil

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C154 0.1U_0402_16V7K C154 0.1U_0402_16V7K

1 2

C155 0.1U_0402_16V7K C155 0.1U_0402_16V7K

1 2

C156 0.1U_0402_16V7K C156 0.1U_0402_16V7K

1 2

C157 0.1U_0402_16V7K C157 0.1U_0402_16V7K

1 2

C158 0.1U_0402_16V7K C158 0.1U_0402_16V7K

1 2

C159 0.1U_0402_16V7K C159 0.1U_0402_16V7K

1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C

C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K

1 2

C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K

1 2

C124 0.1U_0402_16V7KC124 0.1U_0402_16V7K

1 2

C126 0.1U_0402_16V7KC126 0.1U_0402_16V7K

1 2

C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K

1 2

C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K

1 2

C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K

1 2

C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K

1 2

C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K

1 2

C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K

1 2

C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K

1 2

C142 0.1U_0402_16V7KC142 0.1U_0402_16V7K

1 2

C144 0.1U_0402_16V7KC144 0.1U_0402_16V7K

1 2

C146 0.1U_0402_16V7KC146 0.1U_0402_16V7K

1 2

C148 0.1U_0402_16V7KC148 0.1U_0402_16V7K

1 2

C150 0.1U_0402_16V7KC150 0.1U_0402_16V7K

1 2

PCIE_ITX_C_PRX_P1 <34> PCIE_ITX_C_PRX_N1 <34> PCIE_ITX_C_PRX_P2 <33> PCIE_ITX_C_PRX_N2 <33> PCIE_ITX_C_PRX_P3 <32> PCIE_ITX_C_PRX_N3 <32>

SB_TX0P <26> SB_TX0N <26> SB_TX1P <26> SB_TX1N <26> SB_TX2P <26> SB_TX2N <26> SB_TX3P <26> SB_TX3N <26>

+1.1VS

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P0PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6PCIE_MTX_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15

D

PCIE_MTX_C_GRX_P[0..15] <15> PCIE_MTX_C_GRX_N[0..15] <15>

Polarity inversion

E

New Card(delete) CardReader

WLAN LAN10/100

TV Tuner(delete)

H_CLKOP0<4> H_CLKON0<4> H_CLKOP1<4> H_CLKON1<4>

H_CTLOP0<4> H_CTLON0<4>

H_CTLON1<4>

Place them close to NB within 1" Place them close to NB within 1"

RXCALRP/N=W/S=5mil/10mil

H_CADOP[0..15]<4> H_CADON[0..15]<4> H_CADIN[0..15] <4>

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9

H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

RXCALRP

R57301_0402_1% R57301_0402_1%

1 2

RXCALRN

H_CADON[0..15]

U3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M_FCBGA528

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

PART 1 OF 6

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] <4>

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18 H24

H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

TXCALRP

B24

TXCALRN

B25

TXCALRP/N=W/S=5mil/10mil

H_CLKIP0 <4> H_CLKIN0 <4> H_CLKIP1 <4> H_CLKIN1 <4>

H_CTLIP0 <4>

H_CTLIN0 <4>

H_CTLIP1 <4>H_CTLOP1<4>

H_CTLIN1 <4>

R58 301_0402_1%R58 301_0402_1%

1 2

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

10 54Friday, February 13, 2009

E

of

F

A

+3VS

B

C

D

E

LDT_STOP#<6,26>

1 1

R1170 0_0402_5%

CPU_LDT_REQ#<6,26>

2 2

3 3

R1171 0_0402_5%

+1.8VS

BLM18PG121SN1D_0603

R87

@R87

@

4.7K_0402_5%

12

1 2

+3VS

@R84

@

NB_ALLOW_LDTSTOP

12

1 2

+1.8VS

BLM18PG121SN1D_0603

L11

1 2

2.2U_0603_6.3V4Z

+1.1VS

NB_LDTSTOP#

R84

4.7K_0402_5%

L10

1 2

C180

C179

2.2U_0603_6.3V4Z

1

2

1

2

Install when SB700 A12 use

1 2

R71

R71 150_0402_1%

150_0402_1%

1 2

R72

R72 150_0402_1%

150_0402_1%

NB_PWRGD<27>

PLT_RST#<14,15,26,32,33,34,39,40>

+1.8VS

NB_OSC_14.318M<22>

CLK_SBLINK_BCLK<22> CLK_SBLINK_BCLK#<22>

+VDDA18HTPLL +VDDA18PCIEPLL

1 2

R371 300_0402_5%R371 300_0402_5%

CLK_NBHT<22> CLK_NBHT#<22>

NBGFX_CLK<22> NBGFX_CLK#<22>

+VDDA18HTPLL=W/S=20/10mil +VDDA18PCIEPLL=W/S=20/10mil

R66 0_0402_5% R66 0_0402_5%

+3VS

1 2

AUX_CAL<14>

NB_RESET# NB_PWRGD NB_LDTSTOP#

NB_ALLOW_LDTSTOP

12

R88 10K_0402_5%

Strap pin

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3)

TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4)

TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

SUS_STAT#(PWM_GPIO5)

TXOUT_L0P(NC)

TXOUT_L0N(NC)

TXOUT_L1P(NC)

TXOUT_L1N(NC)

TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

flash issue check IALAA

D9 D10

D12 AE8

AD8 D13

1 2

R77 0_0402_5%

1 2

R80

1.8K_0402_5%

SUS_STAT# <27> SUS_STAT_R# <14>

Strap pin

NB temp to SB

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

11 54Friday, February 13, 2009

E

of

F

A

1 1

2 2

B

C

AB12

MEM_A0(NC)

AE16

MEM_A1(NC)

V11

MEM_A2(NC)

AE15

MEM_A3(NC)

AA12

MEM_A4(NC)

AB16

MEM_A5(NC)

AB14

MEM_A6(NC)

AD14

MEM_A7(NC)

AD13

MEM_A8(NC)

AD15

MEM_A9(NC)

AC16

MEM_A10(NC)

AE13

MEM_A11(NC)

AC14

MEM_A12(NC)

Y14

MEM_A13(NC)

AD16

MEM_BA0(NC)

AE17

MEM_BA1(NC)

AD17

MEM_BA2(NC)

W12

MEM_RASb(NC)

Y12

MEM_CASb(NC)

AD18

MEM_WEb(NC)

AB13

MEM_CSb(NC)

AB18

MEM_CKE(NC)

V14

MEM_ODT(NC)

V15

MEM_CKP(NC)

W14

MEM_CKN(NC)

AE12

MEM_COMPP(NC)

AD12

MEM_COMPN(NC)

RS780M_FCBGA528

U3D

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

D

+1.8VS=W/S=20/10mil For Memory PLL power

+1.8VS

+1.1VS=W/S=20/10mil For Memory PLL power

+1.1VS

E

3 3

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

of

12 54Friday, February 13, 2009

F

A

B

C

D

E

U3F

1 1

+VDDHT >120mil (power plan)

C208

1

2

+VDDHTRX >70mil (power plan)

+VDDHTRX

1

C218

0.1U_0402_16V4Z

2

+VDDHTTX >45mil (power plan)

1

C228

C238

1

C229

2

0.1U_0402_16V4Z

+VDDA18PCIE >20mil (power plan)

1

C239

2

0.1U_0402_16V4Z

+1.8VS >20mil

+1.8VS

1

C251

2

+VDDHT

C210

0.1U_0402_16V4Z

+VDDHTTX

+VDDA18PCIE

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDD18_1

G9

VDD18_2

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS780M_FCBGA528

+VDDA11PCIE >300mil (power plan)

0.7A/4vias

U3E

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VDDA_12=2.5A

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+VDDA11PCIE

+1.1VS +NB_VDDC

7A/16vias

1

C2470.1U_0402_16V4Z C2470.1U_0402_16V4Z

C2400.1U_0402_16V4Z C2400.1U_0402_16V4Z

C2410.1U_0402_16V4Z C2410.1U_0402_16V4Z

2

0.15A/2vias

+3VS

+3VS >20mil

L17

1 2

FBMA-L11-201209-221LMA30T_0805

C211

C211 C212

C212

C220 1U_0402_6.3V4Z

C220 1U_0402_6.3V4Z C219 1U_0402_6.3V4Z

C219 1U_0402_6.3V4Z C222 1U_0402_6.3V4Z

C222 1U_0402_6.3V4Z C221 1U_0402_6.3V4Z

C221 1U_0402_6.3V4Z C224 0.1U_0402_16V4Z C224 0.1U_0402_16V4Z C223 0.1U_0402_16V4Z C223 0.1U_0402_16V4Z

1

C2420.1U_0402_16V4Z C2420.1U_0402_16V4Z

C2430.1U_0402_16V4Z C2430.1U_0402_16V4Z

2

1 2 1 2 1 2 1 2

PJP604

1 2

PAD-OPEN 4x4m

VDD_CORE=5A

1

C2300.1U_0402_16V4Z C2300.1U_0402_16V4Z

C2310.1U_0402_16V4Z C2310.1U_0402_16V4Z

2

1 2 1 2

10U_0805_10V4Z

10U_0805_10V4Z 10U_0805_10V4Z

10U_0805_10V4Z

12 12

1

C2320.1U_0402_16V4Z C2320.1U_0402_16V4Z

C2440.1U_0402_16V4Z C2440.1U_0402_16V4Z

2

C2500.1U_0402_16V4Z @C2500.1U_0402_16V4Z @ C2530.1U_0402_16V4Z @C2530.1U_0402_16V4Z @

+1.1VS

+NB_VDDC >300mil (power plan)

330U_D2E_2.5VM_R15

1

C234

1

C24510U_0805_10V4Z C24510U_0805_10V4Z

C23310U_0805_10V4Z C23310U_0805_10V4Z

+

2

C209

0.1U_0402_16V4Z

1

C214

2

C225

0.1U_0402_16V4Z

1

C246

2

0.1U_0402_16V4Z

0.6A/4vias

0.1U_0402_16V4Z

0.1U_0402_16V4Z C206

C206

1

C207

2

0.1U_0402_16V4Z

0.45A/3vias

1

C216

2

0.1U_0402_16V4Z

0.5A/4vias

1

C227

C226

2

0.1U_0402_16V4Z

0.25A/2vias

1

C237

C236

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C217

C217

1

2

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

+1.1VS

2 2

+1.2V_HT

L19

0_0805_5%

L16

0_0805_5%

4.7U_0805_10V4Z

L18

12

0_0805_5%

4.7U_0805_10V4Z

12

C215

+1.35VS for A11

4.7U_0805_10V4Z

L22

+1.8VS

3 3

12

0_0805_5%

4.7U_0805_10V4Z

C235

4.7U_0805_10V4Z

U3F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

PART 6/6

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

+1.8VS

1

C1064

@C1064

@

2

10U_0805_10V4Z

4 4

@

2N7002_SOT23-3

VLDT_EN#<43>

1 2

R1017 0_0402_5%@ R1017 0_0402_5%@

2

@C1068

@

1

A

Just for RS780M A11 version boot issue

12

R1015

@R1015

@

1K_0402_1%

+VREF1.35V

12

R1016

@R1016

Q163

2

G

C1068

0.1U_0402_16V7K

@

13

D

3K_0402_5%

S

0.1U_0402_16V7K

2

C1066

@C1066

@

1

U64

@U64

@

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

1

C1067

@C1067

@

10U_0805_10V4Z

2

B

+1.35VS

6 5

NC

7

NC

8

NC

9

TP

+3VS

1

C1065

@C1065

@

1U_0603_10V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

13 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

1 1

2 2

RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 1K

CRT_VSYNC<16,23>

12

R101 1K_0402_5%R101 1K_0402_5%

12

R102 1K_0402_5%@R102 1K_0402_5%@

+3VS

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. 1 : Disable (RS740) Enable (RX780, RS780) 0 : Enable (Rs740) Disable (RX780, RS780) PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

DFT_GPIO1: LOAD_EEPROM_STRAPS

1 2

R104 150_0402_1%@R104 150_0402_1%@ D4 CH751H-40PT_SOD323-2@D4 CH751H-40PT_SOD323-2@

2 1

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

RS780 DFT_GPIO1

AUX_CAL<11>

SUS_STAT_R#<11> PLT_RST# <11,15,26,32,33,34,39,40>

RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.

3 3

DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb

RX780: Enables the Test Debug Bus using PCIE bus 1 : Disable ( Can still be enabled using nbcfg register access )

RS780 use HSYNC to enable SIDE PORT (internal pull high)

CRT_HSYNC<16,21,23>

4 4

A

B

R107 3K_0402_5%@R107 3K_0402_5%@

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

0 : Enable RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS740/RS780) 0 : Enable (RS740/RS780)

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

14 54Friday, February 13, 2009

E

of

F

5

4

3

2

1

PCIE_GTX_C_MRX_P[0..15]<10> PCIE_GTX_C_MRX_N[0..15]<10>

D D

C C

B B

CLK_PCIE_VGA<22> CLK_PCIE_VGA#<22>

PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 PEG_M_RXN0

PLT_RST#<11,14,26,32,33,34,39,40>

PCIE_MTX_C_GRX_P[0..15]<10> PCIE_MTX_C_GRX_N[0..15]<10>

U5A

AC30

PCIE_RX0P

AC31

PCIE_RX0N

AC29

PCIE_RX1P

AB29

PCIE_RX1N

AB31

PCIE_RX2P

AB30

PCIE_RX2N

AA31

PCIE_RX3P

AA30

PCIE_RX3N

W30

PCIE_RX4P

W31

PCIE_RX4N

W29

PCIE_RX5P

V29

PCIE_RX5N

V31

PCIE_RX6P

V30

PCIE_RX6N

U31

PCIE_RX7P

U30

PCIE_RX7N

P30

PCIE_RX8P

P31

PCIE_RX8N

P29

PCIE_RX9P

N29

PCIE_RX9N

N31

PCIE_RX10P

N30

PCIE_RX10N

M31

PCIE_RX11P

M30

PCIE_RX11N

K30

PCIE_RX12P

K31

PCIE_RX12N

K29

PCIE_RX13P

J29

PCIE_RX13N

J31

PCIE_RX14P

J30

PCIE_RX14N

H31

PCIE_RX15P

H30

PCIE_RX15N

Clock

AD29

PCIE_REFCLKP

AD30

PCIE_REFCLKN

SM BUS

AC28

NC_SMBCLK

AC27

NC_SMBDATA

AG25

PERSTB

216-0707001-00/M82-S_BGA632

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_MTX_C_GRX_N[0..15]

PART 1 OF 6

P

P C

C I

I

-

E

E X

X P

P R

R E

E S

S S

S

I

I N

N T

T E

E R

R F

F A

A C

C E

E

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

Calibration

PCIE_CALRN PCIE_CALRP

PEG_M_RXP15

AA28

PEG_M_RXN15

AA27

PEG_M_RXP14

AA25

PEG_M_RXN14

AA24

PEG_M_RXP13

Y28

PEG_M_RXN13

Y27

PEG_M_RXP12

Y25

PEG_M_RXN12

Y24

PEG_M_RXP11

V28

PEG_M_RXN11

V27

PEG_M_RXP10

V25

PEG_M_RXN10

V24

PEG_M_RXP9

T28

PEG_M_RXN9 PCIE_GTX_C_MRX_N9

T27

PEG_M_RXP8

T25

PEG_M_RXN8 PCIE_GTX_C_MRX_N8

T24

PEG_M_RXP7

P28

PEG_M_RXN7

P27

PEG_M_RXP6

P25

PEG_M_RXN6

P24

PEG_M_RXP5

M28

PEG_M_RXN5

M27

PEG_M_RXP4 PCIE_GTX_C_MRX_P4

M25

PEG_M_RXN4

M24

PEG_M_RXP3

L28

PEG_M_RXN3

L27

PEG_M_RXP2 PCIE_GTX_C_MRX_P2

L25

PEG_M_RXN2

L24

PEG_M_RXP1 PCIE_GTX_C_MRX_P1

J28

PEG_M_RXN1

J27

PEG_M_RXP0

G28 G27

PCIE_CALRN

AF25

PCIE_CALRP

AE25

AE23

NC

AH30

NC

C1077 0.1U_0402_16V7KC1077 0.1U_0402_16V7K

1 2

C1078 0.1U_0402_16V7KC1078 0.1U_0402_16V7K

1 2

C1079 0.1U_0402_16V7KC1079 0.1U_0402_16V7K

1 2

C1080 0.1U_0402_16V7KC1080 0.1U_0402_16V7K

1 2

C1081 0.1U_0402_16V7KC1081 0.1U_0402_16V7K

1 2

C1082 0.1U_0402_16V7KC1082 0.1U_0402_16V7K

1 2

C1083 0.1U_0402_16V7KC1083 0.1U_0402_16V7K

1 2

C1084 0.1U_0402_16V7KC1084 0.1U_0402_16V7K

1 2

C1085 0.1U_0402_16V7KC1085 0.1U_0402_16V7K

1 2

C1086 0.1U_0402_16V7KC1086 0.1U_0402_16V7K

1 2

C1087 0.1U_0402_16V7KC1087 0.1U_0402_16V7K

1 2

C1088 0.1U_0402_16V7KC1088 0.1U_0402_16V7K

1 2

C1089 0.1U_0402_16V7KC1089 0.1U_0402_16V7K

1 2

C1090 0.1U_0402_16V7KC1090 0.1U_0402_16V7K

1 2

C1091 0.1U_0402_16V7KC1091 0.1U_0402_16V7K

1 2

C1092 0.1U_0402_16V7KC1092 0.1U_0402_16V7K

1 2

C1093 0.1U_0402_16V7KC1093 0.1U_0402_16V7K

1 2

C1094 0.1U_0402_16V7KC1094 0.1U_0402_16V7K

1 2

C1095 0.1U_0402_16V7KC1095 0.1U_0402_16V7K

1 2

C1096 0.1U_0402_16V7KC1096 0.1U_0402_16V7K

1 2

C1097 0.1U_0402_16V7KC1097 0.1U_0402_16V7K

1 2

C1098 0.1U_0402_16V7KC1098 0.1U_0402_16V7K

1 2

C1099 0.1U_0402_16V7KC1099 0.1U_0402_16V7K

1 2

C1100 0.1U_0402_16V7KC1100 0.1U_0402_16V7K

1 2

C1101 0.1U_0402_16V7KC1101 0.1U_0402_16V7K

1 2

C1102 0.1U_0402_16V7KC1102 0.1U_0402_16V7K

1 2

C1103 0.1U_0402_16V7KC1103 0.1U_0402_16V7K

1 2

C1104 0.1U_0402_16V7KC1104 0.1U_0402_16V7K

1 2

C1105 0.1U_0402_16V7KC1105 0.1U_0402_16V7K

1 2

C1106 0.1U_0402_16V7KC1106 0.1U_0402_16V7K

1 2

C1107 0.1U_0402_16V7KC1107 0.1U_0402_16V7K

1 2

C1108 0.1U_0402_16V7KC1108 0.1U_0402_16V7K

1 2

R1057 2K_0402_1%R1057 2K_0402_1%

1 2

R1058

1 2

1.27K_0402_1%

PCIE_CALRN/P==W/S=5mil/10mil

+1.1VS

PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7

PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5

PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_N1

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0

PCIE LANE REVERSALPCIE LANE REVERSAL

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

15 54Friday, February 13, 2009

1

of

F

5

BLM18PG121SN1D_0603

+VGA_CORE

D D

+1.8VS

C C

+1.1VS

+1.8VS

12

R1071

R1071 499_0402_1%

499_0402_1%

12

R1072

R1072 249_0402_1%

249_0402_1%

B B

L97

BLM18PG121SN1D_0603

L100

10U_0603_6.3V6M

BLM18PG121SN1D_0603

+1.8VS

10U_0603_6.3V6M

BLM18PG121SN1D_0603

R1063

10U_0603_6.3V6M

+VGA_VREF

1

C1151

0.1U_0402_16V4Z

2

+3.3V_DELAY

R1059

SI: Per EMI request add SSC chip

Spread spectrum

27M_OUT

R1164

0_0402_5%

1 2

27M_CLK<22>

A A

27MCLK

@ Y8

@

4

GND

1

IN

1

27MHz_16PF_6P27000126

CV2

@ CV2

@

2

22P_0402_50V8J

OUT GND

Y8

12

C1112

10U_0603_4V6M

0.1U_0402_16V4Z

12

1

C1124

2

12

1

C1133

2

12

1

C1136

2

ENBKL<40>

+3.3V_DELAY

VGA_PWRSEL<51>

27M_SSC<22>

U4

@U4

@

1

REFOUT

2

XOUT XIN3VDD

ASM3P2872A

3 2

1U_0402_6.3V4Z

1

C1113

2

1

C1125

2

0.1U_0402_16V4Z

1

C1134

2

0.1U_0402_16V4Z

1

C1137

2

VSS

MODOUT

@C1273

@

0.1U_0402_16V4Z

27M_OUT

XTALOUT

1

CV1

@ CV1

@

22P_0402_50V8J

2

5

+MPVDD

1

C1114

2

0.1U_0402_16V4Z

+DPLL_PVDD

1

C1126

C1126 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+PCIE_PVDD

1

C1135

C1135 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+DPLL_VDDC

1

C1138

C1138 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

R1066

12

10K_0402_5%

R1067

@R1067

@

12

10K_0402_5%

1 2

R11620_0402_5%R11620_0402_5%

SCS#_GPIO22<21>

12

R106910K_0402_5% R106910K_0402_5%

6 5

R1163 33_0402_5%@R1163 33_0402_5%@

4

C1273

VGA input level is 1.8V

1 2

1

@C1274

@

2

R1074

27M_SSC_R

C1274 1U_0402_6.3V4Z

1U_0402_6.3V4Z

75_0402_1%

1 2

R1074

THM_ALERT#<21>

12

R106810K_0402_5%@ R106810K_0402_5%@

R1070 1K_0402_5%R1070 1K_0402_5%

+3VS

1 2

PSYNC<21>

VRAM_ID0<21> VRAM_ID1<21> VRAM_ID2<21> VRAM_ID3<21>

GPIO0<21> GPIO1<21>

GPIO4<21> GPIO5<21> GPIO6<21>

SOUT_GPIO8<21>

SIN_GPIO9<21>

SCLK<21> GPIO11<21> GPIO12<21> GPIO13<21>

12

52mA

68mA

230mA

80mA

27MCLK

R1075

R1075 100_0402_5%

100_0402_5%

27M_SSC_R

VGA_CTF

VGA_CLKREQ#

T47 PADT47 PAD T48 PADT48 PAD T49 PADT49 PAD T50 PADT50 PAD

T51 PADT51 PAD T52 PADT52 PAD

+DPLL_PVDD

+PCIE_PVDD

+MPVDD

+DPLL_VDDC

R1076

1K_0402_5%

+VGA_VREF

XTALOUT

12

R1076

4

U5B

AJ4

TXCM_DPA0P

AJ5

TXCP_DPA0N

AL5

TX0M_DPA1P

AK5

TX0P_DPA1N

AL6

TX1M_DPA2P

AK6

TX1P_DPA2N

AK8

TX2M_DPA3P

AL8

TX2P_DPA3N

AD9

DVALID

AE7

PSYNC_NEW

AK4

DVPCNTL_MVP_0

AL3

DVPCNTL_MVP_1

V2

DVPCNTL_0

V1

DVPCNTL_1

W3

DVPCNTL_2

W1

DVPCLK

Y1

DVPDATA_0

Y2

DVPDATA_1

Y3

DVPDATA_2

AA2

DVPDATA_3

AA3

DVPDATA_4

AB1

DVPDATA_5

AB2

DVPDATA_6

AB3

DVPDATA_7

AC1

DVPDATA_8

AC3

DVPDATA_9

AD1

DVPDATA_10

AD2

DVPDATA_11

AD3

DVPDATA_12

AF3

DVPDATA_13

AG3

DVPDATA_14

AH3

DVPDATA_15

AG1

DVPDATA_16

AH2

DVPDATA_17

AH1

DVPDATA_18

AJ3

DVPDATA_19

AJ1

DVPDATA_20

AJ2

DVPDATA_21

AK2

DVPDATA_22

AK3

DVPDATA_23

Y4

GPIO_0

V3

GPIO_1

V4

GPIO_2

V5

GPIO_3

U3

GPIO_4

U2

GPIO_5

T4

GPIO_6

T5

GPIO_7_BLON

T7

GPIO_8_ROMSO

T8

GPIO_9_ROMSI

R1

GPIO_10_ROMSCK

R2

GPIO_11

R3

GPIO_12

P1

GPIO_13

P3

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

N2

GPIO_16_SSIN

P4

GPIO_17_THERMAL_INT

P7

GPIO_18_HPD3

P8

GPIO_19_CTF

P5

GPIO_20_PWRCNTL_1

V7

GPIO_21_BB_EN

N3

GPIO_22_ROMCSB

Y5

GPIO_23_CLKREQB

M4

GPIO_24_JMODE

M5

GPIO_25_TDI

M7

GPIO_26_TCK

M8

GPIO_27_TMS

L8

GPIO_28_TDO

Y8

GEN_A

Y7

GEN_B

V8

GEN_C

AH6

GEN_D_HPD4

AG6

GEN_E

AC11

VREFG

AH12

DPLL_PVDD

AG12

DPLL_PVSS

AH31

PCIE_PVDD

A9

MPVDD

B9

MPVSS

AE12

DPLL_VDDC

AJ31

XTALIN

AJ30

XTALOUT

AH26

TESTEN

AD12

PLLTEST

216-0707001-00/M82-S_BGA632

4

PART 2 OF 6

INTEGRATED

INTEGRATED TMDS/DP PORT

TMDS/DP PORT

EXT TMDS

EXT TMDS DVO

DVO

GENERAL

GENERAL PURPOSE

PURPOSE I/O

I/O

PLL &

PLL & XTAL

XTAL

TEST

3

polarity swap for ATI commond

DPA_PVDD DPA_PVSS

DPB_PVDD

DPB_PVSS

DPA_VDDR DPA_VDDR

DPB_VDDR DPB_VDDR

DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR

DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR

DPA_VSSR

DP_CALR

HPD1

HSYNC VSYNC

RSET AVDD

AVSSQ VDD1DI VSS1DI

COMP

V2SYNC H2SYNC

A2VDD

A2VDDQ A2VSSQ

VDD2DI VSS2DI

R2SET

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

TS_FDO

DPLUS

DMINUS

AK9 AL9

AJ9 AJ10

AL10 AK10

AL11 AK11

40mA

+1.8VS_DPA

AL7 AK7

+1.8VS_DPB

AE11 AF11

AJ12 AJ13

AK13 AL13

AL12 AK12 AJ11 AH9 AH11

AJ8 AF7 AG7 AJ7 AH7

AG11 AA8 AL28

R

AK28

RB

AL27

G

AK27

GB

AL26

B

AK26

BB

AK29 AK30

AJ28

1 2

R1065 499_0402_1%R1065 499_0402_1%

AL29 AH28 AJ27 AJ26 AL17

R2

AK17

R2B

AL15

G2

AK15

G2B

AL14

B2

AK14

B2B

AJ17

C

AJ15

Y

AJ14 AE16

AF16 AH14 AH16 AG16 AF18 AE18 AG14

1 2

R1073 715_0402_1%R1073 715_0402_1%

AA5

SCL

AA4

SDA

AJ29 AH29

AC5 AC4

AF4 AH4

AF9 AG9

AE14 AE5

AE4

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R1060 150_0402_1% R1060 150_0402_1%

1 2

RED

GREEN

BLUE

+A2VDD +A2VDDQ

Issued Date

1U_0402_6.3V4Z

1

2

0.1U_0402_16V4Z

CRT_HSYNC <14,21,23> CRT_VSYNC <14,23>

LCD_DDC_CLK <24>

VGA_DDC_DAT <23> VGA_DDC_CLK <23>

HDMIDAT_VGA <25> HDMICLK_VGA <25>

D+ <21> D- <21>

3

TXCM_DPB0P TXCP_DPB0N

TX0M_DPB1P

TX0P_DPB1N

TX1M_DPB2P

TX1P_DPB2N

TX2M_DPB3P

TX2P_DPB3N

DAC1 / CRT

DAC2 (TV/CRT2)

SERIAL

SERIAL BUSES

BUSES

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP

DDC4DATA_DP4_AUXN

DDC4CLK_DP4_AUXP

THERMAL

+1.8VS

1 2

L96

BLM18PG121SN1D_0603

+1.8VS

L99

12

1U_0402_6.3V4Z

1

C11210.1U_0402_16V4Z C11210.1U_0402_16V4Z

2

1U_0402_6.3V4Z

1

C11270.1U_0402_16V4Z C11270.1U_0402_16V4Z

2

RED GREEN BLUE

1

C1148

2

BLM18PG121SN1D_0603

10U_0603_6.3V6M

1 2

L98

BLM18PG121SN1D_0603

10U_0603_6.3V6M

+1.8VS

200mA

1

C1123

C1122

2

10U_0603_6.3V6M

200mA

1

C1128

C1129

2

10U_0603_6.3V6M

1 2

R1061 150_0402_1%@R1061 150_0402_1%@

1 2

R1062 150_0402_1%@R1062 150_0402_1%@

1 2

R1064 150_0402_1%@R1064 150_0402_1%@

100mA

1

C1142

C1143

2

0.1U_0402_16V4Z

100mA

L107 0_0603_5%

1

C1150

C1149

2

1U_0402_6.3V4Z@

0.1U_0402_16V4Z@

TMDS_B_CLK# <25> TMDS_B_CLK <25>

TMDS_B_DATA0# <25> TMDS_B_DATA0 <25>

TMDS_B_DATA1# <25> TMDS_B_DATA1 <25>

TMDS_B_DATA2# <25> TMDS_B_DATA2 <25>

1

C1119

C1118

LCD_DDC_DAT <24>

2

HPD <25> RED <23>

GREEN <23>

BLUE <23>

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603 C1120

C1120 10U_0603_6.3V6M

10U_0603_6.3V6M

+DPA_VDDR

+DPB_VDDR

+AVDD

+VDD1DI

1U_0402_6.3V4Z

48mA

1

2

10U_0603_6.3V6M@

LCD

CRT HDMI

thermal

D+/D-=others 20mil/10mil/10mil/10mil/others 20mil

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

2

1U_0402_6.3V4Z

1

C1109

2

1U_0402_6.3V4Z

1

C1115

2

L101

BLM18PG121SN1D_0603

L102

BLM18PG121SN1D_0603

1

C1144

C1144 10U_0603_6.3V6M

10U_0603_6.3V6M

2

12

+1.8VS

2

1

C1110

2

0.1U_0402_16V4Z

1

C1116

2

0.1U_0402_16V4Z

12

+1.1VS

12

+1.1VS

L105

BLM18PG121SN1D_0603

10U_0603_6.3V6M@

1

C1145

2

0.1U_0402_16V4Z@

+LVDDR

C1111

+LVDDC

C1117

12

1

C1146

2

1

U5F

PART 6 OF 6

AF20

LVDDR

AG20

LVDDR

AJ18

LVDDC

AH20

LVDDC

AF23

LVSSR

AF21

LVSSR

AL18

LVSSR

AJ22

LVSSR

AJ25

LVSSR

AK18

LVSSR

AK23

LVSSR

AK25

LVSSR

AJ21

LVSSR

AL23

LVSSR

AL25

LVSSR

AG18

LPVDD

AH18

LPVSS

216-0707001-00/M82-S_BGA632

1

C1130

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C1147

C1147 1U_0402_6.3V4Z@

1U_0402_6.3V4Z@

Title

Size Document Number Rev

Date: Sheet

Control

LVDS channel

10U_0603_6.3V6M

1

C1131

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

C256

2

1

C1139

2

L106 0_0603_5%

12

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

VARY_BL

DIGON

TXCLK_UP TXCLK_UN

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP

TXCLK_LN TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

+LPVDD

1

C1132

2

BLM18PG121SN1D_0603

C255

1

C1140

10U_0603_6.3V6M

2

0.1U_0402_16V4Z

+3.3V_DELAY

AA7 AC6

AD21 AE21 AJ24 AJ23 AK24 AL24 AG21 AH21 AG23 AH23

AL19 AK19 AJ20 AJ19 AK20 AL20 AK21 AL21 AK22 AL22

BLM18PG121SN1D_0603

L114

C1141

1

40mA

+1.8VS

320mA

80mA

1U_0402_6.3V4Z

+1.8VS_DPB

1

2

R299 10K_0402_5%R299 10K_0402_5%

12

VGA_PWM <24> VGA_ENVDD <24>

LVDS_BCLK+ <24> LVDS_BCLK- <24> LVDS_B0+ <24> LVDS_B0- <24> LVDS_B1+ <24> LVDS_B1- <24> LVDS_B2+ <24> LVDS_B2- <24>

LVDS_ACLK+ <24> LVDS_ACLK- <24> LVDS_A0+ <24> LVDS_A0- <24> LVDS_A1+ <24> LVDS_A1- <24> LVDS_A2+ <24> LVDS_A2- <24>

12

+1.8VS

L103

12

+1.8VS

12

L104

BLM18PG121SN1D_0603

of

16 54Friday, February 13, 2009

of

16 54Friday, February 13, 2009

of

16 54Friday, February 13, 2009

+1.8VS

F

5

MDA[63..32]<20>

D D

MDA[31..0]<19>

MDA[63..32] MDA[31..0]

C C

+1.8VS

12

R1077

100_0402_1%

+VDD_MEM18_REFD

1

12

C1152

0.1U_0402_16V4Z

R1078

100_0402_1%

B B

0.1U_0402_16V4Z

2

100_0402_1%

R1082

+1.8VS

12

+VDD_MEM18_REFS

R1079

4.7K_0402_5%

12

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

12

R1081

4.7K_0402_5%

4

U5C

E29 E30 E31 D31 C29 B29 B30 A29 E26 D26 E25 D25 G23 G21 E21 D21 C28 B28 B27 A27 C25 A25 C24 B24 C23 B23 A23 B22 C20 B20 A20 C19

C8 C7

B7 A7 A5

C4

B4 A3

G9

E9 D9 G7 G5

F5 G4

F4

B3

B2 C2 C1

E3

F3

F2

F1 G2 G1 H3 H2

K2

L3

L2

L1

F30 F31

L5

L7

J7

216-0707001-00/M82-S_BGA632

12

R1083

R1083 240_0402_1%

240_0402_1%

DQ_0 DQ_1 DQ_2 DQ_3 DQ_4

MEMORY

DQ_5

INTERFACE

DQ_6 DQ_7 DQ_8 DQ_9 DQ_10 DQ_11 DQ_12 DQ_13 DQ_14 DQ_15 DQ_16 DQ_17 DQ_18 DQ_19 DQ_20 DQ_21 DQ_22 DQ_23 DQ_24 DQ_25 DQ_26 DQ_27 DQ_28 DQ_29 DQ_30 DQ_31 DQ_32 DQ_33 DQ_34 DQ_35 DQ_36 DQ_37 DQ_38 DQ_39 DQ_40 DQ_41 DQ_42 DQ_43 DQ_44 DQ_45 DQ_46 DQ_47 DQ_48 DQ_49 DQ_50 DQ_51 DQ_52 DQ_53 DQ_54 DQ_55 DQ_56 DQ_57 DQ_58 DQ_59 DQ_60 DQ_61 DQ_62 DQ_63

MVREFD MVREFS

TEST_MCLK TEST_YCLK MEMTEST

Part 3 of 6

MA_0 MA_1 MA_2 MA_3 MA_4 MA_5 MA_6 MA_7 MA_8

MA_9 MA_10 MA_11

MA_BA0 MA_BA1 MA_A12 MA_BA2

DQMB_0 DQMB_1 DQMB_2 DQMB_3 DQMB_4 DQMB_5 DQMB_6 DQMB_7

QS_0 QS_1 QS_2 QS_3 QS_4 QS_5 QS_6 QS_7

QS_0B QS_1B QS_2B QS_3B QS_4B QS_5B QS_6B

write strobe read strobe

QS_7B

ODT0

ODT1

CLK0 CLK1

CLK0B CLK1B

RAS0B RAS1B

CAS0B CAS1B

CS0B_0 CS0B_1

CS1B_0 CS1B_1

CKE0 CKE1

WE0B WE1B

DRAM_RST

B14 A14 B13 E14 B17 A17 C15 G16 E16 C14 A12 B12 C12 D14 B15 G14

D30 G25 C26 C21 C5 D6 D2 K3

C30 D23 B26 B21 B6 E7 E2 J2

C31 E23 A26 A21 A6 D7 E1 J1

E20 C11

A18 A11

B18 B11

G20 D12

D20 E12

E18 G18

G11 E11

D18 G12

D16 C10

J5

R1080

4.7K_0402_5%

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 BA0 BA1 MAA12 BA2

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

ODTA0 ODTA1

CLKA0 CLKA1

CLKA0# CLKA1#

RASA#0 RASA#1

CASA#0 CASA#1

CSA0#

CSA1#

CKEA0 CKEA1

WEA#0 WEA#1

12

3

MAA[12..0] BA[2..0]

DQMA#[3..0] <19>

DQMA#[7..4] <20>

QSA[3..0] <19>

QSA[7..4] <20>

QSA#[3..0] <19>

QSA#[7..4] <20>

ODTA0 <19> ODTA1 <20>

CLKA0 <19> CLKA1 <20>

CLKA0# <19> CLKA1# <20>

RASA#0 <19> RASA#1 <20>

CASA#0 <19> CASA#1 <20>

CSA0# <19>

CSA1# <20>

CKEA0 <19> CKEA1 <20>

WEA#0 <19> WEA#1 <20>

MAA[12..0] <19,20>

BA[2..0] <19,20>

2

1

12

R1084

100_0402_1%

A A

5

1

C1153

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

17 54Friday, February 13, 2009

1

F

of

5

U5E

AA26

PCIE_VSS

AA29

PCIE_VSS

AC26

PCIE_VSS

AD31

PCIE_VSS

AE29

PCIE_VSS

AE30

PCIE_VSS

AE31

PCIE_VSS

F28

PCIE_VSS

G26

D D

C C

B B

PCIE_VSS

G29

PCIE_VSS

G30

PCIE_VSS

G31

PCIE_VSS

H29

PCIE_VSS

J25

PCIE_VSS

J26

PCIE_VSS

L26

PCIE_VSS

L29

PCIE_VSS

L30

PCIE_VSS

L31

PCIE_VSS

M26

PCIE_VSS

M29

PCIE_VSS

P26

PCIE_VSS

R29

PCIE_VSS

R30

PCIE_VSS

R31

PCIE_VSS

T26

PCIE_VSS

U29

PCIE_VSS

V26

PCIE_VSS

Y26

PCIE_VSS

Y29

PCIE_VSS

Y30

PCIE_VSS

Y31

PCIE_VSS

A13

VSS

A2

VSS

C18

VSS

A24

VSS

A30

VSS

AA1

VSS

AA11

VSS

AA14

VSS

AA17

VSS

AA20

VSS

AA6

VSS

AC2

VSS

AC7

VSS

AE3

VSS

AL4

VSS

AD14

VSS

AF12

VSS

AF14

VSS

AD16

VSS

AD18

VSS

AE6

VSS

AG2

VSS

AE9

VSS

AH25

VSS

AK1

VSS

AK31

VSS

AJ6

VSS

AL2

VSS

AL30

VSS

B1

VSS

C13

VSS

216-0707001-00/M82-S_BGA632

Part 5 of 6

PCI-Express GND

CORE GND

1.1VS_POK

B25

VSS

J8

VSS

B5

VSS

D11

VSS

C17

VSS

C22

VSS

C27

VSS

D29

VSS

C3

VSS

C6

VSS

D3

VSS

D28

VSS

F29

VSS

D4

VSS

F11

VSS

F12

VSS

F14

VSS

F16

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F25

VSS

F7

VSS

F9

VSS

G3

VSS

G6

VSS

H23

VSS

J3

VSS

J4

VSS

J6

VSS

K1

VSS

L12

VSS

L15

VSS

L18

VSS

L21

VSS

L6

VSS

M11

VSS

M14

VSS

M17

VSS

M20

VSS

M6

VSS

P12

VSS

P15

VSS

P18

VSS

P21

VSS

P6

VSS

AC21

VSS

R14

VSS

R17

VSS

R20

VSS

T6

VSS

U1

VSS

U12

VSS

U15

VSS

U18

VSS

U21

VSS

AE20

VSS

V14

VSS

V17

VSS

V20

VSS

P2

VSS

V6

VSS

W2

VSS

Y12

VSS

Y15

VSS

Y18

VSS

Y21

VSS

Y6

VSS

M9

VSS

SUSP<43,49>

+3VS

+1.8VS

1 2

R1088 4.7K_0402_5%R1088 4.7K_0402_5%

4

BLM18PG121SN1D_0603

L110

10U_0603_6.3V6M

100mA

10U_0603_6.3V6M

2.46A

+1.8VS

+3.3V_DELAY

SI2301BDS_SOT23

R1086

12

330K_0402_5%@

1 2

R1087 0_0402_5%R1087 0_0402_5%

2.46A

12

1

C1181

2

1U_0402_6.3V4Z

Q170

1 3

1

C1214

2

0.01U_0402_25V7K

@

+1.8VS

1U_0402_6.3V4Z

1

C1189

2

1

C1203

2

1U_0402_6.3V4Z

D

2

13

D

2

G

S

1

2

10U_0603_6.3V6M

1

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

C1182

2

1

C1190

2

1U_0402_6.3V4Z

10U_0603_6.3V6M

1

C1204

2

S

G

1 2

Q171

Q171 2N7002_SOT23-3

2N7002_SOT23-3

10U_0603_6.3V6M

1

C1157

2

1U_0402_6.3V4Z

1

C1161

2

1U_0402_6.3V4Z

1

C1171

2

C1183

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

C1191

2

1

C1205

2

1U_0402_6.3V4Z

Back Bias Disable

+3VS

R1085

R1085 100K_0402_5%

100K_0402_5%

1

C1158

2

10U_0603_6.3V6M

1

C1162

2

1U_0402_6.3V4Z

1

C1172

2

1U_0402_6.3V4Z

+VDD_CT

2

1

C1192

2

1

C1206

2

+VGA_CORE

10U_0603_6.3V6M

1

C1159

2

1U_0402_6.3V4Z

1

C1163

2

1U_0402_6.3V4Z

1

C1173

2

1

C1207

0.1U_0402_16V4Z

2

1

C1212

2

1U_0402_6.3V4Z

3

C1160

C1164

C1174

64mA

+VDD_MEM_CLK0 +VDD_MEM_CLK1

120mA

1

C1213

2

1U_0402_6.3V4Z

U5D

A15

VDDR1

A22

VDDR1

A28

VDDR1

A4

VDDR1

A8

VDDR1

B8

VDDR1

C9

VDDR1

D1

VDDR1

H1

VDDR1

H11

VDDR1

H12

VDDR1

H14

VDDR1

H16

VDDR1

H18

VDDR1

H20

VDDR1

H21

VDDR1

B31

VDDR1

M1

VDDR1

AA9

VDD_CT

Y9

VDD_CT

V9

VDD_CT

T9

VDD_CT

J11

VDD_CT

J20

VDD_CT

J21

VDD_CT

L9

VDD_CT

AC18

VDDR3

AC16

VDDR3

AC14

VDDR3

AC12

VDDR3

AF1

VDDR4

AF2

VDDR4

AE1

VDDR5

AE2

VDDR5

M2

NC

M3

NC

L4

NC

AD11

NC

A10

VDDRH

A19

VDDRH

B10

VSSRH

B19

VSSRH

V11

BBN

U11

BBN

R11

BBP

P11

BBP

216-0707001-00/M82-S_BGA632

PART 4 OF 6

I/O Internal

Memory

I/O

Clock

Memory

I/O

Clock

Memory I/O

P

P O

O W

W E

E R

R

Back Bias

PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

PCI-Express

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

Core

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDCI VDDCI VDDCI VDDCI

2

AF30 AF31 AF29 AF27 AF28 AG29 AG30 AG31

AA23 AC24 AC25 AE26 AE27 AE28 L23 M23 P23 T23 V23 Y23

L11 L14 L17 L20 M12 M15 M18 M21 AC20 P14 P17 P20 R12 R15 R18 R21 AD20 U14 U17 U20 V12 V15 V18 V21 Y11 Y14 Y17 Y20 AA12 AA15 AA18 AA21 P9

J12 J14 J16 J18

+VGA_PCIE_VDDR

10U_0603_6.3V6M

+VGA_PCIE_VDDC

10U_0603_6.3V6M

+VDDCI

1U_0402_6.3V4Z

1

C1165

2

1U_0402_6.3V4Z

1

C1176

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

C1184

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

C1193

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

C1198

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

C1208

2

1U_0402_6.3V4Z

1

C1154

2

1U_0402_6.3V4Z

1

C1166

2

1U_0402_6.3V4Z

1

C1177

2

1

C1185

2

1

C1194

2

1

C1199

2

1

C1209

2

1

C1155

2

0.1U_0402_16V4Z

1

C1167

2

1

C1178

2

1U_0402_6.3V4Z

1

C1186

2

1U_0402_6.3V4Z

1

C1195

2

1U_0402_6.3V4Z

1

C1200

2

1U_0402_6.3V4Z

1

C1210

2

BLM18PG121SN1D_0603

1 2

1

C1156

2

0.1U_0402_16V4Z

1.36A

1

C1169

C1168

2

1U_0402_6.3V4Z

1

C1179

2

1U_0402_6.3V4Z

1

C1187

2

1U_0402_6.3V4Z

1

C1196

2

1U_0402_6.3V4Z

1

C1201

2

1U_0402_6.3V4Z

BLM18PG121SN1D_0603

1

C1211

2

10U_0603_6.3V6M

1

L108

0.5A

BLM18PG121SN1D_0603

1 2

1

C1170

2

1U_0402_6.3V4Z

1

C1180

2

1U_0402_6.3V4Z

1

C1188

2

1U_0402_6.3V4Z

1

C1197

2

1U_0402_6.3V4Z

1

C1202

2

L111

L109

12

1

+

2

+1.8VS

+1.1VS

15A

C1175

C1175 220U_Y_4VM

220U_Y_4VM

+VGA_CORE

+1.8VS +VDD_MEM_CLK0

12

L112

BLM18PG121SN1D_0603

10U_0603_6.3V6M

A A

L113

BLM18PG121SN1D_0603

5

BLM18PG121SN1D_0603

10U_0603_6.3V6M

1

C1215

2

1U_0402_6.3V4Z

12

1

C1218

2

C1217

C1219

1U_0402_6.3V4Z

1

2

1

2

4

2

C1216

1

0.1U_0402_16V4Z

+VDD_MEM_CLK1

2

C1220

1

0.1U_0402_16V4Z

1.1A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

1

of

18 54Friday, February 13, 2009

of

18 54Friday, February 13, 2009

of

18 54Friday, February 13, 2009

F

5

U6

BA0 BA1

MAA12 MAA11

D D

+1.8VS

C C

R1091

4.99K_0402_1%

R1089

12

1

C1225

0.1U_0402_16V4Z

2

MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA0# CLKA0

CKEA0

CSA0# WEA#0 RASA#0 CASA#0 DQMA#2

DQMA#0

ODTA0

QSA2 QSA#2

QSA0 QSA#0

+VRAM_REF1

SA00002A600(QIMONDA) S IC D2 32M16/500 HYB18T512161B2F-20 84P

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

0.1U_0402_16V4Z

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

4

MDA1 MDA6 MDA3 MDA4 MDA5 MDA0 MDA7 MDA2 MDA19 MDA21 MDA16 MDA22 MDA23 MDA17 MDA20 MDA18

1

2

3

U7

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

+1.8VS +1.8VS

1

C1222

C1221

2

1U_0402_6.3V4Z

4.99K_0402_1%

12

R1092

+1.8VS

R1090

12

1

C1226

0.1U_0402_16V4Z

2

CLKA0# CLKA0

CKEA0

CSA0# WEA#0 RASA#0 CASA#0 DQMA#1

DQMA#3

ODTA0

QSA1 QSA#1

QSA3 QSA#3

+VRAM_REF2

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

MDA29 MDA27 MDA31 MDA24 MDA26 MDA28 MDA25 MDA30 MDA14 MDA9 MDA12 MDA8 MDA10 MDA15 MDA11 MDA13

0.1U_0402_16V4Z

1

C1223

2

1

C1224

2

1U_0402_6.3V4Z

1

R1093

BA[2..0] QSA[7..0] QSA#[7..0]

DQMA#[7..0]

MAA[12..0]

MDA[63..0]

ODTA0

CKEA0 RASA#0 CASA#0

WEA#0

CSA0#

12

1

C1227

C1227 470P_0402_50V7K

470P_0402_50V7K

2

CLKA0 CLKA0#

R1094

R1094 56_0402_5%

56_0402_5%

BA[2..0]<17,20>

QSA[7..0]<17,20> QSA#[7..0]<17,20>

DQMA#[7..0]<17,20>

MAA[12..0]<17,20>

MDA[63..0]<17,20>

ODTA0<17> CKEA0<17> RASA#0<17> CASA#0<17> WEA#0<17> CSA0#<17>

CLKA0<17> CLKA0#<17>

56_0402_5%

SA00002AJ10(SAMSUNG) IC D2 32M16/500 K4N51163QG-HC20 FBGA84

+1.8VS

10U_0603_6.3V6M

1

B B

A A

C1229

10U_0603_6.3V6M

1

C1230

2

1

C1231

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C1232

2

1

C1233

2

0.1U_0402_16V4Z

1

C1234

2

C1235

0.1U_0402_16V4Z

5

1

C1236

2

0.01U_0402_16V7K

1

2

4

1

+

C1228

C1228 220U_6.3VM_R15

220U_6.3VM_R15

2

@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VS

C1237

10U_0603_6.3V6M

Issued Date

3

0.1U_0402_16V4Z

1

C1239

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C1240

C1241

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

1

2

10U_0603_6.3V6M

1

C1238

2

2007/10/11 200810/11

0.1U_0402_16V4Z

1

C1242

2

1

C1243

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C1244

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

1

19 54Friday, February 13, 2009

of

F

5

U8

BA0 BA1

MAA12 MAA11 MAA10

D D

+1.8VS

12

R1095

C C

4.99K_0402_1%

12

R1097

R1095

1

C1249

0.1U_0402_16V4Z

2

MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

ODTA1

QSA5 QSA#5

QSA#4

+VRAM_REF3

U8

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

4

MDA36

B9

MDA35

B1

MDA39

D9

MDA32

D1

MDA33

D3

MDA38

D7

MDA34

C2

MDA37

C8

MDA45

F9

MDA43

F1

MDA46

H9 H1

MDA41 MDA52

H3

MDA44

H7

MDA42 MDA54

G2

MDA47

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

0.1U_0402_16V4Z

1

2

C1245

+1.8VS

1

C1246

2

1U_0402_6.3V4Z

4.99K_0402_1%

12

R1098

+1.8VS

R1096

12

1

C1250

0.1U_0402_16V4Z

2

3

U9

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

DQMA#6DQMA#5 DQMA#7DQMA#4

ODTA1

QSA6 QSA#6

QSA7QSA4 QSA#7

+VRAM_REF4

U9

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

MDA58 MDA59 MDA61 MDA56 MDA63 MDA62 MDA57 MDA60 MDA50 MDA53 MDA48 MDA55MDA40

MDA49 MDA51

0.1U_0402_16V4Z

1

C1247

2

+1.8VS

+1.8VS+1.8VS

1

C1248

2

1U_0402_6.3V4Z

1

BA[2..0]<17,19> DQMA#[7..0]<17,19> MAA[12..0]<17,19>

QSA#[7..0]<17,19> QSA[7..0]<17,19>

MDA[63..0]<17,19>

ODTA1<17> CKEA1<17> RASA#1<17> CASA#1<17> WEA#1<17> CSA1#<17>

CLKA1<17> CLKA1#<17>

R1099

56_0402_5%

CLKA1 CLKA1#

12

R1100

R1100 56_0402_5%

56_0402_5%

BA[2..0]

DQMA#[7..0]

MAA[12..0] QSA#[7..0]

QSA[7..0]

MDA[63..0]

ODTA1

CKEA1 RASA#1 CASA#1

WEA#1

CSA1#

1

C1251

C1251 470P_0402_50V7K

470P_0402_50V7K

+1.8VS +1.8VS

10U_0603_6.3V6M

1

B B

10U_0603_6.3V6M

A A

C1252

1

C1253

2

1

C1254

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C1255

2

5

1

C1256

2

0.1U_0402_16V4Z

1

C1257

2

1

C1258

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C1259

2

4

C1260

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0603_6.3V6M

1

C1261

2

2007/10/11 200810/11

1

C1262

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C1264

C1263

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

1

2

0.1U_0402_16V4Z

1

C1265

2

1

C1266

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C1267

2

Title

Size Document Number Rev

Date: Sheet

2

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

1

20 54Friday, February 13, 2009

F

of

+3.3V_DELAY

D D

5

@

R110110K_0402_5%

12

@

R110210K_0402_5%

12

@

R110310K_0402_5%

12

@

R110410K_0402_5%

12

@

R110510K_0402_5%

12

SOUT_GPIO8

R110610K_0402_5%

12

@

SIN_GPIO9

R110710K_0402_5%

12

GPIO0 <16> GPIO1 <16>

GPIO4 <16>

GPIO5 <16>

GPIO6 <16>

SOUT_GPIO8 <16>

SIN_GPIO9 <16>

GPIO9 = 0 (BIOS_ROM_EN = 0)

R110810K_0402_5% R110810K_0402_5%

12

@

R110910K_0402_5%

12

@

R111010K_0402_5%

12

@

SCS#_GPIO22

R111110K_0402_5%

12

GPIO11 <16> GPIO12 <16> GPIO13 <16>

GPIO[13:11]

0 0 0 0 0 1 0 1 0 1 0 0

4

MEMORY SIZE

128MB 256MB 64MB 512MB

3

STRAPS

TX_PWRS_ENB

TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLES

GPIO0

GPIO1

GPIO4

GPIO5BIF_GEN2_EN_A

GPIO6DEBUG_ I2C_ENABLE

DESCRIPTION OF RECOMMENDED SETTING

PCIE FULL TX OUTPUT SWING

DEBUG SIGNALS MUXED OUTBIF_DEBUG_ACCESS

PCI-E 5.0GT/s or 2.5 GT/s select

Internal use only

BIF_AUDIO_EN GPIO8 ENABLE HD AUDIO(M8X)

ROMIDCFG[3:0]

BIOS_ROM EN

GPIO [9,13,12,11]

GPIO_22_ROMCSB

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

DISABLE EXTERNAL BIOS ROM

RECOMMENDED M8X

0

1

0 1 0 1

0

2

1

VRAM_ID 3 ,2 ,1 ,0

U11

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

M25P10-AVMN6T_SO8~D@

Deciphered Date

0

1

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0Qimonda 32Mx16 1.8V

0 1 0 1

Q

VSS

2

4

3`rd

2`nd Main(Default)

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

1

21 54Friday, February 13, 2009

of

F

@

R111210K_0402_5%

1 2

R111310K_0402_5%

C C

10K_0402_5%

12

R1114

@R1114

@

1 2

R1116 10K_0402_5%@R1116 10K_0402_5%@

10K_0402_5%

12

R1117

@R1117

@

1 2

R1119 10K_0402_5%@R1119 10K_0402_5%@

10K_0402_5%

12

R1120

@R1120

@

1 2

R1122 10K_0402_5%@R1122 10K_0402_5%@

10K_0402_5%

12

R1123

@R1123

@

1 2

R1125 10K_0402_5%@R1125 10K_0402_5%@

B B

VGA Thermal Sensor ADM1032ARMZ

A A

THM_ALERT#<16>

12

+1.8VS

VRAM_ID0 <16>

+1.8VS

VRAM_ID1 <16>

+1.8VS

VRAM_ID2 <16>

+1.8VS

VRAM_ID3 <16>

Closed to U80

0.1U_0402_16V4Z

D+<16>

D-<16>

+3.3V_DELAY

C1269

1 2

2200P_0402_50V7K

R1126 4.7K_0402_5% R1126 4.7K_0402_5%

1 2

+3VS

C1268

PSYNC <16>

CRT_HSYNC <14,16,23>

2

1

U12

1

VDD

2

D+

3

DTHERM#4GND

ADM1032ARMZ REEL_MSOP8

SCLK

SDATA

ALERT#

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESE

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

8 7 6 5

SMB_EC_CK2 <6,40>

SMB_EC_DA2 <6,40>

BIF_VGA_DIS PSYNC

BIF_HDMI_EN

VRAM_ID[3:0]

HSYNC

500MHz DVPDATA (23,22,21,20)

ATI RESERVED CONFIGURATION STRAPS

GPIO2 GPIO3

GENERICC GPIO21_BB_EN

5

4

VGA ENABLED===0 is enable

HDMI ENABLE

Samsung 64Mx16 1.8V

Samsung 32Mx16 1.8V

Hynix 64Mx16 1.8V

Hynix 32Mx16 1.8V

Qimonda 64Mx16 1.8V

GPIO5 GPIO6 H2SYNC V2SYNC

GPIO_28_TDO

DVALID

FLASH ROM

SIN_GPIO9 SOUT_GPIO8

SCLK<16>

SCS#_GPIO22<16>

+3.3V_DELAY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

RV1 10K_0402_5%

@

SCLK

12

RV2

@ RV2

@

10K_0402_5%

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

A

B

C

D

E

0_0805_5%

1 2

R167

+3VS_CLK

R167

+3VS_CLK >15mil

1

C444

C444 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C445

0.1U_0402_16V4Z

2

1

C458

0.1U_0402_16V4Z

2

1

C446

0.1U_0402_16V4Z

2

1

C459

0.1U_0402_16V4Z

2

1

C447

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

1

C448

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

1

C449

0.1U_0402_16V4Z

2

1

C450

0.1U_0402_16V4Z

2

1

C451

@C451

@

1U_0402_6.3V4Z

2

+1.2V_HT >150mil +3VS >150mil

+1.2V_HT

10U_0805_10V4Z

1 1

R168

1 2

0_0805_5%

+VDDCLK_IO

R168

1

C452

2

0.1U_0402_16V4Z

+VDDCLK_IO >15mil

0.1U_0402_16V4Z

1

C454

2

0.1U_0402_16V4Z

1

C453

2

1

C455

2

0.1U_0402_16V4Z

1

C456

2

0.1U_0402_16V4Z

1

C457

2

+3VS

EMI Caps for single end clock.

CLK_48M_USB

R170 33_0402_5% R170 33_0402_5%

CLK_XTAL_IN/OUT=width /spacing/Others=10mil/10mil/20mil

2 2

SB LINK

MiniCard_1(delete)

MiniCard_2

3 3

+3VS_CLK

R179

@ R179

@

8.2K_0402_5%

1 2

SEL_SATA

R181

8.2K_0402_5%

4 4

SEL_SATA

* default

Use voltage divider resistor R379 & R380 to pull low

NB_OSC_14.318M

1 2

configure as SATA output

1

*

0

configure as normal SRC(SRC_6) output

configure as single-ended 66MHz output1

*0 configure as differential 100MHz output

* default

A

+3VS_CLK

1 2

27M_SEL

R180

8.2K_0402_5%

27M_SEL

22P_0402_50V8J

SMB_CK_CLK0<8,9,27,37> SMB_CK_DAT0<8,9,27,37>

27M_CLK<16> 27M_SSC<16>

CLK_SBLINK_BCLK#<11>

CLK_SBLINK_BCLK<11> CLK_SBSRC_BCLK# <26>

CLK_PCIE_MCARD2#<33>

CLK_PCIE_MCARD2<33>

configure as 27M and 27M_SS output

1*

configure as SRC_7 output

0

* default

1

C464

2

R1055 33_0402_5% R1055 33_0402_5%

1 2

R1056 33_0402_5% R1056 33_0402_5%

1 2

B

CLK_XTAL_OUT CLK_XTAL_IN

Y2

12

14.31818MHZ_20P_6X1430004201

1

C465

C465 22P_0402_50V8J

22P_0402_50V8J

2

+3VS_CLK

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

73

U10

GND

1

SCL

2

SDA

3

VDD_DOT

4

SRC_7#/27M

5

SRC_7/27M_SS

6

VSS_DOT

7

SRC_5#

8

SRC_5

9

SRC_4#

10

SRC_4

11

VSS_SRC

12

VDD_SRC_IO

13

SRC_3#

14

SRC_3

15

SRC_2#

16

SRC_2

17

VDD_SRC

18

VDD_SRC_IO

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R379 158_0402_1%R379 158_0402_1%

R220 33_0402_5%@R220 33_0402_5%@

SEL_SATA

NB_OSC_14.318M_R

65

64

66

XTAL_IN

VSS_REF

REF_1/SEL_SATA

REF_0/SEL_HTT66

+VDDCLK_IO

CLKREQ_LAN#

C

27M_SEL

63

REF_2/SEL_27

+3VS_CLK

1 2

+3VS_CLK

60

61

62

VDD_HTT

VDD_REF

+3VS_CLK

CLK_XTAL_OUT

CLK_XTAL_IN

CLK_48M_USB_R

67

72

69

70

71

68

VSS_48

VDD_48

48MHz_1

48MHz_0

XTAL_OUT

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_ATIG_IO28VDD_ATIG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_135SB_SRC_1#34ATIGCLK_0

Issued Date

1 2

C264 1U_0402_6.3V4ZC264 1U_0402_6.3V4Z

1 2

R174 8.2K_0402_5%

CLK_CPU_BCLK_R CLK_CPU_BCLK#_R

56

58

59

55

57

PD#

VSS_HTT

CPU_K8_0

CPU_K8_0#

HTT_0/66M_0

HTT_0#/66M_1

33

VDD_CPU

VDD_CPU_I/O

VSS_CPU CLKREQ_1# CLKREQ_2#

VDD_A

VSS_A

VSS_SATA

SRC_6/SATA

SRC_6#/SATA#

VDD_SATA CLKREQ_3# CLKREQ_4#

SB_SRC_SLOW#

SB_SRC_0

SB_SRC_0#

VDD_SB_SRC

VDD_SB_SRC_IO

SLG8SP626VTR_QFN72_10x10

SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN(XA) SA000025B10 S IC RTM880N-795-VB-GRT QFN 72P CLK GEN SA00001ZV10 S IC ICS9LPRS476BKLFT MLF 72P CLK GEN

NBGFX_CLK <11> NBGFX_CLK# <11>

CLK_PCIE_VGA <15> CLK_PCIE_VGA# <15>

CLK_PCIE_MCARD0 <34> CLK_PCIE_MCARD0# <34> CLKREQ_LAN# <32> CLK_PCIE_LAN <32> CLK_PCIE_LAN# <32>

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

CLK_48M_USB <27> NB_OSC_14.318M <11>

R380

90.9_0402_1%

CLK_14M_SIO <39> CLK_NBHT <11> CLK_NBHT# <11>

+3VS_CLK

1 2

R946 0_0402_1%

1 2

R945 0_0402_1%

54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37

+3VS_CLK +VDDCLK_IO

CLKREQ_NCARD# CLKREQ_MCARD2#

+3VS_CLK

CLKREQ_MCARD1# CLKREQ4

1 2

R372 10K_0402_5%

+3VS_CLK +VDDCLK_IO

NB GFX VGA chip(Dis)

Deciphered Date

NB

R186

R186 261_0402_1%@

261_0402_1%@

1 2

+3VS_CLK

Card Reader

LAN

New Card(delete)

D

RS780

CLK_SBSRC_BCLK <26>

+3VS_CLK

OSC_14M_NB

1.1V 158R/90.0R

CLK_CPU_BCLK <6>

CPU

CLK_CPU_BCLK# <6>

CLKREQ_MCARD2# <33>

For ICS need to pull high. For SLG is NC

SB SRC

CLKREQ_NCARD# , CLKREQ_LAN# , CLKREQ4 , CLKREQ_MCARD2#=width /spacing/Others=8mil/8mil/12mil

CLKREQ_NCARD# CLKREQ_MCARD2# CLKREQ_MCARD1# CLKREQ_LAN# CLKREQ4

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK 100M DIFF

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

NB_OSC_14.318M

1 2

R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%

1 2

R326 8.2K_0402_5%

1 2

R1039 8.2K_0402_5%

1 2

R1045 8.2K_0402_5%@R1045 8.2K_0402_5%@

RX780 RS780

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

SCHEMATIC MB A4112

401568

E

1

C1074

@C1074

@

1

5P_0402_50V8C

2

C1075

@C1075

@ 2

5P_0402_50V8C

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

of

22 54Friday, February 13, 2009

+3VS_CLK

F

A

B

C

D

E

1 1

1

D35

@D35

@

DAN217_SC59

2

3

L47

1 2

FBMA-10-100505-121T_0402

L48

1 2

FBMA-10-100505-121T_0402

L49

1 2

FBMA-10-100505-121T_0402

1

C858

2

C858

6P_0402_50V8K

1

2

CRT_HSYNC<14,16,21>

CRT_VSYNC<14,16>

R217

75_0402_1%

+CRT_VCC

1 2

1

2

RED

GREEN

BLUE

12

C471

75_0402_1%

R218

2.2K_0402_5%

D_DDCDATA

D_DDCCLK

C856

@C856

@

470P_0402_50V8J

1

C469

C859

2

6P_0402_50V8K

RED<16>

GREEN<16>

BLUE<16>

12

75_0402_1%

R100

C857

@ C857

@

R211

12

1 2

1

2

R214

2 2

+3.3V_DELAY +3VS

12

R237

4.7K_0402_5%

VGA_DDC_DAT<16>

VGA_DDC_CLK<16>

3 3

R238

4.7K_0402_5%

1 2

2N7002DW-7-F_SOT363-6

5

4

2N7002DW-7-F_SOT363-6

2

3

Q10B

2.2K_0402_5%

61

Q10A

470P_0402_50V8J

C476

6P_0402_50V8K

1

D37

@D37

@

DAN217_SC59

2

RED_L

GREEN_L

BLUE_L

1

C472

2

6P_0402_50V8K

@D34

@

3

1

2

CRT CONNECTOR

+R_CRT_VCC

D36

+CRT_VCC

1 2

C473

0.1U_0402_16V4Z

1 2

C477

0.1U_0402_16V4Z

2 1

RB491D_SOT23

+5VS

D_DDCDATA

HSYNC

VSYNC

D_DDCCLK

+CRT_VCC

5

P

A2Y

G

3

5

P

A2Y

G

3

1

OE#

U14

U14 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

1

OE#

U13

SN74AHCT1G125GW_SOT353-5

1

D34

DAN217_SC59

2

3

6P_0402_50V8K

JCRT

SUYIN_070546FR015S263ZRCONN@

+CRT_VCC+5VS

1

C475

2

16 17

L84 0_0603_5%

1 2

L83 0_0603_5%

1 2

C474

@C474

@

1

C470

@C470

@

2

10P_0402_50V8J

F2

21

1A_6VDC_MINISMDC110

0.1U_0402_16V4Z

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

D_HSYNC

4

D_VSYNC VSYNC

4

1

2

HSYNC

10P_0402_50V8J

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

23 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

+5VS

WebCam+Digital Mic

JP7

IO1

GND

JP7

1

G1

2

3

4

5

6

G2

ACES_88231-06001

CONN@

USB20P5

2 1

680P_0402_50V7K

C481

680P_0402_50V7K

7

8

+3VS

C479

INVPWR_B++LCDVDD

L44

1 2

FBMA-L11-201209-221LMA30T_0805

1

2

USB20_P5<27> USB20_N5<27>

LVDS_BCLK+<16>

LVDS_BCLK-<16>

LVDS_B0+<16>

12

LVDS_B0-<16>

LVDS_B1+<16>

LVDS_B1-<16>

LVDS_B2+<16>

LVDS_B2-<16>

12

C480

C480 680P_0402_50V7K

680P_0402_50V7K

USB20_P5 USB20_N5

LVDS_BCLK+ LVDS_BCLK-

LVDS_B0+ LVDS_B0LVDS_B1+ LVDS_B1LVDS_B2+ LVDS_B2-

LVDS CONN

JLVDS

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

39 GND41GND

ACES_88242-4001

CONN@

1 1

+USB_CAM

10U_0805_10V4Z

2 2

3 3

C1072

@C1072

@

2

1

+USB_CAM

USB20N5

USB20P5 USB20N5

DMICCLK DMICDAT

D52

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

Close to JP7

PJP6

PAD-OPEN 2x2m

1U_0603_10V6K

B+

LVDS_A2-

2

LVDS_A2+

4

LVDS_A1-

6

LVDS_A1+

8

LVDS_A0-

10

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

LVDS_A0+ LVDS_ACLKLVDS_ACLK+

DMIC_DAT DMIC_CLK

BKOFF# DAC_BRIG

LCD_DDC_CLK LCD_DDC_DAT

9/20 SP02000EA00/SP02000BW00

+5VALW

U54

PJP4

2 1

PAD-OPEN 2x2m

2

C720

12

1

R1013

R1013 0_0402_5%

0_0402_5%

USB_VCCA is +3.9V, R892:100K; R891:215KKohm G916 Vref=1.25V

+USB_CAM

USB20_N5

2N7002DW-7-F_SOT363-6

VGA_ENVDD<16>

LVDS_A2- <16> LVDS_A2+ <16> LVDS_A1- <16> LVDS_A1+ <16> LVDS_A0- <16> LVDS_A0+ <16> LVDS_ACLK- <16> LVDS_ACLK+ <16>

DMIC_DAT <35> DMIC_CLK <35>

R491 470_0805_5%@R491 470_0805_5%@

+USB_CAM

12

C866

C867

@

680P_0402_50V7K

1 2 3

1 2

0_0402_5%

Close to JLVDS

1 2

LCD_DDC_CLK <16> LCD_DDC_DAT <16>

U54

VIN GND EN

RT9193-39GB_SOT23-5

R1014

@R1014

@

D22

4 3

PRTR5V0U2X_SOT143-4@

470_0805_5%

2.2K_0402_5%

VIN IO2

Q45A

R225

+5VS

VOUT

BP

2

IO1

1

GND

+LCDVDD

12

61

R276

Logo BackLight

@

5

4

C482

CAM_SHDN <28>

High active

USB20_P5

+5VALW

2

5

1 2

1

2

680P_0402_50V7K

+USB_CAM

215K_0402_1%

12

R891

@R891

@

1

C1270

0.01U_0402_25V4Z

2

R224

R224 1M_0402_5%

1M_0402_5%

1 2

R222

1 2

100K_0402_5%

3

Q45B

Q45B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

1

C483

2

@

680P_0402_50V7K

2

C719

C719 10U_0805_10V4Z

10U_0805_10V4Z

1

2

C863

C863 1000P_0402_50V7K

1000P_0402_50V7K

1

4.7U_0805_10V4Z

INVPWM

BKOFF# <40> DAC_BRIG <40>

BKOFF#

LCD_DDC_CLK

LCD_DDC_DAT

USB20_P5 USB20_N5 USB20N5

DMIC_DAT DMIC_CLK

+3VS

80mil

S

G

Q43

2

SI2301BDS-T1-E3_SOT23-3

D

1 3

C487

R308 0_0402_5%@ R308 0_0402_5%@

1 2

R309 0_0402_5%R309 0_0402_5%

1 2

R1027 0_0402_5%@R1027 0_0402_5%@

1 2 1 2

R1028 0_0402_5%@R1028 0_0402_5%@

R1029 0_0402_5%@R1029 0_0402_5%@

1 2 1 2

R1030 0_0402_5%@R1030 0_0402_5%@

Close to JLVDS

80mil

+LCDVDD

1

C491

0.1U_0402_16V4Z

2

+3VS

R4834.7K_0402_5% @R4834.7K_0402_5% @

R2744.7K_0402_5% R2744.7K_0402_5%

R2754.7K_0402_5%

USB20P5

DMICDAT DMICCLK

VGA_PWM <16>

INV_PWM <40>

+3.3V_DELAY

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

24 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

+3VS

12

R209

R176

4.7K_0402_5%

1 1

0.1U_0402_16V4Z

2 2

C851

+HDMI_5V_OUT

2

5

1

P

A2Y

G

3

1

OE#

R615

2.2K_0402_5%

4

U39

U39 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

12

R615

HPD <16>

+3VS

R628

100K_0402_5%

1 2

HDMI_HPD

2

C850

0.1U_0402_16V4Z

1

HDMIDAT_VGA<16>

HDMICLK_VGA<16>

4.7K_0402_5%

COMMON MODE CHOCK is SM070000K00 KING_WCM-2012-900T_4P

HDMI_CLK+

R304

R172

499_0402_1%

1 2

61

2

Q162A

Q162A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

HDMI_CLKHDMI_CLK+

HDMI_TX0HDMI_TX0+

HDMI_TX1HDMI_TX1+

HDMI_TX2HDMI_TX2+

499_0402_1%

R139

R141

R141 499_0402_1%

499_0402_1%

1 2

1 2 3

5

4

Q162B

Q162B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

UMA use 750 ohm VGA use 499 ohm

HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

C507 0.1U_0402_16V7KC507 0.1U_0402_16V7K

TMDS_B_CLK#<16> TMDS_B_CLK<16>

TMDS_B_DATA0#<16>

TMDS_B_DATA0<16>

TMDS_B_DATA1#<16>

TMDS_B_DATA1<16>

TMDS_B_DATA2#<16> TMDS_B_DATA2<16>

3 3

4 4

HDMI_CLKHDMI_CLK+

R307

R315

499_0402_1%

+5VS +5VS +5VS +5VS

499_0402_1%

1 2

61

2

Q136A

Q136A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

1 2

C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K

1 2

C655 0.1U_0402_16V7KC655 0.1U_0402_16V7K

1 2

C675 0.1U_0402_16V7KC675 0.1U_0402_16V7K

1 2

C804 0.1U_0402_16V7KC804 0.1U_0402_16V7K

1 2

C827 0.1U_0402_16V7KC827 0.1U_0402_16V7K

1 2

C852 0.1U_0402_16V7KC852 0.1U_0402_16V7K

1 2

C853 0.1U_0402_16V7KC853 0.1U_0402_16V7K

1 2

HDMI_TX0HDMI_TX0+

R297

R173

499_0402_1%

1 2

3

5

4

Q136B

Q136B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

HDMI_TX1HDMI_TX1+

499_0402_1%

1 2

R1132 0_0402_5%@ R1132 0_0402_5%@ L85

L85

1

4

WCM-2012-900T_0805

1 2

R1133 0_0402_5%@ R1133 0_0402_5%@

1 2

R1134 0_0402_5%@ R1134 0_0402_5%@

L86

1

4

WCM-2012-900T_0805

1 2

R1135 0_0402_5%@ R1135 0_0402_5%@

1 2

R1136 0_0402_5%@ R1136 0_0402_5%@

L87

1

4

WCM-2012-900T_0805

1 2

R1137 0_0402_5%@ R1137 0_0402_5%@

1 2

R1138 0_0402_5%@ R1138 0_0402_5%@

L88

1

4

WCM-2012-900T_0805

1 2

R1139 0_0402_5%@ R1139 0_0402_5%@

R209

4.7K_0402_5%

1 2

5

4

2N7002DW-7-F_SOT363-6

C:Chg. PN to SB770020010.

HDMI_R_CK+

2

3

HDMI_R_CK-

HDMI_R_D0+

2

3

HDMI_R_D0-

HDMI_R_D1+

2

3

HDMI_R_D1-

HDMI_R_D2+

2

3

HDMI_R_D2-

2

61

Q134A

3

Q134B

Q134A

2N7002DW-7-F_SOT363-6

R210

2K_0402_5%

+HDMI_5V_OUT

+HDMI_5V_OUT+3.3V_DELAY

R236

R236 2K_0402_5%

2K_0402_5%

1 2

HDMI_SDATA

HDMI_SCLK

MP:Update D10 to meet HDMI.

2 1

+5VS +HDMI_5V_OUT

HDMI Connector

HDMI_SDATA HDMI_SCLK HDMI_HPD

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

18 16 15 19

12 10

D10

RB491D_SOT23

JHDMI

+5V SDA SCL HP_DET

CKCK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZLCONN@

9/20 DC020709040

1

C468

0.1U_0402_16V4Z

2

CEC

Reserved

GND GND GND GND GND GND GND GND

13 14

2 5 8 11 20 21 22 23 17

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/11 200810/11

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

25 54Friday, February 13, 2009

E

of

F

A

+3VALW

C506

12

5

U16

0.1U_0402_16V4Z@

NB_RST#_R

1 1

R312 0_0402_5% R312 0_0402_5%

PCIE_CALRP=W/S=4/8(55ohm impedance), <1" PCIE_CALRN=W/S=4/8(55ohm impedance), <1"

2 2

18P_0402_50V8J

20M_0402_5%

3 3

18P_0402_50V8J

2

P

B

Y

1

A

G

3

12

R314 20M_0402_5%@R314 20M_0402_5%@

1 2

C643

1 2

R389

C652

1 2

Close to SB

U16

PLT_RST#

4

NC7SZ08P5X_NL_SC70-5@

12

PLT_RST# <11,14,15,32,33,34,39,40>

Y3

4

OSC

1

OSC

32.768KHZ_12.5PF_Q13MC14610050_10PPM

SB_RX0N<10>

SB_RX1P<10>

SB_RX1N<10>

SB_RX2P<10>

SB_RX2N<10>

SB_RX3P<10>

SB_RX3N<10>

SB_TX0P<10> SB_TX0N<10> SB_TX1P<10> SB_TX1N<10> SB_TX2P<10> SB_TX2N<10> SB_TX3P<10> SB_TX3N<10>

+PCIE_VDDR

+1.2V_HT

SB_32KHI

3

NC

2

NC

SB_32KHO

1 2

BLM18PG121SN1D_0603

SB_32KHI/HO=W/S=4/20(55ohm impedance), <1.5"

5/23 Update Y3 footprint

CPU_LDT_REQ#

+1.8VS

+3VS

4 4

H_PWRGD_CPU<6,50>

12

R318 10K_0402_5%@R318 10K_0402_5%@

H_PROCHOT#

12

R319 10K_0402_5%R319 10K_0402_5%

R1161 0_0402_5%

+3VALW

R986

@R986

@

4.7K_0402_5%

1 2

H_PWRGD

12

A

B

1 2

R300 8.2K_0402_5%@R300 8.2K_0402_5%@

C492 0.1U_0402_16V7K C492 0.1U_0402_16V7K

1 2

C493 0.1U_0402_16V7K C493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7K C494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7K C495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7K C496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7K C497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7K C498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7K C499 0.1U_0402_16V7K

1 2

R305 562_0402_1%

2.05K_0402_1%

L53

C504

10U_0805_10V4Z

Close to SB

CLK_SBSRC_BCLK<22> CLK_SBSRC_BCLK#<22>

CPU_LDT_REQ#<6,11>

H_PROCHOT#<6>

LDT_STOP#<6,11>

B

NB_RST#_R

12

R306

LDT_RST#<6>

C

U15A

NB_RST#_R SB_RX0P_C

SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

12

R306

1

C505

2

PCIE_CALRP PCIE_CALRN

+SB_PCIEVDD

1U_0402_6.3V4Z

SB_32KHI

SB_32KHO

CPU_LDT_REQ# H_PROCHOT# H_PWRGD

1

2

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

218S7EALA11FG_BGA528_SB700

SA00001S510(A11) S IC 218S7EALA11FG SB700 BGA 528P SB 0FH SA00001S560(A12) S IC 218S7EALA12FG SB700 BGA 528P SB 0FH

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

LPC

RTC XTAL

CPU

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCIRST#

FRAME#

DEVSEL#

PCI INTERFACE

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

INTE#/GPIO33 INTF#/GPIO34

INTG#/GPIO35

CLOCK GENERATOR

INTH#/GPIO36

LPCCLK0 LPCCLK1

LFRAME#

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

IRDY#

TRDY#

PAR

STOP# PERR# SERR# REQ0# REQ1# REQ2#

GNT0# GNT1# GNT2#

LOCK#

LAD0 LAD1 LAD2 LAD3

LDRQ0#

SERIRQ

RTCCLK

VBAT

P4 P3 P1 P2 T4 T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2 B2

CLK_PCI_EC_R

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28

T15PAD T15PAD

T16PAD T16PAD T17PAD T17PAD

PCI_PIRQH#

R302

+SB_VBAT

C509 place close to U15.b2, <0.5".

C509

0.1U_0402_16V4Z

R967 0_0402_5%

22_0402_5%

1 2

1

2

D

PCI_AD23 <30> PCI_AD24 <30> PCI_AD25 <30> PCI_AD26 <30> PCI_AD27 <30> PCI_AD28 <30>

PCI_SERR# <40>

12

CLK_PCI_EC

LPC_AD0 <39,40> LPC_AD1 <39,40> LPC_AD2 <39,40> LPC_AD3 <39,40> LPC_FRAME# <39,40>

SIRQ <39,40>

RTC_CLK <30>

+SB_VBAT

R316

R316 120_0402_5%

120_0402_5%

1 2

1

C510

2

1U_0402_6.3V4Z

ACCEL_INT <37>

CLK_PCI_EC <30,40>

EC & Debug

LPC_DRQ# <39>

STRAP PIN

+RTCVCC_R

2

1

R317

R317 120_0402_5%

120_0402_5%

1 2

J1

JUMP_43X39@J1 JUMP_43X39@

X76-VRAM

+RTCVCC

DAN202U_SC70

PCICLK2 <30>SB_RX0P<10> PCICLK3 <30> PCI_CLK4 <30> PCI_CLK5 <30>

ZZZ

X76-VRAM

LPCCLK1 <30>

R301 22_0402_5%R301 22_0402_5%

D42

2

1

3

W=20mils

+RTCBATT_R

1 2

+3VL

R876

1 2

1K_0402_5%

E

LA-4112PX7613432L01 DAZ=DAZ03Y00301

STRAP PIN

+RTCBATT

W=20mils

9/20 SP020008T00

<BOM Structure>ZZZ

ZZZ

PCB-MB

CLK_PCI_SIO <39>

JBATT1

1

2

3

GND

4

GND

ACES_85205-02001CONN@

+SB_VBAT/+RTCVCC_R/+RTCVCC/+RTCBATT_R/+RTCBATT=W/S=25/20(55ohm impedance)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

F

of

26 54Friday, February 13, 2009

A

NBPWRGD

NB_PWRGD<11>

R1053

@R1053

@

100_0402_5%

1 1

LAN_PCIE_WAKE#<32>

MINI_PCIE_WAKE#<33>

+3VS

1 2

R388 4.7K_0402_5%

+3VALW

1 2

R320 2.2K_0402_5%@R320 2.2K_0402_5%@

1 2

R321 2.2K_0402_5%@R321 2.2K_0402_5%@

1 2

R322 2.2K_0402_5%@R322 2.2K_0402_5%@

+3VS

R328 1.2K_0402_5% R328 1.2K_0402_5%

1 2

R329 1.2K_0402_5% R329 1.2K_0402_5%

2 2

3 3

1 2

+3VALW

R331 2.2K_0402_5%R331 2.2K_0402_5%

1 2

R332 2.2K_0402_5%R332 2.2K_0402_5%

1 2

12

R993 47_0402_5%

R994 0_0402_5%@R994 0_0402_5%@

+3VALW

12

SMB_CK_CLK0 SMB_CK_DAT0

SMB_CK_CLK1 SMB_CK_DAT1

12

R1052 0_0402_5%

R540

R540 10K_0402_5%

10K_0402_5%

1 2

PCIE_WAKE#

SUS_STAT#

SB_TEST2 SB_TEST1 SB_TEST0

HDA_BITCLK_CODEC<35> HDA_BITCLK_MDC<41> HDA_SDOUT_MDC<41>

HDA_SDOUT_CODEC<35> HDA_SDIN0<35> HDA_SDIN1<41>

HDA_SYNC_MDC<41>

HDA_SYNC_CODEC<35>

HDA_RST#_CODEC<35> HDA_RST#_MDC<41>

HDARST#<30,40>

SB_SPKR=W/S=4/4(55ohm impedance)

STRAP PIN

For EMI request.

C257

@C257

@

0.1U_0402_16V4Z

+3VS

HDABITCLK

10K_0402_5%

1

2

U65

@U65

@

7

VDD

6

CLKOUT

R500

@R500

@

5

12

SSON

4

GND

ASM3P623S00BF-08TR_TSSOP8

CLKIN

HDA_BITCLK

1 2

NC

8

NC

3

SS

@R498

@

10K_0402_5%

R499

@R499

@

10K_0402_5%

1 2

R498

12

B

+3VS

R1147 100K_0402_5%

R333 33_0402_5%

R333 33_0402_5% R334 33_0402_5%

R334 33_0402_5% R335 33_0402_5%

R335 33_0402_5% R336 33_0402_5%

R336 33_0402_5%

R337 33_0402_5%

R337 33_0402_5% R338 33_0402_5%

R338 33_0402_5% R339 33_0402_5%

R339 33_0402_5% R340 33_0402_5%

R340 33_0402_5%

+3VS

demo circuit LID use RI#

SLP_S3#<40> SLP_S5#<40>

PWRBTN_OUT#<40>

SB_PWRGD<6,40,50> SUS_STAT#<11>

GATEA20<40> KB_RST#<40> EC_SCI#<40> EC_SMI#<40>

H_THERMTRIP#<6,40>

EC_RSMRST#<40>

SB700 has internal PD

SB_SPKR<35> SMB_CK_CLK0<8,9,22,37> SMB_CK_DAT0<8,9,22,37> SMB_CK_CLK1<33> SMB_CK_DAT1<33>

+3VS

EC_LID_OUT#<40>

1 2

1 2 1 2 1 2 1 2

1 2 1 2

EXP_CPPE#

HDABITCLK HDA_BITCLK

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0

R327

2.2K_0402_5%

1 2

R83 10K_0402_5%R83 10K_0402_5%

CR_CPPE#<34>

R497

0_0402_5%

HDA_SDOUT HDA_SDIN0 HDA_SDIN1

HDA_SYNC

HDARST#

PCIE_WAKE# H_THERMTRIP#

NBPWRGD EC_RSMRST#

1 2

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

12

T41PAD T41PAD

C

U15D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

INTEGRATED uC

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P

USB_HSD11N

USB_HSD10P

USB_HSD10N

USB_HSD9P

USB_HSD9N

USB_HSD8P

USB_HSD8N

USB_HSD7P

USB_HSD7N

USB_HSD6P

USB_HSD6N

USB_HSD5P

USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N

USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P

USB_HSD2N

USB_HSD1P

USB_HSD1N

USB_HSD0P

USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

D

1 2

C8

USB_RCOMP

G8

USB_RCOMP=W/S=9/20(35ohm impedance), <1"

E6 E7

F7 E8

H11 J10

E11 F11

A11 B11

USB20_P8

C10

USB20_N8

D10

USB20_P7

G11

USB20_N7

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12 B12

A12 G12

G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14 A18

B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

1 2

GPIO16 <30> GPIO17 <30>

R1160 100_0402_5%@R1160 100_0402_5%@

CLK_48M_USB <22>

R32311K_0402_1% R32311K_0402_1%

USB20_P8 <33> USB20_N8 <33>

USB20_P7 <38> USB20_N7 <38>

USB20_P6 <38> USB20_N6 <38>

USB20_P5 <24> USB20_N5 <24>

USB20_P2 <38> USB20_N2 <38>

USB20_P1 <38> USB20_N1 <38>

USB20_P0 <38> USB20_N0 <38>

STRAP PIN STRAP PIN

E

C1272 100P_0402_25V8K@C1272 100P_0402_25V8K@

1 2

Touch Screen (delete)

USB-11 New Card(delete) USB-10 MiniCard(TV)(delete) USB-9 Card Reader (delete) USB-8 MiniCard(WWAN) USB-7 Fingerprint USB-6 Bluetooth USB-5 USB Camera USB-4 Left side USB-3 Dock USB-2 Left Side USB-1 Right side USB-0 Right side (S/W Debug Port)

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

27 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

1 1

C512 0.01U_0402_25V7K

2 2

SATA_TXP0<31> SATA_TXN0<31>

SATA_TXP2<38> SATA_TXN2<38>

SATA_TXP3<31> SATA_TXN3<31>

1 2

C513 0.01U_0402_25V7K

1 2

C520 0.01U_0402_25V7K@C520 0.01U_0402_25V7K@

1 2

C521 0.01U_0402_25V7K@C521 0.01U_0402_25V7K@

1 2

C518 0.01U_0402_25V7K

1 2

C519 0.01U_0402_25V7K

1 2

SATA_CAL=W/S=9/20(35ohm impedance), <1"

R343 10K_0402_5%R343 10K_0402_5%

1 2

+3VS

+1.2V_HT

3 3

C51610P_0402_50V8J C51610P_0402_50V8J

12

Y4

25MHz_20pF_6X25000017

C51710P_0402_50V8J C51710P_0402_50V8J

12

L54

BLM18PG121SN1D_0603

1U_0402_6.3V4Z

+3VS

BLM18PG121SN1D_0603

SATA_X1

12

R341

10M_0402_5%

SATA_X2

SATA_X1/X2=W/S=4/20(55ohm impedance), <3"

SATA_LED#<41>

12

2

C522

1

L55

12

C524

1U_0402_6.3V4Z

Change the PCB Footprint from Y_KDS_1BX25000CK1A_2P to Y_6X25000017_2P

+PLLVDD_SATA

+PLLVDD_SATA >20mil

2

93mA/2vias

C523

C523 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

+XTLVDD_SATA

+XTLVDD_SATA_SATA >20mil

2

6mA/2vias

1

SATA_STX_DRX_P0 SATA_STX_DRX_N0

SATA_RXN0_C<31>

SATA_RXP0_C<31>

SATA_STX_DRX_P2 SATA_STX_DRX_N2

SATA_RXN2_C<38>

SATA_RXP2_C<38>

SATA_STX_DRX_P3 SATA_STX_DRX_N3

SATA_RXN3_C<31>

SATA_RXP3_C<31>

R342 1K_0402_1%

12

SATA_LED# W/S=5/5

SATA_CAL

SATA_X1 SATA_X2

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11 SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

+SB_AVDD >20mil

5mA/2vias

F6 G7

C525

0.1U_0402_16V4Z

+SB_AVDD

1

2

BLM18PG121SN1D_0603

1

C526

2.2U_0603_6.3V4Z

2

CR_WAKE# <34>

SB_INT_FLASH_SEL <39>

WLOFF# <33> BT_COMBO_EN# <33>

EC_THERM# <40>

ACIN <40> BT_OFF <38> CAM_SHDN <24>

L56

+3VALW

12

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

28 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

+3VS

1 1

2 2

3 3

4 4

C528 22U_0805_6.3V6M

C528 22U_0805_6.3V6M C531 1U_0402_6.3V4Z

C531 1U_0402_6.3V4Z C530 1U_0402_6.3V4Z

C530 1U_0402_6.3V4Z C533 1U_0402_6.3V4Z

C533 1U_0402_6.3V4Z C549 1U_0402_6.3V4Z

C549 1U_0402_6.3V4Z C535 1U_0402_6.3V4Z

C535 1U_0402_6.3V4Z C539 1U_0402_6.3V4Z

C539 1U_0402_6.3V4Z C541 0.1U_0402_16V4Z

C541 0.1U_0402_16V4Z C542 0.1U_0402_16V4Z

C542 0.1U_0402_16V4Z

@R12

@

+3VS

+1.2V_HT

+3VALW

12

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

0_0603_5%

R12

1 2

C543 4.7U_0805_10V6K@C543 4.7U_0805_10V6K@ C544 1U_0402_6.3V4Z@C544 1U_0402_6.3V4Z@ C547 1U_0402_6.3V4Z@C547 1U_0402_6.3V4Z@ C536 1U_0402_6.3V4Z@C536 1U_0402_6.3V4Z@

12

1 2 1 2 1 2

L61

0_0805_5%

12

C552 4.7U_0805_10V6K

C552 4.7U_0805_10V6K C553 1U_0402_6.3V4Z

C553 1U_0402_6.3V4Z

1 2

C555 1U_0402_6.3V4Z

1 2

C554 1U_0402_6.3V4Z

1 2

C558 1U_0402_6.3V4Z

1 2

C557 0.1U_0402_16V4Z

1 2

C560 0.1U_0402_16V4Z

1 2

L63

0_0805_5%

12

C566 22U_0805_6.3V6M

C566 22U_0805_6.3V6M C567 10U_0805_10V4Z

C567 10U_0805_10V4Z

1 2

C568 10U_0805_10V4Z

1 2

C571 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4Z

1 2

L66

0_0805_5%

C576 10U_0805_10V4Z

1 2

C577 10U_0805_10V4Z

1 2

C580 1U_0402_6.3V4Z

1 2

C581 1U_0402_6.3V4Z

1 2

C583 0.1U_0402_16V4Z

1 2

C582 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4Z

1 2

12

131mA/4vias

+3.3V_SB_IDE >50mil

71mA/3vias

+3.3V_SB_IDE

+PCIE_VDDR >100mil

600mA/4vias

+PCIE_VDDR

+1.2V_SATA >50mil

567mA/4vias

+1.2V_SATA

+AVDD_USB >50mil

658mA/4vias

+AVDD_USB

U15C

L9

VDDQ_1

M9

VDDQ_2

T15

VDDQ_3

U9

VDDQ_4

U16

VDDQ_5

U17

VDDQ_6

V8

VDDQ_7

W7

VDDQ_8

Y6

VDDQ_9

AA4

VDDQ_10

AB5

VDDQ_11

AB21

VDDQ_12

Y20

VDD33_18_1

AA21

VDD33_18_2

AA22

VDD33_18_3

AE25

VDD33_18_4

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

PCIE_VDDR_7

AA14

AVDD_SATA_1

AB18

AVDD_SATA_4

AA15

AVDD_SATA_2

AA17

AVDD_SATA_3

AC18

AVDD_SATA_5

AD17

AVDD_SATA_6

AE17

AVDD_SATA_7

A16

AVDDTX_0

B16

AVDDTX_1

C16

AVDDTX_2

D16

AVDDTX_3

D17

AVDDTX_4

E17

AVDDTX_5

F15

AVDDRX_0

F17

AVDDRX_1

F18

AVDDRX_2

G15

AVDDRX_3

G17

AVDDRX_4

G18

AVDDRX_5

218S7EALA11FG_BGA528_SB700

+AVDDCK_3.3V >20mil

47mA/2vias

+AVDD_USB

+AVDDC

+1.2_USB

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

SATA I/O

PLL CLKGEN I/O

USB I/O

R1149

@R1149

@

1 2

0_0805_5%

R50

@R50

@

1 2

0_0603_5%

R51

@R51

@

1 2

0_0603_5%

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

3.3V_S5 I/OCORE S5

S5_1.2V_1 S5_1.2V_2

USB_PHY_1.2V_1 USB_PHY_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

+3V

+1.2V

+1.2V_SB_CORE >100mil

510mA/4vias

+1.2V_SB_CORE

L15 M12 M14 N13 P12 P14 R11 R15 T16

+1.2V_CKVDD >30mil

138mA/2vias

+S5_3V >20mil

32mA/2vias

+S5_1.2V >20mil

113mA/2vias

+1.2_USB >20mil

197mA/2vias

+V5_VREF >20mil

1mA/2vias

+AVDDC=W/S=20/10mil

17mA/2vias

+AVDDCK_1.2V >20mil

62mA/2vias

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7 J16 K17 E9

+1.2V_CKVDD

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF +AVDDCK_3.3V +AVDDCK_1.2V +AVDDC

R593 0_0805_5%R593 0_0805_5%

1 2

R564 0_0805_5%R564 0_0805_5%

L65 0_0603_5%L65 0_0603_5%

C578

0.1U_0402_16V4Z

+AVDDCK_1.2V

+AVDDCK_3.3V

1 2

L60

0_0603_5%

C546 1U_0402_6.3V4Z@C546 1U_0402_6.3V4Z@

1 2

C545 1U_0402_6.3V4Z@C545 1U_0402_6.3V4Z@

1 2

C548 0.1U_0402_16V4Z@C548 0.1U_0402_16V4Z@ C551 0.1U_0402_16V4Z@C551 0.1U_0402_16V4Z@

C550 10U_0805_10V4Z@C550 10U_0805_10V4Z@

1 2

12

1 2

12

2

1

L67

0_0603_5%

+1.2VALW

C52910U_0805_6.3V6M

C5321U_0402_6.3V4Z

12

C5341U_0402_6.3V4Z

12

C5381U_0402_6.3V4Z

12

C5371U_0402_6.3V4Z

12

C5270.1U_0402_16V4Z

12

C5400.1U_0402_16V4Z

12

12 12

+3VALW

C55622U_0805_6.3V6M

C5591U_0402_6.3V4Z

C5591U_0402_6.3V4Z C5611U_0402_6.3V4Z

C5611U_0402_6.3V4Z C5621U_0402_6.3V4Z

C5621U_0402_6.3V4Z C5630.1U_0402_16V4Z

C5630.1U_0402_16V4Z C5640.1U_0402_16V4Z

C5640.1U_0402_16V4Z C5650.1U_0402_16V4Z

C5650.1U_0402_16V4Z

+1.2VALW

C57310U_0805_10V4Z

C5741U_0402_6.3V4Z

C5741U_0402_6.3V4Z C5751U_0402_6.3V4Z

C5751U_0402_6.3V4Z

2

C579

1U_0603_10V4Z

1

12

12 12

L68

12

L69

12

+1.2V_HT

L64 0_0603_5%L64 0_0603_5%

D14

CH751H-40PT_SOD323-2

+3VALW

C5852.2U_0603_6.3V4Z

C5852.2U_0603_6.3V4Z C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

+1.2V_HT

C5872.2U_0603_6.3V4Z

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

+3VS

C5892.2U_0603_6.3V4Z

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

U15E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

+1.2VALW

C5691U_0402_6.3V4Z

12

C5700.1U_0402_16V4Z

12

R3461K_0402_5%

12

+5VS

21

+3VS

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB700

GROUND

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

29 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

PULL

1 1

2 2

HIGH

PULL LOW

PCICLK2<26>

PCICLK3<26> PCI_CLK4<26> PCI_CLK5<26>

CLK_PCI_EC<26,40>

LPCCLK1<26> RTC_CLK<26> HDARST#<27,40>

GPIO17<27> GPIO16<27>

PCI_CLK2

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

R347

R357

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

12

R348

10K_0402_5%

@

10K_0402_5%

R348

@

12

R358

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R349

@

R359

@

12

10K_0402_5%

12

10K_0402_5%

RESERVED

REQUIRED STRAPS

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

RTC_CLK

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

R353

10K_0402_5%

@

R363

2.2K_0402_5%

@

12

R350

10K_0402_5%

@

R360

10K_0402_5%

@

12

AZ_RST_CD#

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R351

10K_0402_5%

@

12

R361

10K_0402_5%

LPC_CLK1

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R352

10K_0402_5%

@

R362

10K_0402_5%

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

12

R354

10K_0402_5%

@

12

R364

10K_0402_5%

GP17

GP16

Internal pull up

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

12

R356

R355

10K_0402_5%

2.2K_0402_5%

@

12

R365

R366

2.2K_0402_5%

@

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

12

2.2K_0402_5%

C

PCI_AD25 PCI_AD24

12

2.2K_0402_5%

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

R377

@

USE IDE PLL

DEFAULT

BYPASS IDE PLL

R376

@

2007/10/11 200810/11

PCI_AD23

RESERVED

12

R378

2.2K_0402_5%

Compal Secret Data

@

Deciphered Date

12

2.2K_0402_5%

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

30 54Friday, February 13, 2009

E

of

F

PCI_AD28

3 3

PCI_AD28<26> PCI_AD27<26> PCI_AD26<26> PCI_AD25<26> PCI_AD24<26> PCI_AD23<26>

4 4

PULL HIGH

PULL LOW

USE LONG RESET

DEFAULT

USE SHORT RESET

R373

@

A

B

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

12

R374

2.2K_0402_5%

@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

2.2K_0402_5%

Issued Date

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

R375

@

A

B

C

D

E

HDD Connector

JP9

Reserved

SUYIN_127072FR022G523_RVCONN@

GND

GND GND GND

GND GND

JP9

1 2

A+

3

AB-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

0.01U_0402_16V7K

SATA_RXN0 SATA_RXN0_C

0.01U_0402_16V7K

Near CONN side.

+3VS_HDD1

+5VS

SATA_TXP0 SATA_TXN0

C592

12

SATA_RXP0_CSATA_RXP0

C596

12

SATA_TXP0 <28> SATA_TXN0 <28>

SATA_RXN0_C <28> SATA_RXP0_C <28>

1 1

+3VS +3VS_HDD1

@R1009

@

1 2

0_0805_5%

+5VS

1

C593

10U_0805_10V4Z

2

0.1U_0402_16V4Z

2

Pleace near HD CONN (JP23)

R1009

1

C1032

2

@

10U_0805_10V4Z

2

0.1U_0402_16V4Z

C594

C1033

@C1033

@

1

C591

2

0.1U_0402_16V4Z

1

C1034

@C1034

@

2

0.1U_0402_16V4Z

1

C595

2

0.1U_0402_16V4Z

1

C1035

2

@

0.1U_0402_16V4Z

Pleace near HD CONN (JP23)

9/20 LTCX0007Y00

2 2

Multi-Bay Connector-option(deltet)

3 3

CD-ROM Connector

+5VS

Placea caps. near ODD CONN.

0.1U_0402_16V4Z

C613

1

C614

2

4 4

A

B

10U_0805_10V4Z

1U_0603_10V4Z

1

C615

2

1

C616

C616 10U_0805_10V4Z

10U_0805_10V4Z

2

9/20 DC020709041

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CONN@

JP11

GND

A+

A-

GND

B-

B+

GND

DP V5 V5

MD GND GND

SUYIN_127382FR013G509ZR

<>

Issued Date

C

1 2 3

0.01U_0402_16V7K

4

SATA_RXN3 SATA_RXN3_C

5 6

0.01U_0402_16V7K

7

R970 0_0402_5%R970 0_0402_5%

8

1 2 9 10 11 12 13

+5VS

2007/10/11 200810/11

SATA_TXP3 SATA_TXN3

C612

12

SATA_RXP3_CSATA_RXP3

C611

12

Near CONN side.

Compal Secret Data

Deciphered Date

SATA_TXP3 <28>

SATA_TXN3 <28>

SATA_RXN3_C <28>

SATA_RXP3_C <28>

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

31 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

PCIE_PTX_C_IRX_P3<10>

1 1

2 2

PCIE_PTX_C_IRX_N3<10>

PCIE_ITX_C_PRX_P3<10>

PCIE_ITX_C_PRX_N3<10>

CLK_PCIE_LAN<22>

CLK_PCIE_LAN#<22>

CLKREQ_LAN#<22>

PLT_RST#<11,14,15,26,33,34,39,40>

LAN_PCIE_WAKE#<27>

Y5

LAN_X1 LAN_X2

25MHz_20pF_6X25000017

1

C653

2

27P_0402_50V8J

12

27P_0402_50V8J

+3VS

1

2

C654

1K_0402_5%

15K_0402_5%

C485 0.1U_0402_16V7K

PCIE_PTX_IRX_P3

12

C488 0.1U_0402_16V7K

PCIE_PTX_IRX_N3

12

R385 2.49K_0402_1%

1 2

R384

12

R382

12

RSET

ISOLATEB

LAN_X1 LAN_X2

U20

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_M

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKXTAL1

42

CKXTAL2

23

NC

24

NC

7

GND

14

GND

31

GND

47

GND

22

GNDTX

RTL8102EL-GR_LQFP48_7X7

SA000026Q10 S IC RTL8102EL-VB-GR LQFP 48P E-LAN CTRL

RTL8102EL

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS LED0

MDIP0 MDIN0 MDIP1 MDIN1

VCTRL12A

VDDTX DVDD12 DVDD12 DVDD12 DVDD12

VCTRL12D

VDD33 VDD33

AVDD33

LAN_EEDO

33

LAN_EEDI

34

LAN_EECLK

35

LAN_EECS

32

LAN_ACTIVE#

38

LAN_MDI0+

2

LAN_MDI0-

3

LAN_MDI1+

5

LAN_MDI1-

6 8

NC

9

NC

11

NC

12

NC

4

NC

NC NC

48 19

30 36 13 10

39 44

45 29

37 1

40 43

+VCTRL12A +VDDTX_LAN

0.1U_0402_16V4Z

+VCTRL12D

+1.2V_DVDD

C622

+3V_LAN

C630

@C630

@

10U_0805_10V4Z

1

C628

@C628

@

C623

2

1U_0603_10V4Z

1

C631

0.1U_0402_16V4Z

2

1

2

R298

0_0603_5%

1

C629

0.1U_0402_16V4Z

2

+1.2V_DVDD

12

0.1U_0402_16V4Z

for U20 VDD12 pins-10, 13, 30, 36, 39.

0.1U_0402_16V4Z

1

C640

C641

2

0.1U_0402_16V4Z

1

2

C639

0.1U_0402_16V4Z

1

C638

2

0.1U_0402_16V4Z

LAN_EEDO LAN_EEDI LAN_EECLK LAN_EECS

+1.2V_DVDD

1

C637

2

R295

3.6K_0402_5%

1 2

R296

R296 10K_0402_5%

10K_0402_5%

1 2

for U20 VDD33 pins-1, 29, 37 and 40.

0.1U_0402_16V4Z

1

C644

C636

2

0.1U_0402_16V4Z

U17

@U17

@

4

DO

3

DI

2

SK

1

CS

AT93C46-10SU-2.7_SO8

AT93C46A(3.3V)

1

C633

2

0.1U_0402_16V4Z

+3V_LAN

5

GND

6

NC

7

NC

8

VCC

0.1U_0402_16V4Z

1

C632

2

LAN_POWER_OFF<40>

1 2

PAD-OPEN 4x4m

1 3

Q144

SI2301BDS-T1-E3_SOT23-3

Q144

1

C340 0.1U_0402_16V4Z@C340 0.1U_0402_16V4Z@

2

+3V_LAN

PJP605

D

2

C1271

@C1271

@

0.1U_0402_16V4Z

+3VALW+3V_LAN

S

2

G

R1148

@R1148

@

100K_0402_5%

1

1 2

LAN Conn.

JRJ45

LAN_ACTIVE#

3 3

C648 0.01U_0402_16V7KC648 0.01U_0402_16V7K

1 2

C647 0.01U_0402_16V7KC647 0.01U_0402_16V7K

1 2

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

U19

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

LEF8423A-R

RX+

TX+

RJ45_MIDI1-

16

RX-

14

CT NC NC CT

1 2

C661 0.01U_0603_100V7-M

13

C662 0.01U_0603_100V7-M

12 11

1 2

RJ45_MIDI0-

10

RJ45_MIDI0+

9

R394 75_0402_1%R394 75_0402_1%

1 2

R396 75_0402_1%R396 75_0402_1%

1 2

C658

1 2

1000P_1206_2KV7K

@D58

@

PSOT24C_SOT23-3

RJ45_MIDI1+

15

LAN_ACTIVE#

LAN_EECLK

2

3

D58

1

LAN_EECLK LAN_LINK#

R391

300_0402_5%

1

C656

@C656

@

68P_0402_50V8K

2

C657

@C657

@

68P_0402_50V8K

1

300_0402_5%

R395

12

LAN_ACTIVITY#

12

+3V_LAN

RJ45_MIDI1-

RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

+3V_LAN

13

Yellow LED+

14

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM36113-P1122-7F

CONN@

SHLD1

DETECT PIN1

DETCET PIN2

SHLD1

16 9

10 15

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

of

32 54Friday, February 13, 2009

F

A

B

C

D

E

1 1

+3VS +1.5VS+3VS_WLAN +1.5VS_WLAN +3VALW_WLAN

Max 1A

R407

12

0_0805_5%

C665

0.1U_0402_16V4Z

MINI_PCIE_WAKE#<27>

CH_DATA<38>

CH_CLK<38>

CLKREQ_MCARD2#<22>

CLK_PCIE_MCARD2#<22>

CLK_PCIE_MCARD2<22>

2 2

PCIE_PTX_C_IRX_N2<10>

PCIE_PTX_C_IRX_P2<10>

PCIE_ITX_C_PRX_N2<10>

PCIE_ITX_C_PRX_P2<10>

+3VS_WLAN

BT_COMBO_EN#<28>

Mini Card Slot 1---WLAN

Max 0.5A

R406

1 2

0_0805_5%

1

2

1 2

0_0402_5%

4.7K_0402_5%

R49

1

C666

4.7U_0805_10V4Z

2

MINI_PCIE_WAKE# CH_DATA CH_CLK

R46 0_0603_5%@R46 0_0603_5%@

1 2

R47 0_0603_5%@R47 0_0603_5%@

1 2

CH_CLK

12

R48

0_0805_5%

C668

0.01U_0402_16V7K

JP14

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

1

C669

C670

4.7U_0805_10V4Z

2

PLT_RST#

SMB_CK_CLK1 SMB_CK_DAT1

WL_LED#

4.7U_0805_10V4Z

2

+3VS_WLAN +1.5VS_WLAN

+3VALW_WLAN

Max 0.3A

2

0.1U_0402_16V4Z

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

CONN@

56

FOX_AS0B226-S99N-7F

9/20 SP01000HS00/SP01000LX00

R1043 0_0603_5%R1043 0_0603_5%

1 2

R1042 0_0603_5%@ R1042 0_0603_5%@

1 2

1

C667

0.1U_0402_16V4Z

2

PLT_RST# <11,14,15,26,32,34,39,40>

SMB_CK_CLK1 <27> SMB_CK_DAT1 <27>

USB20_N8 <27> USB20_P8 <27>

WL_LED# <41>

WLOFF# <28>

+3VS_WLAN

+3VALW

9/20 STANDOFF (H=7.5 mm) ES000000D00

3 3

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

of

33 54Friday, February 13, 2009

F

A

+VCC_OUT +VCC_4IN1

+3VS

C895

@C895

@

0.1U_0402_16V4Z

1 1

0.1U_0402_16V4Z

U22

@U22

@

1

2

3

IN

4

EN

2

GND

G5250C2T1U_SOT23-5

1

OUT

5

OUT

@C896

@

1U_0603_10V4Z

reserved power circuit

40mil

1

C896

2

150K_0402_5%

12

R123

@R123

@

Use 0805 type and over 20 mils trace width on both side

+VCC_4IN1+VCC_OUT

R383

1 2

0_0805_5%

C689

10U_0805_10V4Z

2 2

CR_CPPE#<27>

CR_WAKE#<28>

3 3

1

2

+3VS

12

R124

R124 10K_0402_5%

10K_0402_5%

2

G

Q54

CPPE#

1 3

D

S

D

S

2N7002_SOT23-3

2N7002_SOT23-3 0_0402_5%

0_0402_5%

XDCD0#_SDCD#

1 2

R369

470_0402_5%

HT-F196BP5_WHITE

@

2N7002_SOT23-3

C694

0.1U_0402_16V4Z

PCIE_PTX_C_IRX_N1<10> PCIE_PTX_C_IRX_P1<10>

+5VS_LED

12

R370

21

D5

13

D

Q53

S

G

1 2

2

R400

0_0402_5%

R1051

@R1051

@

4.7K_0402_5%

B

CLK_PCIE_MCARD0#<22> CLK_PCIE_MCARD0<22>

PCIE_ITX_C_PRX_N1<10> PCIE_ITX_C_PRX_P1<10>

C693 0.1U_0402_16V7KC693 0.1U_0402_16V7K

1 2

C697 0.1U_0402_16V7KC697 0.1U_0402_16V7K

1 2

+3VS_CR

PLT_RST#<11,14,15,26,32,33,39,40>

+VCC_OUT

CR_LED

12

Card Reader Connector

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_RE# XDCE# XD_CLE

PCIE_PTX_IRX_N1 PCIE_PTX_IRX_P1

R114

8.2K_0402_5%

8.2K_0402_5% R409

R409

10K_0402_5%

CPPE#

T45 PADT45 PAD

XDCD1#_MSCD# XDCD0#_SDCD#

use for PWR_EN# 8mA sink current

3

32 10

9 8 7 6 5 4

34 33 35 40 39 38 37 36

11 31

41 42

APREXT

12

12mil

12

C

JREAD

XD-VCC XD-D0

7 IN 1 CONN

XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7

XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE

7IN1 GND 7IN1 GND

TAITW_R015-B10-LMCONN@

Power Circuit

D3 Normal 30mA Deepest 3mA

U23

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

PCIES_EN

39

PCIES

JMB385

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB385-LGEZ0A_LQFP48_7X7

58mA

1mA

45mA

25mA

SD-VCC

MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

APVDD

APV18 TAV33

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

NC NC NC

APGND

GND GND GND GND

21 28

SDCLK

20

XD_SD_MS_D0

14

XD_SD_MS_D1

12

XD_SD_MS_D2

30

XD_SD_MS_D3

29

XD_SD_D4

27

XD_SD_D5

23

XD_SD_D6

18

XD_SD_D7

16

SDCMD_MSBS_XDWE#

25

XDCD0#_SDCD#

1

XDWP#_SDWP#

2

MSCLK

26

XD_SD_MS_D0

17

XD_SD_MS_D1

15

XD_SD_MS_D2

19

XD_SD_MS_D3

24

XDCD1#_MSCD#

22

SDCMD_MSBS_XDWE#

13

Ripple 100mV

5 10

Ripple 100mV

30

Ripple 250mV

19 20 44

Ripple 250mV

18 37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

43

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

41

XD_CLE

40

XD_SD_D4

29

XD_SD_D5

28

XD_SD_D6

27

XD_SD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22 34

35 36

6 24

31 32 33

20mil

+VCC_4IN1+VCC_4IN1

+1.8VS_OUT

C892

place near pin 5 and pin 10.

0.1U_0402_16V4Z

1

C688

2

10U_0805_10V4Z

0.1U_0402_16V4Z

D

SDCLK MSCLK XDCE#

R411

@R411

R413

@R413

@

100_0402_5%

1 2 2

C902

@C902

@

100P_0402_25V8K

1

2

12

C6950.1U_0402_16V4Z C6950.1U_0402_16V4Z

C691

C686

R457 22_0402_5%R457 22_0402_5% R456 22_0402_5%R456 22_0402_5% R455 22_0402_5%R455 22_0402_5%

1

Place R413,C902 close to JREAD.20; R412,C901 close to JREAD.26; R411,C900 close to JREAD.37

1000P_0402_50V7K

1

C687

2

0.1U_0402_16V4Z

1

C692

2

0.1U_0402_16V4Z

1

C690

0.1U_0402_16V4Z

2

100_0402_5%

100P_0402_25V8K

1

C893

2

R1021

0_0603_5%

1

2

+1.8VS_OUT

12 12 12

R412

@R412

@

C901

@C901

@

R1020

@R1020

@

0_0603_5%

12

100_0402_5%

1 2 2

100P_0402_25V8K

1

12

+3VS+3VS_CR

SDCLK MSCLK XDCE#

+1.8VS

@

C900

@C900

@

Place R455~R457 close to U23.42

E

1 2 2

1

+3VS_CR

XDWP#_SDWP# XD_RB#

XDCD0#_SDCD#

XDCD1#_MSCD#

D40

2 3

DAN202U_SC70

Strap pin for JMicro

R45 10K_0402_5%R45 10K_0402_5%

R106 10K_0402_5%

R121 4.7K_0402_5%

R111 4.7K_0402_5%

1

2

12

R40510K_0402_5%

12

R12210K_0402_5% @R12210K_0402_5% @

12

R39910K_0402_5% R39910K_0402_5%

12

R86200K_0402_5%

+VCC_4IN1

12 12

+3VS_CR

12

XD_CD#

C696

270P_0402_50V7K

XD_CLE XD_ALE

XD_RE#

White LED: VF=3V, IF = 10mA, Res = 200 ohm

SA00001W910 S IC JMB385-LGEZ0B LQFP 48P

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

of

34 54Friday, February 13, 2009

F

A

B

C

D

E

CODEC POWER

1

C259

2

330P_0402_50V7K

+3VS_HDA

1

2

R978

1 2

BLM18BD601SN1D_0603

1

C1046

0.1U_0402_16V4Z

2

+VDDA_CODEC_R+3VS

1

C730

2

0.1U_0402_16V4Z

R979

1 2

0_0603_5%

1

C731

C731 1U_0603_10V4Z

1U_0603_10V4Z

2

1

C260

C260 330P_0402_50V7K

330P_0402_50V7K

2

W=40Mil

1 2

C728 0.1U_0402_16V4ZC728 0.1U_0402_16V4Z

SUSP#<40,43,45,47,51>

+5VALW +VDDA_CODEC

U32

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

5

4

1

2

1

C732

0.1U_0402_16V4Z

2

C729

2.2U_0805_16V4Z

(4.75V(4.56~4.94V))

300mA

R885

1 2

+3VS

BLM18BD601SN1D_0603

1 1

+3VDD_CODEC +VDDA_CODEC

0.1U_0402_16V4Z

1

C734

C733

2

1U_0603_10V4Z

U27

12

SENSEB#

9

DVDD_CORE*

1

DVDD_CORE

25

AVDD1*

38

AVDD2**

3

DVDD_IO

32

MONO_OUT

6

BITCLK

5

SDO

8

SDI_CODEC

10

SYNC

11

RESET#

46

DMIC_CLK

33

CAP2

12

PCBEEP

40

NC / OTP

34

SENSE_B / NC

37

NC

18

NC

19

NC

20

NC

27

VREFFILT

26

AVSS1*

42

AVSS2**

7

DVSS**

92HD71B7X5NLGXA1X8_QFN48_7X7

EAPD/ SPDIF OUT 0 or 1 / GPIO 0

VOL_UP/DMIC_0/GPIO 1 VOL_DN/DMIC_1/GPIO 2

GPIO 3

VREFOUT-E / GPIO 4

GPIO 5 GPIO 6

SPDIF OUT1 / GPIO 7

SPDIF OUT0

VREFOUT-B VREFOUT-C

SENSE_A

PORTA_R

PORTA_L

PORTB_R

PORTB_L

PORTC_R PORTC_L

PORTD_R PORTD_L

PORTE_R

PORTE_L

PORTF_R

PORTF_L

+3VDD_CODEC

+VDDA_CODEC_R

+3VS_HDA

HDA_BITCLK_CODEC

12

@

R525

47_0402_5%

2 2

33P_0402_50V8K

3 3

C745

@C745

@

1

2

SB_SPKR<27>

EC_BEEP<40>

HDA_BITCLK_CODEC<27> HDA_SDOUT_CODEC<27>

HDA_SYNC_CODEC<27>

HDA_RST#_CODEC<27>

R524 47K_0402_5%R524 47K_0402_5%

1 2

R523 10K_0402_5%R523 10K_0402_5%

1 2

C956 0.1U_0402_16V4ZC956 0.1U_0402_16V4Z

1 2

R1174 47K_0402_5%@R1174 47K_0402_5%@

1 2

+VDDA_CODEC_R

HDA_SDIN0<27>

DMIC_CLK<24>

R982 5.1K_0402_1%R982 5.1K_0402_1%

1 2

HDA_BITCLK_CODEC HDA_SDOUT_CODEC

R522 33_0402_5% R522 33_0402_5%

1 2

HDA_SYNC_CODEC HDA_RST#_CODEC

R230

@R230

@

1 2

C979

@C979

@

0.1U_0402_16V4Z

10U_0805_10V4Z

10U_0805_10V4Z C744

C744

1 2

22_0402_5%

1 2

C913 1U_0603_10V4ZC913 1U_0603_10V4Z

MONO_INRMONO_IN

0.1U_0402_16V4Z

0.1U_0402_16V4Z C955

C955

1

2

VC_REFA

SA000022Q10 S IC 92HD71B7X5NLGXB3X8 QFN 48P CODEC

C261

1 2

0.1U_0402_16V4Z

C746

1 2

0.1U_0402_16V4Z

C747

1 2

0.1U_0402_16V4Z

C748

SENSE A

Port

4 4

A

B

C

D

39.2K E

20K

10K

5.11K

A

PortResistor

F

G

H

SENSE B

Resistor

39.2K

20K

10K

5.11K

C748

1 2

C749

@C749

@

1 2

@R1006

@

1 2

0_0402_5%

@R195

@

1 2

0_0805_5%

1 2

0_1206_5%

B

0.1U_0402_16V4Z

0.1U_0402_16V4Z R1006

R195

R198

Use an 80mil to connection or place a 1206 resistor under CODEC with double vias.

Security Classification

Issued Date

GNDA <36>

GNDAGND

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

EAPD_CODEC

47 2 4 30 31 43 44 45 48

VREFOUT_B

28 29

SENSE

13

HP_OUTR

41

HP_OUTL

39

MIC_EXTR

22

MIC_EXTL

21

MIC_INR

24

MIC_INL

23

LINE_OUT_R

36

LINE_OUT_L

35

15 14

17 16

Compal Secret Data

2007/10/11 200810/11

Compal Secret Data

EAPD_CODEC <40> DMIC_DAT <24>

VREFOUT_B <36>

R548 5.1K_0402_1%R548 5.1K_0402_1%

1 2

R569 20K_0402_1%R569 20K_0402_1%

1 2

R571 39.2K_0402_1%

1 2

R570 10K_0402_1%@R570 10K_0402_1%@

1 2

C951 0.1U_0402_16V4ZC951 0.1U_0402_16V4Z

1 2

HP_OUTR <36> HP_OUTL <36>

1 2

C981 1U_0603_10V6K

1 2

C982 1U_0603_10V6K

LINE_OUT_R <36> LINE_OUT_L <36>

Deciphered Date

+VDDA_CODEC_R

HP Jack

Internal SPKR.

D

EXTMIC_DET# <36> JACK_DET# <36>

1 2

C983 0.022U_0603_25V7K

12

R911

@R911

@

0_0603_5%

1 2

C984 0.022U_0603_25V7K

Title

Size Document Number Rev

Custom

Date: Sheet

12

R1128

R1128 0_0603_5%

0_0603_5%

1 2

R1127 0_0603_5%@R1127 0_0603_5%@

MIC_EXT_R <36> MIC_EXT_L <36>

Jack MIC

MIC_IN_R <36>

Internal MIC

MIC_IN_L <36>

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

F

of

35 54Friday, February 13, 2009

E

A

B

C

D

E

10 dB

R1000

+5VS+5VAMP

SPEAKER

GAIN0 GAIN1 Av(inv)

+5VS

12

R1001

100K_0402_5%

12

R1004

@R1004

@

100K_0402_5%

0

1

0

1

0

1

6dB

10dB

15.6dB

21.6dB

SPKRSPKR+ SPKLSPKL+

C760

330P_0402_50V7K

D55

@D55

@

PSOT24C_SOT23-3

1

C761

2

330P_0402_50V7K

2

3

1

C762

2

330P_0402_50V7K

D56

@D56

@

PSOT24C_SOT23-3

1

C763

2

330P_0402_50V7K

2

3

1

JP20

1

2

3

4

5

1

GND1

6

GND2

E&T_3806-F04N-02R

2

CONN@

9/20 SP02000CW00

INTMIC IN

C743

+VDDA_CODEC

MIC_IN_L<35> MIC_IN_R<35>

R906

1K_0402_5%

12

R904

4.7K_0402_5%

D59

PSOT24C_SOT23-3

12

3

1

C743

1U_0603_10V4Z

1 2

12

R905

@R905

@

4.7K_0402_5%

2

JP42

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

CONN@

R594

C1051

100K_0402_5%

1

2

1

C1044

C1044 1U_0603_10V6K

1U_0603_10V6K

2

R594

1 2

0_1206_5%

@R1000

@

R1003

Keep 10 mil width

0.1U_0402_16V4Z

1

2

NC

1

C767

2

0.1U_0402_16V4Z

2 3

SPKR+

18

SPKR-

14

SPKL+

4

SPKL-

8

12

AMP_BYPASS

10

C766

10U_0805_10V4Z

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

10U_0805_10V4Z

16

15

VDD

PVDD1

GND41GND311GND213GND1

20

6

PVDD2

GAIN0 GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

BYPASS

THERMAL PAD

21

TPA6017A2_TSSOP20

1 1

U28

C1049 0.022U_0603_25V7K

1 2 1 2

C1052 0.022U_0402_16V7KC1052 0.022U_0402_16V7K C1050 0.022U_0603_25V7K

C1050 0.022U_0603_25V7K

LINE_OUT_R<35>

LINE_OUT_L<35>

EC_MUTE#<40>

2 2

1 2 1 2

C1053 0.022U_0402_16V7KC1053 0.022U_0402_16V7K

C1040 0.022U_0603_25V7K

1 2 1 2

C1054 0.022U_0402_16V7KC1054 0.022U_0402_16V7K C1041 0.022U_0603_25V7K

C1041 0.022U_0603_25V7K

1 2 1 2

C1055 0.022U_0402_16V7KC1055 0.022U_0402_16V7K

EC_MUTE#

7

17

9

5

19

Audio/B & CIR

3 3

R909

VREFOUT_B<35>

MIC_EXT_R<35>

MIC_EXT_L<35>

HP_OUTR<35>

HP_OUTL<35>

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R909

0_0402_5%

4.7K_0402_5%

MIC_EXT_R MIC_EXT_L

C773 150U_Y_6.3VM

1 2

C774 150U_Y_6.3VM

1 2

C

C742

R907

12

1 2

1U_0603_10V4Z

12

R908

4.7K_0402_5%

EXTMIC IN

+

HP_OUT_R

HP_OUT_L

2007/10/11 200810/11

HP OUT For M/B

Compal Secret Data

Deciphered Date

EXTMIC_DET#<35>

JACK_DET#<35>

CIR_IN<40>

D

MIC_EXT_R MIC_EXT_L

HP_OUT_R HP_OUT_L

EXTMIC_DET# JACK_DET#

CIR_IN

+5VL

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

JP43

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ACES_87213-1400GCONN@

9/20 SP02000H800

36 54Friday, February 13, 2009

E

F

of

A

B

C

D

E

1 1

ACCELEROMETER

SDO

GND

13 12 11 10 9 8

20mil20mil

SMB_CK_DAT0

R998

@R998

@

0_0402_5%

1 2

ACCEL_INT

12

R1146

R1146 100K_0402_5%

100K_0402_5%

SMB_CK_CLK0 <8,9,22,27>

0011101b

SMB_CK_DAT0 <8,9,22,27>

T53PAD T53PAD

ACCEL_INT <26>

+3VS_ACL+3VS +3VS_ACL_IO

1

2

R959 0_0603_5%@ R959 0_0603_5%@

1 2

1

C1031

@C1031

@

10U_0805_6.3V6M

2

SMB_CK_CLK0

14

D44

@D44

@

2 1

CH751H-40PT_SOD323-2

2 2

VDDIO absolute man

C1030

@C1030

@

0.1U_0402_16V4Z

@U63

@

U63

rating is VDD+0.1

Vdd_IO GND Reserved GND GND Vdd

12

SCL / SPC

SDA / SDI / SDO

Reserved

INT 2 INT 1

CS

LIS302DLTR_LGA14_3x5

7

+3VS_ACL_IO

3 3

+3VS_ACL

R997

@R997

@

0_0402_5%

1 2

1 2 3 4 5 6

R999 10K_0402_5%@R999 10K_0402_5%@

Must be placed in the center of the system.

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

37 54Friday, February 13, 2009

E

of

F

A

Left side USB CONNECTOR Left side ESATA5/USB2 combination Connector Right side USB 0&1 Board Conn

U40

1 1

1

C788

4.7U_0805_10V4Z

2 2

2

USB_EN#

U40

1

GND

2 3 4

OUT

IN

OUT OUT

IN

OC#

EN#

TPS2061IDGN_MSOP8~N

8 7 6 5

C789

150U_D_6.3VM

W=100mils

1

+

C790

2

0.1U_0402_16V4Z

1

2

Max 2.5A

+USB_VCCA+5VALW

C791

1000P_0402_50V7K

B

D11

+USB_VCCA

USB20_N2_R

1

+USB_VCCA

C258

SATA_TXN2

2

0.1U_0402_16V4Z

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

D12

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

GND

USB20_P2_R

2

IO1

1

SATA_TXP2

2

IO1

1

C

Max 0.5A

+USB_VCCA

USB20_N2<27> USB20_P2<27>

SATA_TXP2<28> SATA_TXN2<28>

SATA_RXN2_C<28> SATA_RXP2_C<28>

C792 0.01U_0402_16V7K@ C792 0.01U_0402_16V7K@ C793 0.01U_0402_16V7K@ C793 0.01U_0402_16V7K@

R1140 0_0402_5%R1140 0_0402_5%

R1142 0_0402_5%R1142 0_0402_5%

12 12

1 2 1 2

USB20_N2_R USB20_P2_R

SATA_TXP2 SATA_TXN2

SATA_RXN2 SATA_RXP2

D

JESAT

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

7

A-

8

GND

9

B-

10

B+

11

GND

12

GND

13

GND

14

GND

15

GND

TYCO_1759576-1

9/20 DC020709060

E

JP47

USB20N0 USB20P0

USB20N1 USB20P1

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_87213-1000G

9/20 SP02000DX00

CONN@

+5VALW

USB_EN#<40>

USB20_N0<27> USB20_P0<27>

USB20_N1<27> USB20_P1<27>

USB_EN#

R1141 0_0402_5%R1141 0_0402_5%

1 2

R1143 0_0402_5%R1143 0_0402_5% R1144 0_0402_5%R1144 0_0402_5%

1 2

R1145 0_0402_5%R1145 0_0402_5%

Finger printer

R622 0_0603_5%@R622 0_0603_5%@

1 2

Q31 SI2301BDS-T1-E3_SOT23-3@

S

D

13

G

2

USB_EN#

USB20_N7<27> USB20_P7<27>

D21

+3VS_FB USB20_N7

3 3

4 4

D21

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

GND

USB20_P7

2

IO1

1

20070209 Add for FPR

1

C832

@C832

@

0.1U_0402_16V4Z

2

USB20_N7 USB20_P7

30mil

+3VS_FB

R581 0_0603_5%@R581 0_0603_5%@

1 2

JP39

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

CONN@

9/20 SP01000B000

+3VS+3VALW

BT Connector

CONN@

ACES 87213-0800G

C798

1U_0603_10V4Z

BT_OFF<28>

JP32

GND2 GND1

8 7 6 5 4 3 2 1

1

2

10 9 8 7 6 5 4 3 2 1

C802

0.1U_0402_16V4Z

R520

1 2

10K_0402_5%

Check BT power consumption < 1A

USB20_P6 USB20_N6

R517 1K_0402_5%@R517 1K_0402_5%@

1 2

R518 1K_0402_5%@R518 1K_0402_5%@

1 2

0612 no install

+3VAUX_BT

USB20_N6

Q24 SI2301BDS-T1-E3_SOT23-3

S

12

2

R519

R519 100K_0402_5%

100K_0402_5%

1

4 3

PRTR5V0U2X_SOT143-4@

G

2

D16

IO1

VIN

GND

IO2

D

13

1

C799

2

0.01U_0402_16V7K

+3VAUX_BT

USB20_P6

2 1

0.1U_0402_16V4Z

1

C800

2

4.7U_0805_10V4Z

USB20_P6 <27> USB20_N6 <27> BT_LED <41> CH_DATA <33>

CH_CLK <33>

+3VAUX_BT+3VS

40mil

1

C801

2

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

38 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

+3VL

1 2

R995 0_0402_5%@R995 0_0402_5%@

+3VALW

1 2

1 1

2 2

3 3

R996 0_0402_5%@R996 0_0402_5%@

SMB_EC_CK1<6,40,44> SMB_EC_DA1<6,40,44>

C803

@C803

@

0.1U_0402_16V4Z

SIRQ<26,40>

LPC_AD3<26,40>

LPC_AD1<26,40>

LPC_FRAME#<26,40>

+3VAL

1

2

U31

@U31

@ 8 7 6 5

AT24C16AN-10SI-2.7_SO8

VCC WP SCL SDA

GND

A0 A1 A2

LPC Debug Port

+3VALW

SIRQ

7

LPC_AD3

8

LPC_AD1

9

LPC_FRAME#

10

9/20 ??????

12

R521

@R521

@

100K_0402_5%

1 2 3 4

12

R526

@R526

@

100K_0402_5%

SB_INT_FLASH_SEL<28>

SPI Flash (8Mb*1)

0.1U_0402_16V4Z

SPI_CS#<40> SPI_CLK<40>

EC_SO_SPI_SI<40>

JP50

SPI_CS#

EC_SI_SPI_SO_R

JP50

2

112

4

334

6

556

8

778

E&T_2941-G08N-00E~D@

C:Chg. PN to LTC00000200

H31

LPC_DRQ#

56

PLT_RST#

4

LPC_AD2

3

LPC_AD0

2

CLK_PCI_SIO

1

DEBUG_PAD@

1 2 2

1

LPC_DRQ# <26>

PLT_RST# <11,14,15,26,32,33,34,40>

LPC_AD2 <26,40>

LPC_AD0 <26,40>

CLK_PCI_SIO <26>

R232

22_0402_5%

C486

22P_0402_50V8J

+3VL

20mils

1

C484

2

1 2

R221 0_0402_5%R221 0_0402_5%

1 2

R227 0_0402_5%

R227 0_0402_5% R229 0_0402_5%

R229 0_0402_5%

INT_FLASH_EN# SPI_CLK_R EC_SO_SPI_SI_R

LPC Debug Port

INT_SPI_CS# SPI_CLK_R

EC_SO_SPI_SI_R EC_SI_SPI_SO_R

12

+3VALW

JP41

ACES_85201-2005@

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

+3VS

R137 0_0402_5%@R137 0_0402_5%@

1 2

9/20 DC233105000

U29

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

WIESON G6179 8P SPI

VSS

4

2

Q

9/20 SP07000F500

INT_SPI_CS#

CLK_14M_SIO

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

LPC_DRQ#

PLT_RST#

CLK_PCI_SIO2 CLK_PCI_SIO

SIRQ

R1175

@R1175

@

1 2

22_0402_5%

CLK_14M_SIO <22>

R398

@R398

@

1 2

0_0402_5%

&U29

SST25VF080B-50-4C-S2AF_SO8

9/20 SA000012E00/SA00000XT00

@

12

R223 0_0402_5%

+3VL

0.1U_0402_16V4Z

5

U24

@U24

@

4

B

Vcc

Y

A

G

NC7SZ32P5X_NL_SC70-5

3

2 1

C624

@C624

@

INT_FLASH_EN#

SPI_CS#

EC_SI_SPI_SO <40>

12

R313 100K_0402_5%@R313 100K_0402_5%@

1 2

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

39 54Friday, February 13, 2009

E

of

F

A

+3VL_EC

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1 1

C805

C806

2

0.1U_0402_16V4Z

1

C807

2

1000P_0402_50V7K

C808

1000P_0402_50V7K

1

C809

2

1

2

R530

C810

1 2

15P_0402_50V8J@

CLK_PCI_EC<26,30>

+3VL_EC

2 2

+3VL_EC

4.7K_0402_5%

+3VL_EC

12

SMB_EC_DA1

12

SMB_EC_CK1

12

SMB_EC_DA2

12

SMB_EC_CK2

12

R538

R538 10K_0402_5%

10K_0402_5%

LID_SW#

+5VALW

ON/OFF#<41>

R528

+3VS

R529

R529 R531

R531 R532

R532

+3VL_EC

R565

3 3

4 4

ACES_85205-0400

R565 10K_0402_5%

10K_0402_5%

1 2

CONA#

+3VS

12

R1154

R1154 10K_0402_5%

10K_0402_5%

WL_BLUE_BTN

EC DEBUG port

@

JP34

1

E51_RXD

2

E51_TXD

3

4

9/20 SP020007200

A

R530

1 2

R533

1 2

C811

DOCK_SLP_BTN#

12

0.1U_0402_16V4Z

+3VL_EC

R543

4.7K_0402_5%

1 2

32.768KHZ_12.5PF_1TJS125DJ4A420P

33_0402_5%@

47K_0402_5%

LAN_POWER_OFF<32>

C813

C813 15P_0402_50V8J

15P_0402_50V8J

1 2

Y7

3

NC

2

NC

1 2

C815

C815 15P_0402_50V8J

15P_0402_50V8J

OUT

SMB_EC_CK1<6,39,44> SMB_EC_DA1<6,39,44> SMB_EC_CK2<6,21> SMB_EC_DA2<6,21>

SLP_S3#<27> SLP_S5#<27> EC_SMI#<27> LID_SW#<41>

WL_BLUE_BTN<41>

H_THERMTRIP#<6,27>

IN

B

GATEA20<27> KB_RST#<27> SIRQ<26,39>

LPC_FRAME#<26,39>

LPC_AD3<26,39> LPC_AD2<26,39> LPC_AD1<26,39> LPC_AD0<26,39>

PLT_RST#<11,14,15,26,32,33,34,39>

EC_SCI#<27>

HDARST#<27,30>

VLDT_EN<43>

R1176 0_0402_5%

DIM_LED<43> NUM_LED#<41>

4 1

B

12

@

R545

R545 20M_0402_5%

20M_0402_5%

GATEA20 KB_RST# SIRQ LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC

PLT_RST# ECRST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_DA2

SLP_S3# SLP_S5# EC_SMI# LID_SW#

WL_BLUE_BTN

CONA#

E51_TXD E51_RXD

12

ON/OFF#

CRY2

CRY1

R527

1 2

0_0805_5%

U33

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

+3VL_EC

+EC_AVCC

C

+3VL_EC+3VL

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

12

L80

L80 0_0603_5%

0_0603_5%

1 2

C816 0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

Issued Date

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB926QFC0_LQFP128_14X14

69

SA00001J540(C0) S IC KB926QFC0 LQFP 128P

ECAGND

L81

1 2

0_0603_5%

2007/10/11 200810/11

C

INV_PWM

21

FAN_PWM

23 26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64 65 66

TP_BTN#

75

ANA_MIC_DET

76

68 70

IREF

71 72

83 84

I2C_INT

85

MUTE_LED

86 87 88

97

DOCK_VOL_UP#

98

DOCK_VOL_DWN#

99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

R558 10K_0402_5%R558 10K_0402_5%

TP_CLK TP_DATA

R537 4.7K_0402_5%@R537 4.7K_0402_5%@

1 2

R1044 100K_0402_5%R1044 100K_0402_5%

CIR_IN FSTCHG

BAT_LED# ON/OFFBTN_LED# SYSONSMB_EC_CK2 VR_ON

EC_RSMRST#

SB_PWRGD BKOFF#

TP_LED#

SUSP# PWRBTN_OUT#

12

C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z

Need 1uf for 926 C version

Compal Secret Data

Deciphered Date

1 2

12

D

INV_PWM <24> FAN_PWM <4> EC_BEEP <35> ACOFF <45>

BATT_TEMP <44> BATT_OVP <44> ADP_I <45> ADP_ID <44> TP_BTN# <41>

DAC_BRIG <24> VCTRL <45> IREF <45> AC_SET <45>

EC_MUTE# <36> USB_EN# <38>

TP_CLK <41> TP_DATA <41>

C812

1 2

0.01U_0402_16V7K

1 2

R95510K_0402_5% R95510K_0402_5%

select SPI ROM or LPC ROM

VGATE <50>

EC_SI_SPI_SO <39> EC_SO_SPI_SI <39> SPI_CLK <39> SPI_CS# <39>

CIR_IN <36> FSTCHG <45>

STD_ADP <45> CAPS_LED# <41> BAT_LED# <41> ON/OFFBTN_LED# <41>

SYSON <43,48>

EC_RSMRST# <27>

EC_LID_OUT# <27> EC_ON <43,46>

WL_BLUE_LED# <41> SB_PWRGD <6,27,50> BKOFF# <24>

TP_LED# <41>

VFIX_EN <50> ENBKL <16> EAPD_CODEC <35> EC_THERM# <28> SUSP# <35,43,45,47,51>

PWRBTN_OUT# <27>

PCI_SERR# <26>

12

R1153 10K_0402_5%

D

ECAGND

+3VS

+3VL_EC

AC_LED# <44>

+5VL

R541 10K_0402_5%

2 1

D54

D54 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2 R1040

R1040 150K_0402_5%

150K_0402_5%

1 2

C1073

C1073 100P_0402_50V8J

100P_0402_50V8J

D57

CH751H-40PT_SOD323-2

E

Keyboard Connector

JP33

KSO15

1

KSO10

2

KSO11

3

KSO14

4

KSO13

5

KSO12

6

KSO3

7

KSO6

8

KSO8

9

KSO7

10

KSO4

11

KSO2

12

KSI0

13

KSO1

14

KSO5

15

KSI3

16

KSI2

17

KSO0

18

KSI5

19

KSI4

20

KSO9 KSO9

21

KSI6

22

KSI7

23

KSI1

24 25

26

ACES_85201-2405

CONN@

KSO15 KSO10 KSO11 KSO14 KSO13 KSO12 KSO3 KSO6 KSO8 KSO7 KSO4 KSO2 KSI0 KSO1 KSO5 KSI3 KSI2

KSO0 KSI5 KSI4

KSI6 KSI7 KSI1

For EMI

C213 100P_0402_25V8K@C213 100P_0402_25V8K@

1 2

C609 100P_0402_25V8K@C609 100P_0402_25V8K@

1 2

C754 100P_0402_25V8K@C754 100P_0402_25V8K@

1 2

C756 100P_0402_25V8K@C756 100P_0402_25V8K@

1 2

C757 100P_0402_25V8K@C757 100P_0402_25V8K@

1 2

C758 100P_0402_25V8K@C758 100P_0402_25V8K@

1 2

C759 100P_0402_25V8K@C759 100P_0402_25V8K@

1 2

C764 100P_0402_25V8K@C764 100P_0402_25V8K@

1 2

C768 100P_0402_25V8K@C768 100P_0402_25V8K@

1 2

C769 100P_0402_25V8K@C769 100P_0402_25V8K@

1 2

C822 100P_0402_25V8K@C822 100P_0402_25V8K@

1 2

C823 100P_0402_25V8K@C823 100P_0402_25V8K@

1 2

C824 100P_0402_25V8K@C824 100P_0402_25V8K@

1 2

C825 100P_0402_25V8K@C825 100P_0402_25V8K@

1 2

C826 100P_0402_25V8K@C826 100P_0402_25V8K@

1 2

C875 100P_0402_25V8K@C875 100P_0402_25V8K@

1 2

C876 100P_0402_25V8K@C876 100P_0402_25V8K@

1 2

C877 100P_0402_25V8K@C877 100P_0402_25V8K@

1 2

C878 100P_0402_25V8K@C878 100P_0402_25V8K@

1 2

C884 100P_0402_25V8K@C884 100P_0402_25V8K@

1 2

C885 100P_0402_25V8K@C885 100P_0402_25V8K@

1 2

C886 100P_0402_25V8K@C886 100P_0402_25V8K@

1 2

C887 100P_0402_25V8K@C887 100P_0402_25V8K@

1 2

C888 100P_0402_25V8K@C888 100P_0402_25V8K@

1 2

KB Back Light Conn

JP48

5

G1

6

G2

ACES_85201-04051

CONN@

DOCK_VOL_UP# DOCK_VOL_DWN#

12

VR_ON <50> AC_IN <45>

12

+3VL_EC

21

R397

R397 150K_0402_5%

150K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

ACIN <28>

12

+3VALW

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

TP_CLK

TP_DATA

SUSP# SYSON

12

R536

R536 100K_0402_5%

100K_0402_5%

TP_BTN#

E

1

2

3

4

10K_0402_5%

R534

10K_0402_5%

1 2

R535

10K_0402_5%

1 2

12

R1050

1 2

10K_0402_5%

40 54Friday, February 13, 2009

+5VS_LED

+3VS

R589

12 12

R590

+5V_TP

R539

R539 100K_0402_5%

100K_0402_5%

+3VS

of

F

A

B

C

D

E

for debug only

BTN

R1178 0_0603_5%@ R1178 0_0603_5%@

1 1

1 2

TOP

SW3

@SW3

@

5

6

SMT1-05_4P

3 4

1 2

MDC 1.5 Conn.

HDA_SDOUT_MDC<27>

HDA_SYNC_MDC<27>

HDA_SDIN1<27>

HDA_RST#_MDC<27>

2 2

+3VS

1

C778

C779

2

1000P_0402_50V7K

0.1U_0402_16V4Z

R495

1 2

33_0402_5%

1

C780

4.7U_0805_10V4Z

@

2

HDA_SDIN1_MDC

HDD LED

+5VS

12

R1177

10K_0402_5%

SATA_LED#<28>

3 3

2N7002DW-7-F_SOT363-6

2

Q172A

5

61

3

Q172B

Q172B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

ON/OFF Button Connector(delete)

ON/OFF#

9/20 SP01000J100 9/20 STANDOFF (H= 5.0 mm) ES000000800

JP25

CONN@

JP25

CONN@

WHITE

D46

HT-F196BP5_WHITE

SC500004W00

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND13GND14GND15GND16GND17GND

Connector for MDC Rev1.5

+5VS_LED

R988

21

1 2

200_0402_5%

RES0 RES1

3.3V GND3 GND4

IAC_BITCLK

ACES_88018-124G

18

2 4 6 8 10 12

R496

@R496

@

10_0402_5%

1 2 1

C777

@C777

@

10P_0402_50V8J

2

TP ON/OFF

+3VS +3VS

HDA_BITCLK_MDC <27>

TouchPAD ON/OFF LED

200_0402_5%

+5VS

AMBER WHITE

12

R985

10K_0402_5%

2N7002_SOT23-3

+3VALW

12

R1038

10K_0402_5% @

SW1

SW1 SMT1-05-A_4P

SMT1-05-A_4P

3 4

5

+5VALW +5V_TP

SYSON#<43,49>

+5VS_LED

12

R983

43

YELLOW

13

D

2

G

Q153

S

TP_BTN#

1 2

6

R235 0_0603_5%R235 0_0603_5%

1 2

Q85 SI2301BDS-T1-E3_SOT23-3 @

S

12

R984

R984 200_0402_5%

200_0402_5%

21

D45

WHITE

HT-297UY5/BP5_YELLOW-WHITE

On (TP_LED#=L)-> White Off (TP_LED#=H)-> Amber

TP_LED#

10K_0402_5% @

D

13

G

2

TP_LED# <40>

TP_BTN# <40>

Max 0.5A

M/B TO TP/B

1

C819

0.1U_0402_16V4Z

5 6

ACES_85201-04051

9/20 SP01000KC00/SP01E000900

JP37

G1 G2

CONN@

2

1

2

3

4

100P_0402_50V8J

Max 0.5A

+5V_TP

TP_CLK TP_DATA

TP_DATA TP_CLK

D31

PSOT24C_SOT23-3

1

@C821

@

C820

@C820

@

2

100P_0402_50V8J

3

1

TP_CLK <40> TP_DATA <40>

C821

2

SWITCH BOARD.

+5VALW_LED

ON/OFFBTN_LED#<40>

WL_BLUE_BTN<40>

NUM_LED#<40>

ON/OFF#<40>

ON/OFFBTN_LED#

WL_BLUE_LED#

ON/OFF#

Reed switch BOARD.

0.1U_0402_16V4Z

LID_SW#<40>

10P_0402_50V8J

C262

C263

+3VL

1

2

1

2

+5VS_LED

JP40

1

2

3

G1

4

G2

ACES_85201-04051

CONN@

9/20 SP020020710

JP36

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

CONN@

9/20 SP01000H400

5 6

Battery Charge LED

R550

1 2

200_0402_5%

R552

1 2

470_0402_5%

R549

200_0402_5%

+5VALW_LED

+5VS_LED

+5VALW_LED

B

WHITE

D50

WHITE

21

D30

21

D27

21

1 2

BAT_LED#<40>

HT-F196BP5_WHITE

SC500004W00

CAPS LOCK LED

CAPS_LED#<40>

POWER LED

4 4

White LED: VF=3V, IF = 10mA, Res = 200 ohm Amber LED: VF=1.8V, IF = 8mA, Res = 390 ohm

A

ON/OFFBTN_LED#

HT-F196BP5_WHITE

SC500004W00

WHITE

HT-F196BP5_WHITE

SC500004W00

WLAN and BT LED inform pin to KBC

+5VS

R989

1 2

10K_0402_5%

WL_BLUE_LED#<40>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

WL_BLUE_LED#

3

Q158B

2N7002DW-7-F_SOT363-6

2007/10/11 200810/11

Q158B

4

Compal Secret Data

Deciphered Date

+3VS

2

6 1

Q158A

2N7002DW-7-F_SOT363-6

5

12

R1025

R1025 100K_0402_5%

100K_0402_5%

R1152

1 2

10K_0402_5%

D

WL_LED# <33>

BT_LED <38>

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

E

of

41 54Friday, February 13, 2009

F

A

B

C

D

E

1 1

2 2

H47, H48 -Stand off of MODEM on BOT Side

3 3

4 4

H33

H_2P8@

1

H37

H_2P8@

1

H42

H43

H_2P8@

H_4P2@

1

H47

H48

H_4P0@

1

H54

H53

H_3P3X0P6N@

1

H54

H_3P3X0P6N@

1

CF2CF2

CF1CF1

1

H35

H36

H34

H_2P8@

1

H44

H_4P2@

1

H49

H_2P8@

1

H_5P6N@

CF3CF3

1

A

H36

H_2P8@

1

H40

H41

H_2P8@

1

H46

H45

H_4P2@

1

H50

H_2P5N@

1

H56

H55

H_5P0X2P5N@

1

CF4CF4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

42 54Friday, February 13, 2009

E

F

of

A

B

C

D

E

DIM LED

+5VALW_LED

R587

@R587

@

2

G

EC_ON#

R414 0_0603_5%R414 0_0603_5%

1 2

Q32 SI2301BDS-T1-E3_SOT23-3@

S

G

12

2

13

D

Q51

@

Q51

@

2N7002_SOT23-3

S

G

2

S

Q166

@

SI2301BDS-T1-E3_SOT23-3

1 2

R415 0_0603_5%R415 0_0603_5%

+5VL

12

R598

R598 100K_0402_5%

100K_0402_5%

13

D

2

G

S

D

13

1 @C836

@

2

+5VS_LED

13

D

Q44

Q44 2N7002_SOT23-3

2N7002_SOT23-3

C836

0.1U_0402_16V4Z

1

C1069

@C1069

@

0.1U_0402_16V4Z

2

+5VALW TO +5VS

+5VALW

1 1

4.7U_0805_10V4Z

Q35

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C864

2

S S S G

C833

1 2 3 4

+5VS

4.7U_0805_10V4Z

1

2

1U_0402_6.3V4Z

RUNON

C835

1

2

+1.8V TO +1.8VS

+1.8V

Q4

IRF8113PBF_SO8

8 7

2 2

5

1

C842

2

12

4.7U_0805_10V4Z

R140

750K_0402_5%

1 2 36

4

1.8VS_ENABLE

1

C849

2

0.01U_0402_25V7K

+1.8VS

1

C848

2

1U_0402_6.3V4Z

330K_0402_5%

13

D

Q13

S

2N7002_SOT23-3

R138

1 2

SUSP

2

G

2

C841

C841 10U_0805_10V4Z

10U_0805_10V4Z

1

B+

+3VALW TO +3VS

+3VALW +3VS

1

C839

8 7 6 5

SI4800BDY_SO8

1

C840

2

4.7U_0805_10V4Z

Q14

D D D D

C839

1

S

2

S S G

3 4

1

2

0.01U_0402_25V7K

2

1U_0402_6.3V4Z

RUNON

D

C834

S

13

+1.2VALW TO +1.2V_HT

+1.2VALW +1.2V_HT

Q11

8 7

5

1

C847

2

4.7U_0805_10V4Z

Q11

IRF8113PBF_SO8

4 12

R234

750K_0402_5%

1 2 36

C846

1

2

0.01U_0402_25V7K

1

2

1U_0402_6.3V4Z

C837

1

C838 4.7U_0805_10V4Z

2

R152

12

330K_0402_5%

SUSP

Q17

2

2N7002_SOT23-3

G

1

C862 4.7U_0805_10V4Z

2

R233

330K_0402_5%

13

D

VLDT_EN#

Q12

2

2N7002_SOT23-3

G

S

B+

12

B+

Discharge circuit

2

G

+1.8VS

R279

R279 470_0805_5%

470_0805_5%

1 2 13

D

2N7002_SOT23-3

S

Q48

+5VS

3 3

SUSP SUSP

2

G

R239

R239 470_0805_5%

470_0805_5%

1 2 13

D

Q46

2N7002_SOT23-3

S

+1.2V_HT +1.8V +1.2VALW

R280

R280 470_0805_5%

470_0805_5%

1 2 13

D

2

G

D

Q37

2N7002_SOT23-3

S

VLDT_EN# SYSON#

2

G

R284

R284 470_0805_5%

470_0805_5%

1 2 13

D

Q41

2N7002_SOT23-3

S

+3VALW TO +3V

+3VALW

Q137

@Q137

1

2

4.7U_0805_10V4Z

@

8

D

7

D

6

D

5

D

SI4800BDY_SO8

C1025

@C1025

@

S S S G

1 2 3 4

0.01U_0402_25V7K

@C1023

@

1

@C1026

@ 2

C1023

1U_0402_6.3V4Z

RUNON_S4

C1026

+1.2VALW TO +1.2V

+1.2VALW +1.2V

IRF8113PBF_SO8

8 7

5

Q139

@Q139

@

1

C1029

@C1029

@

2

4.7U_0805_10V4Z

Reserve until SI-1 stage after SB USB PHY power saving report

1 2

EC_ON#

13

2

G

1 2 36

4

RUNON_S4

R368

470_0805_5%@

D

Q42

2N7002_SOT23-3@

S

+3V

1

C1024 4.7U_0805_10V4Z@C1024 4.7U_0805_10V4Z@

2

R956

@R956

@

330K_0402_5%

13

D

Q138

@

Q138

@

2

G

2N7002_SOT23-3

S

1

C1027

@C1027

@

2

1U_0402_6.3V4Z

@

2N7002_SOT23-3

SYSON# SYSON#

1

2

12

B+

SYSON#

1

C1028 4.7U_0805_10V4Z@C1028 4.7U_0805_10V4Z@

2

+1.2V +3V

R957

@R957

@

470_0805_5%

1 2

Q140

2N7002_SOT23-3

13

D

2

G

S

+5VALW

10K_0402_5%

DIM_LED<40>

+5VS

R958

@R958

@

470_0805_5%

1 2

Q141

@

Q141

@

13

D

2

G

S

DIM_LED

EC_ON<40,46>

+5VL+5VL

12

+3VS

R288

R288 470_0805_5%

470_0805_5%

1 2 13

D

2

G

D

Q47

2N7002_SOT23-3

S

4 4

SUSP

A

2

G

+0.9V

R292

R292 470_0805_5%

470_0805_5%

1 2 13

D

Q49

2N7002_SOT23-3

S

+1.5VS +1.1VS

R293

R293 470_0805_5%

470_0805_5%

1 2 13

D

2

G

D

Q50

2N7002_SOT23-3

S

B

SUSPSYSON#

SUSP

2

G

100K_0402_5%

R294

R294 470_0805_5%

470_0805_5%

1 2 13

D

Q52

2N7002_SOT23-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SYSON#<41,49> SUSP <18,49>

2007/10/11 200810/11

100K_0402_5%

SYSON#

SYSON

2N7002_SOT23-3

Compal Secret Data

12

R595

13

D

Q38

2

G

S

Deciphered Date

R596

R596 100K_0402_5%

100K_0402_5%

13

D

Q39

2N7002_SOT23-3

S

Change to +3VL(same as EC) to avoid leakage

SUSP

2

G

D

SUSP# <35,40,45,47,51>SYSON<40,48> VLDT_EN<40>

+5VL

12

R597

R597 100K_0402_5%

100K_0402_5%

VLDT_EN#<13>

Title

Size Document Number Rev

Custom

Date: Sheet

VLDT_EN#

13

D

2

E

G

D

Q40

Q40 2N7002_SOT23-3

2N7002_SOT23-3

S

43 54Friday, February 13, 2009

VLDT_EN

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

of

F

A

BATT1

45@

CR2032 RTC BATTERY

B

C

D

E

1 1

ACES_88334-057N

PJP1

2 2

+3VALW

PQ3

PQ3 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

PR9

1 2

100K_0402_5%

2

1 3

PR8

PR8 2K_0402_5%

2K_0402_5%

1 2

ADP_SIGNAL

5

4

3

2

1

ADPINADPIN

1 2

PR3

PR3 10K_0402_5%

10K_0402_5%

2

3

PD1

@PJSOT24C_SOT23-3

1

12

100P_0402_50V8J

PC2

+3VLP

12

PR2

PR2 10K_0402_5%

10K_0402_5%

AC_LED# 47

12

PL1

SMB3025500YA_2P

1 2

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

PD4

RLZ3.6B_LL34

PC4

100P_0402_50V8J

PC12

12

@1000P_0402_50V7K

12

PC5

1000P_0402_50V7K

VIN

12

ADP_ID 41

BATT

12

+5VALW

PR1

340K_0402_1%

12

PR4

499K_0402_1%

12

PC6

0.01U_0402_25V7K

12

PR6

105K_0402_1%

12

PC1

0.01U_0402_25V7K

3 2

PU1A

LM358ADT_SO8

8

P

+

1

0

-

G

4

PR5

10K_0402_5%

12

BATT_OVP 33

PH1 under CPU botten side :

PL3

VMB

HCB2012KF-121T50_0805

PJP2

8

7

6

5

4

3

2

1

9

GND

10

GND

SUYIN_200275MR008GXOLZR

3 3

SUYIN_200275MR008GXOLZR

12

PR17

PR17 1K_0402_5%

1K_0402_5%

6.49K_0402_1%

1 2

PR16

EC_SMD EC_SMC

12

PR13

100_0402_5%

BAT_ID <46>

+3VLP

12

PR14

PR14 100_0402_5%

100_0402_5%

BATT_TEMP

PD2

PD2 @SM05_SOT23

@SM05_SOT23

3 2

1

2

3

PD3

1

@SM24.TC_SOT23-3

SMB_EC_DA1

SMB_EC_CK1

1 2

PL4

PL4 HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

12

PC8

PC8 1000P_0402_50V7K

1000P_0402_50V7K

SMB_EC_DA1 <39,40>

SMB_EC_CK1 <39,40>

BATT

12

PC9

0.01U_0402_50V4Z

PC10

0.22U_0603_10V7K

CPU

12

+5VS

12

PH1

PH1 10KB_0603_1%_TH11-3H103FT

10KB_0603_1%_TH11-3H103FT

+5VALW

12

PR12

2.21K_0402_1%

CPU thermal protection at 95 +-3 degree C

PR7

604K_0402_1%

1 2

PR10

200K_0402_1%

1 2 1 2

PR11

150K_0402_1%

PR15

12

8

5

P

+

6

-

G

4

12

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

7

0

PU1B

PU1B LM358ADT_SO8

LM358ADT_SO8

13

D

2

G

S

13

D

2

G

S

ENTRIP1 39

PQ1

PQ1 @SSM3K7002FU_SC70-3

@SSM3K7002FU_SC70-3

EN0 39

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

44 54Friday, February 13, 2009

E

of

F

A

B

C

D

P4

PC101

13

2

G

PACIN

ACOFF#

PR131

133K_0402_1%

PR135

10K_0603_0.1%

12

47P_0402_50V8J

13

2

D

S

PQ107

PQ107 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR111

3K_0402_1%

1 2

3 2

1.24VREF

PR101

47K_0402_5%

1 2

2

PQ105

PQ105 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PD101

1SS355_SOD323-2

Charge Detector

VIN

PD104

PD104 1SS355_SOD323-2

1SS355_SOD323-2

PR123

1 2

1M_0402_5%

1 2

VIN_1

12

PR125

PR125 47_1206_5%

47_1206_5%

12

PC125

0.1U_0603_25V7K

8

P

+

1

O

-

G

PU102A

PU102A LM393DG_SO8

LM393DG_SO8

4

A

PQ101

PQ101 SI4835BDY-T1-E3_SO8

SI4835BDY-T1-E3_SO8

8 7

5

DTA144EUA_SC70-3

PQ104

1 3

PACIN_1

13

D

2

G

S

VCTRL

1 2 36

4

PC106

PQ109

PQ109 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR114

PR114 @0_0402_5%

@0_0402_5%

1 2

1U_0603_10V6K

+3VLP

12

PR129

10K_0402_1%

STD_ADP

P2

12

0.47U_0603_16V7K

12

PC117

+3VLP

PR128

10K_0402_5%

2

G

FSTCHG

SI4835BDY-T1-E3_SO8

1 2 3 6

12

PR106

200K_0402_5%

PR109

PR109 150K_0402_5%

150K_0402_5%

143K_0402_1%

12

CHGEN#

13

D

PQ112

PQ112 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR113

4

FSTCHG#

PQ103

AC_SET

SUSP#

12

PR115

PR115 100K_0402_1%

100K_0402_1%

ADP_I

1 2

PR137

PR137 20K_0402_1%

20K_0402_1%

8 7

5

PR104

PR104 0_0402_5%

0_0402_5%

1 2

@0.01U_0402_16V7K

PR110

PR110 0_0402_5%

0_0402_5%

1 2

PC112

1 2

1U_0603_6.3V6M

15K_0402_1%

12

PC120

0.22U_0603_10V7K

+3VLP

12

PR132

100K_0402_5%

13

D

PQ113

2

SSM3K7002FU_SC70-3

G

S

ACDET

12

PR138

100K_0402_1%

PC107

BQ24740VREF

+3VLP

PR116

10K_0402_5%

1 2

12

10

11

12

13

14

12

PR118

0.1U_0402_10V7K

B

ACSET

12

8

9

PR140

IADSLP

AGND

VREF

VDAC

VADJ

EXTPWR

ISYNSET

PC121

PC123

ACDET

100K_0402_5%

7

6

LPREF

ACSET

PU101

PU101 BQ24740RHDR_QFN28_5X5

BQ24740RHDR_QFN28_5X5

IADAPT

SRSET

15

16

IADAPT

12

100P_0402_50V8J

12

0.1U_0603_25V7K

5

ACDET

BAT

17

BATT

12

4

LPMD

SRN

18

VIN

1 1

PR107

PR107 47K_0402_1%

47K_0402_1%

1 2

2 2

3 3

VIN

12

4 4

PR102

0.012_2512_1%

1 2

PC102

1U_0603_6.3V6M

1 2

PC108

3

2

ACP

SRP

19

20

PR120

133K_0402_1%

12

PR121

PR121 200K_0402_1%

200K_0402_1%

B+

PL101

PL101 HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

PC109

PC109 @0.1U_0603_25V7K

@0.1U_0603_25V7K

CHGEN#

1

ACN

TP

CHGEN

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

DPMDET

CELLS

21

SSM3K7002FU_SC70-3

12

CHG_B+

12

PC129

PC103

1500P_0402_50V7K

29

PC110

PC110 1U_0805_25V6K

1U_0805_25V6K

28

1 2

BST_CHG

27

DH_CHG

26

LX_CHG

25

PD102

REGNVADJ

24

1SS355_SOD323-2

DL_CHG

23

22

12

PC119

PC119 1U_0603_10V6K

1U_0603_10V6K

100K_0402_5%

1 2

13

D

PQ111

Security Classification

G

S

IREF

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

4.7U_0805_25V6-K

PR108

PR108 10_1206_5%

10_1206_5%

1 2

12

PR117

2

12

PC104

4.7U_0805_25V6-K

PC111

0.1U_0402_10V7K

1 2

BQ24740VREF

12

PC124

2007/05/29 200810/11

12

PC105

4.7U_0805_25V6-K

CHG_B+

47K_0402_5%

47K_0402_5% PR119

PR119

12

0.1U_0603_25V7K

C

PC128

220P_0402_50V7K

578

3 6

241

578

PQ110

3 6

241

FDS6690AS_SO8

12

PQ108

PQ108 AO4466_SO8

AO4466_SO8

PL102

PL102 10U_LF919AS-100M-P3_4.5A_20%

10U_LF919AS-100M-P3_4.5A_20%

1 2

PR139

PR139 @4.7_1206_5%

@4.7_1206_5%

1 2 12

PC131

@680P_0603_50V7K

BAT_ID

PC122

@0.1U_0603_25V7K

100K_0402_1%

PC126

0.047U_0402_16V7K

Compal Secret Data

Deciphered Date

PR126

12

PC113

4.7U_0805_25V6-K

VIN

12

1 2

12

PR133

PR133 10K_0603_0.1%

10K_0603_0.1%

22P_0402_50V8J

12

PC114

4.7U_0805_25V6-K

0.1U_0402_10V7K

PR130

2.15K_0402_1%

PC127

PR112

0.015_1206_1%

1 2

PC118

12

PQ102

PQ102 FDS6675BZ_SO8

FDS6675BZ_SO8

1 2 3 6

4

ACOFF#

BATT

12

PR122

PR122 681K_0402_1%

681K_0402_1%

1 2

8

PU102B

5

P

+

O

6

-

G

LM393DG_SO8

4

5

APL1431LBBC-TR_SOT23-5

BATT

8 7

5

12

PC116

PC115

4.7U_0805_25V6-K

VIN

12

PR127

PR127 10K_0402_1%

10K_0402_1%

7

12

PD103

RLZ4.3B_LL34

PR136

60.4K_0402_1%

1 2

REF

ANODE

Title

Size Document Number Rev

Date: Sheet

VIN_1

PU103

3

CATHODE

2

NC

1

NC

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

D

PR103

47K_0402_5%

1 2

12

PR105

PR105 10K_0402_5%

10K_0402_5%

13

2

PQ106

PQ106 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR124

PR124 1K_0402_5%

1K_0402_5%

1 2

12

PR134

PR134 10K_0402_5%

10K_0402_5%

1.24VREF

VIN

45 54Friday, February 13, 2009

ACOFF

AC_IN

PACIN

of

F

A

B

C

D

E

1 1

2VREF_51125

0.22U_0603_10V7K

PC302

12

PR302

PR301

13.7K_0402_1%

1 2

PR303

B+

PL301

HCB2012KF-121T50_0805

1 2

2 2

3 3

PACIN_138 EC_ON 33

4 4

B++

12

PC301

2200P_0402_50V7K

+3VALWP

220U_6.3VM_R15

ENTRIP137

PQ305

SSM3K7002FU_SC70-3

1 2

PR318

PR318 604K_0402_1%

604K_0402_1%

PC318

0.047U_0603_16V7K

12

PC303

4.7U_0805_25V6-K

3.3UH_SIQB74B-4R7PF_5.9A_20%

1

+

PC309

2

13

D

S

PQ308

2

G

12

PL302

2

G

+3VLP

578

10U_0805_6.3V6M

UG1_3V

3 6

578

PQ303

PQ303 AO4468_SO8

AO4468_SO8

3 6

PR314

PR314 100K_0402_5%

100K_0402_5%

10U_0805_6.3V6M

PR309

0_0402_5%

1 2

VL

PQ301

AO4466_SO8

241

12

241

ENTRIP2

13

D

PQ306

2

SSM3K7002FU_SC70-3

G

S

PR313

PR313 100K_0402_5%

100K_0402_5%

1 2

PQ307

13

D

S

SSM3K7002FU_SC70-3

2

G

S

12

PC306

12

1 2

PC307

0.1U_0402_10V7K

LX_3V

LG_3V

PR307

1 2

0_0402_5%

B++

1 2

1M_0402_1%

EN0<40>

PR312

191K_0402_1%

20K_0402_1%

105K_0402_1%

BST_3V

UG_3V

PR311

+5VALWP

+3VALWP

PR303

1 2

PR305

1 2

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

2VREF_51125

PJP302

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP303

PJP303

1 2

PAD-OPEN 4x4m

ENTRIP2

3

4

6

5

VFB2

TONSEL

ENTRIP2

GND

SKIPSEL

EN0

15

16

14

13

12

B++

PR302

30.9K_0402_1%

1 2

PR304

PR304 20K_0402_1%

20K_0402_1%

1 2

PR306

95.3K_0402_1%

ENTRIP1

1 2

1

2

VFB1

VREF

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VREG5

VIN

VCLK

PU301

17

18

TPS51125RGER_QFN24_4X4

VL

12

PC311

PC311 10U_0805_10V6K

10U_0805_10V6K

PC312

0.1U_0603_25V7K

(4.5A,180mils ,Via NO.= 9)

+5VALW

(3A,120mils ,Via NO.= 6)

+3VALW

BST_5V

UG_5V LX_5V LG_5V

PR308

0_0402_5%

1 2

+3VLP

12

B++

PC308

0.1U_0402_10V7K

1 2

PR317

PR317 100K_0402_5%

100K_0402_5%

12

PC304

2200P_0402_50V7K

1 2

FDS6690AS_NL_SO8

3/5V_OK 41

12

PC305

PR310

PR310 0_0402_5%

0_0402_5%

12

PC313

578

4.7U_0805_25V6-K

UG1_5V

PQ304

4.7U_0805_25V6-K

3 6

578

3 6

+3VLP

VL

241

PQ302

PQ302 AO4466_SO8

AO4466_SO8

PL303

4.7UH_SIL1045R-4R7PF_6.3A_30%

1 2

PJP301

2 1

PAD-OPEN 2x2m

PJP304

2 1

PAD-OPEN 2x2m

+3VL

+5VL

1

+

PC310

PC310 220U_6.3VM_R15

220U_6.3VM_R15

2

+5VALWP

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

46 54Friday, February 13, 2009

E

of

F

A

B

C

D

1 1

PR401

0_0402_5%

SUSP#

2 2

3 3

1 2

PC401

@1000P_0402_50V7K

+1.1VSP

+1.1VS

+1.1VSP

12

PR405

0_0402_5%

1 2

10_0402_5%

1 2

PR403

316_0402_1%

12

PR407

0_0402_5%

PR411

+5VALW

12

PC409

PC409 1U_0603_10V6K

1U_0603_10V6K

PR408

1 2

11.5K_0402_1%

1 2

PC413

PC413 @10P_0402_50V8J

@10P_0402_50V8J

24K_0402_1%

PR404

PR404 255K_0402_1%

255K_0402_1%

1 2

12

PR409

2 3 4 5 6

PU401

TON VOUT V5FILT VFB PGOOD

12

1

14

15

TP

EN_PSV

VBST

V5DRV

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

VCCP_POK

PC407

PC407 @0.022U_0402_16V7K

@0.022U_0402_16V7K

DRVH

TRIP

DRVL

1 2

0_0402_5%

13 12

LL

11 10 9

PR402

DH_1.1V LX_1.1V

+5VALW+5VALW

DL_1.1V

BST1_1.1VBST_1.1V

0.1U_0402_10V7K

PR410

1 2

0_0402_5%

12

PC415

4.7U_0805_10V6K

1 2

PC402

1 2

PR406

13.7K_0402_1%

DH_1.1V_1

578

3 6

578

3 6

241

PQ401

PQ401 AO4466_SO8

AO4466_SO8

PQ402

PQ402 AO4468_SO8

AO4468_SO8

1.1V_B+

12

PC404

PC403

4.7U_0805_25V6-K

PL402

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

PL401

HCB1608KF-121T30_0603

1 2

12

PC405

2200P_0402_50V7K

1

+

2

PC408

220U_D2_4VY_R25M

12

PC406

PC406 @680P_0402_50V7K

@680P_0402_50V7K

+1.1VSP

B+

PJP401

+1.1VSP

4 4

A

1 2

PAD-OPEN 4x4m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

(7A,280mils ,Via NO.= 14)

+1.1VS

2007/05/29 200810/11

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

D

of

47 54Friday, February 13, 2009

of

47 54Friday, February 13, 2009

of

47 54Friday, February 13, 2009

F

A

B

C

D

E

1 1

PR502

B+++

+1.8VP

PR501

14.3K_0603_0.1%

1 2

PR502

10.2K_0603_0.1%

1 2

PR503

18.7K_0402_1%

12

PR504

11.5K_0402_1%

12

+1.2VALWP

B+++

12

PC517

PC501

4.7U_0805_25V6-K

2 2

+1.8VP

PL501

2.2UH_PCMC063T-2R2MN_8A_20%

+1.8VP

1

+

PC508

2

330U_2V_M_R15M

3 3

2.2UH_PCMC063T-2R2MN_8A_20%

12

PC509

4.7U_0805_6.3V6K

12

PC502

4.7U_0805_25V6-K

2200P_0402_50V7K

PQ501

AO4466_SO8

241

12

241

SYSON26,28,33,36

578

3 6

UG1_1.8V

578

PQ503

3 6

FDS6690AS_NL_SO8

+1.8VP

PC506

0.1U_0402_10V7K

0_0402_5%

PR506

PR506 0_0402_5%

0_0402_5%

12

PR513

12

PC513

0.1U_0402_10V7K

BST_1.8V

12

UG_1.8V

12

PR5080_0402_5% PR5080_0402_5%

12

LX_1.8V

LG_1.8V

1U_0603_10V6K

PU501

25

7 8

9 10 11 12

PR511

15K_0402_1%

1 2

PC514

0_0402_5%

P PAD

PGOOD2 EN2 VBST2 DR VH2 LL2 DR VL2

12

PR505

6

5

VO2

VFB2

TRIP2

PGND2

14

13

1 2

PR514

3.3_0402_5%

1 2

4

15

TONSEL

V5FILT

3

GND

V5IN

16

12

2

17

12

PC515

4.7U_0805_10V6K

1

VO1

VFB1

24

PGOOD1

23

EN1

BST_1.2V

22

VBST1

DR VH1

DR VL1

TRIP1

PGND1

TPS51124RGER_QFN24_4x4

18

PR510

10.5K_0402_1%

+5VALW

UG_1.2V

21 20

LL1

LG_1.2V

19

LX_1.2V

PR512

33K_0402_5%

1 2

12

PC512

0.1U_0402_16V7K

PR507

0_0402_5%

PR509

0_0402_5%

12

PC507

0.1U_0402_10V7K

1 2

UG1_1.2V

3/5V_OK 39

PQ502

AO4466_SO8

AO4468_SO8

PQ504

B+++

578

3 6

578

3 6

241

PL502

HCB2012KF-121T50_0805

3.3UH 30% MSCDRI-7030AB-3R3N 4.1A

12

PC504

4.7U_0805_25V6-K

PL503

1 2

PR515

1K_0402_5%

B+

12

PC505

2200P_0402_50V7K

+1.2VALWP

12

PC510

4.7U_0805_6.3V6K

1

+

1 2

2

PC511

220U_B2_2.5VM

(8A,320mils ,Via NO.=16)

PJP501

+1.8VP

4 4

+1.8VP

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP503

PJP503

1 2

PAD-OPEN 4x4m

A

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 200810/11

Compal Secret Data

Deciphered Date

(4A,160mils ,Via NO.=8)

+1.2VALWP

1 2

D

PJP502

PAD-OPEN 4x4m

+1.2VALW

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

48 54Friday, February 13, 2009

E

of

F

A

B

C

D

E

1 1

+1.8V

PU601

VIN1VCNTL

12

PQ601

12

PC606

PC606 @0.1U_0402_16V7K

@0.1U_0402_16V7K

+0.9VP

+1.5VSP

12

2

G

PC601

10U_0805_10V4Z

SYSON#36

2 2

SUSP36

3 3

1 2

PR602

0_0402_5%

SSM3K7002FU_SC70-3

1 2

PR604

@0_0402_5%

PC602

@10U_0805_10V4Z

13

D

S

PJP601

1 2

PAD-OPEN 3x3m

PJP603

1 2

PAD-OPEN 3x3m

12

PR601

1K_0402_1%

12

PR603

PR603 1K_0402_1%

1K_0402_1%

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC605

PC605 10U_0805_6.3V6M

10U_0805_6.3V6M

0.1U_0402_16V7K

PC604

(2A,80mils ,Via NO.= 4)

+0.9V

(1A,40mils ,Via NO.= 2)

+1.5VS

+0.9VP

6 5

NC

7

NC

8

NC

9

TP

+5VALW

12

PC603

PC603 1U_0603_16V6K

1U_0603_16V6K

10U_0805_10V4Z

SUSP36

+3VS

+1.8V

PC613

SSM3K7002FU_SC70-3

1 2

PR608

0_0402_5%

12

PC607

1U_0603_6.3V6M

12

PC609

@10U_0805_10V4Z

PQ602

13

D

2

G

S

12

PC610

PC610 @0.1U_0402_16V7K

@0.1U_0402_16V7K

(500mA,40mils ,Via NO.= 1)

PU602

PU602 APL5508-25DC-TRL_SOT89-3

APL5508-25DC-TRL_SOT89-3

2

IN

OUT

GND

1

12

PR606

PR606 1K_0402_1%

1K_0402_1%

VREF1.5V

12

PR607

5.1K_0402_1%

3

PU603

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

6 5

NC

7

NC

8

NC

9

TP

+5VALW

12

PC612

PC612 1U_0603_16V6K

1U_0603_16V6K

+1.5VSP

12

PC614

PC614 10U_0805_6.3V6M

10U_0805_6.3V6M

0.1U_0402_16V7K

PC611

+2.5VSP

12

PR605

PR605 @150_1206_5%

@150_1206_5%

PC608

4.7U_0805_6.3V6K

PJP602

+2.5VSP

4 4

1 2

PAD-OPEN 3x3m

A

(500mA,40mils ,Via NO.= 1)

+2.5VS

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 200810/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

49 54Friday, February 13, 2009

E

of

F

A

+CPU_CORE_NB

ISL6265_PWROK

PR232

1 2

PR239

PR239 0_0402_5%

0_0402_5%

PR241

PR241 0_0402_5%

0_0402_5%

VDD_NB_FB_H6

VDD_NB_FB_L6

+5VS

PR208

2_0402_5%

1 2

0.1U_0603_25V7K

1 2

PR212

0_0402_5%

1 2

PR213

@0_0402_5%

1 2

PR215

@10K_0402_5%

SVD SVC

PR224

1 2

82.5K_0402_1%

1 2

PR235

PR235 0_0402_5%

0_0402_5%

1 2

PR237

PR237 0_0402_5%

0_0402_5%

1 2

PR205

2_0402_5%

1 2

0.1U_0402_16V7K

12

PC216

1 2 3 4 5 6 7 8

9 10 11 12

PC241

PC241 1000P_0402_50V7K

1000P_0402_50V7K

PC242

PC242 1000P_0402_50V7K

1000P_0402_50V7K

PC207

PU201

OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0

12

13

D

PQ209

1 1

VFIX_EN6

Connect to EC pin 110.

2

G

SSM3K7002FU_SC70-3

S

PR204

22K_0402_1%

1 2

PC205

1000P_0402_50V7K

CPU_B+

+5VS

PC223

1 2

4700P_0402_25V7K

PR227

PC225

1 2

1200P_0402_50V7K

1 2

+3VS

12

PR216

10K_0402_1%

PR234 @100K_0402_5%PR234 @100K_0402_5% PR218

PR218 PR222

PR222

1 2

34.8K_0402_1%

PR242 100K_0402_5%

1 2 1 2

1 2

0_0402_5%

1 2

0_0402_5%

PR223

1 2

6.81K_0402_1%

PC228

PC228 1000P_0402_50V7K

1000P_0402_50V7K

2 2

VGATE33 H_PWRGD SB_PWRGD

CPU_SVD6

CPU_SVC6

VR_ON33

PR225

1 2

255_0402_1%

3 3

4 4

255_0402_1%

PR230

1 2

54.9K_0402_1%

CPU_VDD0_FB_H6

CPU_VDD0_FB_L6

CPU_VDD1_FB_L6

1 2

1K_0402_1%

PC227

PC227 180P_0402_50V8J

180P_0402_50V8J

CPU_VDD1_FB_H6

A

12

47

48

VIN

ISP0

14

13

ISP 0

+CPU_CORE_0

B

12

PR206

0_0402_5%

12

PC208

PC209

1200P_0402_50V7K

33P_0402_50V8K

12

PR210

1 2

44.2K_0402_1%

44

45

46

VCC

FB_NB

FSET_NB

COMP_NB

ISL6265IRZ-T_QFN48_6X6

RTN1

VSEN0

RTN0

ISN0

17

15

16

RTN1

VSEN0

RTN0

12

PC244

@1000P_0402_50V7K

12

PC245

@1000P_0402_50V7K

12

@1000P_0402_50V7K

B

PC243

VSEN_NB

43

VSEN_NB

VSEN1

18

VSEN1

PC246

12

@1000P_0402_50V7K

12

1000P_0402_50V7K

RTN_NB

42

19

PC247

RTN_NB

VDIFF1

PR209

0_0402_5%

12

41

OCSET_NB

FB1

20

PL201

4.7UH_SIQB74B-4R7PF_4A_20%

1

12

+

PC202

PC202 220U_B2_2.5VM

220U_B2_2.5VM

2

PC201

10U_0805_6.3V6M

0.1U_0402_16V7K

PR207

14K_0402_1%

UGATE NB

PHASE NB

LGATE NB

39

38

40

37

PGND_NB

LGATE_NB

PHASE_NB

UGATE_NB

VW1

COMP121ISP1

ISN1

22

23

24

C

12

PQ202

PQ201

AO4468_SO8

1 2 3 6

12

PC206

BOOT_NB1

12

PR211

1_0603_5%

2.2_0603_5%

2.2_0603_5% PR214

1 2

PR228

12

PR214

1 2

0_0603_5%

PR226

1 2

0_0603_5%

1 2

PC224

0.22U_0603_10V7K

1200P_0402_50V7K

4700P_0402_25V7K

C

PR219

PC232

BOOT_NB

36

BOOT_NB

BOOT0

UGATE0

PHASE0

PGND0

LGATE0

PVCC

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

49

+CPU_CORE_1

BOOT0

35

UGATE0

34

PHASE0

33 32

LGATE0

31 30

LGATE1

29 28

PHASE1

27

UGATE1

26

BOOT1

25

2.2_0603_5%

TP

2.2_0603_5%

ISP 1

PC230

1000P_0402_50V7K

PR236

6.81K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

8 7

5

4

0_0402_5%

12

PC210

2.2U_0603_6.3V6K

PQ204

PQ207

PQ207 AO4714_SO8

AO4714_SO8

PC231

12

PR238

54.9K_0402_1%

12

PR240

1K_0402_1%

PR243

255_0402_1%

12

PHASE NB

UGATE0_1

578

12

LGATE NB

+5VS

0.22U_0603_10V7K

0.22U_0603_10V7K PC217

PC217

1 2

AO4714_SO8

180P_0402_50V8J

PC233

2007/08/02 200810/11

PQ202

AO4466_SO8

1 2 3 6

4

PR203

1 2

UGATE NB

5

PQ203

AO4474_SO8

4

578

PQ206

Deciphered Date

3 6

5

4

578

3 6

241

AO4474_SO8

UGATE1_1

3 6

241

12

Compal Secret Data

8 7

5

D8D7D6D

S1S2S3G

241

3 6

241

PQ205

AO4714_SO8

D8D7D6D

S1S2S3G

PQ208

AO4714_SO8

D

12

PC203

12

PC234

4.7U_0805_25V6-K

12

PR220

12

@4.7_1206_5%

12

D

12

PC204

4.7U_0805_25V6-K

2200P_0402_50V7K

12

PC212

PC235

4.7U_0805_25V6-K

PC218

0.1U_0603_25V7K

@680P_0603_50V8J

PC237

4.7U_0805_25V6-K

PR229

PR229 @4.7_1206_5%

@4.7_1206_5%

PC226

PC226 @680P_0603_50V8J

@680P_0603_50V8J

0.1U_0603_25V7K

CPU_B+

12

PC213

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR221

16.5K_0402_1%

PC219

12

PC236

4.7U_0805_25V6-K

PR231

PC229

12

PC238

PC214

12

ISP 0

PC220

4.7U_0805_25V6-K

12

16.5K_0402_1%

ISP 1

Custom

Date: Sheet

PC238

390P_0402_50V7K

2200P_0402_50V7K

4.02K_0603_1%

1 2

12

4.02K_0603_1%

Title

Size Document Number Rev

390P_0402_50V7K

12

PL203

PR217

1 2

12

PC221

PC222

2200P_0402_50V7K

4.7U_0805_25V6-K

12

PL204

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR233

1 2

Compal Electronics, Inc.

E

PL202

SMB3025500YA_2P

12

PC239

220P_0402_50V7K

12

PC240

390P_0402_50V7K

SCHEMATIC MB A4112

401568

12

PC252

1

PC249

1500P_0402_50V7K

PC248

220P_0402_50V7K

12

2

@68U_25V_M_R0.44

12

+CPU_CORE_1

E

12

+

+CPU_CORE_0

PC250

1500P_0402_50V7K

PC215

CPU_B+

50 54Friday, February 13, 2009

B+

1

+

PC251

PC251 100U_25V_M

100U_25V_M

2

1000P_0402_50V7K

F

of

A

B

C

D

1 1

SUSP#

2 2

+VGA_COREP

3 3

PR703

0_0402_5%

1U_0603_10V6K

PR702

316_0402_1%

12

PC702

PR701

0_0402_5%

1 2

PC701

+5VALW

12

PC701

+VGA_COREP1

@1000P_0402_50V7K

+5VALW

12

PR714

0_0402_5%

12

+VGA_CORE

+VGA_COREP

10.2K_0402_1%

12

PR713

PR713 10_0402_5%

10_0402_5%

1 2

PR708

1 2

PC713

@1000P_0402_50V7K

PR711

37.4K_0402_1%

PR705

PR705 255K_0402_1%

255K_0402_1%

1 2

12

PU701

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

12

PR712

49.9K_0402_1%

PQ703

13

D

SSM3K7002FU_SC70-3

2

G

S

12

0.022U_0402_16V7K

1

14

15

TP

EN_PSV

GND7PGND

8

TPS51117RGYR_QFN14_3.5x3.5

PR715

10K_0402_1%

1 2

PC714

BST_VGA

VBST

DRVH

LL

TRIP

V5DRV

DRVL

+5VALW

12

13

D

S

1 2

0_0402_5%

13 12 11 10 9

PR716

PR716 100K_0402_5%

100K_0402_5%

PQ704

PQ704 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR704

2

G

PC706

0.1U_0402_10V7K

DH_VGA LX_VGA

+5VALW

DL_VGA

1 2

PR717

0_0402_5%

12

PC707

4.7U_0805_10V6K

PR707

PR707 0_0402_5%

0_0402_5%

PR706

14.7K_0402_1%

DH_VGA_1

1 2

VGA_PWRSEL 16

VGA_B+

4.7U_0805_25V6-K

4.7U_0805_25V6-K PC703

PC703

12

578

PQ701

PQ701 AO4466_SO8

AO4466_SO8

3 6

578

3 6

241

PQ702

PQ702 FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

1UH_PCMC063T-1R0MN_11A_20%

High: VGA_CORE 0.95V Low: VGA_CORE 1.1V

4.7U_0805_25V6-K

4.7U_0805_25V6-K PC704

PC704

1 2

PL701

HCB1608KF-121T30_0603

1 2

2200P_0402_50V7K

PC710

12

PL702

1

+

PC708

2

B+

12

PC705

PC705 2200P_0402_50V7K

2200P_0402_50V7K

330U_D2_2.5VY_R9M

+VGA_COREP

PJP701

4 4

+VGA_COREP

A

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP702

PJP702

1 2

PAD-OPEN 4x4m

+VGA_CORE

(7A,280mils ,Via NO.= 14)

Security Classification

2007/05/29 200810/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2007/05/29 200810/11

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

D

of

51 54Friday, February 13, 2009

of

51 54Friday, February 13, 2009

of

51 54Friday, February 13, 2009

F

A

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

1 1

1

46

Title

3.3VALWP/5VALWP PWR request

Date

12/31

Request Owner

Compal

Solution Description

Add PU302, control signal changed to ACOFF

Rev.Issue DescriptionItem

2

51

3

51

50

4

5

50

2 2

45 add PC128

6

7

8

50 CPU_CORE 01/04 Compal PWR request

9

44 01/09 Compal AC LED change to KBC control AC_LED connect to KBC pin 97

10

51 02/27VGA_COREP Compal Change VGA low voltage to 0.95V Change PR712 to 49.9K_ohm and PR711 to 37.4K_ohm

VGA_COREP Compal EMI request

CPU_CORE Compal EMI request

CPU_CORE Compal Vendor request

Charger EMI requestCompal

Charger45 01/04 Compal PWR request Change PQ102 to FDS6675BZ

DC Connector /CPU_OTP

12/31

CompalVGA_COREP

PWR request

Connect the PR715 and PC714 to PQ703 pin1

Change PC705 to 2220pF

Add PC238, PC239, PC240, PC248

Change PR221 and PR231 to 16.6K_ohm Change PR217 and PR233 to 4.02K_ohm Change PR223 to 17.8K_ohm Change PR224 to 100K_ohm

Change PQ204, PQ205, PQ207, PQ208 to FDS6676AS Add PQ209 and PQ234 to fix CPU core voltage.

11

3 3

4 4

46 02/273.3VALWP/5VALWP Change OTC shun down pin.Compal Change OTC shun down pin to PU301 pin13.

12

50 CPU_CORE 03/03 Compal EMI request

13

14

15

16

17

Charger45 Compal EMI request Add PC12903/03

CPU_CORE50 Compal HW request03/03 Add H_PWRGD

/CPU_OTP

04/02 Compal AC LED issue44 Chaange AC_LED# pull high to +3VLPDC Connector

04/24 Compal50 acoustic noise Add PC251CPU_CORE

/CPU_OTP

04/24 Compal44 HW CPU thermal protection

A

change to 95 +-3 degree C

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Add PC249, PC250

Chaange PR12 to 2.21K_ohmDC Connector

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

52 54Friday, February 13, 2009

E

F

of

5

4

3

2

1

LA-4112P Rev0.2 -> 0.3 Product Improvement Record (P.I.R.)

Circuit change list:

1. Un-Stuff C18, Q127, Q129, R175, R814, C939 and change SMBus 2 -> SMBus 1. (Page 6)-* Follow 17" AMD circuit change.

2. Add signal H_PWRGD_CPU to option CPU core chip`s PWR OK. (Page 6)-* Follow AMD recommand power up sequence change.

3. Change signal name ENTRIP2 to EN0. (Page 6)-* For power team chagne request.

D D

4. Un-Stuff C54. (Page 7)-* Follow 17" AMD circuit change.

5. AVDD1, AVDD2, AVDDI, AVDDQ, .PLVDD, PLVDD18, VDDLTP18, VDDLT18_1, VDDLT18_2 directly conecct to GND. (Page11)-* For RX781 change recommand.

6. VDD18_MEM1, VDD18_MEM_2 directly conecct to GND. (Page 13)-* For RX781 change recommand.

7. Change Bead L16, L22 to 0 ohm and Delete L20, L21 than use jumper to link the power. (Page 13)-* Follow 17" AMD circuit change.

8. Change R101, R102 3K -> 1K ohm. (Page 14)-* ATI recommand.

9. Add VGA_PWN to Panel. (Page 16/24)-* For panel power saving request.

10. Un-stuff R1101. (Page 21)-* For PCI-E EA request.

11. Add signal CLK_14M_SIO. (Page 22)-* For debug port requst.

12. Stuff C447. (Page 23)-* EMI/ESD recommand.

C C

13. Add +5VS power for webcam`s LDO power option. (Page 24)-* Follow 17" AMD circuit change.

14. Change C863 0.047U -> 1000p. (Page 24)-* Fix panel power down waveform bounce.

15. Change Bead L61, L61 to 0 ohm. (Page 29)-* Follow 17" AMD circuit change.

16. Un-stuff R1148, C1271. (Page 32)-* Follow 17" AMD circuit change.

17. Modify JRJ45 layout footprint. (Page 32)-* For DFX request.

18. Add D58 ESD diode. (Page 32)-* EMI/ESD recommand.

19. Stuff R1043, Un-stuff R1042 (Page 33)-* Follow 17" AMD circuit change.

20. Add R399, R400 and un-stuff R122, R1051, Q53.(Page 34)-* Follow project common design.

21. Add C259, C260, C261 and stuff C746, C747,C748 and change C760, C761, C762, C763 100p -> 330p. (Page 35/36)-* EMI/ESD recommand.

B B

22. Signal INTMIC_DET directly connect to AGND and Delete Q160, Q151, R951. (Page 35/36)-* OPP dont need the detect circuit.

23. Add C258. (Page 38)-* EMI/ESD recommand.

24. ME change JP32 and change Q24`s power +3VALW -> +3VS. (Page 38)-* Follow 17" AMD circuit change.

25. Add LPC debug port. (Page 39)-* For debug request.

26. Add D57, R397. (Page 40)-* Fix AC-IN chip power rail different issue.

27. Delete Q34, R645. (Page 41)-* Follow 17" AMD circuit change.

28. Add C262, C263. (Page 41)-* For Small/B design change.

29. Chagne C1175 type B2 ->Y. (Page 18)-* For fixed ME issue.

30. Add C264. (Page 22)-* For IDT request.

31. Add L85, L86, L87, L88. (Page 22)-* For EMI/ESD recommand.

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

200810/112007/10/11

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

53 54Friday, February 13, 2009

1

of

F

5

4

3

2

1

LA-4112P Rev0.3 -> 1.0 Product Improvement Record (P.I.R.)

Circuit change list:

1. Reserve R59, R60, R61.(Page 6)-* AMD suggest to reserve the pull high/down resistor of these test pin.

2. Add C477 0.1UF. (Page 23)-* For EMI recommand.

3. Change R906 from 0 ohm to 1k ohm. (Page 36)-* For reduce MIC background noise issue.

D D

4. Change SMB DA1/CK1 pull high power rail from +3VALW to +3VL. (Page 40)-* EC recommand & follow Riply change list.

5. Add C819 0.1UF & D31 ESD diode. (Page 41)-* For EMI recommand.

6. Add R414 & R415 0 ohm. (Page 43)-* no support DIM function.

8. Add R140 & R234 750k ohm. (Page 43)-* Solve Rds on issue.

C C

B B

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

200810/112007/10/11

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4112

401568

54 54Friday, February 13, 2009

1

of

F

HP CQ40-AMD Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual