HP Compaq Presario CQ41 Schematic

A

B

C

D

E

1 1

https://t.me/schematicslaptop
https://t.me/biosarchive

2 2

Compal confidential

Schematics Document

Mobile Arrandale rPGA989 with

3 3

Intel PCH(Ibex Peak-M) core logic

2009-10-23 Rev 1.0

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

E

1.0

1.0

1.0

of

of

of

1 55Monday, November 09, 2009

1 55Monday, November 09, 2009

1 55Monday, November 09, 2009

A

C

ompal confidential

Fan c

onn

Page 6

B

Calpe

C

D

lla Consumer 14" UMA +Switchable

E

https://t.me/schematicslaptop

C

K505

Clock

1 1

ATI M

93

page 24,25 ,26,27,28

VRAM DDR3

Dis

LCD Conn.

512MB

page 29

2 2

Dis UMA

Dis

CRT

MUX

MUX

PCIE-Express 16X

page 21

page 20

UMADis

M

A

obile

rrandale

2C CPU + GMCH

Socket-rPGA989

FDI BUS

DDR3 1066/1333 MHz 1.5V

Page 6,7,8,9,10

DMI X4

Generator

ICS9LRS3197AKLFT

Dual Channel

USB2.0 X11

32QFN

19

P

DDR3 SO-DIMM X2

BANK 0, 1, 2, 3

Mini-Card x 2

USB conn x3

BT Conn

https://t.me/biosarchive

P17, 18

P31

P37

P37

Dis

HDMI Conn.

page 23

PCI-E BUS*4

Mini-Card New Card
8103EL
(10/100 /Giga LAN)

3 3

P32

WLAN

Mini-Card8111DL VB

WWAN

P31P31 P31

USB2.0 X1

RJ45/11 CONN

P32

Intel PCH

Ibex Peak-M

FCBGA 951

Page 11,12,13,14,15,16

LPC BUS

ENE

Azalia

SATA Master-1

SATA Slave

SPI

SPI ROM 16M

P38

MX25L1605DM2I-12G

4M Bytes

USB Camera

Finger print

Cardreader

MDC Conn

Audio CKT

Codec_IDT92HD80

SAT

A HDD Connector

P21

P37

P33

P34

P34 P35

Audio Jack

P30

KB926

Version D2

RTC CKT.

ACCELEROMETER
ST

4 4

P11

LED

P40

P30

2.0*1

USB

RGB

RJ45

SPDIF

MIC*1

LINE-OUT*1

Touch Pad CONN.

P40

SPI ROM
WIESON G6179

P38

256K bits

K/B backlight Conn

P40

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

DC/DC Interface CKT.

A

P41

P36

B

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

P38

Int.KBD

P39

Compal Secret Data

Compal Secret Data

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

SATA ODD Connector

Multi-BayDock

e-SATA Connector

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

P30

P30

P37

USB Board Conn
USB conn x2

Capsense switch Conn

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

of

of

of

2 55Monday, November 09, 2009

2 55Monday, November 09, 2009

2 55Monday, November 09, 2009

E

P37

P40

1.0

1.0

1.0

A

Symbol Note :

Voltag

e Rails

O M

EANS ON X MEANS OFF

: mea

ns Digital Ground

: mea

ns Analog Ground

power
p

lane

+B

+5VALW

+3VALW

+1.5V

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

1 1

O

O

O

O

O

O

O

O

O

X

XX

O

O

O

X

X

X

+5VS

+3VS

+1.5VS

+0.75VS

+VCCP

+CPU_CORE

+1.05VS

+1.8VS

O

O

X

X

X

X

SMBUS Control Table

M93
Thermal
Sensor

X

X X

X

X

X

H12, H14

NB10M-GE

X

X

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

SOURCE

KB926

KB926

PCH

PCH X

PCH X XXX X X X X X X

XDP BATT

X V

X

V

X

M93 SMBUS Control Table

SOURCE LVDS CRT

D_EDID_DATA

D_EDID_CLK

D_CRT_DDC_DATA

D_CRT_DDC_DATA

HDMIDAT_VGA

HDMICLK_VGA

M93

M93

M93

V

X

X

X

X

X

HDMI

X X

V

X

X

V

Thermal
Sensor

X

X

X

X

SODIMM CLK CHIP

X

X

WLAN
WWAN

X

X

X

X

V V V

X

Stencil Memo:

PA:

OPP:

Stand-off Location:

X

PJ1, PJP903, PJP301, PJP302, PJP303, PJP304, PJP401,
PJP601, PJP602, PJP603, PJP501, PJP901, PJP902

PJ1, PJP301, PJP302, PJP303, PJP304, PJP401,
PJP601, PJP602, PJP603, PJP501, PJP901, PJP902, JP303

X

+3VALW +3VALW+3VS+3VS+3VS +3VS+5VL +5VL

@ : m

eans just reserve , no build

45@ : means need be mounted when 45 level assy or rework stage.

BATT @ : means need be mounted when 45 level assy or rework stage.

CONN@ : means ME part

SG@ : means stuff when Switchable graphic

PA@ : Only For PA

OPP@ : Only For OPP

DIS@ : means stuff when DIS only

DEBUG@ : means stuff when need Mini Card LPC debud card

8111DL@ : means stuff for 8111DL

8103EL@ : means stuff for 8103EL

PCH I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

NAL70 SKUs

PCB part number

PCB DA80000GL00



PA DAZ0BI00200



OPP DAZ0BI00300



PCH version

A1 QV73 SA00002KV10

B0 QLLT SA00002KV30

B1 QMGS SA00002KV60

B3 QMNT SA00003N730

Deciphered Date

Deciphered Date

Deciphered Date

V

X

X

X

Issued Date

Issued Date

Issued Date

NEW
CARD

X X

X

V V

X

A

G sensor

X

X

Compal Secret Data

Compal Secret Data

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

Compal Secret Data

Cap sensor
board

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PA@

PA@

ZZZ1

ZZZ1

PCB-MB

PCB-MB

USB assignment:

USB-0 Right side

USB-1 Right side

USB-2 Left side(with ESATA)

USB-3 Docking

USB-4 Camera

USB-5 WLAN

USB-6 X

USB-7 X

USB-8 MiniCard(WWAN/TV)

USB-9 New card

USB-10 Cardreader

USB-11 Finger Printer

USB-12 BT

PCIe assignment:

PCIe-1 WWAN

PCIe-2 WLAN

PCIe-3 LAN

PCIe-4 New card

PCIe-5 X

PCIe-6 X

SATA assignment:

SATA0 HDD

SATA1 ODD

SATA2 X

SATA3 X

SATA4 ESATA

SATA5 Mulit-Bay

HEX

A0

D2

1DG sensor 0 0 0 1 1 1 0 1

OPP@

OPP@

ZZZ2

ZZZ2

PCB-MB

PCB-MB

ADDRESS

1 0 1 0 0 0 0 0

1 0 1

0 0 1 0 0A4

1 1 0 1 0 0 1 0

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Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

3 55Monday, November 09, 2009

3 55Monday, November 09, 2009

3 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

5

1

A

V_BATTERY

+

.

3A

20A

0

NVPWR_B+

I

7.05A

B++

B+

2.13A

+1.5V_B+

2.89A

VCCP_B+

ock con

D

D

OCK_VIN

D D

VIN

AC

C C

3.7 X 3=11.1V

DC

BATT

B B

7.7A

25.24A

4

ock con

D

VDS CON

L

V

+3VALW

+5VALW

+1.5V

1650

mA

5

.2A

+1.5VSDGPU

+1.05V_VCCP

L

+1.5VS

+

5VL

7302mA

7947mA7.9A

1A

650mA

2.5A

3A

2.2A

18.24A

7A

201mA

169mA

500mA

1A

6.1A

3A

8 A

380mA

+1.5VS_WLAN

+1.5VS_PEC New card

+1.1VSDGPU

DDR3 VRAM

M93 GPU

+VCCP

+1.05VS PCH

3

E

C_ROM

20mA

+

3VL_EC

C

IR

E

C

+3VS

+3V_LAN

+3V_PEC NEW CARD

201mA

275mA275A

LAN

PCH

+USB_VCC USB-L(ESATA)

500mA

USBX2-R

+5VALW_LED LED

20mAx40.1A

+5VS

CPU

DDR3 800Mhz 4G x2

0.5A

0.5A

M93 GPU

162mA

18A

80mA

7A

650mA

DDR3

Mini card-WWAN

Mini card-WLAN

PCH

CPU

+1.05VS_CK505

+0.75V

650mA

3A

2

60mA

500mA

1.8A

1300mA

1300mA

1A

5

0mA/4.75V

100mA

60m

A

3VAUX_BT

+

1

3A

.

3VS_PEC

+

10m

A

S

PI ROM(PCH)

A

25m

50m

541mA

1.5

250mA

1A

1A

530mA

A

A

+

3VS_DVDD

F

inger printer

CH

P

+LCDVDD

+3VS_CK505

+3VS_WWAN

+3VS_WLAN

+1.8VS

1.5A

850mA

DDR3

35mA

MDC

+3VS_HDA CODEC I/O

1mA

+3VS_ACL G-SENSOR

+3VS_VGA M93 GPU

1mA

150mA

60mA

+AVDD_CODEC

CODEC PVDD

ODD

HDD

Multi Bay

+CRT_VCC CRT CONN

1A

+USB_CAM

+5VS_LED LED

+5VSDGPU

20mAx6120mA

100mA

1

6

mA

0

LUE TOOTH

B

1.3A

ew card

N

A

25m

CODEC 92HD81

I

LVDS CON

1A

Mini card-WWAN

1A

Mini card-WLAN

250mA

600mA

300mA

CODEC 92HD81

INT_MIC

C Camera

P

M93 GPU

NT_MIC

PCH

CPU

M93 GPU+1.8VSDGPU

https://t.me/schematicslaptop
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5.4

9A

CPU_B+ +VCC_CORE CPU

1.72A

GFX_B+ +GFX_CORE CPU

1.3A

VGA_B+

A A

5

+VGA_CORE M93 GPU

4

48A/1.05V

15A/1.05V

10A/1.1V

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR THE INFORMA TION IT C ONTAINS

DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR THE INFORMA TION IT C ONTAINS

DEPART MENT EXCE PT AS AUT HORIZE D BY COMPA L ELECT RONICS , INC. NEITHE R THIS SHE ET NOR THE INFORMA TION IT C ONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Power delevry

Power delevry

Power delevry

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

4 55Monday, November 09, 2009

4 55Monday, November 09, 2009

4 55Monday, November 09, 2009

of

of

1

of

1.0

1.0

1.0

https://t.me/schematicslaptop
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A

1 1

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

5 55Monday, November 09, 2009

5 55Monday, November 09, 2009

5 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

L

ayout rule

w

idth trace length <

0.5", spacing 20mil

D D

H_PM_SYNC<13>

H_CPUPWRGD

C C

g

Desi

1.11update,PLTRST series
resittor 1.5K, P L
resistor 750 ohm

H_PEC

H_CPURST#

H_CPUPWRGD<14>

VTTPWRGOOD<46>

H_PWRGD_XDP

BUF_PLT_RST#<14>

n guide

10mil



I<14>

H_PROCHOT#<49>

H_THERMTRIP#<14,26>

Processor Pullups

H_CATERR#

H_CPURST#_R

B B

H_PROCHOT#

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

Layout Note:Please these
resistors near Processor

A A

5

1 20_

1 20_

R

R

1 2

R

R

3 20_

3 20_

1 2

R

R

5 49.

5 49.

1 2

R

R

7 49.

7 49.

1 2

R10

R10

R19

R19

R20

R20

R21

R21

R23

R23

2K_0402_5%

2K_0402_5%

1 2

R1249 1.5K_0402_1%R1249 1.5K_0402_1%
R25

R25

R26

R26

1.5K_0402_1%

1.5K_0402_1%

R35 49.9_0402_1%R35 49.9_0402_1%

R36 68_0402_5%@R36 68_0402_5%@

R11 68_0402_5%R11 68_0402_5%

R40 100_0402_1%R40 100_0402_1%

1 2

R41 24.9_0402_1%R41 24.9_0402_1%

1 2

R42 130_0402_1%R42 130_0402_1%

1 2

T1PAD T1PAD

1 2

1 2

1 2

1 2

1 2

R1250

R1250

1 2

1 2

_0402_1%

_0402_1%

750

750

1 2

1 2

402_1%

402_1%

0

0

0

0

402_1%

402_1%

9

9

_0402_1%

_0402_1%

9

9

_0402_1%

_0402_1%

TP_SK

H_CATE

H_PEC

402_5%

402_5%

0_0

0_0

H_PROCHOT#

H_THERMTRIP#

H_CPURST#_R

0_0402_5%

0_0402_5%

H_PM_SYNC_R

0_0402_5%

0_0402_5%

SYS_AGENT_PWROK

0_0402_5%

0_0402_5%

VCCPWRGOOD_0

0_0402_5%

0_0402_5%

VDDPWRGOOD_R

12

H_PWRGD_XDP_R

0_0402_5%

0_0402_5%

PLT_RST#_R

12

R28

R28

12

TOCC#

RR#

COMP3

COMP2

COMP1

COMP0

I_ISO

+VCCP

JCPU1

JCPU1

T23

A

COMP3

A

T24

COMP2

G

16

COMP1

A

T26

COMP0

AH24

SKTOC

AK14

CATER

T

15

A

PEC

I

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

XDP_TDI_R

VTTPWRGOOD

B

B

C#

R#

JTAG MAPPING

XDP_TDI_M

XDP_TDO_R

XDP_TRST#

MISC THERMAL

MISC THERMAL

PWR MANAGEMENT

PWR MANAGEMENT

R30 0_0402_5%R30 0_0402_5%

1 2

R32 0_0402_5%@ R32 0_0402_5%@

1 2

R34

R34
0_0402_5%

0_0402_5%

1 2

R37 0_0402_5%@ R37 0_0402_5%@

1 2

R38 0_0402_5%R38 0_0402_5%

1 2

R39 51_0402_1%R39 51_0402_1%

1 2

+3VALW

5

U57

U57

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

4

BCLK_

PEG_C

REF_SSCLK

DPLL_

REF_SSCLK#

DPLL_

CLOCKS

CLOCKS

SM_DR

SM_RC
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

DDR3

DDR3

MISC

MISC

JTAG & BPM

JTAG & BPM

4

A

6

1

K

BCL

B

16

BCLK#

AR30

BCLK_

ITP

AT30

ITP#

E16

LK

PEG_C

D16

LK#

A18
A17

F6

AMRST#

AL1

OMP[0]

AM1
AN1

AN15
AP15

AT28

PRDY#

AP27

PREQ#

AN2

8

TCK

AP28

TMS

AT27

TRST#

AT29

TDI

AR27

TDO

A

R29

TDI_M

AP29

TDO_M

AN25

DBR#

AJ22

BPM#[0]

AK22

BPM#[1]

AK24

BPM#[2]

AJ24

BPM#[3]

AJ25

BPM#[4]

AH22

BPM#[5]

AK23

BPM#[6]

AH23

BPM#[7]

XDP_TDI

XDP_TDOXDP_TDO_M

1.5VSCPU_DRAM_PWRGD

PM_DRAM_PWRGD<13>

PU_BCLK

CLK_C
CLK_C

CLK_C
CLK_C

CLK_E
CLK_E

PU_BCLK#

PU_XDP
PU_XDP#

XP
XP#

CLK_C

PU_BCLK <14>
PU_BCLK# <14>

CLK_C

CLK_E

XP <12>

CLK_E

XP# <12>

O

K

eDP

AMRST#

SM_DR

SM_RC

OMP0
OMP1

SM_RC
SM_RCOMP2

PM_EXTTS#0
PM_EXTTS#1

XDP_PRDY#
XDP_PREQ#

XDP_TCK
XDP_TMS
XDP_TRST#

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

XDP_DBRESET#

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

SM_DRAMRST#

1

1

2009.08.17 change the Q104 to BSS138 to
follow Intel's design guid.

T63 P ADT63 PAD

R14 0_0402_5%R14 0_0402_5%

1 2

XDP_DBRESET# <13>

R1205 0_0402_5%@R1205 0_0402_5%@

12

R1207

R1207

00K_0402_5%

00K_0402_5%

1.5VSCPU_DRAM_PWRGD <47>

+1.5V

PM_DRAM_PWRGD

PM_EXTTS#0

PM_EXTTS#1

1 2

D

S

D

S

13

Q104

Q104

G

G

BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

2

1

C1430

C1430
470P_0402_50V7K

470P_0402_50V7K

2

R1208 1.5K_0402_1%R1208 1.5K_0402_1%

R31 1.1K_0402_1%@R31 1.1K_0402_1%@

R1209

R1209

1 2

0_0402_5%

0_0402_5%

@ R33

@

3K_0402_1%

3K_0402_1%

R27 10K_0402_5%R27 10K_0402_5%

R29 10K_0402_5%R29 10K_0402_5%

+1.5V

12

12

R33

3

PM_EXTTS#1_R <17,18>

from DDR

1 2

1 2

12

R1206

R1206

K_0402_1%

K_0402_1%

1

1

DRAMRST# <17,18>

PCH_DDR_RST <14>

VDDPWRGOOD_R

12

12

R1248

R1248
750_0402_1%

750_0402_1%

+VCCP

2

009.08.12 Remove the XDP connector

2

I

XDP_TD

R

R

2 51_

2 51_

XDP_TM

XDP_P

XDP_TD

T

XDP_TC

XDP_DBRESET#

PWM Fan Control circuit

RB751V_SOD323

RB751V_SOD323

FAN_PWM<39>

his shall place near CPU

3

1 2

R

R

S

4 51_

4 51_

1 2

R

R

REQ#

6 51_

6 51_

1 2

R

R

O

8 51_

8 51_

1 2

K

R

R

9 51_

9 51_

1 2

R603 1K_0402_5%R603 1K_0402_5%

@

@

1

C1388

C1388

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+5VS

D56

D56

2 1

6

2

1

D

D

Q102

Q102

G

G

S

S

3456BDV-T1-E3_TSOP6

3456BDV-T1-E3_TSOP6

SI

SI

4 5

1 2

1

C1386

C1386

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

0

0

402_1%@

402_1%@

0

0

402_1%@

402_1%@

0

0

402_1%@

402_1%@

0

0

402_1%

402_1%

0

0

402_1%@

402_1%@

+FAN

+VCCP

+3VS

1

C1387

C1387

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

12

@D57

@

RLZ5.1B_LL34

RLZ5.1B_LL34

1

11/01 update

JP2

JP2

1

1

2

2

3

GND

4

GND

ACE

ACE

S_88231-02001

S_88231-02001

CONN@

CONN@

Change PCB Footprint from

D57

ACES_85204-02001_2P to
ACES_88231-02001_2P

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Auburndale(1/5)-Thermal/XDP

Auburndale(1/5)-Thermal/XDP

Auburndale(1/5)-Thermal/XDP

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

6 55Monday, November 09, 2009

6 55Monday, November 09, 2009

6 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

5

JCPU1

JCPU1

A

A

DMI_C

RX_PTX_N0<13>

DMI_C

RX_PTX_N1<13>

DMI_C

RX_PTX_N2<13>

DMI_C

RX_PTX_N3<13>

DMI_C

RX_PTX_P0<13>
DMI_C
DMI_C
DMI_C

DMI_C
DMI_CTX_PRX_N1<13>
DMI_CTX_PRX_N2<13>
DMI_CTX_PRX_N3<13>

DMI_CTX_PRX_P0<13>
DMI_CTX_PRX_P1<13>
DMI_CTX_PRX_P2<13>
DMI_CTX_PRX_P3<13>

FDI_CTX_PRX_N0<13>
FDI_CTX_PRX_N1<13>
FDI_CTX_PRX_N2<13>
FDI_CTX_PRX_N3<13>
FDI_CTX_PRX_N4<13>
FDI_CTX_PRX_N5<13>
FDI_CTX_PRX_N6<13>
FDI_CTX_PRX_N7<13>

FDI_CTX_PRX_P0<13>
FDI_CTX_PRX_P1<13>
FDI_CTX_PRX_P2<13>
FDI_CTX_PRX_P3<13>
FDI_CTX_PRX_P4<13>
FDI_CTX_PRX_P5<13>
FDI_CTX_PRX_P6<13>
FDI_CTX_PRX_P7<13>

FDI_FSYNC0<13>
FDI_FSYNC1<13>

FDI_INT<13>

FDI_LSYNC0<13>
FDI_LSYNC1<13>

RX_PTX_P1<13>

RX_PTX_P2<13>

RX_PTX_P3<13>

TX_PRX_N0<13>

D D

C C

B B

A24

DMI_R

X#[0]

C23

DMI_R

X#[1]

B22

DMI_R

X#[2]

A21

DMI_R

X#[3]

B24

X[0]

DMI_R

D23

X[1]

DMI_R

B23

DMI_R

X[2]

A22

X[3]

DMI_R

D24

DMI_T

X#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

PEG_I

PEG_I

PEG_R

PEG_R

PEG_R
PEG_R

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

COMPI
COMPO
COMPO

BIAS

X#[0]
X#[1]
X#[2]
X#[3]
X#[4]
X#[5]
X#[6]
X#[7]

4

EXP_I

B26
A26
B27

EXP_R

A25

PCIE_

K35

PCIE_

J34

PCIE_

J33

PCIE_

G35

PCIE_

G32

PCIE_

F34

PCIE_

F31

PCIE_

D35

PCIE_

E33

PCIE_CRX_GTX_N9

C33

PCIE_CRX_GTX_N10

D32

PCIE_CRX_GTX_N11

B32

PCIE_CRX_GTX_N12

C31

PCIE_CRX_GTX_N13

B28

PCIE_CRX_GTX_N14

B30

PCIE_CRX_GTX_N15

A31

PCIE_CRX_GTX_P0

J35

PCIE_CRX_GTX_P1

H34

PCIE_CRX_GTX_P2

H33

PCIE_CRX_GTX_P3

F35

PCIE_CRX_GTX_P4

G33

PCIE_CRX_GTX_P5

E34

PCIE_CRX_GTX_P6

F32

PCIE_CRX_GTX_P7

D34

PCIE_CRX_GTX_P8

F33

PCIE_CRX_GTX_P9

B33

PCIE_CRX_GTX_P10

D31

PCIE_CRX_GTX_P11

A32

PCIE_CRX_GTX_P12

C30

PCIE_CRX_GTX_P13

A28

PCIE_CRX_GTX_P14

B29

PCIE_CRX_GTX_P15

A30

PCIE_CTX_GRX_C_N0

L33

PCIE_CTX_GRX_C_N1

M35

PCIE_CTX_GRX_C_N2

M33

PCIE_CTX_GRX_C_N3

M30

PCIE_CTX_GRX_C_N4

L31

PCIE_CTX_GRX_C_N5

K32

PCIE_CTX_GRX_C_N6

M29

PCIE_CTX_GRX_C_N7

J31

PCIE_CTX_GRX_C_N8

K29

PCIE_CTX_GRX_C_N9

H30

PCIE_CTX_GRX_C_N10

H29

PCIE_CTX_GRX_C_N11

F29

PCIE_CTX_GRX_C_N12

E28

PCIE_CTX_GRX_C_N13

D29

PCIE_CTX_GRX_C_N14

D27

PCIE_CTX_GRX_C_N15

C26

PCIE_CTX_GRX_C_P0

L34

PCIE_CTX_GRX_C_P1

M34

PCIE_CTX_GRX_C_P2

M32

PCIE_CTX_GRX_C_P3

L30

PCIE_CTX_GRX_C_P4

M31

PCIE_CTX_GRX_C_P5

K31

PCIE_CTX_GRX_C_P6

M28

PCIE_CTX_GRX_C_P7

H31

PCIE_CTX_GRX_C_P8

K28

PCIE_CTX_GRX_C_P9

G30

PCIE_CTX_GRX_C_P10

G29

PCIE_CTX_GRX_C_P11

F28

PCIE_CTX_GRX_C_P12

E27

PCIE_CTX_GRX_C_P13

D28

PCIE_CTX_GRX_C_P14

C27

PCIE_CTX_GRX_C_P15

C25

COMPI

R44 49.

R44 49.

BIAS

R45 750

R45 750

CRX_GTX_N0
CRX_GTX_N1
CRX_GTX_N2
CRX_GTX_N3
CRX_GTX_N4
CRX_GTX_N5
CRX_GTX_N6
CRX_GTX_N7
CRX_GTX_N8

9_0402_1%

1 2

1 2

9_0402_1%

_0402_1%

_0402_1%

PCIE_

CRX_GTX_N[0..15] <24>

PCIE_CRX_GTX_P[0..15] <24>

C4 0.1U_0402_16V4ZC4 0.1U_0402_16V4Z

1 2

C5 0.1U_0402_16V4ZC5 0.1U_0402_16V4Z

1 2

C6 0.1U_0402_16V4ZC6 0.1U_0402_16V4Z

1 2

C7 0.1U_0402_16V4ZC7 0.1U_0402_16V4Z

1 2

C8 0.1U_0402_16V4ZC8 0.1U_0402_16V4Z

1 2

C9 0.1U_0402_16V4ZC9 0.1U_0402_16V4Z

1 2

C10 0.1U_0402_16V4ZC10 0.1U_0402_16V4Z

1 2

C11 0.1U_0402_16V4ZC11 0.1U_0402_16V4Z

1 2

C12 0.1U_0402_16V4ZC12 0.1U_0402_16V4Z

1 2

C13 0.1U_0402_16V4ZC13 0.1U_0402_16V4Z

1 2

C14 0.1U_0402_16V4ZC14 0.1U_0402_16V4Z

1 2

C15 0.1U_0402_16V4ZC15 0.1U_0402_16V4Z

1 2

C16 0.1U_0402_16V4ZC16 0.1U_0402_16V4Z

1 2

C17 0.1U_0402_16V4ZC17 0.1U_0402_16V4Z

1 2

C18 0.1U_0402_16V4ZC18 0.1U_0402_16V4Z

1 2

C19 0.1U_0402_16V4ZC19 0.1U_0402_16V4Z

1 2

C20 0.1U_0402_16V4ZC20 0.1U_0402_16V4Z

1 2

C21 0.1U_0402_16V4ZC21 0.1U_0402_16V4Z

1 2

C22 0.1U_0402_16V4ZC22 0.1U_0402_16V4Z

1 2

C23 0.1U_0402_16V4ZC23 0.1U_0402_16V4Z

1 2

C24 0.1U_0402_16V4ZC24 0.1U_0402_16V4Z

1 2

C25 0.1U_0402_16V4ZC25 0.1U_0402_16V4Z

1 2

C26 0.1U_0402_16V4ZC26 0.1U_0402_16V4Z

1 2

C27 0.1U_0402_16V4ZC27 0.1U_0402_16V4Z

1 2

C28 0.1U_0402_16V4ZC28 0.1U_0402_16V4Z

1 2

C29 0.1U_0402_16V4ZC29 0.1U_0402_16V4Z

1 2

C30 0.1U_0402_16V4ZC30 0.1U_0402_16V4Z

1 2

C31 0.1U_0402_16V4ZC31 0.1U_0402_16V4Z

1 2

C32 0.1U_0402_16V4ZC32 0.1U_0402_16V4Z

1 2

C33 0.1U_0402_16V4ZC33 0.1U_0402_16V4Z

1 2

C34 0.1U_0402_16V4ZC34 0.1U_0402_16V4Z

1 2

C35 0.1U_0402_16V4ZC35 0.1U_0402_16V4Z

1 2

3

Layou
lengt

PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N8

PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P0

PCIE_CTX_GRX_P1

PCIE_CTX_GRX_P2

PCIE_CTX_GRX_P3

PCIE_CTX_GRX_P4

PCIE_CTX_GRX_P5

PCIE_CTX_GRX_P6

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_P8

PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P15



t rule trace
h < 0.5"

+V_DD

PCIE_CTX_GRX_N[0..15] <24>

PCIE_CTX_GRX_P[0..15] <24>

R_CPU_REF1

R50 0_040 2_5%@R50 0_0402_5%@
R51 0_040 2_5%@R51 0_0402_5%@

+V_DD

R_CPU_REF0

1 2
1 2

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

A
A
A
A

A

AM30
AM28

AP31
AL32

AL30
AM31
AN29
AM32

AK32

AK31

AK28

AJ28
AN30
AN32

AJ32

AJ29

AJ30

AK30

P25

A
M

H17
G25
G17
E31
E30

H16

B19
A19

A20
B20

AC9
AB9

A34
A33

C35
B35

L25
L24
L22
J33

G9

27

L

28

J17

U9
T9

C1
A3

J29
J28

E

E

JCPU1

JCPU1

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8

MM_VREF

SA_DI
SB_DI

MM_VREF

RSVD1

1
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RSVD15
RSVD16

RSVD17
RSVD18

RSVD19
RSVD20

RSVD21
RSVD22

RSVD_NCTF_23
RSVD_NCTF_24

RSVD26
RSVD27

RSVD_NCTF_28
RSVD_NCTF_29

RSVD_NCTF_30
RSVD_NCTF_31

RSVD_

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD_TP_59
RSVD_TP_60

RESERVED

RESERVED

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

RSVD3
RSVD3

RSVD3
RSVD3

RSVD3

NCTF_37

RSVD3
RSVD3

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

KEY
RSVD62
RSVD63
RSVD64
RSVD65

VSS

1

AJ13

2

AJ12

3

AH25

4

AK26

5

AL26

6

AR2

AJ26

8

AJ27

9

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15

R48 0_040 2_5%@R48 0_0402_5%@

AJ15
AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

R49 0_040 2_5%@R49 0_0402_5%@

1 2
1 2

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

CFG Straps for PROCESSOR

CFG0

R52 3.01K_0402_1%@ R52 3.01K_0402 _1%@

1 2

PCI-Express Configuration Select

1: Single PEG

CFG0

A A

Not applicable f or Clarksfield Processor

CFG3

0: Bifurcation enabled

R54 3.01K_04 02_1%R54 3.01K_0402_1%

1 2

CFG3-PCI Express Static Lane Re versal

1: Normal Operat ion

CFG3

0: Lane Numbers Reversed

15 -> 0, 14 ->1, .....

5

*

CFG4

R53 3.01K_0402_1%@R53 3.01K_0402_1%@

1 2

CFG4-Display Por t Presence

1: Disabled; No Physical
Display Port

attached to Emb edded Display Po rt
0: Enabled; An external

CFG4

Display Port

device is connec ted to the
Embedded Display Port

CFG7

R55 3.01K_04 02_1%@R55 3.01K_0402_1%@

Only temporary for early
CFD samples (rPGA/BGA)

Only for pre ES1 sample

1 2

4

https://t.me/schematicslaptop
https://t.me/biosarchive

**

CFG7

WW33 PD 3.01K on CFG7 for PCIE Jitter



WW41 don't staff



Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Auburndale(2/5)-DMI/PEG/FDI

Auburndale(2/5)-DMI/PEG/FDI

Auburndale(2/5)-DMI/PEG/FDI

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

CRB 0.9 change to GND

of

of

of

7 55Monday, November 09, 2009

7 55Monday, November 09, 2009

7 55Monday, November 09, 2009

1

1.0

1.0

1.0

5

JCPU1

JCPU1

C

C

4

3

JCPU1

JCPU1

2

D

D

1

_D[0..63]<18>

D D

DDR_A

_D[0..63]<17>

C C

B B

DDR_A_BS0<17>
DDR_A_BS1<17>
DDR_A_BS2<17>

DDR_A_CAS#<1 7>
DDR_A_RAS#<1 7>
DDR_A_WE#<17>

DDR_A

_D0
_D1

DDR_A
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AG5

AJ10

AL10
AK12

AK8

AK11

AN8
AM10
AR11

AL11

AM9

AN9

AT11

AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14

AP14

A10
C10

B10
D10
E10

F10

H10

G10

AH5
AF5
AK6
AK7
AF6

AJ7
AJ6

AJ9

AL7

AL8

AC3
AB2

AE1
AB3
AE9

C7
A7

A8
D8

E6
F7
E9
B7
E7
C6

G8

K7

J8

G7

J7

J10

L7
M6
M8

L9

L6

K8
N8
P9

U7

SA_DQ
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

[0]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK
SA_CK
SA_CK

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6

[0]

AA7

#[0]

P7

E[0]

Y6
Y5
P6

AE2
AE8

AD8
AF9

DDR_A_DM0

B9

DDR_A_DM1

D7

DDR_A_DM2

H7

DDR_A_DM3

M7

DDR_A_DM4

AG6

DDR_A_DM5

AM7

DDR_A_DM6

AN10

DDR_A_DM7

AN13

DDR_A_DQS#0

C9

DDR_A_DQS#1

F8

DDR_A_DQS#2

J9

DDR_A_DQS#3

N9

DDR_A_DQS#4

AH7

DDR_A_DQS#5

AK9

DDR_A_DQS#6

AP11

DDR_A_DQS#7

AT13

DDR_A_DQS0

C8

DDR_A_DQS1

F9

DDR_A_DQS2

H9

DDR_A_DQS3

M9

DDR_A_DQS4

AH8

DDR_A_DQS5

AK10

DDR_A_DQS6

AN11

DDR_A_DQS7

AR13

DDR_A_MA0

Y3

DDR_A_MA1

W1

DDR_A_MA2

AA8

DDR_A_MA3

AA3

DDR_A_MA4

V1

DDR_A_MA5

AA9

DDR_A_MA6

V8

DDR_A_MA7

T1

DDR_A_MA8

Y9

DDR_A_MA9

U6

DDR_A_MA10

AD4

DDR_A_MA11

T2

DDR_A_MA12

U3

DDR_A_MA13

AG8

DDR_A_MA14

T3

DDR_A_MA15

V9

M_CLK

_DDR0 <17>

M_CLK

_DDR#0 <17>

DDR_C

KE0_DIMMA <17>

M_CLK_DDR1 <17>
M_CLK_DDR#1 <17>
DDR_CKE1_DIMMA <17>

DDR_CS0_DIMMA# <17>
DDR_CS1_DIMMA# <17>

M_ODT0 <17>
M_ODT1 <17>

DDR_A_DM[0..7] <17>

DDR_A_DQS#[0..7] <17>

DDR_A_DQS[0..7] <17>

DDR_A_MA[0..15] <17>

DDR_B

DDR_B

_D0

B5

[0]

AG1

AK1
AG4
AG3

AH4
AK3
AK4

AM6

AN2
AK5

AK2
AM4
AM3

AP3

AN5

AT4

AN6

AN4

AN3

AT5

AT6

AN7

AP6

AP8

AT9

AT7

AP9

AR10
AT10

AF3

AJ3

AJ4

AB1

AC5

AC6

A5

C3

B3
E4
A6

A4
C4
D1
D2

F2

F1
C2

F5

F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5

K2

L3
M1

K5

K4
M4
N5

W5
R7

Y7

SB_DQ
SB_DQ
SB_DQ
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

[1]
[2]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

DDR_B

_D1

DDR_B

_D2
_D3

DDR_B
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS0<18>
DDR_B_BS1<18>
DDR_B_BS2<18>

DDR_B_CAS#<1 8>
DDR_B_RAS#<1 8>
DDR_B_WE#<18>

SB_CK

SB_CK

SB_CK

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8

[0]

W9

#[0]

M3

E[0]

V7
V6
M2

AB8
AD6

AC7
AD1

DDR_B_DM0

D4

DDR_B_DM1

E1

DDR_B_DM2

H3

DDR_B_DM3

K1

DDR_B_DM4

AH1

DDR_B_DM5

AL2

DDR_B_DM6

AR4

DDR_B_DM7

AT8

DDR_B_DQS#0

D5

DDR_B_DQS#1

F4

DDR_B_DQS#2

J4

DDR_B_DQS#3

L4

DDR_B_DQS#4

AH2

DDR_B_DQS#5

AL4

DDR_B_DQS#6

AR5

DDR_B_DQS#7

AR8

DDR_B_DQS0

C5

DDR_B_DQS1

E3

DDR_B_DQS2

H4

DDR_B_DQS3

M5

DDR_B_DQS4

AG2

DDR_B_DQS5

AL5

DDR_B_DQS6

AP5

DDR_B_DQS7

AR7

DDR_B_MA0

U5

DDR_B_MA1

V2

DDR_B_MA2

T5

DDR_B_MA3

V3

DDR_B_MA4

R1

DDR_B_MA5

T8

DDR_B_MA6

R2

DDR_B_MA7

R6

DDR_B_MA8

R4

DDR_B_MA9

R5

DDR_B_MA10

AB5

DDR_B_MA11

P3

DDR_B_MA12

R3

DDR_B_MA13

AF7

DDR_B_MA14

P5

DDR_B_MA15

N1

_DDR2 <18>

M_CLK
M_CLK

_DDR#2 <18>

DDR_C

KE2_DIMMB <18>

M_CLK_DDR3 <18>
M_CLK_DDR#3 <18>
DDR_CKE3_DIMMB <18>

DDR_CS2_DIMMB# <18>
DDR_CS3_DIMMB# <18>

M_ODT2 <18>
M_ODT3 <18>

DDR_B_DM[0..7] <18>

DDR_B_DQS#[0..7] <18>

DDR_B_DQS[0..7] <18>

DDR_B_MA[0..15] <18>

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

A A

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(2/6)-DDR3 A/B CH

Cantiga(2/6)-DDR3 A/B CH

Cantiga(2/6)-DDR3 A/B CH

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

1.0

1.0

1.0

of

of

of

8 55Monday, November 09, 2009

8 55Monday, November 09, 2009

8 55Monday, November 09, 2009

5

CORE

+VCC_

JCPU1

JCPU1

F

F

D D

C C

B B

A A

48A 15A1

G

35

A

VCC

1

A

34

G

2

VCC

G

33

A

VCC

3

G

32

A

VCC

4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

F34

A

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

F27

A

VCC19

F26

A

VCC20

AD35

VCC21

D34

A

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

D27

A

VCC29

D26

A

VCC30

C35

A

VCC31

C34

A

VCC32

C33

A

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

C27

A

VCC39

A

C26

VCC40

A

A35

VCC41

A

A34

VCC42

A

A33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y

27

VCC59

Y

26

VCC60

V

35

VCC61

V

34

VCC62

V

33

VCC63

V

32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U

26

VCC80

R

35

VCC81

R

34

VCC82

R

33

VCC83

R

32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

5

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

SENSE LINES

SENSE LINES

8A

VTT0_
VTT0_
VTT0_
VTT0_
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31

1.1V RAIL POWER

1.1V RAIL POWER

VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VTT_SELECT

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

PSI#

AH14

1

AH12

2

AH11

3

AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN

AK35
AK33
AK34
AL35
AL33
AM33
AM35

AM34

G15

33

1

C40

C40

_0805_6.3V6M

_0805_6.3V6M

2

10U

10U

1

C48

C48

2

_0805_6.3V6M

_0805_6.3V6M

10U

10U

1

1

C1397

C1397

C1398

C1398

2

2

47P_0402_50V8J

47P_0402_50V8J

1

C67

C67

2

+VTT_43
+VTT_44

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR_R

4

H_VTTVID1 = Low, 1.1V(Clarksfield)

H_VTTVID1 = High, 1.05V(Auburndale)

AN35

VCCSENSE_R

AJ34

VSSSENSE_R

AJ35

B15

VSS_SENSE_VTT

A15

Near Processor

VCCSENSE

VSSSENSE

R61 100_0 402_1%R61 100 _0402_1%

R62 100_0 402_1%R62 100 _0402_1%

4

+VCCP

1

1

C41

C41

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C49

C49

2

@

@

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C1399

C1399

2

47P_0402_50V8J

47P_0402_50V8J

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

+VTT_44

+VTT_43

to power

R58 0_0402_5%R58 0_0402_5%

to power

R59 0_0402_5%R59 0_0402_5%

1 2

R60 0_0402_5%R60 0_0402_5%

1 2

R203 0_0402_5%R203 0_0402_5%

1 2

1 2

1

C42

C42

C43

@

@

C1400

C1400

+VCCP

C43

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C51

C51

C50

C50

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

47P_0402_50V8J

47P_0402_50V8J

2

1

2

47P_0402_50V8J

47P_0402_50V8J

Add for RF

2009. 08.17 Change C61,C62,
C67,C68,C69,C76 to 10u

C68

C68

10U_0805_6.3V6M

10U_0805_6.3V6M

R56 0_060 3_5%R56 0_0603_5%

1 2

R57 0_060 3_5%R57 0_0603_5%

1 2

H_PSI# <49>

H_VID[0..6] <49>

to power

1 2

VTT_SELECT <46>

IMVP_IMON <49>

1 2

+VCC_CORE

4

3

DIS@

DIS@

7

7

C98

C98
0

0

0805_5%

0805_5%

_

_

CORE

Add f

or RF

1

1

C1389

C1389

2

SG@

SG@

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C52

C52

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C61

C61

2

10U_0805_6.3V6M

10U_0805_6.3V6M

47P_0402_50V8J

47P_0402_50V8J

SG@

SG@

1

2

C1391

C1391

C1390

C1390

2

SG@

SG@

47P_0402_50V8J

47P_0402_50V8J

+VCCP

C62

C62

10U_0805_6.3V6M

10U_0805_6.3V6M

+GFX_

22U_0805_6.3V6M

22U_0805_6.3V6M

C987

C987

@

@

SG@

SG@

C995

C995

1

1

SG@

SG@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C991

C991

1

1

@

@

2

2

330U_D2_2VY_R7M

330U_D2_2VY_R7M

SG@

SG@

C996

C996

1

+

+

2

1

1

2

1

C63

C63

2

SG@

SG@

C1392

C1392

2

SG@

SG@

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

330U_D2_2V_Y

330U_D2_2V_Y

1

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

2009. 11.05 change C996

22U_0805_6.3V6M

22U_0805_6.3V6M

C988

C988

SG@

SG@

22U_0805_6.3V6M

22U_0805_6.3V6M

C993

C993

@

@

10

10

10U_0805_6.3V6M

10U_0805_6.3V6M

U_0805_6.3V6M

U_0805_6.3V6M

C990

C990

C989

C989

1

1

SG@

SG@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C994

C994

1

2

to ESR 7m ohm

+VCCP

1

1

C69

C69

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

C75

C75

C74

C74

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

VCCSENSE
VSSSENSE

+VCCP

H_DPRSLPVR <49>

to power

VTT_SENSE <46>

VCCSENSE <49>
VSSSENSE <49>

+VCCP

1

1

C73

C73

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

CPU

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A

T21

A

T19

A

T18
T16

A

R21

A
A

R19
R18

A
A

R16

A

P21
AP19
AP18
AP16
AN21
AN19
AN18
AN16

AM21
AM19
AM18
AM16

AL21
AL19
AL18

AL16
AK21
AK19
AK18
AK16

AJ21

AJ19

AJ18

AJ16
AH21
AH19
AH18
AH16

J24
J23

H25

C70

C70

_0805_6.3V6M

_0805_6.3V6M

22U

22U

K26

J27
J26
J25

C76

C76

H27
G28
G27

_0805_6.3V6M

_0805_6.3V6M

G26

10U

10U

F26
E26
E25

JCPU1

JCPU1

G

G

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

FDI PEG & DMI

VTT1_45
VTT1_46
VTT1_47

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

Compal Secret Data

Compal Secret Data

Compal Secret Data

FDI PEG & DMI

Deciphered Date

Deciphered Date

Deciphered Date

GRAPHICS

GRAPHICS

POWER

POWER

2

VAXG_

SENSE

VSSAX

G_SENSE

SENSE

SENSE

LINES

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

3A

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

0.6A

2

2
from 4.7K to 249 ohm

GFX_V

ID[0]

GFX_V

ID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

1

VCC_A

XG_SENSE

AR22

XG_SENSE

VSS_A

AT22

009. 11.05 change R43

GFXVR

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25

AT25

AM24

A
AF1
A
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

J1

E7

_VID_0

GFXVR

_VID_1
_VID_2

GFXVR
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

R43 249_0 402_1%SG@ R43 249_0402_1%SG@

GFXVR_EN
GFXVR_DPRSLPVR
GFXVR_IMON

R128 1K_0402_ 5%DIS@ R128 1K_0402_5%DIS@

1

C56

C56

2

1

+

+

C64

C64

2

1

C71

C71

2

1

C77

C77

2

1

1

C79

C79

2

2

1U_0603_10V4Z

1U_0603_10V4Z

1 2

1

C57

C57

2

1U_0603_10V4Z

1U_0603_10V4Z

1

C65

C65

2

220U_D2_2VY_R15M

220U_D2_2VY_R15M

1

C72

C72

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C78

C78

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C80

C80

2

1U_0603_10V4Z

1U_0603_10V4Z

VCC_A
VSS_A

GFXVR
GFXVR
GFXVR_VID_2 <50>
GFXVR_VID_3 <50>
GFXVR_VID_4 <50>
GFXVR_VID_5 <50>
GFXVR_VID_6 <50>

12

1

C58

C58

2

1U_0603_10V4Z

1U_0603_10V4Z

1

C66

C66

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

+VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C81

C81

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

XG_SENSE <50>

XG_SENSE <50>

_VID_0 <50>
_VID_1 <50>

GFXVR_EN <50>
GFXVR_DPRSLPVR <50>
GFXVR_IMON <50>

1

1

C59

C59

C60

C60

0603_10V4Z

0603_10V4Z

2

2

1U_0603_10V4Z

1U_0603_10V4Z

1U_

1U_

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C83

C83

C82

C82

_0805_6.3V6M

_0805_6.3V6M

2

10U

10U

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

GFXVR

1U_0603_10V4Z

1U_0603_10V4Z

+1.5VS

+1.8VS

https://t.me/schematicslaptop
https://t.me/biosarchive

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Auburndale(4/5)-PWR

Auburndale(4/5)-PWR

Auburndale(4/5)-PWR

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

_DPRSLPVR

9 55Monday, November 09, 2009

9 55Monday, November 09, 2009

9 55Monday, November 09, 2009

@

@

R1186

R1186

12

10K_0402_5%

10K_0402_5%

1.0

1.0

1.0

of

of

of

5

4

3

2

1

@

@

VSS_NCTF1_R
VSS_NCTF2_R

VSS_NCTF3_R
VSS_NCTF4_R
VSS_NCTF5_R

VSS_NCTF6_R
VSS_NCTF7_R

+VCC_CORE

1

C982

C982

2

47P_0402_50V8J

47P_0402_50V8J

1

1

2

1

2

1

2

C85

C85

C84

C84

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C96

C96

C97

C97

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C114

C114

C115

C115

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

JCPU1I

JCPU1H

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17
AR15
AR12

AR9
AR6

AR3
AP20
AP17
AP13
AP10

AP7

AP4

AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11

AM8

AM5

AM2

AL34
AL31
AL23
AL20
AL17
AL12

AK29
AK27
AK25
AK20
AK17

AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AH9

AH6

AH3
AG10

AF8

AF4

AF2
AE35

VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

1

C86

C86

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C119

C119

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C116

C116

2

22U_0805_6.3V6M

22U_0805_6.3V6M

CPU CORE

1

1

C87

C87

C88

2

1

2

1

2

C88

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C100

C100

C120

C120

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C117

C117

C105

C105

2

@

@

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

Inside cavity

1

1

C89

C89

C90

2

1

2

1

2

C90

2

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C102

C102

C101

C101

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C99

C99

C98

C98

@

@

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

1

2

1

2

1

2

C92

C92

C91

C91

2

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C103

C103

C121

C121

2

@

@

10U_0805_6.3V6M

10U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+

+

C104

C104

C108

C108

2

10U_0805_6.3V6M

10U_0805_6.3V6M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

1

1

2

1

2

1

2

C94

C94

C93

C93

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C118

C118

C106

C106

2

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

+

+

+

+

C110

C110

C109

C109

2

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

1

C95

C95

C1401

C1401

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C107

C107

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

+

+

C111

C111

2

330U_D2_2VM_R9M

330U_D2_2VM_R9M

Reserve for RF

1

1

1

C1402

C1402

C1403

2

C1403

2

2

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

between
Inductor and
socket

1

C1404

C1404

2

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

330uF 9mohm

https://t.me/schematicslaptop
https://t.me/biosarchive

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

IC,AUB_CFD_rPGA,R1P0

CONN@

CONN@

https://t.me/schematicslaptop
https://t.me/biosarchive

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Auburndale(5/5)-GND/Bypass

Auburndale(5/5)-GND/Bypass

Auburndale(5/5)-GND/Bypass

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

10 55Monday, November 09, 2009

10 55Monday, November 09, 2009

10 55Monday, November 09, 2009

1

1.0

1.0

1.0

of

of

of

5

C

+RTCVC

TCX1

ICH_R

TCX2

_0402_5%

_0402_5%

R63 10M

R63 10M

1 2

1

1

D D

2

C C

+3VS

R656 10K_0402_5%R656 10K_0402_5%

R657 10K_0402_5%R657 10K_0402_5%

B B

ME_EN<39>

A A

C122

C122

P_0402_50V8J

P_0402_50V8J
18

18

C53 22P_0402_50V8J@C53 22P_0402_50V8J@

C54 22P_0402_50V8J@C54 22P_0402_50V8J@

1 2

1 2

R1256

R1256
100K_0402_5%

100K_0402_5%

2

OSC4OSC

NC3NC

1 2

1 2

9/11 Add for ME_EN

ICH_R

1

C123

C123

2

Y1

Y1

P_0402_50V8J

P_0402_50V8J

+RTCVC

18

18

68KHZ_12.5PF_Q13MC14610002

68KHZ_12.5PF_Q13MC14610002

32.7

32.7

HDA_BITCLK_MDC<34>
HDA_BITCLK_CODEC<34>
HDA_SYNC_MDC<34>
HDA_SYNC_CODEC<34>

HDA_RST#_MDC<34>
HDA_RST#_CODEC<34,39>

HDA_BITCLK_CODEC

HDA_SDOUT_CODEC

HDA_SDOUT_MDC<34>
HDA_SDOUT_CODEC<34>

SPI_SB_CS#

SPI_SO_R

+3VS

12

R1255

R1255

1

1

00K_0402_5%

00K_0402_5%

ME_EN#

13

D

D

Q113

Q113

2

2N

2N

7002_SOT23-3

7002_SOT23-3

G

G

S

S

12

R65 1M_

R65 1M_

1 2

R66 330

R66 330

1 2

C

R69 20K_0402_1%

R69 20K_0402_1%

R70 20K_0402_1%

R70 20K_0402_1%

1

1

_0603_10V4Z

_0603_10V4Z

U

U

1 2

1 2

1U_0603_10V4Z

1U_0603_10V4Z

R1159 33_0402_5%R1159 33_0402_5%
R73 33_0402_5%R73 33_0402_5%
R1160 33_0402_5%R1160 33_0402_5%
R75 33_0402_5%R75 33_0402_5%

HDA_SDIN0<34>

HDA_SDIN1<34>

SPI_CLK_PCH<38>

SPI_SB_CS#<38>

SPI_SI<38>

SPI_SO_R<38>

HDA_SYNC

This signal has a weak internal pull down.

H=>On Die PLL is supplied by 1.5V
L=>On Die PLL is supplied by 1.8V

*

HDA_DOCK_EN#

ME debug mode , this signal has a weak internal PU

H=>security measures defined in the Flash

*

Descriptor will be in effect (default)

4

4

C12

C12

C125

C125

1 2
1 2
1 2
1 2

R1161 33_0402_5%R1161 33_0402_5%
R78 33_0402_5%R78 33_0402_5%

R81 33_0402_5%R81 33_0402_5%
R82 33_0402_5%R82 33_0402_5%

SPI_CLK_PCH

SPI_SB_CS#

SPI_SI

SPI_SO_R

0402_5%

0402_5%

K_0402_5%

K_0402_5%

1

2

1

2

1 2
1 2

1 2
1 2

12

CLRP1

CLRP1

HORT PADS

HORT PADS

S

S

12

CLRP2

CLRP2

SHORT PADS

SHORT PADS

SB_SPKR<34>

SM_IN

TRUDER#

PCH_I

NTVRMEN

INTVR



H
LInte



R654 15_0402_5%

R654 15_0402_5%

1 2

R655 15_0402_5%

R655 15_0402_5%

1 2

L=>Flash Descriptor Security will be overridden

SPI_MOSI

This signal has a weak internal pull down.

Disable iTPM=No Stuff

*

Enable iTPM=Stuff

iTPM ENABLE/DISABLE

+3VS

R68 1K_0402_5%@R68 1K_0402_5%@

1 2

5

4

MEN

Integrated VRM enable

grated VRM disable

TCX1

ICH_R
ICH_R

ICH_RTCRST#

ICH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

SB_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDOUT

ME_EN#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST#

SPI_SI

B

TCX2

T16PAD T16PAD

13

D

13

C14

D17

A16

A14

A30

D29

P1

C30

G30

F30

E32

F32

B29

H32

J30

M3

K3

K1

J2

J4

BA2

AV3

AY3

AY1

AV1

SI Reserve GPIO19 21 PD for LPM enable power saving

 

4

S

+3V

R64 10K

R64 10K

1 2

R67 1K_

R67 1K_

1 2

L

*

U1A

U1A

RTCX1
RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

IBE

IBE

XPEAK-M_FCBGA1071

XPEAK-M_FCBGA1071

HDA_SDO

This signal has a weak internal pull down.
This signal can't PU

*

OW=Default

HIGH=No Reboot

FWH0
FWH1
FWH2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

LPC

RTCIHDA

RTCIHDA

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI JTAG

SPI JTAG

Disable iTPM=No Stuff

Enable iTPM=Stuff

GPIO21

GPIO19

R92 10K_0402_5%R92 10K_0402_5%

R93 10K_0402_5%R93 10K_0402_5%

*

D33

/ LAD0

B33

/ LAD1

C32

/ LAD2

A32

C34

A34

LDRQ0#

F34

AB9

SERIRQ

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

T3

Y9

V1

1

C132

C132

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

Place near IBEX-M

12

12

3

SIR

_0402_5%

_0402_5%

Q

SB_SP

0402_5%@

0402_5%@

KR

LDRQ0#
LDRQ1#

SIRQ

SATA_TXN0_C
SATA_TXP0_C

SATA_TXN1_C
SATA_TXP1_C

SATA2 SATA3 don't



support on HM55

SATA_TXN4_C
SATA_TXP4_C

SATA_TXN5_C
SATA_TXP5_C

R89 37.4_0402_1%R89 37.4_0402_1%

1 2

R91 10K_0402_1%R91 10K_0402_1%

1 2

GPIO21

GPIO19

W=20milsW=20mils

+3VS

3

2

LPC_A

D0 <31,39>

LPC_A

D1 <31,39>

LPC_A

D2 <31,39>

LPC_AD3 <31,39>

LPC_FRAME# <31,39>

T13 PADT13 PAD
T14 PADT14 PAD

SIRQ <39>

SATA_RXN0_C
SATA_RXP0_C

C126 0.01U_0402_50V7KC126 0.01U_0402_50V7K

1 2

C127 0.01U_0402_50V7KC127 0.01U_0402_50V7K

1 2

C130 0.01U_0402_50V7KC130 0.01U_0402_50V7K

1 2

C131 0.01U_0402_50V7KC131 0.01U_0402_50V7K

1 2

C128 0.01U_0402_50V7KPA@C128 0.01U_0402_50V7KPA@

1 2

C129 0.01U_0402_50V7KPA@C129 0.01U_0402_50V7KPA@

1 2

C1276 0.01U_0402_50V7KPA@C1276 0.01U_0402_50V7KPA@

1 2

C1277 0.01U_0402_50V7KPA@C1277 0.01U_0402_50V7KPA@

1 2

+1.05VS

+3VS

SATA_LED# <40>

D3

D3

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DAN2

DAN2

02U_SC70

02U_SC70

R94 1K_0402_5%R94 1K_0402_5%

3

SATA_TXN0
SATA_TXP0

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1
SATA_TXP1

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4
SATA_TXP4

SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5
SATA_TXP5

BATT1.1+3VL+RTCVCC

1 2

W=20mils

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

SATA_RXN0_C <30>
SATA_RXP0_C <30>

SATA_TXN0 <30>
SATA_TXP0 <30>

SATA_RXN1_C <30>
SATA_RXP1_C <30>

SATA_TXN1 <30>
SATA_TXP1 <30>

SATA_RXN4_C <37>
SATA_RXP4_C <37>

SATA_TXN4 <37>
SATA_TXP4 <37>

SATA_RXN5_C <30>
SATA_RXP5_C <30>

SATA_TXN5 <30>
SATA_TXP5 <30>

BATT1

@B ATT1

@

CR2032 RTC BATTERY

CR2032 RTC BATTERY

JBATT1

JBATT1

1

1

2

2

3

GND

4

GND

ACES_85205-02001

ACES_85205-02001

CONN@

CONN@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

12

R86

R86

@

@

200_0402_5%

200_0402_5%

12

R684

R684

@

@

100_0402_1%

100_0402_1%

HDD

ODD

E SATA

Multi Bay

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TCK

PCH_JTAG_RST#

+3VALW+3VALW

12

R84

R84

@

@

200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO

12

R683

R683

@

@

100_0402_1%

100_0402_1%

1 2

R90 51_0402_5%R90 51_0402_5%

RefDesPC H Pin

R86

R684

R84

R683

R685

R90

R87

R88

1

https://t.me/schematicslaptop
https://t.me/biosarchive

+3VALW

@

@

R85

R85
20K_0402_5%

20K_0402_5%

1 2

PCH_JTAG_TDI

@

@

R685

R685
10K_0402_1%

10K_0402_1%

1 2

PCH_JTAG_TCK

PCH JTAG Enable PCH JTAG Disable

ES1 ES1ES2 ES2

No Install

No Install

No Install

200ohm

100ohm

200ohm

200ohm

100ohm 100ohm

200ohm

200ohm

100ohm 100ohm

No Install

No Install

No Install

20Kohm

10Kohm

51ohm 51ohm 51ohm

20Kohm 20Kohm

10Kohm

Title

Title

Title

IBEX-M(1/6)-HDA/JTAG/SATA

IBEX-M(1/6)-HDA/JTAG/SATA

IBEX-M(1/6)-HDA/JTAG/SATA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

No Install

10Kohm

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

+3VALW

@

@

1 2

12

R88

R88
10K_0402_5%

10K_0402_5%

@

@

No Install

No Install

No Install

No Install

No InstallR85

No Install

51ohm

No Install

No InstallNo Install

R87

R87
20K_0402_5%

20K_0402_5%

of

11 55Monday, November 09, 2009

of

11 55Monday, November 09, 2009

of

11 55Monday, November 09, 2009

1.0

1.0

1.0

5

https://t.me/schematicslaptop

https://t.me/biosarchive

D D

PCIE_RXN1<31>

1 2

1 2

1 2

1 2

1 2

PCIE_RXP1<31>
PCIE_TXN1<31>
PCIE_TXP1<31>

PCIE_RXN2<31>
PCIE_RXP2<31>
PCIE_TXN2<31>
PCIE_TXP2<31>

PCIE_RXN3<32>
PCIE_RXP3<32>
PCIE_TXN3<32>
PCIE_TXP3<32>

PCIE_RXN4<31>
PCIE_RXP4<31>
PCIE_TXN4<31>
PCIE_TXP4<31>

CLKREQ_WWAN#_R

CLKREQ_WLAN#

CLKREQ_LAN#

CLKREQ_EXP#_R

PCIECLKREQ4#

CLK_PCIE_WWAN#<31>
CLK_PCIE_WWAN<31>

CLKREQ_WWAN#<31>

CLK_PCIE_WLAN#<31>
CLK_PCIE_WLAN<31>

CLKREQ_WLAN#<31>

CLK_PCIE_LAN#<32>
CLK_PCIE_LAN<32>

CLKREQ_LAN#<32>

CLK_PCIE_EXP#<31>
CLK_PCIE_EXP<31>

CLKREQ_EXP#<31>

WWAN

WLAN

L

AN

New Card

C C

R405 10K_0402_5%R405 10K_0402_5%

+3VALW

R411 10K_0402_5%

R411 10K_0402_5%

+3VS

R677 10K_0402_5%

R677 10K_0402_5%

+3VS

R415 10K_0402_5%R415 10K_0402_5%

+3VALW

R503 10K_0402_5%R503 10K_0402_5%

+3VALW

OK

WWAN

OK

WLAN

OK

LAN+Card reader

B B

OK

New Card

A A

C133 0.1U_0402_16V4ZC133 0.1U_0402_16V4Z
C134 0.1U_0402_16V4ZC134 0.1U_0402_16V4Z

C135 0.1U_0402_16V4ZC135 0.1U_0402_16V4Z
C136 0.1U_0402_16V4ZC136 0.1U_0402_16V4Z

C137 0.1U_0402_16V4ZC137 0.1U_0402_16V4Z
C138 0.1U_0402_16V4ZC138 0.1U_0402_16V4Z

C139 0.1U_0402_16V4ZPA@ C139 0.1U_0402_16V4ZPA@
C140 0.1U_0402_16V4ZPA@ C140 0.1U_0402_16V4ZPA@

R107 0_0402_5%R107 0_0402_5%
R108 0_0402_5%R108 0_0402_5%

R80 100_0402_5%

R80 100_0402_5%

R109 0_0402_5%R109 0_0402_5%
R110 0_0402_5%R110 0_0402_5%

R111 0_0402_5%R111 0_0402_5%
R112 0_0402_5%R112 0_0402_5%

R114 0_0402_5%PA@ R114 0_0402_5%PA @
R115 0_0402_5%PA@ R115 0_0402_5%PA @

R83 100_0402_5%PA@ R83 100_0402_5%PA@

R756 100_0402_5%

R756 100_0402_5%

+3VALW

R757 10K_0402_5%R757 10K_0402_5%

+3VALW

R606 10K_0402_5%R606 10K_0402_5%

+3VALW

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2



PCIE7 PCIE8 don't
support on HM55

1 2
1 2

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2

1 2

1 2

PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1
PCIE_C_TXP1

PCIE_RXN2
PCIE_RXP2
PCIE_C_TXN2
PCIE_C_TXP2

PCIE_RXN3
PCIE_RXP3
GLAN_C_TXN
GLAN_C_TXP

PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4
PCIE_C_TXP4

CLK_PCIE_WWAN#_R
CLK_PCIE_WWAN_R

CLKREQ_WWAN#_R

CLK_PCIE_WLAN#_R
CLK_PCIE_WLAN_R

CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R

CLK_PCIE_EXP#_R
CLK_PCIE_EXP_R

CLKREQ_EXP#_R

PCIECLKREQ4#

PCIECLKREQ5#

PEG_B_CLKRQ#

4

U1B

U1B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

T59P AD T59PAD
T60P AD T60PAD

T61P AD T61PAD
T62P AD T62PAD

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

PCI-E*

PCI-E*

SMBALERT# / GPIO11

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SMBus

SMBus

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Link

Controller

Controller

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

Clock Flex

Clock Flex

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N

CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

SMBCLK

CL_CLK1

3

EC_LID_OUT#

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML0ALERT#

SML1ALERT#

SML1CLK

SML1DATA

EC_LID_OUT#

B9

SMBCLK

H14

SMBDATA

C8

SML0ALERT#

J14

SML0CLK

C6

SML0DATA

G8

SML1ALERT#

M14

SML1CLK

R215

E10

G12

T13

T11

T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

Add for RF

R215

SML1DATA

R231

R231

PEG_CLKREQ#

R102 10K_0402_5%R102 10K_0402_5%

L_CLK_PCIE_VGA#
L_CLK_PCIE_VGA

CLK_DP#
CLK_DP

XTAL25_IN
XTAL25_OUT

R116 90.9_0402_1%R116 90.9_0402_1%

1 2

R1021 22_0402_5%

R1021 22_0402_5%

1 2

R95 10K_0402_5%R95 10K_0402_5%

1 2

R96 2.2K_0402_5%R96 2.2K_0402_5%

1 2

R97 2.2K_0402_5%R97 2.2K_0402_5%

1 2

R98 2.2K_0402_5%R98 2.2K_0402_5%

1 2

R99 2.2K_0402_5%R99 2.2K_0402_5%

1 2

R100 10K_0402_5%R100 10K_0402_5%

1 2

R101 10K_0402_5%R101 10K_0402_5%

1 2

R103 2.2K_0402_5%R103 2.2K_0402_5%

1 2

R104 2.2K_0402_5%R104 2.2K_0402_5%

1 2

EC_LID_OUT# <39>

SMBCLK <31>

SMBDATA <31>

WLAN WWAN New card

For Intel LAN only

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

DTS , read from EC

1 2

R604 0_0402_5%R604 0_0402_5%

1 2

R605 0_0402_5%R605 0_0402_5%

1 2

CLK_EXP# <6>
CLK_EXP <6>

T71 PADT71 PAD
T72 PADT72 PAD

CLK_DMI# <19>
CLK_DMI <19>

CLK_BUF_BCLK# <19>
CLK_BUF_BCLK <19>

CLK_BUF_DOT96# <19>
CLK_BUF_DOT96 <19>

CLK_BUF_CKSSCD# <19>
CLK_BUF_CKSSCD <19>

CLK_14M_PCH <19>

CLK_PCI_FB <14>

1

C1407

C1407

2

12P_0402_50V J

12P_0402_50V J

OK

+1.05VS

CLK_48M_CR <33>

 

SMB_EC_CK2 <39>

SMB_EC_DA2 <39>

OK

OK

OK

OK

OK

OK

+3VALW

PCH

CLK_PCIE_VGA# <24>

CLK_PCIE_VGA <24>

Nvidisa thermall sensor

2

+3VS

+3VS

2.2K_0402_5%

2.2K_0402_5%

2

Q1A

Q1A

6 1

5

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q1B

Q1B

3

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

9/11 Change from +3VS to +3VS_VGA

+3VS_VGA +3VS_VGA

2

Q4A

SMB_EC_DA2

SMB_EC_CK2

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q4B

Q4B

3

Q4A

6 1

5

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

OK

10/23 Reserve the Y2 for Intel PCH jitter issue.

XTAL25_IN

XTAL25_OUT

R113 1M_0402_5%@R113 1M_0402_5%@

1

2

+3VS

R106

R106

R105

R105

2.2K_0402_5%

2.2K_0402_5%

SMB_DATA_S3SMBDATA

SMB_CLK_S3SMBCLK

SMBCLK

THERM_DAT_GPU

THERM_CLK_GPU

1 2

Y2

@ Y2

@

1 2

25MHZ_20P_1BG25000CK1A

25MHZ_20P_1BG25000CK1A

C141

C141

@

@

18P_0402_50V8J

18P_0402_50V8J

1

SMB_DATA_S3 <17,18,19,30>

XDP SODIMM Clock gen G sensor

  

SMB_CLK_S3 <17,18,19,30>

Add for RF

1

@

@

R1194

R1194

2.2_0402_5%

2.2_0402_5%

2

@

@

1

C1406

C1406
12P_0402_50V

12P_0402_50V

2

THERM_DAT_GPU <26>

THERM_CLK_GPU <26>

12

R1225

R1225
0_0402_5%

0_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

IBEX-M(2/6)-PCI-E/SMBUS/CLK

IBEX-M(2/6)-PCI-E/SMBUS/CLK

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

of

12 55Monday, November 09, 2009

of

12 55Monday, November 09, 2009

of

12 55Monday, November 09, 2009

1.0

1.0

1.0

5

U1C

TX_PRX_N0

DMI_C

TX_PRX_N0<7>

DMI_C

TX_PRX_N1<7>

DMI_C

TX_PRX_N2<7>

DMI_C

TX_PRX_N3<7>

DMI_C

TX_PRX_P0<7>

DMI_C

TX_PRX_P1<7>

DMI_C

TX_PRX_P2<7>
TX_PRX_P3<7>

D D

Checklist0.8 MEPWROK
can be connect to
PWROK if iAMT disable

PM_PWROK<39>

M_PWROK<39>

C C

PM_DRAM_PWRGD<6>

EC_RSMRST#<39>

9/11 GPIO30 change to
SUS_PWR_DN_ACK

B B

DMI_C

DMI_C

RX_PTX_N0<7>

DMI_C

RX_PTX_N1<7>

DMI_C

RX_PTX_N2<7>

DMI_C

RX_PTX_N3<7>

DMI_CRX_PTX_P0<7>
DMI_CRX_PTX_P1<7>
DMI_CRX_PTX_P2<7>
DMI_CRX_PTX_P3<7>

+1.05VS

R118 49.9_0402_1%R118 49.9_0402_1%

1 2

4mil width and place
within 500mil of the PCH



XDP_DBRESET#<6>

R365 0_0402_5%

R365 0_0402_5%

VGATE<19,49>

R120 10K_0402_5%R120 10K_0402_5%

R124 10K_0402_5%R124 10K_0402_5%

PWRBTN_OUT#<39>

PM_PWROK R_EC_RSMRST#

SYS_RST#

PM_CLKRUN#

LOW_BAT#

PM_RI#

ICH_PCIE_WAKE#

EC_ACIN

1 2

R373 0_0402_5%@ R373 0_0402_5%@

1 2

12

R121 0_0402_5%R121 0_0402_5%
R379 0_0402_5%@ R379 0_0402_5%@

R_EC_RSMRST#

R123

R123

1 2

12

SUS_PWR_DN_ACK<39>

R151 10K_0402_5%R151 10K_0402_5%

+3VALW

EC_ACIN<26,39>

D37

D37

2 1

RB751V_SOD323

RB751V_SOD323

R133 10K_0402_5%@ R133 10K_0402_5%@

R129 8.2K_0402_5%R129 8.2K_0402_5%

R134 8.2K_0402_5%R134 8.2K_0402_5%

R136 10K_0402_5%R136 10K_0402_5%

R137 10K_0402_5%R137 10K_0402_5%

R138 8.2K_0402_5%R138 8.2K_0402_5%

DMI_C
DMI_C

TX_PRX_N1

DMI_C

TX_PRX_N2

DMI_C

TX_PRX_N3

DMI_C

TX_PRX_P0

DMI_C

TX_PRX_P1

DMI_C

TX_PRX_P2

DMI_C

TX_PRX_P3

DMI_C

RX_PTX_N0

DMI_C

RX_PTX_N1
RX_PTX_N2

DMI_C

RX_PTX_N3

DMI_C

RX_PTX_P0

DMI_C
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_IRCOMP

0_0402_5%

0_0402_5%

SYS_RST#

1 2

R119

R119

1 2
1 2

R122 10K_0402_5%

R122 10K_0402_5%

1 2

PM_DRAM_PWRGD

100_0402_5%

100_0402_5%

SUS_PWR_DN_ACK

1 2

PM_PWRBTN#_R

R125 0_0402_5%R125 0_0402_5%

1 2

EC_ACIN

LOW_BAT#

PM_RI#

1 2

1 2

1 2

1 2

1 2

+3VALW

12

U1C

BC24

DMI0R

BJ22

DMI1R

AW20

DMI2R

BJ20

DMI3R

BD24

DMI0R

BG22

DMI1R

BA20

DMI2R

BG20

DMI3R

BE22

DMI0T

BF21

DMI1T

BD20

DMI2T

BE18

DMI3T

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBE

IBE

+3VS

Check PM_SLP_LAN#

XN
XN
XN
XN

XP
XP
XP
XP

XN
XN
XN
XN

XPEAK-M_FCBGA1071

XPEAK-M_FCBGA1071

+3_5V PWR_OK<44>

+RTCVCC

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_R

FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_R
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

PMSYNCH

+3_5V PWR_OK

R1217 1K_0402_5%@ R1217 1K_0402_5%@

1 2

XN0
XN1
XN2
XN3
XN4
XN5
XN6
XN7

XP0
XP1
XP2
XP3
XP4
XP5
XP6

TP23

4

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

12

R1218

R1218

@

@

FDI_C

TX_PRX_N0
TX_PRX_N1

FDI_C
FDI_C

TX_PRX_N2

FDI_C

TX_PRX_N3

FDI_C

TX_PRX_N4

FDI_C

TX_PRX_N5

FDI_C

TX_PRX_N6

FDI_C

TX_PRX_N7

FDI_C

TX_PRX_P0

FDI_C

TX_PRX_P1

FDI_C

TX_PRX_P2

FDI_C

TX_PRX_P3
TX_PRX_P4

FDI_C

TX_PRX_P5

FDI_C
FDI_C

TX_PRX_P6
TX_PRX_P7

FDI_C

ICH_PCIE_WAKE#XDP_DBRESET#

PM_CLKRUN#

PM_SUS_STAT#

SUS_CLK

Can be left NC when IAMT is
not support on the platfrom

If not using integrated
LAN,signal may be left as NC.

R1221 0_0402_5%R1221 0_0402_5%

1 2

+RTCVCC

8

3

P

+

0

2

-

G

4

U59A

@U59A

@

LM358ADT_SO8

LM358ADT_SO8

2.2K_0402_5%

2.2K_0402_5%

change to 2.2K

TX_PRX_N0 <7>

FDI_C
FDI_C

TX_PRX_N1 <7>

FDI_C

TX_PRX_N2 <7>

FDI_C

TX_PRX_N3 <7>
TX_PRX_N4 <7>

FDI_C
FDI_C

TX_PRX_N5 <7>

FDI_C

TX_PRX_N6 <7>

FDI_C

TX_PRX_N7 <7>

FDI_C

TX_PRX_P0 <7>
TX_PRX_P1 <7>

FDI_C
FDI_C

TX_PRX_P2 <7>

FDI_C

TX_PRX_P3 <7>

FDI_C

TX_PRX_P4 <7>

FDI_C

TX_PRX_P5 <7>

FDI_C

TX_PRX_P6 <7>

FDI_CTX_PRX_P7 <7>

FDI_INT <7>

FDI_FSYNC0 <7>

FDI_FSYNC1 <7>

FDI_LSYNC0 <7>

FDI_LSYNC1 <7>

ICH_PCIE_WAKE# <31,32>

T17T17

T18T18

SLP_S5# <39>

SLP_S4# <39>

SLP_S3# <39>

H_PM_SYNC <6>

1

R_EC_RSMRST#

3

R77

R77

0

0

BKLT_EN

IGPU_

1 2

0

0

0K_0402_5%

0K_0402_5%

1

1

IGPU_

Close PCH and mini space 20mil

I_CRT_HSYNC<22>
I_CRT_VSYNC<22>

CRB0.9 change to 0 ohm

EDID_

CLK and EDID_DATA single
end and keep 30 mil with other
LVDS signal avoid noise

IGPU_

I_ENA

DPST_P

+3V

I_CRT_DDC_CLK<20>
I_CRT_DDC_DATA<20>

I_EDI
I_EDI

I_LVDS_ACLK-<22>
I_LVDS_ACLK+<22>

I_LVDS_A0-<22>
I_LVDS_A1-<22>
I_LVDS_A2-<22>

I_LVDS_A0+<22>
I_LVDS_A1+<22>
I_LVDS_A2+<22>

I_BLUE<22>
I_GREEN<22>
I_RED<22>

BKLT_EN<22>

VDD<21>

WM<22>

D_CLK<22>
D_DATA<22>

S

R77

R77

I_ENA

SG@

SG@

1 2

R7711

R7711

1 2

R7721

R7721

3 2

3 2

1 2

R774

R774

1 2
1 2

R775 0_0402_5%SG@ R775 0_0402_5%SG@

BKLT_EN

VDD

DPST_P

T69PAD T69PAD

I_BLUE
I_GREEN
I_RED

CRB0.9 change to 1K_0402_0.5%

I_BLUE

I_GREEN

I_RED

Place the 3 resistors close to IBEX

1 2

R776 150_0402_1%SG@ R776 150_0402_1%SG@

1 2

R777 150_0402_1%SG@ R777 150_0402_1%SG@

1 2

R778 150_0402_1%SG@ R778 150_0402_1%SG@

WM

0K_0402_5%

0K_0402_5%
0K_0402_5%SG@

0K_0402_5%SG@

.

.

37K_0402_1%SG@

37K_0402_1%SG@

0_

0_

0402_5%SG@

0402_5%SG@

HSYNC
VSYNC

12

2

U1D

U1D

T48

L_BKL

TEN

T47

L_VDD

_EN

Y48

L_BKL

TCTL

AB48

_CLK

L_DDC

Y45

L_DDC

_DATA

AB46

L_CLK

L_CTR

V48

L_DATA

L_CTR

AP39

LVD_I

BG

AP41

LVD_V

BG

AT43

LVD_V

REFH

AT42

REFL

LVD_V

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBE

IBE

R126

R126

1K_0402_0.5%

1K_0402_0.5%

LVDS

LVDS

CRT

CRT

XPEAK-M_FCBGA1071

XPEAK-M_FCBGA1071

SDVO_
SDVO_

SDVO_
SDVO_

SDVO_

SDVO_

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

TVCLKINN
TVCLKINP

STALLN

STALLP

SDVO_

INTN

SDVO_

INTP

CTRLCLK

CTRLDATA

AUXN

DDPB_
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

06/19 HDMI data 0 and data 2 re verse

1

SDVO

Display Port B

Display Port C

Display Port D

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

IBEX-M(3/6)-DMI/GPIO/LVDS

IBEX-M(3/6)-DMI/GPIO/LVDS

IBEX-M(3/6)-DMI/GPIO/LVDS

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

13 55Monday, November 09, 2009

13 55Monday, November 09, 2009

13 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

5

RP3

ACCEL_INT<30>

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

RP3

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP4

RP4

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP5

RP5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP6

RP6

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP7

RP7

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

PCI_DEVSEL#
PCI_SERR#
PCI_REQ0#
PCI_PIRQB#

PCI_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#

D D

PCI_REQ3#
PCI_PIRQF#
PCI_PERR#
PCI_LOCK#

PCI_PIRQA#
PCI_PIRQD#
PCI_PIRQG#
PCI_PIRQC#

PCI_PIRQE#
PCI_STOP#
PCI_IRDY#

DGPU_SELECT#

C C

GNT2

Default-Internal pull up

Low=Configures DMI for ESI
compatible operation(for
servers only.Not for
mobile/desktops)

B B

CLK_DEBUG_PORT_1<31>

A A

PCI_GNT3#

R183 1K_0402_5%@ R183 1K_0402_5%@

A16 swap overide Strap/Top-Block
Swap Override jumper

PCI_GNT3#

+3VS

+3VS

DGPU_SELECT#<22>

PCI_SERR#<39>

PCI_RST#<39>

R150

R150

0_0402_5%

0_0402_5%

DGPU_PWM_SELECT#

T70 PADT70 PAD

ACCEL_INT

*

PCI_PME#<39>

PLT_RST#<24,31,32>

R_CLK_PCI_FB
R_CLK_PCI_EC

R_CLK_DEBUG_PORT_1

*

5

R158 22_0402_5%R158 22_0402_5%
R160 22_0402_5%R160 22_0402_5%

R162 22_0402_5%R162 22_0402_5%

CLK_PCI_FB<12>
CLK_PCI_EC<39>

1 2

Low=A16 swap
override/Top-Block
Swap Override enabled
High=Default

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#

DGPU_SELECT#

PCI_REQ3#

PCI_GNT0#
PCI_GNT1#

PCI_GNT3#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

12

PCI_SERR#
PCI_PERR#

PCI_IRDY#

PCI_DEVSEL#
PCI_FRAME#

PCI_LOCK#

PCI_STOP#
PCI_TRDY#

PLT_RST#

1 2
1 2

1 2

USB_OC#0
WXMIT_OFF#
BT_OFF
USB_OC#2

USB_OC#6
USB_OC#5
USB_OC#4
EXP_CPPE#

U1E

U1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

R_CLK_DEBUG_PORT_1

R1170 10K_0402_5%R1170 10K_0402_5%

1 2

R1171 10K_0402_5%R1171 10K_0402_5%

1 2

R1172 10K_0402_5%R1172 10K_0402_5%

1 2

R1173 10K_0402_5%R1173 10K_0402_5%

1 2

R1174 10K_0402_5%R1174 10K_0402_5%

1 2

R1175 10K_0402_5%R1175 10K_0402_5%

1 2

R1176 10K_0402_5%R1176 10K_0402_5%

1 2

R1177 10K_0402_5%R1177 10K_0402_5%

1 2

R_CLK_PCI_FB
R_CLK_PCI_EC

+3VALW

BUF_PLT_RST#<6>

PCI

PCI

4

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USB

USB

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

PCI_GNT0#

PCI_GNT1#

Boot BIOS Strap

0

0

1

R179 0_0402_5%R179 0_0402_5%

12

@R185

@

100K_0402_5%

100K_0402_5%

4

GPIO8

AY9

This signal has a weak internal

BD1

pull up ,can't Pull low

AP15
BD8

GPIO15

AV9

L Intel ME Crypto Transport



BG8

Layer Security(TLS) chiper sui te

AP7

with no confidentiality

AP6

H Intel ME Crypto Transport



AT6
AT9

Layer Security(TLS) chiper sui te

BB1

with confidentiality

AV6

R185

BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2

AV7

AY8
AY5

AV11
BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25

D25

N16
J16
F16
L16
E14
G16
F12
T15

R163 1K_0402_5%@ R163 1K_0402_5%@

R164 1K_0402_5%@ R164 1K_0402_5%@

PCI_GNT1#PCI_GNT0#

1 2

U2

@U2

@

4

O

ave weak internal PU 20K

it h

Check list Rev0.8 section1.23.2 If not
implemented, the Braidwood interface
signals can be left as No Connect (NC).

NV_ALE
NV_CLE

GPIO27

On-Die PLL Voltage Regulator
This signal has a weak internal pull up



Die voltage regulator enable

H On-

*

L On-Die PLL Voltage Regulator disab le



USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12

USBRBIAS

Within 500
mils

USB_OC#0
BT_OFF
USB_OC#2
WXMIT_OFF#
USB_OC#4
USB_OC#5
USB_OC#6
EXP_CPPE#

1 2

1 2

0

1

0

11

+3VS

5

1

P

IN1

2

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

USB20_N0 <37>
USB20_P0 <37>
USB20_N1 <37>
USB20_P1 <37>
USB20_N2 <37>
USB20_P2 <37>
USB20_N3 <36>
USB20_P3 <36>
USB20_N4 <21>
USB20_P4 <21>
USB20_N5 <31>
USB20_P5 <31>

USB20_N8 <31>
USB20_P8 <31>
USB20_N9 <31>
USB20_P9 <31>
USB20_N10 <33>
USB20_P10 <33>
USB20_N11 <37>
USB20_P11 <37>
USB20_N12 <37>
USB20_P12 <37>

R155 22.6_0402_1%R155 22.6_0402_1%

1 2

Boot BIOS
Location

LPC

Reserved(NAND)

PCI

SPI

*

PLT_RST#

ESATA

MB

MB USB

Dock

USB Camera

WLAN

WWAN

New Card

Cardreader

Finger print

BT

NV_ALE

2009. 09.20 un-stuff R185 PD for PLT_RST#

3

R140 1K_0402_1%

R140 1K_0402_1%

1 2

+3VS

*

+3VS

DGPU_EDIDSEL#<20,22>

DGPU_HPD_INT#<23>

DGPU_HOLD_RST#<24>

DGPU_PWROK<51>

R145 10K_0402_5%R145 10K_0402_5%

1 2

DGPU_PWR_EN<23,40,41,47,51>

WWAN_DETECT#<31>

HDDHALT_LED#<40>

PCH_DDR_RST<6>

PCH_TEMP_ALERT#<39>

9/11 GPIO57 for VGA Board ID

EHCI 1

EHCI2

BT_OFF <37>

WXMIT_OFF# <31>

EXP_CPPE# <31>

Intel Anti-Theft Techonlogy

High=Endabled

Low=Disable(floating)

NV_ALE

R174 1K_0402_5%@ R174 1K_0402_5%@

1 2

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal
PU,Do not pull low

NV_CLE

R184 1K_0402_5%@ R184 1K_0402_5%@

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PCH_GPIO0

DGPU_EDIDSEL#

DGPU_HPD_INT#

EC_SCI#<39>

EC_SMI#<39>

XMIT_OFF<31>

*

EC_SCI#

EC_SMI#

PCH_GPIO12

PCH_GPIO15

DGPU_HOLD_RST#

DGPU_PWROK

GPIO22

XMIT_OFF

Internal VccVRM Option

PCH_GPIO28

H_STP_PCI#

GPIO35

DGPU_PWR_EN

VGA_PRSNT_L#

WWAN_DETECT#

HDDHALT_LED#

PCIECLKREQ6#

PCH_DDR_RST

GPIO48

PCH_TEMP_ALERT#

GPIO57

NV_AL

+1.8VS

+3VS

E

Enable Intel Anti-Theft

ology 8.2K PU to +3VS

Techn



Disable Intel Anti-Theft
Technology floating(internal PD)



NV_CLE

DMI termination voltage.
weak internal PU, don't PD

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

U1F

U1F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

10/06 Add M93 and Park VGA ID pin (GPIO28, 57)

2

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

PROCPWRGD

GPIO57 GPIO28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

M93

M93-LP

Park

Park-LP

High High

High Low

Low

Low Low

1

AH45

T19 PADT19 PAD

AH46

T20 PADT20 PAD

AF48

T21 PADT21 PAD

AF47

T22 PADT22 PAD

GATEA20

U2

A20GATE

AM3

AM1

PCH_PECI_R

BG10

PECI

KB_RST#

T1

RCIN#

BE10

H_THERMTRIP#_L

BD10

THRMTRIP#

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18

TP10

AJ24

TP11

AK41

TP12

AK42

TP13

M32

TP14

N32

TP15

M30

TP16

N30

TP17

H12

TP18

AA23

TP19

AB45

NC_1

AB38

NC_2

AB42

NC_3

AB41

NC_4

T39

NC_5

P6

INIT3_3V#

C10

TP24

High

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

GATEA20 <39>

CLK_CPU_BCLK# <6>

CLK_CPU_BCLK <6>

R144 0_0402_5%R144 0_0402_5%

1 2

KB_RST# <39>

H_CPUPWRGD <6>

54.9_0402_1%

54.9_0402_1%

1 2

R146

R146

EC_SCI#

DGPU_EDIDSEL#

KB_RST#

DGPU_PWR_EN

DGPU_HPD_INT#

VGA_PRSNT_L#

DGPU_HOLD_RST#

WWAN_DETECT#

GATEA20

PCH_TEMP_ALERT#

HDDHALT_LED#

GPIO48

GPIO22

DGPU_PWROK

R166 10K_0402_5%R166 10K_0402_5%

R167 10K_0402_5%R167 10K_0402_5%

R171 10K_0402_5%R171 10K_0402_5%

OPP@

OPP@

R172 10K_0402_5%

R172 10K_0402_5%

R173 10K_0402_5%R173 10K_0402_5%

OPP@

OPP@

R175 10K_0402_5%

R175 10K_0402_5%

R176 10K_0402_5%

R176 10K_0402_5%

R178 10K_0402_5%

R178 10K_0402_5%

R180 10K_0402_5%

R180 10K_0402_5%

R181 10K_0402_5%

R181 10K_0402_5%

R169 10K_0402_5%R169 10K_0402_5%

R170 10K_0402_5%R170 10K_0402_5%

R168 10K_0402_5%R168 10K_0402_5%

R874 10K_0402_5%R874 10K_0402_5%

INIT3_3V

This signal has weak internal
PU, can't pull l ow

T48 PADT48 PAD

EC_SMI#

PCH_GPIO15

PCH_GPIO12

PCIECLKREQ6#

PCH_DDR_RST

PCH_GPIO28

GPIO57

GPIO35

VGA_PRSNT_L#

GPIO57

PCH_GPIO28

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/RSVD

IBEX-M(4/6)-PCI/USB/RSVD

IBEX-M(4/6)-PCI/USB/RSVD

R157 10K_0402_5%R157 10K_0402_5%

R159 1K_0402_5%R159 1K_0402_5%

R811 10K_0402_5%R811 10K_0402_5%

R812 10K_0402_5%R812 10K_0402_5%

R813 10K_0402_5%R813 10K_0402_5%

R814 10K_0402_5% PA@ R814 10K_0402_5% PA@

R182 10K_0402_5%

R182 10K_0402_5%

R165 10K_0402_5%R165 10K_0402_5%

R911 10K_0402_5%SG@R911 10K_0402_5%SG@

R1257 10K_0402_5%@ R1257 10K_0402_5%@

R1263 10K_0402_5%OPP@ R1263 10K_0402_5%OPP@

1

12

R147

R147
56_0402_5%

56_0402_5%

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

OK

H_THERMTRIP# <6,26>

+VCCP

12

of

14 55Monday, November 09, 2009

of

14 55Monday, November 09, 2009

of

14 55Monday, November 09, 2009

H_PECI <6>

+3VS

+3VALW

1.0

1.0

1.0

https://t.me/schematicslaptop
https://t.me/biosarchive

5

VS

+1.05

R18

R18

@

@

6

6

1 2

_

_

0402_5%

0402_5%

0

0

D

elete L1

D

D D

C C

B B

A A

G1.1 no M3
support and not
Intel LAN, VCCLAN
Source=>GND

1 2

C177

C177

1 2

C179

C179

1 2

C182

C182

1 2

C185

C185

+RTCVCC

1

C162

C162

2

C166

C166

1 2

+V1.05S_VCCA_A_DPL

+V1.05S_VCCA_B_DPL

+1.05VS

1

C173

C173

2

_0402_6.3V6K

_0402_6.3V6K
1U

1U

0.

0.

1U_0402_16V4Z

1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+VCCP

1

C188

C188

2

5

+VCCP

1

1

C143

C143

@

@

@

@

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C15

C15

2

2

1 2

.

.

1U_0402_16V4Z

1U_0402_16V4Z

0

0

+1.05VS

1

C153

C153

2

1

1

C163

C163

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

+VCCRTCEXT

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8VS

1

1

C175

C175

C174

C174

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCSST

+V1.1A_INT_VCCSUS

+3VALW

0.2A@3.3V

0.2A@3.3V

0.2A@3.3V0.2A@3.3V

+3VS

0.4A@3.3V

0.4A@3.3V

0.4A@3.3V0.4A@3.3V

0.1A@1.1V

0.1A@1.1V

0.1A@1.1V0.1A@1.1V

1

1

C189

C189

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2mA@3.3V

2mA@3.3V

2mA@3.3V2mA@3.3V

1

1

C196

C196

C197

C197

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

_VCCA_CLK

AP51

C144

C144

AP53

1U_0402_6.3V6K

1U_0402_6.3V6K

AF23

AF24

AD38

AD39

AD41

AF43

AF41

1U_0402_6.3V6K

1U_0402_6.3V6K

AF42

C161

C161

1U_0402_6.3V6K

1U_0402_6.3V6K

AU24

BB51
BB53

BD51
BD53

AH23
AJ35
AH35

AF34

AH34

1U_0402_6.3V6K

1U_0402_6.3V6K

AF32

AT18

AU18

C190

C190

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

U1J

U1J

VCCAC

VCCAC

VCCLA

VCCLA

Y20

DCPSU

VCCME[1]

VCCME[2]

VCCME[3]

VCCME[4]

VCCME[5]

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]

VCCIO[3]

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

A12

VCCRTC

IBE

IBE

XPEAK-M_FCBGA1071

XPEAK-M_FCBGA1071

LK[1]

LK[2]

N[1]

N[2]

SBYP

0.035A

0.072A

0.073A

POWER

POWER

0.052A

0.344A

USB

USB

0.163A

1.998A

>1mA

Clock and Miscellaneous

Clock and Miscellaneous

0.357A

PCI/GPIO/LPC

PCI/GPIO/LPC

3.208A

0.032A

SATA

SATA

PCI/GPIO/LPC

PCI/GPIO/LPC

CPU

CPU

2mA

RTC

RTC

6mA

HDA

HDA

VCCIO
VCCIO
VCCIO
VCCIO

VCCSU
VCCSU
VCCSU
VCCSU
VCCSU
VCCSU
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

>1mA

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1]
VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

S3_3[1]
S3_3[2]
S3_3[3]
S3_3[4]
S3_3[5]
S3_3[6]

V5REF

4

V24

[5]

V26

[6]

Y24

[7]

Y26

[8]

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3
AK1

AH22

AT20

AH19

AD20

AF22

AD19
AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

4

+1.05

VS

1

C150

C150

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+1.05VS

ICH_V5REF_SUS

ICH_V5REF_RUN

+3VS

1

C171

C171

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

C176 0.1U_0402_16V4ZC176 0.1U_0402_16V4Z

1 2

+1.05VS_VCCAPLL

+1.8VS

1

C184

C184

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+PCH_VCC1_1_20
+PCH_VCC1_1_21
+PCH_VCC1_1_22
+PCH_VCC1_1_23

+3.3A_1.5A_VCCPAZSUS

+3VALW

1

C158

C158

C157

C157

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1A@1.1V

0.1A@1.1V

0.1A@1.1V0.1A@1.1V

Delete L4

1

1

C180

C180

C181

C181

2

@

@

@

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

U_0805_6.3V6M

U_0805_6.3V6M
10

10

R194 0_0402_5%R194 0_0402_5%

1 2

R195 0_0402_5%R195 0_0402_5%

1 2

R198 0_0402_5%R198 0_0402_5%

1 2

R200 0_0402_5%R200 0_0402_5%

1 2

+3VALW

1

C193

C193

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS

@R189

@

+1.05VS

R189

1 2

0_0402_5%

0_0402_5%

1 2

0_0603_5%

0_0603_5%

3

+1.05VS

R188

R188

@

@

1 2

0_

0_

Delete L3

C682 0.1U_0402_16V4ZC682 0.1U_0402_16V4Z

+1.05VS

+1.05VS_L+1.05VS +V1.05S_VCCA_A_DPL_L

R191

R191

1 2

0_0603_5%

0_0603_5%

R201

R201

1 2

0_0603_5%

0_0603_5%

9/20 Un-stuff C187,C192 to follow Intel check list

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.05

1

2

0402_5%

0402_5%

+1.05VS

1

2

1

C168

C168

2

_0402_6.3V6K

_0402_6.3V6K
1U

1U

+3VS

1 2
+1.8VS

+1.05VS_VCCFDIPLL

+1.05VS

R192

R192

10UH_LB2012T100MR_20%_0805

10UH_LB2012T100MR_20%_0805

+V1.05S_VCCA_B_DPL_L

10UH_LB2012T100MR_20%_0805

10UH_LB2012T100MR_20%_0805

2

VS

1

C145

C145

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_APLL

1

C164

C164

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C169

C169

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

1 2

1

2

1

2

L6

L6

L7

L7

U1G

U1G

AB24

VCCCO

AB26

VCCCO

AB28

VCCCO

AD26

VCCCO

AD28

VCCCO

AF26

C146

C146

VCCCO

AF28

VCCCO

U_0603_6.3V6M

U_0603_6.3V6M

AF30

VCCCO

10

10

AF31

VCCCO

AH26

VCCCO

AH28

VCCCO

AH30

VCCCO

AH31

VCCCO

AJ30

VCCCO

AJ31

VCCCO

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

C159

C159

VCCIO[27]

@

@

AN24

VCCIO[28]

AN26

VCCIO[29]

10U_0805_6.3V6M

10U_0805_6.3V6M

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

C165

C165

VCCIO[41]

BA28

_0402_6.3V6K

_0402_6.3V6K

VCCIO[42]

BB26

1U

1U

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

C170

C170

VCCIO[52]

BH27

VCCIO[53]

10U_0603_6.3V6M

10U_0603_6.3V6M

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBE

IBE

+V1.05S_VCCA_A_DPL

2

1

+V1.05S_VCCA_B_DPL

1

2

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

RE[1]
RE[2]
RE[3]

1.524A

RE[4]
RE[5]
RE[6]
RE[7]
RE[8]
RE[9]
RE[10]
RE[11]
RE[12]
RE[13]
RE[14]
RE[15]

0.042A

0.035A

6mA

XPEAK-M_FCBGA1071

XPEAK-M_FCBGA1071

1

+

+

C186

C186

C187

C187

2

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

220U_D2_2VY_R15M

220U_D2_2VY_R15M

1

+

+

C192

C192

C191

C191

@

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

220U_B_2.5VM_R15M

220U_B_2.5VM_R15M

Compal Secret Data

Compal Secret Data

Compal Secret Data

POWER

POWER

0.069A

CRTLVDS

CRTLVDS

0.030A

VCC CORE

VCC CORE

0.059A

HVCMOS

HVCMOS

DMI

DMI

PCI E*

PCI E*

0.156A

NAND / SPI

NAND / SPI

0.085A

FDI

FDI

Deciphered Date

Deciphered Date

Deciphered Date

2

0.061A

Delete R193

VCCAD

AC[1]

VCCAD

AC[2]

DAC[1]

VSSA_

VSSA_

DAC[2]

VCCAL

VDS

LVDS

VSSA_

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AE50

AE52

AF53

AF51

SG@

SG@

R1230 0

R1230 0

AH38

DIS@

DIS@

R1231 0

R1231 0

AH39

AP43
AP45
AT46
AT45

SG@

SG@

AB34

AB35

AD35

AT24

AT16

AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

+1.05VS

10

10

0_0402_5%

0_0402_5%

C998

C998

+1.8VS

1

0/1 L45 can use 0 ohm when DIS only

PA@

PA@

MUR

MUR

1

1

2

R196

R196

1

2

0.

0.
01U_0603_16V7K

01U_0603_16V7K

+VCCP

1

DIS@

DIS@

C148

C148

C147

C147

1 2

1 2

C999

C999

SG@

SG@

1

2

+3VS

12

C149

C149

2

2

U_0805_6.3V6M

U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10

10

0.01U_0402_25V7K

0.01U_0402_25V7K

+3V

_0402_5%

_0402_5%

_0402_5%

_0402_5%

R779 0_0603_5%

R779 0_0603_5%

0.01U_0603_16V7K

0.01U_0603_16V7K

10U_0805_6.3V6M

10U_0805_6.3V6M

C1000

C1000

1

1

SG@

SG@

2

C167

C167

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C172

C172

2

1

C178

C178

2

2

+3VS

1

2

R671 0_0402_5%R671 0_0402_5%

R672 0_0402_5%@R672 0_0402_5%@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R190

@R190

@

1 2

0_0402_5%

0_0402_5%

21

D4

D4
RB751V_SOD323

RB751V_SOD323

ICH_V5REF_SUS

1

C194

C194
1U_0402_6.3V4K_X5R

1U_0402_6.3V4K_X5R

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

1

S

12

603_5%

603_5%

Delete L5

10

10

0_0402_5%

0_0402_5%

R197

R197

1

+3V

+5VS +3VS+3VALW+5VALW

+1.8VS

+1.8VS

+3VS

+1.05VS_VCCFDIPLL

12

21

1

C195

C195
1U_0402_6.3V4K_X5R

1U_0402_6.3V4K_X5R

2

1

2

D5

D5
RB751V_SOD323

RB751V_SOD323

ICH_V5REF_RUN

15 55Monday, November 09, 2009

15 55Monday, November 09, 2009

15 55Monday, November 09, 2009

L45

L45

ATA_BLM18AG601SN1D_0603

ATA_BLM18AG601SN1D_0603

L45

L45

0_0

0_0

S

1 2

SG@

SG@

DIS@

DIS@

C999

C999
0_0805_5%

0_0805_5%

C160

C160

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

IBEX-M(5/6)-PWR

IBEX-M(5/6)-PWR

C183

C183

@

@

10U_0805_6.3V6M

10U_0805_6.3V6M

20 mils20 mils

1.0

1.0

1.0

of

of

of

https://t.me/schematicslaptop
https://t.me/biosarchive

5

U1I

U1I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

D D

C C

B B

BG12

BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC22
BC32
BC36
BC40
BC44
BC52

BD48
BD49

BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49

BF51
BG18
BG24

BG50

BH11

BH15

BH19

BH23

BH31

BH35

BH39

BH43

BH47

AF39

VSS[168]

B7

VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]

BB5

VSS[180]
VSS[181]
VSS[182]
VSS[183]

BC2

VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]

BH9

VSS[191]
VSS[192]
VSS[193]

BD5

VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]

BG4

VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]
VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

4

U1H

U1H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

https://t.me/schematicslaptop
https://t.me/biosarchive

IBEXPEAK-M_FCBGA1071

A A

5

IBEXPEAK-M_FCBGA1071

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

IBEX-M(6/6)-GND

IBEX-M(6/6)-GND

IBEX-M(6/6)-GND

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

of

16 55Monday, November 09, 2009

of

16 55Monday, November 09, 2009

of

16 55Monday, November 09, 2009

1.0

1.0

1.0

5

+VREF_

DQ_DIMMA

+VREF_

DQ_DIMMA

2

2

0

0

.2U_0603_6.3V4Z

.2U_0603_6.3V4Z

.1U_0402_10V6K

.1U_0402_10V6K

C1058

C1058

C1057

C1057

1

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA<8>

DDR_A_BS2<8>

M_CLK_DDR0<8>
M_CLK_DDR#0<8>

DDR_A_BS0<8>

DDR_A_WE#<8>
DDR_A_CAS#<8>

DDR_CS1_DIMMA#<8>

+3VS

1

2

5

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A

DDR_A_D10

DDR_A_D11

DDR_A_D16

DDR_A_D17

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D18

DDR_A_D19

DDR_A_D24

DDR_A_D25

DDR_A_DM3

DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

DDR_A_MA3

DDR_A_MA1

M_CLK_DDR0

M_CLK_DDR#0

DDR_A_MA10

DDR_A_BS0

DDR_A_WE#

DDR_A_CAS# M_ODT0

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32

DDR_A_D33

DDR_A_DQS#4

DDR_A_DQS4

DDR_A_D34

DDR_A_D35

DDR_A_D40

DDR_A_D41

DDR_A_DM5

DDR_A_D42

DDR_A_D43

DDR_A_D48

DDR_A_D49

DDR_A_DQS#6

DDR_A_DQS6

DDR_A_D50

DDR_A_D51

DDR_A_D56

DDR_A_D57

DDR_A_DM7

DDR_A_D58

DDR_A_D59

1 2

10K_0402_5%

10K_0402_5%

1

C220

C220

C219

C219

2

2U_0402_6.3V6M

2U_0402_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.

2.

+1.5V +1.5V

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDIMM

JDIMM

1

VREF_

3

R208

R208

10K_0402_5%

10K_0402_5%

VSS

5

DQ0

7

DQ1

9

VSS

1

1

DM0

1

3

VSS

5

1

DQ2

1

7

DQ3

9

1

VSS

2

1

DQ8

2

3

DQ9

5

2

VSS

7

2

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3

6

5

VSS23

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

3

10

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

17

1

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

1

13

DQ33

133

VSS29

35

1

DQS#4

137

DQS4

39

1

VSS32

141

DQ34

143

DQ35

45

1

VSS34

147

DQ40

9

14

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

9

15

DQ43

161

VSS39

3

16

DQ48

165

DQ49

67

1

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

7

17

DQ51

179

VSS46

1

18

DQ56

183

DQ57

85

1

VSS48

187

DM7

189

VSS49

1

19

DQ58

193

DQ59

95

1

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

R207

R207

_D0
_D1

_DM0

_D2
_D3

_D8
_D9

_DQS#1
_DQS1

12

1 CONN@

1 CONN@

DQ

2

4

5

7

9

VREF_CA

EVENT#

+0.75VS

VSS

VSS

DQS#0

DQS

VSS

VSS
DQ1
DQ1

VSS10

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

VSS24

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44

DQ45
VSS35
DQS#5

DQS5

VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47
DQS#7

DQS7

VSS50

DQ62

DQ63
VSS52

VTT2

1
DQ4
DQ5

3

0

6
DQ6
DQ7

8

2

3

DM1

DM2

A15
A14

A11

A7

A6
A4

A2
A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

2
4
6
8
1
1
1
1
1
2
2
2
2
2
30
32
34
36
38
40
42
44
46
48
50
52
5
56
58
60
62
64
6
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
1
102
10
106
108
110
112
114
116
1
120
122
124
126
128
130
13
134
136
138
14
142
144
14
148
1
152
15
156
158
16
162
16
166
1
170
172
174
176
1
180
18
184
1
188
190
19
194
1
198
200
202
204

206

0
2
4
6
8
0
2
4
6
8

4

6

00

4

18

2

0

6

50

4

0

4

68

78

2

86

2

96

4

DDR_A

_D4

DDR_A

_D5

DDR_A

_DQS#0

DDR_A

_DQS0

DDR_A

_D6

DDR_A

_D7

DDR_A

_D12
_D13

DDR_A

DDR_A

_DM1

ST#

DRAMR

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

+0.75VS

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

4

1

C1393

C1393

2

A

47P_0402_50V8J

47P_0402_50V8J

dd for RF

C1394

C1394

PM_EXTTS#1_R <6,18>

1

1

1

C1395

C1395

C1396

C1396

2

2

2

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

DRAMRST# <6,18>

DDR_CKE1_DIMMA <8>

M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>

DDR_A_BS1 <8>
DDR_A_RAS# <8>

DDR_CS0_DIMMA# <8>
M_ODT0 <8>

M_ODT1 <8>

SMB_DATA_S3 <12,18,19,30>
SMB_CLK_S3 <12,18,19,30>

+VREF_CA +V_DDR_CPU_REF

1

1

C214

C214

C213

C213

2

2

1U_0402_16V4Z

1U_0402_16V4Z

2U_0402_6.3V6M

2U_0402_6.3V6M

0.

0.

2.

2.

_D[0..63]<8>

DDR_A

DDR_A

_DM[0..7]<8>

DDR_A

_DQS[0..7]<8>

DDR_A

_DQS#[0..7]<8>

DDR_A

_MA[0..15]<8>

1 2

R877 0_0402_5%R877 0_0402_5%

3

12

C44

C44

@

@

Layout Note:
Place near JDIMM1

1

12

C45

C45

@

@

47P_0402_50V8J

47P_0402_50V8J

2

47P_0402_50V8J

47P_0402_50V8J

+1.5V

2009. 08.17 no stuff C204

1

1

C204

C204

C203

C203

C201

C201

U_0603_6.3V6M

U_0603_6.3V6M
10

10

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

2

2

@

@

U_0603_6.3V6M

U_0603_6.3V6M
10

10

10U_0603_6.3V6M

10U_0603_6.3V6M

+0.75VS

1

2

1

1

C205

C205

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C215

C215

C216

C216

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VREF_

C206

C206

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

DQ_DIMMA

10U_0603_6.3V6M

10U_0603_6.3V6M

C217

C217

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C207

C207

1

2

2

R88

R88

4

4

8 0

8 0

R89

R89

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C218

C218

2

_0402_6.3V6K

_0402_6.3V6K
1U

1U

1 2

1 2

1

C208

C208

2

U_0603_6.3V6M

U_0603_6.3V6M
10

10

C202

C202

U_0805_6.3V6M

U_0805_6.3V6M
10

10

DDR3 SO-DIMM A

REVERSE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1

R20

R20

K

K

_0402_1%

_0402_1%

1

1

+1.5V

12

5

5

+V_DD

R_CPU_REF

12

R20

R20

6

6

K

K

_0402_1%

_0402_1%

1

1

R_CPU_REF

+V_DD

+V_DD

_

_

0402_5%

0402_5%

0

0

0402_5%@

0402_5%@

_

_

1

1

C209

C209

C210

C210

2

2

1U_0402_16V4Z

1U_0402_16V4Z

1U_0402_16V4Z

1U_0402_16V4Z

0.

0.

0.

0.

R_CPU_REF0

1

1

+

+

C200

C200

C212

C212

C211

C211

2009.08.17 change the
C200 to ESR 12m ohm

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
330U_D2_2VY_R9M

330U_D2_2VY_R9M

https://t.me/schematicslaptop
https://t.me/biosarchive

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

1.0

1.0

1.0

of

17 55Monday, November 09, 2009

of

17 55Monday, November 09, 2009

of

17 55Monday, November 09, 2009

5

+1.5V +1.5V

3A@1.5V

3A@1.5V

R211

R211

3A@1.5V3A@1.5V

JDIMM2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

CONN@

CONN@

+0.75VS

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

2
4

DQ4

6

DQ5

8
10
12
14
16

DQ6

18

DQ7

20
22
24
26
28

DM1

30
32
34
36
38
40
42
44
46

DM2

48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102

CK1

104
106
108

BA1

110
112
114

S0#

116
118
120
122

NC2

124
126
128
130
132
134
136

DM4

138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170

DM6

172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SDA

202

SCL

204

206

G2

+VREF_DQ_DIMMB

1

2

D D

C C

B B

A A

+VREF_DQ_DIMMB

1

C221

C221

2

C1059

C1059

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

DDR_CKE2_DIMMB<8>

DDR_B_BS2<8>

M_CLK_DDR2<8>
M_CLK_DDR#2<8>

DDR_B_BS0<8>

DDR_B_WE#<8>
DDR_B_CAS#<8>

DDR_CS3_DIMMB#<8>

+3VS

1

C241

C241

2

DDR_B_D0
DDR_B_D1

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS# M_ODT2

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

R210

R210

1 2

10K_0402_5%

10K_0402_5%

1 2

1

10K_0402_5%

10K_0402_5%

C242

C242

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

5

4

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#

M_ODT3

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

4

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DRAMRST# <6,17>

DDR_CKE3_DIMMB <8>

M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>

DDR_B_BS1 <8>
DDR_B_RAS# <8>

DDR_CS2_DIMMB# <8>
M_ODT2 <8>

M_ODT3 <8>

PM_EXTTS#1_R <6,17>

SMB_DATA_S3 <12,17,19,30>
SMB_CLK_S3 <12,17,19,30>
+0.75VS

3

DDR_B_DQS#[0..7]<8>

DDR_B_D[0..63]<8>

DDR_B_DM[0..7]<8>

DDR_B_DQS[0..7]<8>

DDR_B_MA[0..15]<8>

R885 0_0402_5%R885 0_0402_5%

1 2

R899 0_0402_5%@ R899 0_0402_5%@

1 2

+V_DDR_CPU_REF+VREF_DQ_DIMMB

2

+V_DDR_CPU_REF1

1

https://t.me/schematicslaptop
https://t.me/biosarchive

Layout Note:
Place near JDIMM2

2009. 08.17 no stuff C228,C229

+1.5V

1

12

C46

C46

@

@

+VREF_CA

1

1

C235

C235

C1060

C1060

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

3

1

12

C47

C47

@

@

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C224

C224

C223

C223

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

Layout Note:
Place near JDIMM2.203 & JDIMM2.204

+0.75VS

1

2

1

1

1

C226

C226

C225

C225

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C237

C237

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C239

C239

C238

C238

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C227

C227

C228

C228

2

2

@

@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C240

C240

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C230

C230

C229

C229

2

2

@

@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

DDR3 SO-DIMM B
REVERSE

Compal Secret Data

Compal Secret Data

2008/03/13 2009/05/11

2008/03/13 2009/05/11

2008/03/13 2009/05/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1

1

C231

C231

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C234

C234

C233

C233

C232

C232

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

18 55Monday, November 09, 2009

18 55Monday, November 09, 2009

18 55Monday, November 09, 2009

1.0

1.0

1.0

of

of

of

5

UF_DOT96

CLK_B

27M

DMI

CLK_BUF_CKSSCD#<12>

CLK_B

CLK_BUF_CKSSCD<12>

UF_DOT96<12>
UF_DOT96#<12>

27M_C

LK<26>

27M_S

SC<26>

CLK_DMI<12>

CLK_DMI#<12>

OK

D

D D

OT96

OK

OK

OK

CKSSCD

CLK_B
CLK_B

UF_DOT96#

27M_C

LK

27M_S

SC

CLK_DMI
CLK_DMI#

CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#

R21

R21
R21

R21

R21

R21
R21

R21

9/11

R221 33_0402_5%R221 33_0402_5%
R223 33_0402_5%R223 33_0402_5%

R219 33_0402_5%R219 33_0402_5%
R220 33_0402_5%R220 33_0402_5%

Number of Clock Outputs

Output

133MHz

SRC(100MHz_SS)

SRC/SATA(100MHz)

REF(14.318MHz)

DOT_CLK(96MHz) 1

C C

27MHz

27MHz_SS

PIN 30

0(default)

1

Number

133MHz

100MHz

2

2009.10.21 change the C259, C260 to 22P

1

1

1

22P_0402_50V8J

1

1

22P_0402_50V8J

CPU_1CPU_0

133MHz

100MHz

CPU_SEL During CK_PEWGD Latch Pin1

+3VS

@

@

R244 10K_0402 _5%

R244 10K_0402 _5%

1 2

R247 10K_0402 _5%

R247 10K_0402 _5%

1 2

B B

REF_0/CPU_SEL

4

3

3

_0402_5%

12
12

12
12

3

3

_0402_5%@

_0402_5%@

3

3

_0402_5%@

_0402_5%@

_0402_5%
_0402_5%

_0402_5%

3

3

3 3

3 3
4 3

4 3

6 3

6 3
7 3

7 3

non-stuff R216

1 2
1 2

1 2
1 2

Y3

Y3

1 2

2

C259

C259

1

CPU_STOP#

R234 10K_0402 _5%

R234 10K_0402 _5%

+1.5V

+3VS_

250mA

_BUF_DOT96

L_CLK
L_CLK

_BUF_DOT96#

L_27M

_CLK

L_27M

_SSC

L_CLK_DMI
L_CLK_DMI#

L_CLK_BUF_CKSSCD
L_CLK_BUF_CKSSCD#

CPU_STOP#

CLK_XTAL_OUT
CLK_XTAL_IN

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

2

C260

C260
22P_0402_50V8J

22P_0402_50V8J

Vendor suggests 22pF

1

1 2

S_CK505

CK505

+3VS_CK505

3

VS_CK505

+1.05

8

0mA

U3

U3

1

VDD_D

OT

2

VSS_D

OT

3

DOT_9

6

4

96MHz

6#

DOT_9

5

7

VDD_2

6

27MHZ

7

_SS

27MHZ

8

VSS_2

7

9

VSS_SATA

10

SRC_1/SATA

11
12
13
14
15
16

ICS9LRS3197AKLFT MLF 32P

ICS9LRS3197AKLFT MLF 32P

SLG8SP585 pin8 is GND (for DELL HP)
SLG8SP587 pin8 is 48MHz (For ABO or 030)

Realtek SA00002Y010

IDT SA00002Y500



*

IDT SA00002WX00



1

SRC_1#/SATA#
VSS_SRC
SRC_2
SRC_2#
VDD_SRC_IO
CPU_STOP#

00MHz

100MHz

 




CLK_EN#<49>

TGND

33

CLK_EN#

REF_0

CKPWR

133MHz

SCL
SDA

/CPU_SEL

VDD_R

XTAL_

XTAL_

OUT

VSS_R

GD/PD#

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_CPU_IO

VDD_SRC

+3VS_CK505

2

G

G

3

2

3

1
30
29

EF

28

IN

27
26

EF

25

24
23
22
21
20
19
18
17

12

R607

R607
10K_0402_5%

10K_0402_5%

CKPWRGD

13

D

D

Q30

Q30
2N7002_SOT23-3

2N7002_SOT23-3

S

S

+1.05

VS_CK505

+3VS_

CK505

+1.5V

S_CK505

2

SMB_C

LK_S3

SMB_D

ATA_S3

/CPU_SEL

REF_0

CLK_X

TAL_IN

CLK_X

TAL_OUT

R_CKP

WRGD

L_CLK_BUF_BCLK
L_CLK_BUF_BCLK#

+VCCP

+3VS

R218

R218

1 2

0_0805_5%

0_0805_5%

SMB_C

SMB_D

R22

R22

R212

R212

1 2

0_0805_5%

0_0805_5%

+3VS

+1.5VS

CLK_1

LK_S3 <12,17,18,30>

ATA_S3 <12,17,18,30>

2 3

2 3

R22

R22

6 0

6 0

R23

R23

7 0

7 0

R224 33_0402_5%R224 33_0402_5%
R225 33_0402_5%R225 33_0402_5%

+3VS_CK505

1 2
1 2

1 2
1 2

1

C245

C245

2

12

10U_0805_10V4Z

10U_0805_10V4Z

3

3

_0402_5%

_0402_5%

_

_

0402_5%@

0402_5%@

_

_

0402_5%

0402_5%

1

2

C246

C246

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Place close to U3

+1.05VS_CK505

1

1

C252

C252

C253

10U_0805_10V4Z

10U_0805_10V4Z

R228

R228
0_0603_5%

0_0603_5%

1 2

1 2

R229

@R229

@

0_0603_5%

0_0603_5%

C253

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS_CK505

1

2

2

1

4M_PCH

C80

C80

8 1

8 1

1 2

4M_PCH

CLK_1

VGATE

GD

CLK_BUF_BCLK <12>
CLK_BUF_BCLK# <12>

C247

C247

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Routing the trace at least 10mil

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C249

C249

C250

2

C250

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C248

C248

1

2

CKPWR

1

2

C254

C254

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0

0

P_0402_50V8J@

P_0402_50V8J@

CLK_1

<13,49>

4M_PCH <12>

BCLK

OK

14M

OK

Near pin1 Nea r pin17 Near pin24

SI Reserve low power clock generator solution



A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

of

19 55Monday, November 09, 2009

of

19 55Monday, November 09, 2009

of

19 55Monday, November 09, 2009

1.0

1.0

1.0

A

B

C

D

E

https://t.me/schematicslaptop
https://t.me/biosarchive

BLUE
GREEN
RED

1

2

12

3

DAN217T146_SC59-3D6DAN217T146_SC59-3

+3VS

12

R273

2.2K_0402_5%

2.2K_0402_5%

+3VS_VGA

D7

1

2

3

SG@R273

SG@

I_CRT_DDC_DATA

I_CRT_DDC_CLK

DGPU_EDIDSEL#

R272

SG@ R272

SG@

2.2K_0402_5%

2.2K_0402_5%

4

D6

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C266

C266

16
17

12

R271

R271

+CRTVDD+RCRT_VCC+5VS

1

2

2

SG@

SG@

6 1

Q2A

Q2A

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

SG@

SG@

3

Q2B

Q2B

5

1 1

F1

D9

D9

D_HSYNC

C269

2 1

RB491D_SC59-3

RB491D_SC59-3

1

C270

@C270

@

5P_0402_50V8C

5P_0402_50V8C

2

CRT Connector

RED<36>

GREEN<36>

D_HSYNC<36>

BLUE<36>

+5VS +5VS

C267

C267

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

1

5

U5

U5
SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

2 2

CRT_HSYNC<22>

CRT_VSYNC<22>

CRT_HSYNC

CRT_VSYNC

P

A2Y

G

3

OE#

4

5

A2Y

3

C268

C268

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

R815 10K_0402 _5% R815 10K_0402 _5%

1

P

4

OE#

G

U6

U6
SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

12

HSYNC_G_A

VSYNC_G_A D_VSYNC

R269 0_0402_5%R269 0_ 0402_5%

R274 0_0402_5%R274 0_ 0402_5%

D_VSYNC<36>

1 2

1 2

RED

GREEN

BLUE

1

@C269

@

5P_0402_50V8C

5P_0402_50V8C

2

F1

1.1A_6VDC_FUSE

1.1A_6VDC_FUSE

4.7K_0402_5%

4.7K_0402_5%

D_DDCDATA

D_DDCCLK

21

W=40mils

JCRT1

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070546FR015S263ZR

SUYIN_070546FR015S263ZR

CONN@

CONN@

+CRTVDD +CRTVDD

12

R270

R270

4.7K_0402_5%

4.7K_0402_5%

D_DDCDATA <36>
D_DDCCLK <36>

D8

DAN217T146_SC59-3D7DAN217T146_SC59-3

Place close to
JCR

1

2

3

DAN217T146_SC59-3D8DAN217T146_SC59-3

1

T

+3VS

I_CRT_DDC_DATA <13>

IGPU

I_CRT_DDC_CLK <13>

DGPU_EDIDSEL

D_DDCDATA

3 3

D_DDCCLK

R900 0_0402_5%R900 0_ 0402_5%

1 2

6 1

Q11A

Q11A

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

3

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q11B

Q11B

5

R878

R878

4.7K_0402_5%

4.7K_0402_5%

4

12

12

R879

R879

4.7K_0402_5%

4.7K_0402_5%

D_CRT_DDC_DATA <26>

DGPU

D_CRT_DDC_CLK <26>

CRT Termination/EMI Filter

M_RED<22>

M_GREEN<22>

M_BLUE<22>

4 4

A

12

12

R275

R275

150_0402_1%

150_0402_1%

M_RED

M_GRN

12

R277

R277

R276

R276

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

1

1

C272

C272

C271

C271

@

@

@

@

2

2

22P_0402_50V8J

22P_0402_50V8J

L8 HLC0603CSCCR11JT_0603L8 HLC0603CSCCR11JT_0603

1 2

L9 HLC0603CSCCR11JT_0603L9 HLC0603CSCCR11JT_0603

1 2

L10 HLC0603CSC CR11JT_0603L10 HLC0603CSC CR11JT_0603

1 2

1

C273

C273

@

@

2

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

B

1

1

C274

C274

2

2

10P_0402_50V8J

10P_0402_50V8J

RED

GREEN

BLUEM_BLU

1

C275

C275

C276

C276

2

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

DGPU_EDIDSEL#<14,22>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DGPU_EDIDSEL#

+3VS

2

G

G

D

R902

R902
10K_0402_5%

10K_0402_5%

1 2

DGPU_EDIDSEL

13

D

D

SG@

SG@

Q12

Q12
2N7002_SOT23-3

2N7002_SOT23-3

S

S

DGPU_EDIDSEL <22,40>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CRT Connector

CRT Connector

CRT Connector

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

E

of

20 55Monday, November 09, 2009

of

20 55Monday, November 09, 2009

of

20 55Monday, November 09, 2009

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

Add f

LVDS

or RF

INVPW

1

1

C1410

C1410

2

2

7P_0402_50V8J

7P_0402_50V8J
4

4

USB20_P4
USB20_N4

Add for RF

4

3

+LCDV

C278

C278

PJLC

PJLC

R_B+

DD

1

12

C279

C279

C1411

C1411

0P_0402_50V7K

0P_0402_50V7K
68

68

C1412

C1412

@

@

D59

D59

IO1

VIN

GND

IO2

R05

R05

2

47P_0402_50V8J

47P_0402_50V8J

680P_0402_50V7K

680P_0402_50V7K

1

1

C1413

C1413

2

2

@

@

+3VS

2P_0402_50V8J

2P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

2

2

USB20_P4

2

1

JLVDS1

JLVDS1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39
GND41GND

ACES_88242-4001

ACES_88242-4001

CONN@

CONN@

+3V

S

D D

12

C277

C277

0P_0402_50V7K

0P_0402_50V7K
68

68

USB20_P4<14 >
USB20_N4<14>

C C

+5VALW

USB20_N4

CO

Reser

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

NN & US

ACLK-

LVDS_

ve for RF

LVDS_A2­LVDS_A2+
LVDS_A1­LVDS_A1+
LVDS_A0­LVDS_A0+
LVDS_ACLK­LVDS_ACLK+

DMIC_DAT
DMIC_CLK
+5V_LOGO
LVDS_INV_PWM
BKOFF#
DAC_BRIG

LVDS_EDID_CLK
LVDS_EDID_DATA

6

6

80P_0402_50V7K

80P_0402_50V7K

LVDS_EDID_CLK
LVDS_EDID_DATA

B Camera + Dig Mic

ACLK+

LVDS_

C1408

C1408

@

@

R284

R284

2.

2.

1

2

5P_0402_50V

5P_0402_50V

R281

R281
100_0402_1%

100_0402_1%

+USB_CAM

C1369

C1369

2K_0402_5%

2K_0402_5%

C1409

C1409

@

@

1 2

1

1

C286

C286
68

68

0P_0402_50V7K

0P_0402_50V7K

2

2

EMI request.

+3VS

R285

R285

2.

2.

2K_0402_5%

2K_0402_5%

1 2

1 2

1

2

5P_0402_50V

5P_0402_50V

LVDS_A2- <22>
LVDS_A2+ <22>
LVDS_A1- <22>
LVDS_A1+ <22>
LVDS_A0- <22>
LVDS_A0+ <22>
LVDS_ACLK- <22>
LVDS_ACLK+ <22>

DMIC_DAT <34>
DMIC_CLK <34>

LVDS_INV_PWM <22>
BKOFF# <39>
DAC_BRIG <39>

LVDS_EDID_CLK <22>

LVDS_EDID_DATA <22>

Must close JLVDS1pin 24 26

+5VS

BKOFF#

DMIC_CLK

DMIC_DAT

C287

@ C287

@

220P_0402_25V8J

220P_0402_25V8J

1 2

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LVDS_INV_PWM

R1196

@R1196

@

2.2_0402_5%

2.2_0402_5%

C1414

@C1414

@

12P_0402_50V J

12P_0402_50V J

R282

R282

@

@

10

10

K_0402_5%

K_0402_5%



C288

@C288

@

220P_0402_25V8J

220P_0402_25V8J

+LCDV

1

C281

C281

2

Add for RF

12

1

2

DD

1

2

C282

C282

0.1U_0402_16V4Z

0.1U_0402_16V4Z

IGPU

+LCDV

12

R278

R278

22_0805_5%

22_0805_5%

61

Limited Current < 1A

I_ENAVDD<13>

DGPU

D_ENAVDD<24>

DD

2

2N7

2N7

002DW-7-F_SOT363-6

002DW-7-F_SOT363-6

Q3A

Q3A

I_ENAVDD

R283

SG@ R283

SG@

100K_0402_5%

100K_0402_5%

1M_0402_5%

1M_0402_5%

12

D_ENAVDD

R880

R880

2.2K_0402_5%

2.2K_0402_5%

R279

R279

2

G

G

+5VAL

1 2

W

12

13

D

D

SG@

SG@

Q33

Q33
2N7002_SOT23-3

2N7002_SOT23-3

S

S

5

R280

R280

10

10

0K_0402_5%

0K_0402_5%

3

4

INVPWR_B+B+

C280

C280

4.7U_0805_10V4Z

4.7U_0805_10V4Z

12

Q3B

Q3B

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

+LCDV

DD

Q13

Q13

SI2

SI2

301BDS-T1-E3_SOT23-3

301BDS-T1-E3_SOT23-3

1 3

D

1

2

D

C284

C284

0.047U_0402_16V7K

0.047U_0402_16V7K

01/03 Change to 0.047u to meet T1 timing

+3V

S

S

G

G

2

1

2

S

C283

C283

4.7U_0805_10V4Z

4.7U_0805_10V4Z

L12

L12

B B

USB Camera

C290

C290

10U_0805_6.3V6M

10U_0805_6.3V6M

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

+USB_CAM is +3.9VS, R286:215K; R287:100Kohm

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1 2

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

+5VS

R288

R288

0_0402_5%

0_0402_5%

1

2

2

1

C1415

C1415

2

1 2

12

R286

R286
215K_0402_1%

215K_0402_1%

12

R287

R287
100K_0402_1%

100K_0402_1%

+USB_CAM

1

2

C289

C289

Add for RF

1

IN

2

GND

3

SHDN

G916T1UF SOT23 5P

G916T1UF SOT23 5P

47P_0402_50V8J

47P_0402_50V8J

U7

U7

OUT

5

4

BYP

+USB_CAM=1.25(1+R1091/R1093)

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LCD CONN.

LCD CONN.

LCD CONN.

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

21 55Monday, November 09, 2009

21 55Monday, November 09, 2009

21 55Monday, November 09, 2009

1

1

C981

C981

@

@

2

47P_0402_50V8J

47P_0402_50V8J

10U_0805_6.3V6M

10U_0805_6.3V6M

1.0

1.0

1.0

of

of

of

5

LVDS Switch

U35

DGPU

D_LVDS_A0+<24>

D_LVDS_A0-<24>

D_LVDS_A1+<24>

D_LVDS_A1-<24>

D_LVDS_A2+<24>

D_LVDS_A2-<24>

D_LVDS_ACLK+<24>

D D

D_LVDS_ACLK-<24>

IGPU

I_LVDS_A0+<13>

I_LVDS_A0-<13>

I_LVDS_A1+<13>

I_LVDS_A1-<13>

I_LVDS_A2+<13>

I_LVDS_A2-<13>

I_LVDS_ACLK+<13>

I_LVDS_ACLK-<13>

C C

D_LVDS_A0+
D_LVDS_A0­D_LVDS_A1+
D_LVDS_A1­D_LVDS_A2+
D_LVDS_A2­D_LVDS_ACLK+
D_LVDS_ACLK-

I_LVDS_A0+
I_LVDS_A0­I_LVDS_A1+
I_LVDS_A1­I_LVDS_A2+
I_LVDS_A2­I_LVDS_ACLK+
I_LVDS_ACLK-

U35

48

0B1

47

1B1

43

2B1

42

3B1

37

4B1

36

5B1

32

6B1

31

7B1

22

8B1

23

9B1

46

0B2

45

1B2

41

2B2

40

3B2

35

4B2

34

5B2

30

6B2

29

7B2

25

8B2

26

9B2

52

NC

5

NC

54

NC

51

NC

57

Thermal_GND

TS3DV520ERHUR_QFN56_11X5~D

TS3DV520ERHUR_QFN56_11X5~D

SG@

SG@

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VCC
VCC
VCC
VCC
VCC
VCC
VCC

SEL

+3VS

4
10
18
27
38
50
56

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

19

A8

20

A9

17

1
6
9
13
16
21
24
28
33
39
44
49
53
55

LVDS_A0+
LVDS_A0­LVDS_A1+
LVDS_A1­LVDS_A2+
LVDS_A2­LVDS_ACLK+
LVDS_ACLK-

1 2

0_0402_5%

0_0402_5%

R790

R790

SG@

SG@

1

2

C1004

SG@ C1004

SG@

DGPU_SELECT#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LVDS_A0+ <21>
LVDS_A0- <21>
LVDS_A1+ <21>
LVDS_A1- <21>
LVDS_A2+ <21>
LVDS_A2- <21>
LVDS_ACLK+ <21>
LVDS_ACLK- <21>

DIS ONLY (LVDS)

CRT Switch

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

0.1U_0402_16V4Z

1

C1011

C1011

2

SG@

SG@

SG@

SG@

1

C1012

C1012

2

U43

U43

1

VDD

4

VDD

9

VDD

19

VDD

24

A0

22

B0

18

C0

17

D0

14

E0

23

A1

21

B1

16

C1

15

D1

13

E1

PI3V512QE_QSOP24

PI3V512QE_QSOP24

SG@

SG@

B B

D_RED<26>
D_GREEN<26>

DGPU

IGPU

A A

D_BLUE<26>
D_CRT_HSYNC<26>
D_CRT_VSYNC<26>

I_RED<13>
I_GREEN<13>
I_BLUE<13>
I_CRT_HSYNC<13>
I_CRT_VSYNC<13>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1013

C1013

2

GND
GND
GND
GND

SEL

SG@

SG@

SG@

SG@

1

C1014

C1014

2

R1237 0_0402_5%SG@ R1237 0_0402_5%SG@

1 2

M_RED
M_GREEN
M_BLUE

CRT_HSYNC
CRT_VSYNC

DGPU_SELECT#

M_RED <20>
M_GREEN <20>
M_BLUE <20>

CRT_HSYNC <20>
CRT_VSYNC <20>

12

2

YA

5

YB

6

YC

8

YD

11

YE

3
7
10
20

C1005

4.7U_0805_10V4Z

4.7U_0805_10V4Z

SG@ C1005

SG@

D_LVDS_A0­D_LVDS_A0+

D_LVDS_A1­D_LVDS_A1+

D_LVDS_A2+
D_LVDS_A2-

D_LVDS_ACLK­D_LVDS_ACLK+

IGPU

DGPU

4

LOW: B1 to A
High: B2 to A

DGPU_SELECT# <14>

RP36

RP36

RP37

RP37

RP38

RP38

RP39

RP39

DPST_PWM<13>

D_INV_PWM<24>

D_RED
D_GREEN
D_BLUE
D_CRT_HSYNC
D_CRT_VSYNC

3

LVDS I2C switch

2

D_EDID_DATA<26> LVDS_EDID_DATA <21>

DGPU

D_EDID_CLK<26>

R1261

SG@ R1261

SG@

4.7K_0402_5%

4.7K_0402_5%

I_EDID_DATA<13>

IGPU

I_EDID_CLK<13>

9/20 Follow Intel check list to add PU resistors for EDID signals

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

0_0404_4P2R_5%DIS@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

LVDS_A0-

LVDS_A0+

LVDS_A1-

LVDS_A1+

LVDS_A2+

LVDS_A2-

LVDS_ACLK­LVDS_ACLK+

@

@

Q36A

Q36A

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

14
23

14
23

23
14

14
23

R1262

@R1262

@

4.7K_0402_5%

4.7K_0402_5%

2

+3VS

1 2

@

@

R891

R891

4.7K_0402_5%

4.7K_0402_5%

61

@

@

Q36B

Q36B

5

1 2

SG@ Q34A

SG@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

5

4

Q34B

SG@ Q34B

SG@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

5

SG@

SG@

4

Q21B

Q21B

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

D_EDID_CLK

D_EDID_DATA

+3VS

1 2

1 2

13

D

D

2

G

G

S

S

3

4

61

Q34A

3

2

SG@

SG@

61

Q21A

Q21A

3

DIS@

DIS@

R12280_0402_5%

R12280_0402_5%

1 2

DIS@

DIS@

R12290_0402_5%

R12290_0402_5%

1 2

LVDS PWM switch

@

@

Q114

Q114
2N7002_SOT23-3

2N7002_SOT23-3

R890 0_0402_5%@ R890 0_0402_5%@

R892 0_0402_5%DIS@ R892 0_0402_5%DIS@

R1227

R1227

1 2

12

@

@

R889

R889

4.7K_0402_5%

4.7K_0402_5%

DIS ONLY (CRT)

R893 0_0402_5%DIS@R893 0_0402_5%DIS@
R894 0_0402_5%DIS@R894 0_0402_5%DIS@
R895 0_0402_5%DIS@R895 0_0402_5%DIS@
R896 0_0402_5%DIS@R896 0_0402_5%DIS@
R897 0_0402_5%DIS@R897 0_0402_5%DIS@

12
12
12
12
12

M_RED
M_GREEN
M_BLUE
CRT_HSYNC
CRT_VSYNC

DGPU_SELECT#

LVDS_EDID_CLK

LVDS_EDID_DATA

12

0_0402_5%SG@

0_0402_5%SG@

R882

SG@ R882

SG@

10K_0402_5%

10K_0402_5%

2

G

G

2

DGPU_EDIDSEL <20,40>

LVDS_EDID_CLK <21>

DGPU_EDIDSEL# <14,20>

IGPU

DGPU

INV_PWM <39>

LVDS_INV_PWM <21>

D_INV_PWM

DPST_PWM

+3VS

DGPU_SELECT

1 2

13

D

D

SG@

SG@

Q37

Q37
2N7002_SOT23-3

2N7002_SOT23-3

S

S

9/11 Q37 change to single package

Backlight Enable

DGPU_SELECT#

IGPU_BKLT_EN<13>

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

DGPU_SELECT

DGPU_BKL_EN<26>

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

R886

R886

10K_0402_5%

10K_0402_5%

1 2

DGPU_BKL_EN

IGPU_BKLT_EN

1

https://t.me/schematicslaptop
https://t.me/biosarchive

+3VS

SG@

SG@

R883

R883

2

6 1

Q111A

Q111A

SG@

SG@

6 1

Q35A

Q35A

SG@

SG@

2

5

4

Q111B

Q111B

SG@

SG@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

5

4

Q35B

Q35B

SG@

SG@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

DIS@

DIS@

1 2

R799 0_0402_5%

R799 0_0402_5%

@

@

1 2

R1226 0_0402_5%

R1226 0_0402_5%

4.7K_0402_5%

4.7K_0402_5%

3

3

ENBKL

1 2

ENBKL <39>

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/09/29 2007/09/29

2007/09/29 2007/09/29

2007/09/29 2007/09/29

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LVDS Switch

LVDS Switch

LVDS Switch

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

of

22 55Monday, November 09, 2009

of

22 55Monday, November 09, 2009

of

22 55Monday, November 09, 2009

1.0

1.0

1.0

5

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

R859 0_0402_5%@R859 0_0402_5%@

1 2

L28

1

4

R866

@R866

@

R868 0_0402_5%@R868 0_0402_5%@

1

4

R869

@R869

@

R870 0_0402_5%@R870 0_0402_5%@

1

4

R871

@R871

@

R872 0_0402_5%@R872 0_0402_5%@

1

4

R873

@R873

@

12

12

R736

R736

499_0402_1%

499_0402_1%

499_0402_1%

499_0402_1%

+5VS

2

L28

1

4

L29

L29

1

4

L30

L30

1

4

L31

L31

1

4

R737

R737

G

G

1 2

1 2

1 2

1 2

1 2

1 2

1 2

12

R738

R738

499_0402_1%

499_0402_1%

13

D

D

DIS@

DIS@

Q108

Q108
2N

2N

S

S

12

R734

R734

499_0402_1%

499_0402_1%

499_0402_1%

499_0402_1%

HDMICLK-

HDMICLK+

HDMI_TX_0-

HDMI_TX_0+

HDMI_TX_1-

HDMI_TX_1+

HDMI_TX_2-

HDMI_TX_2+

12

R735

R735

C375 0.1U_0402_16V4ZC 375 0.1U_0402_16V4Z

HDMI_C_CLK-<26>

HDMI_C_CLK+<26>

C C

HDMI_C_TX0-< 26>

HDMI_C_TX0+<26>

HDMI_C_TX1-< 26>

HDMI_C_TX1+<26>

HDMI_C_TX2-<26>

B B

A A

HDMI_C_TX2+<26>

HDMICLK­HDMICLK+
HDMI_TX_0­HDMI_TX_0+
HDMI_TX_1­HDMI_TX_1+
HDMI_TX_2­HDMI_TX_2+

+5VS

12

C376 0.1U_0402_16V4ZC 376 0.1U_0402_16V4Z

12

C377 0.1U_0402_16V4ZC 377 0.1U_0402_16V4Z

12

C378 0.1U_0402_16V4ZC 378 0.1U_0402_16V4Z

12

C379 0.1U_0402_16V4ZC 379 0.1U_0402_16V4Z

12

C380 0.1U_0402_16V4ZC 380 0.1U_0402_16V4Z

12

C382 0.1U_0402_16V4ZC 382 0.1U_0402_16V4Z

12

C381 0.1U_0402_16V4ZC 381 0.1U_0402_16V4Z

12

R733

R733

499_0402_1%

499_0402_1%

61

SG@

SG@

Q19A

Q19A

2

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

5

2

2

WCM

WCM

-2012-900T_0805

-2012-900T_0805

3

3

0_0402_5%

0_0402_5%

2

2

WCM

WCM

-2012-900T_0805

-2012-900T_0805

3

3

0_0402_5%

0_0402_5%

2

2

WCM-2012-900T_0805

WCM-2012-900T_0805

3

3

0_0402_5%

0_0402_5%

2

2

WCM-2012-900T_0805

WCM-2012-900T_0805

3

3

0_0402_5%

0_0402_5%

12

12

R739

R739

499_0402_1%

499_0402_1%

7002_SOT23-3

7002_SOT23-3

4

HDMI_R_CLK-

HDMI_R_CLK+

HDMI_R_TX0-

HDMI_R_TX0+

HDMI_R_TX1-

HDMI_R_TX1+

HDMI_R_TX2-

HDMI_R_TX2+

12

R740

R740

499_0402_1%

499_0402_1%

4

C1245

C1245

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DGPU_HPD_INT#<14>

HDMI_DET<26>

3

+3VS_VGA

12

R572

R571

R571

2.

2.

2K_0402_5%

2K_0402_5%

HDMIDAT_VGA<26>

HDMICLK_VGA<26>

+5VS_HDMI

2

1

5

1

P

4

OE#

A2Y

G

U52

U52
SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

12

R924

R924

10K_0402_5%

10K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

4

Y

3

5

+3VS

5

P

B

A

G

U51

U51

3

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

12

+3VS

R1022

R1022

2.2K_0402_5%

2.2K_0402_5%

HPD

4

Q19B2N7002DW-7-F_SOT363 -6

Q19B2N7002DW-7-F_SOT363 -6

SG@

SG@

HPD

2

1

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

R1023

R1023

100K_0402_5%

100K_0402_5%

DGPU_PWR_EN <14,40,41,47,51>

Compal Secret Data

Compal Secret Data

Compal Secret Data

R572

2.2K_0402_5%

2.2K_0402_5%

1 2

R576 0_0402_5%@R576 0_0402_5%@

HDMI_HPD

2

1

1 2

Deciphered Date

Deciphered Date

Deciphered Date

5

Q5B

Q5B
2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

1 2

C1246

C1246

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3

HDMI Connector

2

R575 0_0402_5%@R575 0_0402_5%@

+3VS_VGA

Q5A

Q5A

2

2N7

2N7

1 2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

002DW-7-F_SOT363-6

002DW-7-F_SOT363-6

61

HDMIDAT

HDMICLK

+5VS_HDMI+5VS

1

21

C665

C665

1.5K_0402_5%

1.5K_0402_5%

@

@

+5VS_HDMI

2

C666

C666

@

@

18
16
15
19

12
10

22N_0402_16V7K

22N_0402_16V7K

1

1

C667

C667

2

2

N_0402_16V7K

N_0402_16V7K
22

22

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JHDMI1

JHDMI1

+5V
SDA

Reserved

SCL
HP_DET

CK­CK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZL

SUYIN_100042MR019S153ZL

CONN@

CONN@

23 55Monday, November 09, 2009

23 55Monday, November 09, 2009

23 55Monday, November 09, 2009

1

D34

RB411DT146_SOT23-3

RB411DT146_SOT23-3

HDMIDAT
HDMICLK
HDMI_HPD

Ti

tle

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

D34

R578

R578

R577

R577

1.5K_0402_5%

1.5K_0402_5%

1 2

1 2

HDMI_R_CLK­HDMI_R_CLK+
HDMI_R_TX0­HDMI_R_TX0+
HDMI_R_TX1­HDMI_R_TX1+
HDMI_R_TX2­HDMI_R_TX2+

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI LS & Conn.

HDMI LS & Conn.

HDMI LS & Conn.

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

CEC

GND
GND
GND
GND
GND
GND
GND
GND

13
14

2
5
8
11
20
21
22
23
17

1.0

1.0

1.0

of

of

of

A

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B

C

D

E

1 1

LVDS Interface

U8F

U8F

LVDS CONTROL

LVDS CONTROL

VARY_BL

2 2

LVTMDP

LVTMDP

216-0749001 A11 M93 -S3 FCBGA631

3 3

216-0749001 A11 M93 -S3 FCBGA631

PA@

PA@

DIGON

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_U3P
TXOUT_U3N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

AB11
AB12

AH20
AJ19

AL21
AK20

AH22
AJ21

AL23
AK22

AK24
AJ23

AL15
AK14

AH16
AJ15

AL17
AK16

AH18
AJ17

AL19
AK18

R928 10K_0402_5%R928 10K_0402 _5%

1 2

R929 0_0402_5%OPP@ R929 0_0402 _5%OPP@

1 2

R930 0_0402_5%R930 0_040 2_5%

1 2

D_LVDS_ACLK+ <22>
D_LVDS_ACLK- <22>

D_LVDS_A0+ <22>
D_LVDS_A0- <22>

D_LVDS_A1+ <22>
D_LVDS_A1- <22>

D_LVDS_A2+ <22>
D_LVDS_A2- <22>

D_INV_PWM <22>
D_ENAVDD <21>

10/30

PLT_RST#<14,31,32>

DGPU_HOLD_RST#<14>

R934 0_0402_5%DIS@ R934 0_0402 _5%DIS@

R935 0_0402_5%SG@ R935 0_0402_5%SG@

OPP@

OPP@

U8

U8
M93-S3-LP

M93-S3-LP

PCIE_CTX_GRX_P15<7>
PCIE_CTX_GRX_N15<7>

PCIE_CTX_GRX_P14<7>
PCIE_CTX_GRX_N14<7>

PCIE_CTX_GRX_P13<7>
PCIE_CTX_GRX_N13<7>

PCIE_CTX_GRX_P12<7>
PCIE_CTX_GRX_N12<7>

PCIE_CTX_GRX_P11<7>
PCIE_CTX_GRX_N11<7>

PCIE_CTX_GRX_P10<7>
PCIE_CTX_GRX_N10<7>

PCIE_CTX_GRX_P9<7>
PCIE_CTX_GRX_N9<7>

PCIE_CTX_GRX_P8<7>
PCIE_CTX_GRX_N8<7>

PCIE_CTX_GRX_P7<7>
PCIE_CTX_GRX_N7<7>

PCIE_CTX_GRX_P6<7>
PCIE_CTX_GRX_N6<7>

PCIE_CTX_GRX_P5<7>
PCIE_CTX_GRX_N5<7>

PCIE_CTX_GRX_P4<7>
PCIE_CTX_GRX_N4<7>

PCIE_CTX_GRX_P3<7>
PCIE_CTX_GRX_N3<7>

PCIE_CTX_GRX_P2<7>
PCIE_CTX_GRX_N2<7>

PCIE_CTX_GRX_P1<7>
PCIE_CTX_GRX_N1<7>

PCIE_CTX_GRX_P0<7>
PCIE_CTX_GRX_N0<7>

CLK_PCIE_VGA<12>

CLK_PCIE_VGA#<12>

1 2

1 2

PEG Interface

U8A

U8A

+1.1VSDGPU

C7760.1U_0402_10V6K C7760.1U_0402_10V6K

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

PCIE_CRX_GTX_P15 <7>

C7770.1U_0402_10V6K C7770.1U_0402_10V6K

PCIE_CRX_GTX_N15 <7>

C7780.1U_0402_10V6K C7780.1U_0402_10V6K

PCIE_CRX_GTX_P14 <7>

C7790.1U_0402_10V6K C7790.1U_0402_10V6K

PCIE_CRX_GTX_N14 <7>

C7800.1U_0402_10V6K C7800.1U_0402_10V6K

PCIE_CRX_GTX_P13 <7>

C7810.1U_0402_10V6K C7810.1U_0402_10V6K

PCIE_CRX_GTX_N13 <7>

C7820.1U_0402_10V6K C7820.1U_0402_10V6K

PCIE_CRX_GTX_P12 <7>

C7830.1U_0402_10V6K C7830.1U_0402_10V6K

PCIE_CRX_GTX_N12 <7>

C7840.1U_0402_10V6K C7840.1U_0402_10V6K

PCIE_CRX_GTX_P11 <7>

C7850.1U_0402_10V6K C7850.1U_0402_10V6K

PCIE_CRX_GTX_N11 <7>

C7860.1U_0402_10V6K C7860.1U_0402_10V6K

PCIE_CRX_GTX_P10 <7>

C7870.1U_0402_10V6K C7870.1U_0402_10V6K

PCIE_CRX_GTX_N10 <7>

C7880.1U_0402_10V6K C7880.1U_0402_10V6K
C7890.1U_0402_10V6K C7890.1U_0402_10V6K

C7900.1U_0402_10V6K C7900.1U_0402_10V6K
C7910.1U_0402_10V6K C7910.1U_0402_10V6K

C7920.1U_0402_10V6K C7920.1U_0402_10V6K
C7930.1U_0402_10V6K C7930.1U_0402_10V6K

C7940.1U_0402_10V6K C7940.1U_0402_10V6K
C7950.1U_0402_10V6K C7950.1U_0402_10V6K

C7960.1U_0402_10V6K C7960.1U_0402_10V6K
C7970.1U_0402_10V6K C7970.1U_0402_10V6K

C7980.1U_0402_10V6K C7980.1U_0402_10V6K
C7990.1U_0402_10V6K C7990.1U_0402_10V6K

C8000.1U_0402_10V6K C8000.1U_0402_10V6K
C8010.1U_0402_10V6K C8010.1U_0402_10V6K

C8020.1U_0402_10V6K C8020.1U_0402_10V6K
C8030.1U_0402_10V6K C8030.1U_0402_10V6K

C8040.1U_0402_10V6K C8040.1U_0402_10V6K
C8050.1U_0402_10V6K C8050.1U_0402_10V6K

C8060.1U_0402_10V6K C8060.1U_0402_10V6K
C8070.1U_0402_10V6K C8070.1U_0402_10V6K

PCIE_CRX_GTX_P9 <7>
PCIE_CRX_GTX_N9 <7>

PCIE_CRX_GTX_P8 <7>
PCIE_CRX_GTX_N8 <7>

PCIE_CRX_GTX_P7 <7>
PCIE_CRX_GTX_N7 <7>

PCIE_CRX_GTX_P6 <7>
PCIE_CRX_GTX_N6 <7>

PCIE_CRX_GTX_P5 <7>
PCIE_CRX_GTX_N5 <7>

PCIE_CRX_GTX_P4 <7>
PCIE_CRX_GTX_N4 <7>

PCIE_CRX_GTX_P3 <7>
PCIE_CRX_GTX_N3 <7>

PCIE_CRX_GTX_P2 <7>
PCIE_CRX_GTX_N2 <7>

PCIE_CRX_GTX_P1 <7>
PCIE_CRX_GTX_N1 <7>

PCIE_CRX_GTX_P0 <7>
PCIE_CRX_GTX_N0 <7>

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

PCIE_RX8P

U31

PCIE_RX8N

U29

PCIE_RX9P

T28

PCIE_RX9N

T30

PCIE_RX10P

R31

PCIE_RX10N

R29

PCIE_RX11P

P28

PCIE_RX11N

P30

PCIE_RX12P

N31

PCIE_RX12N

N29

PCIE_RX13P

M28

PCIE_RX13N

M30

PCIE_RX14P

L31

PCIE_RX14N

L29

PCIE_RX15P

K30

PCIE_RX15N

CLOCK

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

02/03 AMD

R932

R932

1 2

10K_0402_5%@

10K_0402_5%@

VGA_PERST#

N10

NC_PWRGOOD

AL27

PERSTB

216-0749001 A11 M93 -S3 FCBGA631

216-0749001 A11 M93 -S3 FCBGA631

PA@

PA@

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

CALIBRATION

CALIBRATION

PCIE_CALRP

PCIE_CALRN

AH30
AG31

AG29
AF28

AF27
AF26

AD27
AD26

AC25
AB25

Y23
Y24

AB27
AB26

Y27
Y26

W24
W23

V27
U26

U24
U23

T26
T27

T24
T23

P27
P26

P24
P23

M27
N26

Y22

AA22

PCIE_CRX_GTX_G_P15
PCIE_CRX_GTX_G_N15

PCIE_CRX_GTX_G_P14
PCIE_CRX_GTX_G_N14

PCIE_CRX_GTX_G_P13
PCIE_CRX_GTX_G_N13

PCIE_CRX_GTX_G_P12

PCIE_CRX_GTX_G_N12

PCIE_CRX_GTX_G_P11

PCIE_CRX_GTX_G_N11

PCIE_CRX_GTX_G_P10
PCIE_CRX_GTX_G_N10

PCIE_CRX_GTX_G_P9
PCIE_CRX_GTX_G_N9

PCIE_CRX_GTX_G_P8
PCIE_CRX_GTX_G_N8

PCIE_CRX_GTX_G_P7
PCIE_CRX_GTX_G_N7

PCIE_CRX_GTX_G_P6
PCIE_CRX_GTX_G_N6

PCIE_CRX_GTX_G_P5
PCIE_CRX_GTX_G_N5

PCIE_CRX_GTX_G_P4
PCIE_CRX_GTX_G_N4

PCIE_CRX_GTX_G_P3
PCIE_CRX_GTX_G_N3

PCIE_CRX_GTX_G_P2
PCIE_CRX_GTX_G_N2

PCIE_CRX_GTX_G_P1
PCIE_CRX_GTX_G_N1

PCIE_CRX_GTX_G_P0
PCIE_CRX_GTX_G_N0

R931 1.27K_0402_1%R931 1.27K_0402_1%

1 2

R933 2K_0402_1%R933 2K_0402_1%

1 2

4 4

https://t.me/schematicslaptop
https://t.me/biosarchive

A

B

C

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

D

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

PEG & LVDS

PEG & LVDS

PEG & LVDS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

E

of

of

of

24 55Monday, November 09, 2009

24 55Monday, November 09, 2009

24 55Monday, November 09, 2009

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

U8C

U8C

0

MDA

K

D D

C C

B B

DRAM_RST#<29>

A A

R936

R936

100_0402_1%

100_0402_1%

R937

R937

100_0402_1%

100_0402_1%

R938

R938

10

10

0_0402_1%

0_0402_1%

R939

R939

10

10

0_0402_1%

0_0402_1%

MDA[0

..63]<29>

+1.5VSDGPU

12

12

+1.5VSDGPU

12

12

R941

R941

4.7K_0402_5%

4.7K_0402_5%

R945

@R945

@

4.7K_0402_5%

4.7K_0402_5%

11/07

1

2

11/07

1

2

+1.5VSDGPU

12

1 2

..63]

MDA[0

+VDD_MEM15_REFD

C1087

C1087

0.1U_0402_10V6K

0.1U_0402_10V6K

+VDD_MEM15_REF1

C1088

C1088

0.1U_0402_10V6K

0.1U_0402_10V6K

+1.5VSDGPU

1

2

C1089

C1089
2200P_0402_25V7K

2200P_0402_25V7K

+VDD_MEM15_REFD
+VDD_MEM15_REF1

R940 243_0402_1%@ R940 243_0402_1%@

1 2

R942 243_0402_1%@ R942 243_0402_1%@

1 2

R943 243_0402_1%R943 243_0402_1%

1 2

R944 243_0402_1%@ R944 243_0402_1%@

1 2

12

12

R946

R946

4.7K_0402_5%

4.7K_0402_5%

MDA

1

MDA

2
3

MDA
MDA

4

MDA

5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

R947

R947

4.7K_0402_5%

4.7K_0402_5%

27

DQA_0

29

J

DQA_1

H

30

DQA_2

H

32

DQA_3

29

G

DQA_4

F

28

DQA_5

F

32

DQA_6

F30

DQA_7

C30

DQA_8

F27

DQA_9

A28

DQA_10

C28

DQA_11

E27

DQA_12

G26

DQA_13

D26

DQA_14

F25

DQA_15

A25

DQA_16

C25

DQA_17

E25

DQA_18

D24

DQA_19

E23

DQA_20

F23

DQA_21

D22

DQA_22

F21

DQA_23

E21

DQA_24

D20

DQA_25

F19

DQA_26

A19

DQA_27

D18

DQA_28

F17

DQA_29

A17

DQA_30

C17

DQA_31

E17

DQA_32

D16

DQA_33

F15

DQA_34

A15

DQA_35

D14

DQA_36

F13

DQA_37

A13

DQA_38

C13

DQA_39

E11

DQA_40

A11

DQA_41

C11

DQA_42

F11

DQA_43

A9

DQA_44

C9

DQA_45

F9

DQA_46

D8

DQA_47

E7

DQA_48

A7

DQA_49

C7

DQA_50

F7

DQA_51

A5

DQA_52

E5

DQA_53

C3

DQA_54

E1

DQA_55

G7

DQA_56

G6

DQA_57

G1

DQA_58

G3

DQA_59

J6

DQA_60

J1

DQA_61

J3

DQA_62

J5

DQA_63

K26

MVREFDA

J26

MVREFSA

J25

NC_MEM_CALRN0

K7

NC_MEM_CALRN1

J8

MEM_CALRP1

K25

NC_MEM_CALRP0

L10

DRAM_RST

K8

CLKTESTA

L7

CLKTESTB

216-0749001 A11 M93-S3 FCBGA631

216-0749001 A11 M93-S3 FCBGA631

PA@

PA@

MAA_13/BA2
MAA_14/BA0
MAA_15/BA1

MEMORY INTERFACE

MEMORY INTERFACE

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8

MAA_9
MAA_10
MAA_11
MAA_12

DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7

RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7

WDQS A_0
WDQS A_1
WDQS A_2
WDQS A_3
WDQS A_4
WDQS A_5
WDQS A_6
WDQS A_7

ODTA0

ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0

CKEA1

WEA0B
WEA1B

RSVD#1
RSVD#2
RSVD#3

K
J
H
G
G
H
J
K19
J14
K14
J11
J13
H11
G11
J16
L15

E32
E30
A21
C21
E13
D12
E3
F4

H28
C27
A23
E19
E15
D10
D6
G5

H27
A27
C23
C19
C15
E9
C5
H4

L18
K

H26
H25

G9
H9

G22
G17

G19
G16

H22
J22

G13
K13

K20
J

G25
H10

AB16
G14
G20

17
20

23
23
24
24

19

16

17

0

MAA
MAA

1

MAA

2
3

MAA
MAA

4

MAA

5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

ODTA0
ODTA1

CLKA0
CLKA0#

CLKA1
CLKA1#

RASA0#
RASA1#

CASA0#
CASA1#

CSA0#_0

CSA1#_0

CKEA0
CKEA1

WEA0#
WEA1#

11/11 HP

MAA[1

2..0]

A_BA[2..0]

DQMA#[7..0] <29>

QSA[7..0] <29>

QSA#[7..0] <29>

ODTA0 <29>
ODTA1 <29>

CLKA0 <29>
CLKA0# <29>

CLKA1 <29>
CLKA1# <29>

RASA0# <29>
RASA1# <29>

CASA0# <29>
CASA1# <29>

CSA0#_0 <29>

CSA1#_0 <29>

CKEA0 <29>
CKEA1 <29>

WEA0# <29>
WEA1# <29>

MAA[12..0] <29>

A_BA[2..0] <29>

Hynix Orion die H5TQ1G63BFR-12C

SA000032400

Samsung E die K4W1G1646E-HC12

*

SA000035700

Qimonda IDGH1G-04A1F1C-16X
SA000030800

TBD

TBD

TBD

TBD

TBD

+1.8V

SDGPU

R1053 1

R1053 1

1 2

R1054 1

R1054 1

1 2

R1055 1

R1055 1

1 2

R1056 1

R1056 1

1 2

R1057 1

R1057 1

1 2

R1058 1

R1058 1

1 2

0K_0402_5%@

0K_0402_5%@
0K_0402_5%

0K_0402_5%
0K_0402_5%@

0K_0402_5%@
0K_0402_5%

0K_0402_5%
0K_0402_5%

0K_0402_5%
0K_0402_5%@

0K_0402_5%@

VRAM_ID0 VRAM_ID1 VRAM_ID2

800MHz

800MHz

0 0 0

0 0 1

0 01

1 0 1

1 01

VRAM_

VRAM_

VRAM_

1

ID0

ID1

ID2

VRAM_

VRAM_

VRAM_

ID0 <26>

ID1 <26>

ID2 <26>

10

001

11 1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

S

S

S

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Memory Interface

Memory Interface

Memory Interface

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

1.0

1.0

25 55Monday, November 09, 2009

25 55Monday, November 09, 2009

25 55Monday, November 09, 2009

1.0

of

of

of

5

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

+1.8VSDGPU

+1.1VSDGPU

L46

L46

12

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

L47

L47

12

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

+DPC_PVDD

1

1

1

C1092

C1092

C1091

C1091

C1090

C1090

2

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPC_VDD10

1

1

1

C1094

C1094

C1095

C1095

C1093

C1093

2

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

VRAM_ID0<25>
VRAM_ID2<25>

VRAM_ID1<25>

+DPC_PVDD

+DPC_VDD10

Add via

+3VS_VGA

R1189 10K_040 2_5%@R1189 10K_ 0402_5%@

1 2

R964 4.7K_0402_5%R964 4.7K_0402 _5%

1 2

R965 4.7K_0402_5%R965 4.7K_0402 _5%

C C

1 2

R1190 10K_040 2_5%@R1190 10K_ 0402_5%@

1 2

R1191 10K_040 2_5%@R1191 10K_ 0402_5%@

1 2

1 2

R976 10K_0402_5%@R976 10K_04 02_5%@

+1.8VSDGPU

B B

+1.1VSDGPU

AC_PRE_VGA

D_EDID_CLK
D_EDID_DATA
GPU_VID1
GPU_VID0

R3311K_0402_5% R33 11K_0402_5%

TESTEN

12

GPU_CTF

L50

L50

12

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

L51

L51

12

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

300mA

1

C1102

C1102

2

10U_0603_6.3V6M

10U_0603_6.3V6M

300mA

1

C1105

C1105

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C1103

C1103

2

1

C1106

C1106

2

01/15 HP

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

THERM_DAT_GPU<12>
THERM_CLK_GPU<12>

1

C1104

C1104

2

1

C1107

C1107

2

EC_ACIN<13,39>

+DPLL_PVDD

0.1U_0402_10V6K

0.1U_0402_10V6K

+DPLL_VDDC

0.1U_0402_10V6K

0.1U_0402_10V6K

D_EDID_CLK<22 >
D_EDID_DATA<22>

T77T77

D42

SG@ D42

SG@

DGPU_BKL_EN<22>

T79T79

T80T80
T81T81

GPU_VID0<51>
27M_SSC<19>

GPU_VID1<51>

GPIO21_BBEN<28>

T82T82

10/24 ATI change R11/T11 to VSS

T83T83
T84T84
T85T85
T86T86
T87T87

+1.8VSDGPU

R977

R977

499_0402_1%

499_0402_1%

R978

R978

249_0402_1%

249_0402_1%

9/11 Use Y7 for VGA 27MHz

R12 1 M_0402_5%R12 1 M_0402_5%

1 2

Y7

Y7

27MHZ_18PF_X3S027000FI1 H-X

27MHZ_18PF_X3S027000FI1 H-X

1 3
2 4

1

C1109

C1109
18P_0402_50V8J

18P_0402_50V8J

2

A A

XTALOUTXTALIN

1

C1275

C1275
18P_0402_50V8J

18P_0402_50V8J

2

27M_CLK<19>

+1.8VSDGPU

R980 82.5_0402_1%@R980 82.5_0402_1%@

L52

L52

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

12

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
THERM_DAT_GPU
THERM_CLK_GPU

GPU_GPIO8
GPU_GPIO9

GPU_GPIO11
GPU_GPIO12
GPU_GPIO13

GPU_VID0
27M_SSC

GPU_CTF
GPU_VID1

GPIO23_CLKREQB

GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
TESTEN

12

12

12

+TSVDD

12

AC_PRE_VGA

21

RB751V_SOD323

RB751V_SOD323

HDMI_DET<23>

+VREFG_GPU

1

C1108

C1108

2

0.1U_0402_10V6K

0.1U_0402_10V6K

R981

@R981

@

100_0402_1%

100_0402_1%

VGA_THERMDA
VGA_THERMDC

1

1

C1111

C1111

C1112

C1112

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VRAM_ID0
VRAM_ID2

VRAM_ID1

D_EDID_CLK
D_EDID_DATA

T75@T75

T76@T76

02/01 HP

+DPLL_PVDD

+DPLL_VDDC

XTALIN
XTALOUT

1

C1113

C1113

2

0.1U_0402_10V6K

0.1U_0402_10V6K

U8B

U8B

M93-S3/M92-S2

M93-S3/M92-S2

AE9

DVCNTL_0/ DVPDATA_18

L9

DVCNTL_1 / NC

N9

DVCNTL_2 / NC

AE8

DVDATA_12 / DVPDATA_16

AD9

DVDATA_11 / DVPDATA_20

AC10

DVDATA_10 / DVPDATA_22

AD7

DVDATA_9 / DVPDATA_12

AC8

DVDATA_8 / DVPDATA_14

AC7

DVDATA_7 / DVPCNTL_0

AB9

DVDATA_6 / DVPDATA_8

AB8

DVDATA_5 / DVPDATA_6

AB7

DVDATA_4 DVPDATA_4

AB4

DVDATA_3 / DVPDATA_19

AB2

DVDATA_2 / DVPDATA_21

Y8

DVDATA_1 / DVPDATA_2

Y7

DVDATA_0 / DVPDATA_0

W6

DPC_PVDD / DVPDATA_11

V6

DPC_PVSS / GND

AC6

DPC_VDD18#1/DVPDAT10

AC5

DPC_VDD18#2/DVPDAT23

AA5

DPC_VDD10#1/DVPDAT15

AA6

DPC_VDD10#2/DVPDAT17

U1

DPC_VSSR#1 / DVPCLK

W1

DPC_VSSR#2 / DVPDAT5

U3

DPC_VSSR#3 / GND

Y6

DPC_VSSR#4 / GND

AA1

DPC_VSSR#5/ DVPCNTL_MV0

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

@

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

@

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16_SSIN

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

T11

GPIO_29

R11

GPIO_30

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

AF24

TESTEN

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

AC16

VREFG

AF14

DPLL_PVDD

AE14

DPLL_PVSS

AD14

DPLL_VDDC

AM28

XTALIN

AK28

XTALOUT

T4

DPLUS

T2

DMINUS

R5

TS_FDO

AD17

TSVDD

AC17

TSVSS

216-0749001 A11 M93 -S3 FCBGA631

216-0749001 A11 M93 -S3 FCBGA631

10U_0603_6.3V6M

10U_0603_6.3V6M

PA@

PA@

4

DVO

DVO

M93-S3/M92-S2

M93-S3/M92-S2

I2C

I2C

PLL/CLOCK

PLL/CLOCK

THERMAL

THERMAL

TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P

DPA

DPA

TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

M92-S2/M93-S3

M92-S2/M93-S3

DVPDATA_3/TXCCP_DPC3P

DVPCNTL_2/TXCCM_DPC3N

DVPDATA_7 / TX0P_DPC2P
DVPDATA_1 / TX0M_DPC2N

DVPCNTL_MV1 / TX1P_DPC1P

DVPDATA_9 / TX1M_DPC1N

DVPDATA_13 / TX2P_DPC0P

DVPCNTL_1 / TX2M_DPC0N

VDDR4 / DPCD_CALR

DPC

DPC

DAC1

DAC1

HSYNC
VSYNC

RSET

AVDD

AVSSQ

VDD1DI
VSS1DI

M92-S2/M93-S3

M92-S2/M93-S3

R2 / NC

R2B / NC

G2 / NC

G2B / NC

B2 / NC

B2B / NC

C / NC

DAC2

DAC2

Y / NC

COMP / NC

H2SYNC
V2SYNC

VDD2DI / NC
VSS2DI / NC

A2VDD / NC

A2VDDQ / NC

A2VSSQ

R2SET / NC

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P
AUX1N

DDC2CLK

DDC2DATA

AUX2P
AUX2N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

AF2
AF4

AG3
AG5

AH3
AH1

AK3
AK1

AK5
AM3

AK6
AM5

AJ7
AH6

AK8
AL7

V4
U5

W3
V2

Y4
W5

AA3
Y2

AA12

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26
AJ27

AD22

AG24
AE22

AE23
AD23

AM12
AK12

AL11
AJ11

AK10
AL9

AH12
AM10
AJ9

AL13
AJ13

AD19
AC19

AE20

AE17

AE19

AG13

AE6
AE5

AD2
AD4

AC11
AC13

AD13
AD11

AE16
AD16

AC1
AC3

AD20
AC20

AB22

NC#1

AC22

NC#2

HDMI_C_CLK+
HDMI_C_CLK-

HDMI_C_TX0+
HDMI_C_TX0-

HDMI_C_TX1+
HDMI_C_TX1-

HDMI_C_TX2+
HDMI_C_TX2-

R1059 150_0402_1%R1059 150_04 02_1%

06/05 AMD

D_CRT_HSYNC
D_CRT_VSYNC

R974 499_0402_1%R974 499_0402 _1%

+AVDD

+VDD1DI

HSYNC_DAC2
VSYNC_DAC2

HDMI_C_CLK+ <23>

HDMI_C_CLK- <23>

D_BLUE

1 2

R71 150_040 2_1%R71 150_0402_1%

D_GREEN

1 2

R72 150_040 2_1%R72 150_0402_1%

D_RED

1 2

R74 150_040 2_1%R74 150_0402_1%

Place the 3 resistors close to U8

1 2

1 2

(1.8V@45mA VDD1DI)

1

C1099

C1099

2

T88T88

T89T89

09/22 HP

R979 715_0402_1%SG@ R979 715 _0402_1%SG@

1 2

CRT

HDMICLK_VGA
HDMIDAT_VGA

D_CRT_DDC_CLK <20>
D_CRT_DDC_DATA <20>

HDMICLK_VGA <23>
HDMIDAT_VGA <2 3>

HDMI_C_TX0+ <23>
HDMI_C_TX0- <23>

HDMI_C_TX1+ <23>
HDMI_C_TX1- <23>

HDMI_C_TX2+ <23>
HDMI_C_TX2- <23>

D_RED <22>

D_GREEN <22>

D_BLUE <2 2>

D_CRT_HSYNC <22>

D_CRT_VSYNC <22>

1

C1100

C1100

2

0.1U_0402_10V6K

0.1U_0402_10V6K
1U_0402_6.3V4Z

1U_0402_6.3V4Z

3

HDMI

(1.8V@70mA AVDD)

L49

L49

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

C1101

C1101

2

10U_0603_6.3V6M

10U_0603_6.3V6M

GPU_CTF

+1.8VSDGPU

STRAPS

2

C1096

C1096

Add via

R1187 10K_0402_5%@R1187 10K_0 402_5%@
R1188 10K_0402_5%@R1188 10K_0 402_5%@

R954 10K_0402_5%R954 10K_0402 _5%

R957 10K_0402_5%R957 10K_0402 _5%
R958 10K_0402_5%R958 10K_0402 _5%

R961

@R961

@

0_0402_5%

0_0402_5%

1 2

Q83

Q83
2N7002_SOT23-3

2N7002_SOT23-3

L48

L48

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

C1098

C1098

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

VGA Thermal Sensor ADM1032ARMZ

Closed to U8

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C37

@C37

@

1 2

2200P_0402_50V7K

2200P_0402_50V7K

@R46

@

1 2

+3VS_VGA

10K_0402_5%

10K_0402_5%

D_CRT_HSYNC
D_CRT_VSYNC

G

G

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

GPU_GPIO0
GPU_GPIO1

GPU_GPIO11

13

D

D

S

S

C1097

C1097

+3VS_VGA

12
12

12

12
12

H_THERMTRIP# <6,14>

+1.8VSDGPU

+3VS_VGA

2

C36

@C36

@

1

VGA_THERMDA

VGA_THERMDC THERM_SCI#

THERM#_VGA

R46

2

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

U16

@U16

@

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032ARMZ REEL_MSOP8

ADM1032ARMZ REEL_MSOP8

CONFIGURATION STRAPS

STRAPS

BIF_GEN2_EN_A

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

THERM_CLK_GPU

8

SCLK

THERM_DAT_GPU

7

SDATA

6

ALERT#

5

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

GPIO2

GPIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC

HSYNCAUD[1]

VSYNCAUD[0]

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

@R47

@

10K_0402_5%

10K_0402_5%

1 2

DESCRIPTION OF DEFAULT SETTINGSPIN

PCIE GNE2 ENABLED

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI

H2SYNC

R47

GENERICC

GPIO21_BB_EN

1

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE

RECOMMENDED SETTINGS

0

0

0

0

0

0

0

001

0

0

0

11

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

HDMI, MSIC & Thermal

HDMI, MSIC & Thermal

HDMI, MSIC & Thermal

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

26 55Monday, November 09, 2009

26 55Monday, November 09, 2009

26 55Monday, November 09, 2009

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

U8G

AG15
AG16

AG20
AG21

AG14
AH14
AM14
AM16
AM18

AF16

AG17

AF22

AG22

AF23
AG23
AM20
AM22
AM24

U8G

DPE_VDD18#1
DPE_VDD18#2

DPE_VDD10#1
DPE_VDD10#2

DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5

DPF_VDD18#1
DPF_VDD18#2

DPF_VDD10#1
DPF_VDD10#2

DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5

DP A/B POWERDP E/F POWER

DP A/B POWERDP E/F POWER

NC_DPA_VDD18#1
NC_DPA_VDD18#2

DPA_VDD10#1
DPA_VDD10#2

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

NC_DPB_VDD18#1
NC_DPB_VDD18#2

DPB_VDD10#1
DPB_VDD10#2

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

AE11
AF11

AF6
AF7

AE1
AE3
AG1
AG6
AH5

AE13
AF13

AF8
AF9

AF10
AG9
AH8
AM6
AM8

12/2 AMD

+DPA_VDD10

12/2 AMD

+VPB_VDD10

0.2A

+1.1VSDGPU

L54

0.2A

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C1124

C1124

2

1

C1118

C1118

2

0.2A

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1119

C1119

2

U_0402_6.3V4Z

U_0402_6.3V4Z
1

1

1

C1125

C1125

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

C1117

C1117

2

1

C1123

C1123

2

0U_0603_6.3V6M

0U_0603_6.3V6M
1

1

L54

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

12

+1.1VSDGPU

L56

L56

12

+1.8VSDGPU

+1.1VSDGPU

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

C C

L53

L53

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

12

L55

L55

12

0.2A

1

C1115

C1115

2

0U_0603_6.3V6M

0U_0603_6.3V6M
1

1

+DPF_VDD10

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1116

C1116

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

.1U_0402_10V6K

.1U_0402_10V6K
0

0

0.11A

1

C1122

C1122

0.17A

2

0U_0603_6.3V6M

0U_0603_6.3V6M
1

1

1

C1114

C1114

2

1

1

C1120

C1120

C1121

C1121

2

2

U_0402_6.3V4Z

U_0402_6.3V4Z
1

1

+DPE_VDD18

+DPF_VDD10

0.17A

+DPE_VDD18

+DPF_VDD10

+1.8VSDGPU

B B

A A

L57

L57

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

5

+DPE_PVDD

12

1

1

C1126

C1126

C1127

C1127

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

R982 150_0402_1%R982 150_0402_1%

0.02A

1

C1128

C1128

2

.1U_0402_10V6K

.1U_0402_10V6K
0

0

10U_0603_6.3V6M

10U_0603_6.3V6M

AF17

DPEF_CALR

DP PLL POWER

AG18

DPE_PVDD

AF19

DPE_PVSS

AG19

NC_DPF_PVDD

AF20

NC_DPF_PVSS

216-0749001 A11 M93-S3 FCBGA631

216-0749001 A11 M93-S3 FCBGA631

PA@

PA@

4

DP PLL POWER

DPAB_CALR

DPA_PVDD
DPA_PVSS

DPB_PVDD
DPB_PVSS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

R983 150_0402_1%R983 150_0402_1%

1 2

AE10

+DPA_PVDD

AG8
AG7

AG10
AG11

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

3

1

C1129

C1129

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPB_PVDD

0.02A

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

C1131

C1131

C1130

C1130

2

2

U_0402_6.3V4Z

U_0402_6.3V4Z
1

1

0.1U_0402_10V6K

0.1U_0402_10V6K

0.02A

1

1

C1133

C1133

C1132

C1132

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

L58

L58

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

C1134

C1134

2

.1U_0402_10V6K

.1U_0402_10V6K
0

0

12

+1.8VSDGPU

L59

L59

12

+1.8VSDGPU

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DPX POWER

DPX POWER

DPX POWER

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

27 55Monday, November 09, 2009

27 55Monday, November 09, 2009

27 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop

+1.5VSDGPU

2.2A

1

1

C1140

C1140

2

D D

+1.8VSDGPU

1

C1158

C1158

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

C1141

C1141

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.136A

1

C1159

C1159

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1142

C1142

2

1

C1160

C1160

2

1

C1143

C1143

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VDDC_CT

1

C1161

C1161

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1144

C1144

2

+1.5VSDGPU

0.06A

1

C1167

C1167

2

C C

1

C1182

C1182

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.8VSDGPU

1

C1202

C1202

2

61

+VDDR4

1

C1183

C1183

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

L61

L61

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

0.035A

1

C1203

C1203

C1204

C1204

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

+BBP

Q85

Q85

SI2301BDS_SOT23

SI2301BDS_SOT23

1 3

D

D

5

12

R991

R991
10K_0402_5%

10K_0402_5%

1

2

01/16 HP

+1.8VSDGPU

1

C1181

C1181

2

+VGA_CORE

B B

A A

L62

L62

1 2

MCK1608471YZF 060 3

MCK1608471YZF 060 3

@ R986

@

1 2

0_0402_5%

0_0402_5%

Q82A

Q82A

2

GPIO21_BBEN<26>

5

R986

2N7002DW-7-F _SOT363-6

2N7002DW-7-F _SOT363-6

1

1

C1169

C1169

C1168

C1168

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.5VSDGPU

1

C1199

C1199

2

0.1U_0402_10V6K

0.1U_0402_10V6K

S

S

G

G

2

1 2

3

100K_0402_5%

100K_0402_5%

Q82B

Q82B
2N7002DW-7-F _SOT363-6

2N7002DW-7-F _SOT363-6

4

1

1

C1146

C1146

C1145

C1145

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C1155

C1155

C1154

C1154

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

+3VS_VGA

1

C1170

C1170

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VDDR4

L60

L60

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

C1200

C1200

C1201

C1201

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

+BBP

+1.8VSDGPU+VGA_CORE

R990

R990

1

C1147

C1147

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1156

C1156

2

10U_0603_6.3V6M

10U_0603_6.3V6M

12/02 AMD

0.04A

12

C1194

C1194
1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1205

C1205

2

+5VSDGPU

1

C1148

C1148

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1157

C1157

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+VDDC_CT

+VDDRHA

+PCIE_PVDD

11/07

+SPV10

1

C1206

C1206

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

4

0.1U_0402_10V6K

0.1U_0402_10V6K

01/12 AMD

0.1U_0402_10V6K

0.1U_0402_10V6K

U8D

U8D

MEM I/O

MEM I/O

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL

LEVEL

TRANSLATION

TRANSLATION

AA20

VDD_CT#1

AA21

VDD_CT#2

AB20

VDD_CT#3

AB21

VDD_CT#4

M93-S3/M92-S2

M93-S3/M92-S2

AA17

VDDR3#1

AA18
AB17
AB18

AA11

AM30

V12
Y12
U12

Y11

V11
U11

L17

L16

M11
M12

I/O

I/O

VDDR3#2
VDDR3#3
VDDR3#4

VDDR4#1 / VDDR5
VDDR4#2
VDDR4#3 / VDDR5

NC#1 / VDDR4
DVCLK / VDDR4

NC#3 / VDDR5
NC#4 / VDDR5

MEM CLK

MEM CLK

VDDRHA

VSSRHA

PLL

PLL

PCIE_PVDD

L8

NC_MPV18

H7

NC_SPV18

H8

SPV10

J7

SPVSS

BACK BIAS

BACK BIAS

BBP#1
BBP#2

216-0749001 A11 M 93-S3 FCBGA631

216-0749001 A11 M 93-S3 FCBGA631

PA@

PA@

+1.8VSDGPU

1

C1151

C1151

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1164

C1164

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1172

C1172

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1185

C1185

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C1196

C1196

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.5A

1

1

C1152

C1152

C1153

C1153

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2A

1

C1165

C1165

2

1

C1174

C1174

2

1

C1186

C1186

2

+1.1VSDGPU

1

C1166

C1166

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C1176

C1176

C1175

C1175

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C1188

C1188

C1187

C1187

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

2A

1

1

C1197

C1197

C1198

C1198

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

C1177

C1177

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1189

C1189

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

+VGA_CORE

DGPU_PWR_EN#<4 1>

1.1VS_POK<47>

+PCIE_GDDR

PCIE

PCIE

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

CORE

CORE

POWER

POWER

ISOLATED

ISOLATED
CORE I/O

CORE I/O

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

Issued Date

Issued Date

Issued Date

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

AA15
N15
N17
R13
R16
R18
R21
T12
T15
T17
T20
U13
U16
U18
U21
V15
V17
V20
V21
Y13
Y16
Y18
Y21

M13
M15
M16
M17
M18
M20
M21
N20

1

1

C1149

C1149

C1150

C1150

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+PCIE_VDDC

1

1

C1162

C1162

C1163

C1163

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1171

C1171

2

1

C1184

C1184

2

1

C1195

C1195

2

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

3

1

C1178

C1178

2

1

C1191

C1191

2

2

1

C1179

C1179

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1192

C1192

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+3VS_VGA

R1252

R1252

470_0402_5%

470_0402_5%

Q62B

Q62B

5

+VGA_CORE

1

C1180

C1180

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VGA_CORE

1

C1193

C1193

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

+3VS

3

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

D64

D64

@

@

21

R987 3 30K_0402_5%R98 7 330K_0402_5%

https://t.me/biosarchive

U8E

U8E

AA27

PCIE_VSS#1

AB24

PCIE_VSS#2

AB32

PCIE_VSS#3

AC24

PCIE_VSS#4

AC26

PCIE_VSS#5

AC27

PCIE_VSS#6

AD25

PCIE_VSS#7

AD32

PCIE_VSS#8

AE27

PCIE_VSS#9

AF32

PCIE_VSS#10

AG27

PCIE_VSS#11

AH32

PCIE_VSS#12

K28

PCIE_VSS#13

K32

PCIE_VSS#14

L27

PCIE_VSS#15

M32

PCIE_VSS#16

N25

PCIE_VSS#17

N27

PCIE_VSS#18

P25

PCIE_VSS#19

P32

PCIE_VSS#20

R27

PCIE_VSS#21

T25

PCIE_VSS#22

T32

PCIE_VSS#23

U25

PCIE_VSS#24

U27

PCIE_VSS#25

V32

PCIE_VSS#26

W25

PCIE_VSS#27

W26

PCIE_VSS#28

W27

PCIE_VSS#29

Y25

PCIE_VSS#30

Y32

PCIE_VSS#31

M6

GND#56

N11

GND#57

N12

GND#58

N13

GND#59

N16

GND#60

N18
N21

P6

P9
R12
R15
R17
R20

T13
T16
T18
T21

T6
U15
U17
U20

U9
V13
V16
V18
Y10
Y15
Y17
Y20

216-0749001 A11 M 93-S3 FCBGA631

216-0749001 A11 M 93-S3 FCBGA631

PA@

PA@

Q84

Q84
SI2301BDS_SOT23

SI2301BDS_SOT23

S

S

1 3

D

D

G

G

2

C1207

@C1207

@

12

0.1U_0402_10V6K

0.1U_0402_10V6K

12

RB751V_SOD323

RB751V_SOD323

1 2

0.01U_0402_16V7K

0.01U_0402_16V7K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Main Power

Main Power

Main Power

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84

R985

R985
47K_0402_5%

47K_0402_5%

1 2

C1208

C1208

Q62A

Q62A

GND

GND

2

+3VS

R984

R984
100K_0402_5%

100K_0402_5%

1 2

61

1

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

09/17 soft start by HP

28 55Monday, November 09, 2009

28 55Monday, November 09, 2009

28 55Monday, November 09, 2009

A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6

A32
AM1
AM32

09/22 HP

of

of

of

1.0

1.0

1.0

5

https://t.me/schematicslaptop

VREFC
VREFD

https://t.me/biosarchive

D D

MDA[0

MDA[0

..63]<25>

MAA[12..0]<25>

DQMA#[7..0]<25>

QSA[7..0]<25>

QSA#[7..0]<25>

C C

..63]

MAA[12..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

CLKA0<25>
CLKA0#<25>
CKEA0<25>

DRAM_RST#<25>

R992

R992

240_0402_1%

240_0402_1%

A_BA0<25>
A_BA1<25>
A_BA2<25>

ODTA0<25>
CSA0#_0<25>
RASA0#<25>
CASA0#<25>
WEA0#<25>

QSA2
QSA0

DQMA#2
DQMA#0

QSA#2
QSA#0

12

U10

U10

_A1

M9

_Q1

H2

MAA

0

4

N

MAA

1

P

8

MAA

2

4

P

MAA

3

3

N

MAA

4

9

P

MAA

5

3

P

MAA

6

9

R

7

MAA

3

R

MAA

8

T

9

MAA

9

R

4

MAA10

L8

MAA11

8

R

MAA12

N

8

T

4

T8

M8

M3

N9

M4

J8

K8

K10

K2
L3

J4
K4
L4

F4
C8

E8
D4

G4
B8

T3

L9

J2
L2

J10
L10

A1

A11

T1

T11

64MX16 H5TQ1G63BFR-12C FBGA

64MX16 H5TQ1G63BFR-12C FBGA

VREFC
VREFD

A
A
A
A
A
A
A
A
A
A
A10/A
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

NC
NC
NC
NC

A
Q

0
1
2
3
4
5
6
7
8
9

P

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

4

DQL
DQL
DQL
DQL
DQL
DQL
DQL
DQL

DQU
DQU
DQU
DQU
DQU
DQU
DQU
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

U11

U11

_A2

R993

R993

VREFC
VREFD

MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA

MAA
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA0
CLKA0#
CKEA0

ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#

QSA3
QSA1

DQMA#3
DQMA#1

QSA#3
QSA#1

DRAM_RST#

12

M9

VREFC

_Q2

H2

VREFD

0

4

N

A

0

1

P

8

1

A

2

4

P

A

2

3

3

N

A

3

4

9

P

A

4

5

3

P

A

5

6

9

R

A

6

7

3

R

A

7

8

T

9

8

A

9

R

4

9

A

L8

A10/A

8

R

A11

N

8

A12

T

4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

64MX16 H5TQ1G63BFR-12C FBGA

64MX16 H5TQ1G63BFR-12C FBGA

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

MDA20

E

4

0

MDA19

8

F

1

MDA23

F

3

2

MDA18

9

F

3

MDA17

H

4

4

MDA21

9

H

5

MDA22

3

G

6

MDA16

8

H

7

0

MDA

8

D

0

MDA

4

C

4

1

MDA

1

C

9

2

MDA

6

3

C

3

MDA

3

A

8

4

MDA

7

3

A

5

MDA

2

9

B

6

5

MDA

A4

+1.5VSDGPU

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

240_0402_1%

240_0402_1%

3

DQL
DQL

Q

DQL
DQL
DQL
DQL
DQL
DQL

DQU
DQU
DQU
DQU

P

DQU
DQU
DQU
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MDA27

8

F

1

MDA25

F

3

2

MDA24

9

F

3

MDA29

H

4

4

MDA30

9

H

5

MDA28

3

G

6

MDA31

8

H

7

MDA12

8

D

0

MDA10

C

4

1

MDA15

C

9

2

MDA11

3

C

3

MDA13

A

8

4

MDA

8

3

A

5

MDA14

9

B

6

A4

B3
D10
G8
K3
K9
N2
N10
R2
R10

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

9

MDA

+1.5VSDGPU

+1.5VSDGPU

240_0402_1%

240_0402_1%

MDA26

E

4

0

A

VREFC
VREFD

MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA

MAA
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA1<25>
CLKA1#<25>
CKEA1<25>

ODTA1<25>
CSA1#_0<25>
RASA1#<25>
CASA1#<25>
WEA1#< 25>

QSA4
QSA5

DQMA#4
DQMA#5

QSA#4
QSA#5

DRAM_RST# DRAM_RST#

12

R994

R994

U12

U12

_A3

M9

VREFC

_Q3

H2

VREFD

0

4

N

A

0

1

P

8

1

A

2

4

P

A

2

3

3

N

A

3

4

9

P

A

4

5

3

P

A

5

6

9

R

A

6

7

3

R

A

7

8

T

9

8

A

9

R

4

9

A

L8

A10/A

8

R

A11

N

8

A12

T

4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

64MX16 H5TQ1G63BFR-12C FBGA

64MX16 H5TQ1G63BFR-12C FBGA

P

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

2

R995

R995

VREFC
VREFD

12

MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA
MAA

MAA
MAA10
MAA11
MAA12

A_BA0
A_BA1
A_BA2

CLKA1
CLKA1#
CKEA1

ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#

QSA6
QSA7

DQMA#6
DQMA#7

QSA#6
QSA#7

DQL
DQL

Q

DQL
DQL
DQL
DQL
DQL
DQL

DQU
DQU
DQU
DQU
DQU
DQU
DQU
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

MDA34

8

F

1

MDA32

F

3

2

MDA39

9

F

3

MDA33

H

4

4

MDA37

9

H

5

MDA35

3

G

6

MDA36

8

H

7

MDA44

8

D

0

MDA42

C

4

1

MDA47

C

9

2

MDA40

3

C

3

MDA45

A

8

4

MDA43

3

A

5

MDA46

9

B

6

MDA41

A4

+1.5VSDGPU

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

240_0402_1%

240_0402_1%

MDA38

E

4

0

A

U13

U13

_A4

M9

VREFC

_Q4

H2

VREFD

0

4

N

A

0

1

P

8

1

A

2

4

P

A

2

3

3

N

A

3

4

9

P

A

4

5

3

P

A

5

6

9

R

A

6

7

3

R

A

7

8

T

9

8

A

9

R

4

9

A

L8

A10/A

8

R

A11

N

8

A12

T

4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

64MX16 H5TQ1G63BFR-12C FBGA

64MX16 H5TQ1G63BFR-12C FBGA

A
Q

P

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

DQL
DQL
DQL
DQL
DQL
DQL
DQL
DQL

DQU
DQU
DQU
DQU
DQU
DQU
DQU
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

MDA52

E

4

0

MDA50

8

F

1

MDA54

F

3

2

MDA49

9

F

3

MDA53

H

4

4

MDA51

9

H

5

MDA55

3

G

6

MDA48

8

H

7

MDA56

8

D

0

MDA58

C

4

1

MDA60

C

9

2

MDA61

3

C

3

MDA63

A

8

4

MDA62

3

A

5

MDA57

9

B

6

MDA59

A4

+1.5VSDGPU

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

B B

12

R996

R996

4.99K_0402_1%

4.99K_0402_1%

VREFD_Q1

12

5

1

C1209

C1209

0.1U_0402_10V6K

0.1U_0402_10V6K

2

1

C1217

C1217

0.01U_0402_16V7K

0.01U_0402_16V7K

2

1

C1244

C1244

0.01U_0402_16V7K

0.01U_0402_16V7K

2

R1004

R1004

4.99K_0402_1%

4.99K_0402_1%

CLKA0

1 2

R1012 56_0402_1%R1012 56_0402_1%

CLKA0#

1 2

R1013 56_0402_1%R1013 56_0402_1%

A A

CLKA1

1 2

R1014 56_0402_1%R1014 56_0402_1%

CLKA1#

1 2

R1015 56_0402_1%R1015 56_0402_1%

R997

R997

4.99K_0402_1%

4.99K_0402_1%

R1005

R1005

4.99K_0402_1%

4.99K_0402_1%

+1.5VSDGPU+1.5VSDGPU

12

12

+1.5VSDGPU

C1218

C1218

1

2

VREFC_A1

1

C1210

C1210

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1219

C1219

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.5VSDGPU+1.5VSDGPU +1.5VSDGPU+1.5VSDGPU +1.5VSDGPU+1.5VSDGPU

12

R998

R998

4.99K_0402_1%

4.99K_0402_1%

VREFC_A2 VREFD_Q2 VREFC_A 3 VREFC_A4 VREFD_Q4

12

R1006

R1006

4.99K_0402_1%

4.99K_0402_1%

1

1

C1220

C1220

C1221

C1221

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

4

1

C1211

C1211

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1223

C1223

C1222

C1222

2

2

0U_0603_6.3V6M

0U_0603_6.3V6M
1

1

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

+1.5VSDGPU +1.5VSDGPU

1

C1224

C1224

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

12

R999

R999

12

R1007

R1007

1

C1225

C1225

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1212

C1212

0.1U_0402_10V6K

0.1U_0402_10V6K

2

1

1

C1227

C1227

C1226

C1226

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

C1228

C1228

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

3

12

R1000

R1000

12

R1008

R1008

1

C1229

C1229

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2009/03/31 2010/03/31

2009/03/31 2010/03/31

2009/03/31 2010/03/31

1

C1213

C1213

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1230

C1230

C1231

C1231

2

2

U_0402_6.3V4Z

U_0402_6.3V4Z
1

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

C1232

C1232

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Deciphered Date

Deciphered Date

Deciphered Date

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

C1233

C1233

12

R1001

R1001

VREFD_Q3

12

R1009

R1009

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1214

C1214

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

2

2

C1235

C1235

C1234

C1234

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

2

C1236

C1236

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

R1002

R1002

12

R1010

R1010

1

2

C1237

C1237

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

C1215

C1215

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

2

2

C1239

C1239

C1238

C1238

Title

Title

Title

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

2

C1240

C1240

C1241

C1241

1U_0402_6.3V4Z

1U_0402_6.3V4Z

M92-S VRAM

M92-S VRAM

M92-S VRAM

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

12

R1003

R1003

12

R1011

R1011

1

1

2

2

C1242

C1242

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

29 55Monday, November 09, 2009

29 55Monday, November 09, 2009

29 55Monday, November 09, 2009

1

C1216

C1216

0.1U_0402_10V6K

0.1U_0402_10V6K

2

1

2

C1243

C1243

1U_0402_6.3V4Z

1U_0402_6.3V4Z

of

of

of

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

HDD Connector

JP3

JP3

1

GND

2

A+

3

A-

4

GND

B+

GND

V33
V33

V33
GND
GND
GND

V5
V5
V5

GND

Reserved

GND

V12

V12

V12

SUYIN_127072FR022G523_RV

C C

B B

SUYIN_127072FR022G523_RV

CONN@

CONN@

CD-R

OM Connector

JP5

JP5

SUYIN_127382FR013GX09ZR

SUYIN_127382FR013GX09ZR

CONN@

CONN@

13

GND

12

A+

11

A-

10

GND

9

B-

8

B+

7

GND

6

DP

5

V5

4

V5

3

MD

2

GND

1

GND

SATA_RXN0

5

B-

6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

SATA_RXN1
SATA_RXP1

C466 0.01U_0402_16V7KC466 0.01U_0402_16V7K

SATA_RXP0 SATA_RXP0_C

C467 0.01U_0402_16V7KC467 0.01U_0402_16V7K

+3VS

+5VS

OPP@

OPP@

C473 0.01U_0402_16V7K

C473 0.01U_0402_16V7K

12

C474 0.01U_0402_16V7K

C474 0.01U_0402_16V7K

12

OPP@

OPP@

Near CONN side.

+5VS

12
12

Near CONN side.

SATA_TXP0
SATA_TXN0

SATA_RXN0_C

SATA_TXP1
SATA_TXN1

SATA_RXN1_C
SATA_RXP1_C

SATA_TXP0 <11>

SATA_TXN0 <11>

SATA_RXN0_C <11>
SATA_RXP0_C <11>

SATA_TXP1 <11>

SATA_TXN1 <11>

SATA_RXN1_C <11>
SATA_RXP1_C <11>

Pleace near HDD CONN (JHDD)

+5VS

1

1

1

C463

C463

C462

C462

2

Placea caps. near ODD CONN.

+5VS

1

C475

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPP@ C475

OPP@

2

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C476

2

2

1U_0603_10V4Z

1U_0603_10V4Z

OPP@ C476

OPP@

ACCELEROMETER (ST)

PA@

PA@

D10

D10

2 1

RB751V_SOD323

RB751V_SOD323

1

C464

C464

C465

C465

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C477

C478

2

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

OPP@ C477

OPP@

OPP@ C478

OPP@

VDDIO absolute man
rating is VDD+0.1

+3VS_ACL_IO

+3VS_ACL

PA@ R366

PA@

+3VS_ACL+3VS +3VS_ACL_IO

U15

1

R366
0_0402_5%

0_0402_5%

1 2

PA@ R368

PA@

R368

Vdd_IO

2

GND

3

Reserved

4

GND

5

GND

6

Vdd

10K_0402_5%

10K_0402_5%

Must be placed in the center of the system.

R364

PA@ R364

PA@

1 2

PA@U15

PA@

12

0_0603_5%

0_0603_5%

SMB_CLK_S3

14

SCL / SPC

SDA / SDI / SDO

SDO

Reserved

GND

INT 2

INT 1

CS

HP302DLTR8_ LGA_14P

HP302DLTR8_ LGA_14P

7

13

12

11

10

9

8

SMB_DATA_S3

PA@

PA@

R367

PA@R367

PA@

0_0402_5%

0_0402_5%

1 2

+3VS_ACL

1

1

C469

C469

C468

C468

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0805_6.3V6M

10U_0805_6.3V6M

SMB_CLK_S3 <12,17,18,19>

0011101b

SMB_DATA_S3 <12,17,18,19>

ACCEL_INT <14>

PA@

PA@

Multi Bay

+5VS

+5VS

A A

2

VCC5

4

VCC5

6

VCC5

8
10
12
14
16

18
20

CONN@

CONN@

TYCO_2023087-3

TYCO_2023087-3

JP12

JP12

1

GND

GND7VCC3

GND13GND
GND15GND

GND17GND

SATA_TXP5

3

TX+

SATA_TXN5

5

TX-

SATA_RXN5

RX-9VCC3

SATA_RXP5

RX+11VCC3

G119G2

5

C1278

C1278
C1279

C1279

PA@

PA@
PA@

PA@

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

SATA_TXP5 <11>

SATA_TXN5 <11>

SATA_RXN5_C

12

SATA_RXP5_C

12

SATA_RXN5_C <11>
SATA_RXP5_C <11>

4

Placea caps. near Multi Bay
CONN.

PA@

PA@

PA@

PA@

C1281

C1281

1

1

C1282

C1282

2

2

1U_0603_10V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

PA@

PA@

PA@

C1283

C1283

1

2

PA@

PA@

PA@

1

C1280

C1280

C1284

C1284

2

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

1

@

@

+

+

+

+

C1441

C1441

2

2

150U_B_6.3VM_R40M

150U_B_6.3VM_R40M

220U_D2_4VM_R15

220U_D2_4VM_R15

Compal Secret Data

Compal Secret Data

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

https://t.me/schematicslaptop
https://t.me/biosarchive

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

HDD & CDROM

HDD & CDROM

HDD & CDROM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

30 55Monday, November 09, 2009

30 55Monday, November 09, 2009

30 55Monday, November 09, 2009

1

1.0

1.0

1.0

A

B

C

D

E

Mini Card 0--TV
tuner/WWAN/Robson

+3VAL

W

1U_0402_16V7K

1U_0402_16V7K

0.0

0.0

@

@

1

1 1

PCIE_RXN1<12>
PCIE_RXP1<12>

WWAN_DE TECT#<14>

2 2

WXMIT_OFF#<14>

CLK_PCIE_WW AN#<12>

CLK_PCIE_WW AN<12>

0402_16V4Z

0402_16V4Z

0.1U_

0.1U_

CLKREQ_WWA N#<12>

PCIE_TXN1<12>

PCIE_TXP1<12>

+3VS_WWAN

2

1

CW8

CW7

CW7

RW8

RW8

RW10 0_0402_5%RW10 0_0402_5%

DW1 R B751V_SOD323DW 1 RB751V_SOD323

CW8

2

U_0402_16V4Z

U_0402_16V4Z

0.1

0.1

ICH_PCIE_WAKE#

CLKREQ_WWA N#

CLK_PCIE_WW AN#
CLK_PCIE_WW AN

402_5%

402_5%

0_0

0_0

PCIE_C_RXN1

1 2

PCIE_C_RXP1

1 2

PCIE_TXN1
PCIE_TXP1

WWAN_DE TECT#

RW16 0_0603_ 5%RW16 0_0603_5%

1 2
1 2

RW17 0_0603_5%RW17 0_0603_5%

M_WXMIT_OFF#

21

4

4

7U_0805_10V4Z

7U_0805_10V4Z

.

.

1

CW9

CW9

2

+3VS_

WWAN_POW ER_OFF<39>

1

CW1

CW1

2

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

WWAN

0

0

JP6

JP6

1

1

3

3

5

5

7

7

9

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

_AS0B226-S40N-7F

_AS0B226-S40N-7F

FOX

FOX

CONN@

CONN@

+3VALW

GND2

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+1.5V

2
4
6
8

S

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

RW2

RW2

6 0

6 0

+3VS_

RW22

@ RW22

@

1 2

0_0603_5%

0_0603_5%

S

S

G

G

2

SIM c

1 2

.

.

01U_0402_16V7K

01U_0402_16V7K

0

0

1

CW1

CW1

2

WWAN

+1.5VS_WWAN

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

M_WXMIT_OFF#
PLT_RST#

RW9 0_0805_5%@RW9 0_0805_5%@

1 2

RW11 0_0805_5%RW11 0_0805_5%

1 2

SMBCLK
SMBDATA

WW_LED# <40>

1

1

C1416

C1416

C1417

C1417

@

@

2

2

47P_0402_50V8J

47P_0402_50V8J

+3VS_WWAN

D

D

13

QW1

QW1
SI2305ADS-T1-GE3_SOT23-3

SI2305ADS-T1-GE3_SOT23-3

ard Connector

_

_

0805_5%

0805_5%

+1.5V

S_WWAN

S_WWAN

+1.5V

2

2

.

.

1U_0402_16V4Z

1U_0402_16V4Z

0

0

USB20_N8 <14>

1

C1418

C1418

@

@

2

39P_0402_50V8J

39P_0402_50V8J

@RW 23

@

1 2

0_1206_5%

0_1206_5%

UIM_P
UIM_D
UIM_C
UIM_R

1

UIM_V

CW1

CW1

3

3

2

+1.5VS_WWAN

Reserve for RF

1

C1419

C1419

@

@

2

9P_0402_50V8J

9P_0402_50V8J

39P_0402_50V8J

39P_0402_50V8J

3

3

UIM_PWR U IM_DATA

+3VS

RW23

WR
ATA
LK
ST
PP

+3VALW
+3VS_WWAN

+3VS_WWAN

1

2

JP4

JP4

1

1

2

2

3

3

4

4

5

5

6

6

7

7

ACE

ACE

S_88266-07001

S_88266-07001

CONN@

CONN@

1

C1420

C1420

2

47P_0402_50V8J

47P_0402_50V8J

RW19

@RW 19

@

1 2

47K_0402_5%

47K_0402_5%

UIM_CLK

CW11

CW11

@

@

18

18

P_0402_50V8J

P_0402_50V8J

8

G

1

9

2

G

+1.5VS_WWAN

Mini Card 2---WLAN

0.1

0.1

U_0402_16V4Z

U_0402_16V4Z

1

2

4.7

4.7

U_0805_10V4Z

U_0805_10V4Z

PCIE_RXN2<12>
PCIE_RXP2<12>

CW2

CW2

+3VS_

CLKREQ_WLAN#<12>

CLK_PCIE_WLAN#<12>
CLK_PCIE_WLAN<12>

CLK_DEBUG_PORT_1<14>

EC_UTX<39>

EC_URX<39>

+3VAL

WLAN

1

CW3

CW3

2

RW12 0_0402_5%RW12 0_0402_5%
RW14 0_0402_5%RW14 0_0402_5%

PCIE_TXN2<12>

PCIE_TXP2<12>

W

@

@

1

CW1

CW1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ICH_PCIE_WAKE#

CLKREQ_WLAN#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

1 2
1 2

PCIE_TXN2
PCIE_TXP2

+3VS_WLAN

RW25 33_0402_5%

RW25 33_0402_5%

1 2

EC_URX

0.0

0.0

1U_0402_16V7K

1U_0402_16V7K

PLT_RST#

1

CW4

CW4

2

0.1

0.1

U_0402_16V4Z

U_0402_16V4Z

PCIE_C_RXN2
PCIE_C_RXP2

4.7

4.7

1

CW5

CW5

2

XMIT_OFF<14>

+1.5V

S_WLAN

U_0805_10V4Z

U_0805_10V4Z

1

CW6

CW6

2

JP7

JP7

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

GND2

FOX_AS0B226-S40N-7F

FOX_AS0B226-S40N-7F

CONN@

CONN@

DW2 RB751V_SOD323DW2 RB751V_SOD323

+1.5V

+3V

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+3VS_WLAN

+1.5VS_WLAN

RW3 0_0402_5% DEBUG@RW3 0_0402_5% DEBUG@

1 2

RW4 0_0402_5% DEBUG@RW4 0_0402_5% DEBUG@

1 2

RW5 0_0402_5% DEBUG@RW5 0_0402_5% DEBUG@

1 2

RW6 0_0402_5% DEBUG@RW6 0_0402_5% DEBUG@

1 2

RW7 0_0402_5% DEBUG@RW7 0_0402_5% DEBUG@

1 2

XMIT_OFF#

PLT_RST#

RW13 0_0805_5%@ RW13 0_0805_5%@
RW15 0_0805_5%

RW15 0_0805_5%

SMBCLK

SMBDATA

1

C1421

C1421

2

XMIT_OFF#

21

RW1 0_0

RW1 0_0

1 2

S

RW2 0_0

RW2 0_0

1 2

S

1 2
1 2

USB20_N5 <14>USB20_P8 <14>
USB20_P5 <14>

WL_LED# <40>

1

1

C1422

C1422

C1423

C1423

@

@

@

@

2

2

47P_0402_50V8J

47P_0402_50V8J

39P_0402_50V8J

39P_0402_50V8J

Reserve for RF

1

C1424

C1424

@

@

2

9P_0402_50V8J

9P_0402_50V8J

39P_0402_50V8J

39P_0402_50V8J

3

3

805_5%

805_5%

805_5%

805_5%

+3VALW
+3VS_WLAN
+1.5VS_WLAN

+3VS_WLAN

+1.5V

S_WLAN

+3VS_

WLAN

LPC_FRAME# <11,39>
LPC_AD3 <11,39>
LPC_AD2 <11,39>
LPC_AD1 <11,39>
LPC_AD0 <11,39>

+1.5VS_WLAN

1

C1425

C1425

2

47P_0402_50V8J

47P_0402_50V8J

Close to
JEXP

PA@

PA@

R1060 0_0 402_5%

R1060 0_0 402_5%

1 2

R1061 0_0 402_5%

R1061 0_0 402_5%

1 2

PA@

PA@

R1062

1 2

0_0402_5%

0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

+1.5VS_PEC
+1.5VS_PEC

CLK_PCIE_EXP#
CLK_PCIE_EXP

PCIE_RXN4
PCIE_RXP4

PCIE_TXN4
PCIE_TXP4

Deciphered Date

Deciphered Date

Deciphered Date

+3V_PEC

+3VS_PEC

USB9­USB9+
EXP_CPPE#

SMBCLK
SMBDATA

PCIE_PME#_R

PERST#

CLKREQ_EXP#
EXP_CPPE#

D

JEXP1

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

1

4

+3.3V

1

5

+3.3V

16

CLKREQ#

1

7

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130801-5_LT

SANTA_130801-5_LT

CONN@

CONN@

29

GND

30

GND

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

0.1U_0402_16V4Z

0.1U_0402_16V4Z

EXP_CPPE#_R

New Card

Express Card Power

+1.5VS

Switch

U53

U53

12

+3VS

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

2

0

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

G57

G57

B

PA@

PA@

7NSR91U

7NSR91U

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

GND

USB20_N9<14>

11
13

3
5

15

19

8

16

NC

7

PERST#

+1.5VS_PEC

+3VS_PEC

+3V_PEC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

USB20_P9<14>

SMBCLK<12>

SMBDATA<12>

ICH_PCIE_WAKE#<13,32>

PA@ R1062

PA@

CLKREQ_EXP#<12>

CLK_PCIE_EXP#<1 2>
CLK_PCIE_EXP<12>

PCIE_RXN4<12>
PCIE_RXP4<12>

PCIE_TXN4<12>

PCIE_TXP4<12>

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

3 3

C1285

PA@ C1285

PA@

1 2

PA@

PA@

C1288 0.1U_0402_16V4Z

C1288 0.1U_0402_16V4Z

1 2

C1289 0.1U_0402_16V4Z

C1289 0.1U_0402_16V4Z

1 2

PA@

PA@

+3VALW

PLT_RST#<14,24,32>

SYSON<39,40,41,45>

SUSP#<34,39,41,43,46,47,48,51>

+3VALW

EXP_CPPE#<14>

4 4

internal pull high to 3.3Vaux-in
EC need setting at Hi-Z & output Low

PA@

PA@

R1242

R1242

PLT_RST#

SYSON

SUSP#

R1063 100K_0402_5%@ R1063 100K_0402_5%@

1 2

1 2

0_0402_5%

0_0402_5%

https://t.me/schematicslaptop
https://t.me/biosarchive

A

Near to Express Card slot.

+3VS_PEC

1

2

1

2

+3V_PEC

1

2

E

1

2

1

2

1

2

31 55Monday, November 09, 2009

31 55Monday, November 09, 2009

31 55Monday, November 09, 2009

PA@

PA@

C1286

C1286

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS_PEC

PA@

PA@

C1290

C1290

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PA@

PA@

C1292

C1292

.1U_0402_16V4Z

.1U_0402_16V4Z

0

0

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

WLAN, WWAN, New Card

WLAN, WWAN, New Card

WLAN, WWAN, New Card

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

PA@

PA@

C1287

C1287

4.7U_0805_10V4Z

4.7U_0805_10V4Z

PA@

PA@

C1291

C1291

4.7U_0805_10V4Z

4.7U_0805_10V4Z

PA@

PA@

C1293

C1293

.7U_0805_10V4Z

.7U_0805_10V4Z

4

4

of

of

of

1.0

1.0

1.0

5

OPP@

OPP@

U14

U14
RTL8103EL-VB

RTL8103EL-VB

Place Close to Chip

C1295 0.1U_0402_16V7KC1295 0.1U_0402_16V7K

PCIE_RXP3<12>

+3VS

12

PCIE_RXN3<12>

R1070

R1070
1K_0402_1%

1K_0402_1%

ISOLATEB

R1072

R1072
15K_0402_5%

15K_0402_5%

+3V_LAN

12

12

D D

C C

12

C1296 0.1U_0402_16V7KC1296 0.1U_0402_16V7K

12

PCIE_TXP3<12>

PCIE_TXN3<12>

CLK_PCIE_LAN<12>

CLK_PCIE_LAN#<12>

CLKREQ_LAN#<12>

PLT_RST#<14,24,31>

R1069 2.49K_0402_1%R1069 2.49K_0402_1%

ICH_PCIE_WAKE#<13,31>

R1071

R1071
0_0402_5%

0_0402_5%

CTRL15/VDD33

R1073

@R1073

@

0_0402_5%

0_0402_5%

1 2

PCIE_PTX_IRX_P3

PCIE_PTX_IRX_N3

ISOLATEB

LAN_X1
LAN_X2

20

21

15

16

17
18

25

27

46

26
28

41
42

23
24

7
14
31
47

22

C1305

C1305

27P_0402_50V8J

27P_0402_50V8J

U14

U14

HSOP

HSON

HSIP

HSIN

REFCLK_P
REFCLK_M

CLKREQB

PERSTB

RSET

LANWAKEB
ISOLATEB

CKXTAL1
CKXTAL2

NC
NC

GND
GND
GND
GND

GNDTX

RTL8111DL-VB-GR LQFP 48P

RTL8111DL-VB-GR LQFP 48P

PA@

PA@

1

2

Close to Pin39 for 8111DL

Close to Pin10,13,30,36

B B

A A

2

C1314

C1314

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Close to Pin19

2

C1322

C1322

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

+EVDD12

C1315

C1315

2

1

+LAN_VDD12

2

2

C1316

C1316

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1323

C1323

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

C1317

C1317

C1318

C1318

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Close to Pin48

R1199 0_0603_5%

VCTRL12

R1199 0_0603_5%

L63

L63

4.7UH_1008HC-472EJFS-A_5%_1008

4.7UH_1008HC-472EJFS-A_5%_1008

Note 1: The Trace length
between L1 and 8111DL's Pin
1 must be within 0.5 cm. C262
and C263 to L1 must be within

0.5cm. Refer to Layout guide
for more detail.

Close to Pin1,37,29,40

0.1U_0402_16V4Z

0.1U_0402_16V4Z

8103EL@

8103EL@

1 2

1 2

8111DL@

8111DL@

8111DL@

8111DL@

2

1

1

2

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

RTL8102EL

RTL8102EL

RTL8111DL-VB

Y4

Y4

LAN_X1 LAN_X2

25MHz_20pF_6X25000017

25MHz_20pF_6X25000017

12

Close to Pin40 for 8111DL

+3V_LAN

2

2

C1311

C1311

C1310

C1310

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C1320

C1320

22U_0805_6.3V6M

22U_0805_6.3V6M

12

C1321

C1321

R1082

R1082
0_0603_5%

0_0603_5%

1

8111DL@

8111DL@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS

LED0

MDIP0
MDIN0
MDIP1
MDIN1

VCTRL12A

VDDTX
DVDD12
DVDD12
DVDD12
DVDD12

VCTRL12D

VDD33

VDD33

AVDD33

1

C1306

C1306
27P_0402_50V8J

27P_0402_50V8J

2

2

C1312

C1312

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1080

R1080

1 2

0_0603_5%

0_0603_5%

LAN_DI

R1065 3.6K_0402_5%R1065 3.6K_0402_5%

1 2

LAN_CS

R1066 1K_0402_5%

R1066 1K_0402_5%

8103EL@

8103EL@

33

LAN_DI

34

LAN_SK_LAN_LINK#

35

LAN_CS

32

LAN_ACTIVITY#

38

LAN_MDI0+

2

LAN_MDI0-

3

LAN_MDI1+

5

LAN_MDI1-

6

LAN_MDI2+

8

NC

LAN_MDI2-

9

NC

LAN_MDI3+

11

NC

LAN_MDI3-

12

NC

4

NC

VCTRL12

48

19
30
36
13
10

39

NC

+LAN_CTRL12VDD

44

NC

45

29
37

1
40

NC

43

NC

C1313

C1313

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+EVDD12

+LAN_VDD12

+LAN_CTRL12VDD

3

+3V_LAN

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LAN_SK_LAN_LINK#

+LAN_VDD12

+EVDD12
+LAN_VDD12

2

3

Close to Pin45,44

CTRL15/VDD33

Close to Pin 44,45

1 2

R1198 0_0603_5%

R1198 0_0603_5%

8103EL@

8103EL@

C1300

C1300

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+LAN_VDD12

1 2

LL1 0_0603_5%

LL1 0_0603_5%

1

8111DL@

8111DL@

C1301

C1301
22U_0805_6.3V6M

22U_0805_6.3V6M

2

8111DL@

8111DL@

+3V_LAN

+3V_LAN

C1302 0.01U_0402_50V7KC1302 0.01U_0402_50V7K

1 2

C1426 0.01U_0402_50V7KC1426 0.01U_0402_50V7K

1 2

C1427 0.01U_0402_50V7K

C1427 0.01U_0402_50V7K

1 2

8111DL@

8111DL@

C1428 0.01U_0402_50V7K

C1428 0.01U_0402_50V7K

1 2

8111DL@

8111DL@

1

0303 change to 0805 size by vender's recommand

9/11 Add R1259 for OPP SKU

LAN_POWER_OFF<39>

2009. 08.06 Add R1083 and C1319 to solve the 8111 VB power on issue

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1
2
3
4
5
6
7

1
2
3
4
5
6
7
8

9
10
11
12

2

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C1298

C1298

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

U56

8103EL@U56

8103EL@

RD+
RD­CT
NC
NC
CT
TD+
TD-8TX-

NS681680 LAN

NS681680 LAN

U17

8111DL@U17

8111DL@

TCT1
TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4-

NS692405

NS692405

R1078 0_0805_5%@R1078 0_0805_5%@

1 2

S

S

G

G

2

9

10

8

7

6

5

4

3

2

1

11

12

RX+

TX+

2

+3VLAN

LANLED_ACT#LAN_ACTIVITY#

1

C1294

C1294

2

2

C1297

C1297

1

LANLED_ACT#

LANLED_LINK#

D43

@D43

@

PACDN042_SOT23~D

PACDN042_SOT23~D

R1083

PA@ R1083

PA@

47K_0402_5%

47K_0402_5%

1 2

1 2

R1259

OPP@ R1259

OPP@

0_0402_5%

0_0402_5%

2007/08/28 2006/10/06

2007/08/28 2006/10/06

2007/08/28 2006/10/06

12

R1067

R1067

300_0402_5%

300_0402_5%

R1068

R1068

300_0402_5%

300_0402_5%

LAN_CT0
LAN_MDI0+
LAN_MDI0­LAN_CT1
LAN_MDI1+
LAN_MDI1-

LAN_MDI2+
LAN_MDI2-

LAN_MDI3+
LAN_MDI3-

1.For Giga LAN (RTL8111DL):
Mail source: LANKom: LG-2446S-1 (P/N: SP050005L00)
2nd Source: MHPC: NS892406 (P/N: SP050005900)

R1081

R1081

@

@

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

+3VLAN

LANLED_LINK#

12

LAN_MDI0+
LAN_MDI0­LAN_CT0

LAN_CT1
LAN_MDI1+

+3VALW

C1319

1 2

100K_0402_5%

100K_0402_5%

PA@ C1319

PA@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

LAN Conn.

JRJ45

JRJ45

Yellow LED+

Yellow LED-

PR4-

DETEC PIN1

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

DETEC PIN2

PR1+

Green LED+

Green LED-

TYCO_2041671-1

TYCO_2041671-1

CONN@

CONN@

1

C1299

C1299

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

RJ45_MIDI0+

16

RJ45_MIDI0-

15

RX-

RJ45_CT0

14

CT

13

NC

12

NC

RJ45_CT1

11

CT

RJ45_MIDI1+

10

RJ45_MIDI1-LAN_MDI1-

9

RJ45_CT0

24

MCT1

23

MX1+

22

MX1-

RJ45_CT1

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

80 mils

D

D

+3VLAN

13

Q87

Q87

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

SHLD1

SHLD1

C1303

C1303

C1304

C1304

C1307

C1307

8111DL@

8111DL@

C1308

C1308

8111DL@

8111DL@

1

06/19 Update RJ45 connector li brary

16

13

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https://t.me/biosarchive

14

15

LANGND

1000P_0402_50V7K

1000P_0402_50V7K

12

RJ45_MIDI0+

RJ45_MIDI0-

1000P_0402_50V7K

1000P_0402_50V7K

12

RJ45_MIDI1+

RJ45_MIDI1-

1000P_0402_50V7K

1000P_0402_50V7K

12

RJ45_MIDI2+

RJ45_MIDI2-

1000P_0402_50V7K

1000P_0402_50V7K

12

RJ45_MIDI3+

RJ45_MIDI3-

R1079 0_0805_5%R1079 0_0805_5%

1 2

12

R1197

R1197
100K_0402_5%

100K_0402_5%

1

C1429

C1429

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

USB CardReader&CONN

USB CardReader&CONN

USB CardReader&CONN

R1074 75_0402_1%R1074 75_0402_1%

RJ45_MIDI0+ <36>
RJ45_MIDI0- <36>

RJ45_MIDI1+ <36>
RJ45_MIDI1- <36>

RJ45_MIDI2+ <36>
RJ45_MIDI2- <36>

RJ45_MIDI3+ <36>
RJ45_MIDI3- <36>

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1 2

R1075 75_0402_1%R1075 75_0402_1%

1 2

R1076 75_0402_1%

R1076 75_0402_1%

1 2

R1077 75_0402_1%

R1077 75_0402_1%

1 2

+3V_LAN

1

8111DL@

8111DL@

8111DL@

8111DL@

RJ45_GND

2

C1309

C1309

1000P_1808_3KV7K

1000P_1808_3KV7K

1

For DIS 8111DL used

of

32 55Monday, November 09, 2009

of

32 55Monday, November 09, 2009

of

32 55Monday, November 09, 2009

1.0

1.0

1.0

5

4

3

2

1

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https://t.me/biosarchive

RTS51

38 ==>For DIS

D D

C C

B B

+3V

S

R1084 0

R1084 0

1 2

C1324 100P_0402_50V8JC1324 100P_0402_50V8J

12

R1085 6.2K_0603_1%R1085 6.2K_0603_1%

1 2

USB20_N10<14>
USB20_P10<14>

1

2

C1325

C1325

C1326

C1326

2

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1327

C1327

2

+3VS_

_0805_5%

_0805_5%

+3VS_CR
+VCC_4IN1

VREG

XD_CD#

XDDRY_SDWP_MSCLK
XDRE#_MSINS#
XDCE#_SDD1
XDCLE_SDD0

1U_0402_6.3V6K

1U_0402_6.3V6K

XDALE_SDD7_MSD3

CR

U54

1

2
3

4
5
6

7

8

9
10
11
12

U54

REFE

DM
DP

3V3_IN
CARD_3V3
V18

XD_CD#

SP1
SP2
SP3
SP4
SP5

CLK_IN

EPAD

138-GR_QFN24_4X4

138-GR_QFN24_4X4

RTS5

RTS5

25

GPIO0

XD_D7

RREF

Card Reader Connector

JREAD1

JREAD1

+VCC_4IN1 +VCC_4IN1

XDD0_SDCLK_MSD2
XDD1_SDD5_MSD0
XDD2_SDCMD
XDD3_SDD4_MSD4
XDD4_SDD3_MSD1
XDD5_SDD2_MS_D5

XDD6_MSBS
XD_D7

XDWE#_SDCD#
XDWP#_SDD6
XDALE_SDD7_MSD3
XD_CD#
XDDRY_SDWP_MSCLK
XDRE#_MSINS#
XDCE#_SDD1

3

XD-VCC

2

3

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

4

3

XD-WE

33

XD-WP

35

XD-ALE

0

4

XD-CD

39

XD-R/B

8

3

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM

TAITW_R015-B10-LM

CONN@

CONN@

7 IN 1 CONN

7 IN 1 CONN

SD-VCC

MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS

21
28

20
14
12
30
29
27
23
18
16
25
1

2

26
17
15
19
24
22
13

XD_CD#

SP1

XD_RDY

SP2

XD_RE#

SP3

XD_CE#

SP4

XD_CLE

SP5

XD_ALE

SP6

XD_WE#

SP7

XD_WP

SP8

XD_D0

SP9

XD_D1

SP10

XD_D2

SP11

XD_D3

SP12

XD_D4

SP13

XD_D5

SP14

XD_D6
XD_D7

CR_LED#

1

7

24

23

22

SP14

21

SP13

20

SP12

19

SP11

18

SP10

16

SP9

15

SP8

14

SP7

13

SP6

XDD0_SDCLK_MSD2
XDCLE_SDD0
XDCE#_SDD1
XDD5_SDD2_MS_D5
XDD4_SDD3_MSD1
XDD3_SDD4_MSD4
XDD1_SDD5_MSD0
XDWP#_SDD6
XDALE_SDD7_MSD3
XDD2_SDCMD
XDWE#_SDCD#

XDDRY_SDWP_MSCLK

XDDRY_SDWP_MSCLKXDCLE_SDD0
XDD1_SDD5_MSD0
XDD4_SDD3_MSD1
XDD0_SDCLK_MSD2
XDALE_SDD7_MSD3
XDRE#_MSINS#
XDD6_MSBS

SD_WP

SD_D1
SD_D0
SD_D7
SD_CD#
SD_D6
SD_CLK
SD_D5
SD_CMD
SD_D4
SD_D3
SD_D2

CLK_48M_CR <12>

XD_D7

XDD6_MSBS
XDD5_SDD2_MS_D5
XDD4_SDD3_MSD1
XDD3_SDD4_MSD4
XDD2_SDCMD
XDD1_SDD5_MSD0
XDD0_SDCLK_MSD2
XDWP#_SDD6
XDWE#_SDCD#

1

C1328

C1328

2

0U_0805_6.3V6M

0U_0805_6.3V6M
1

1

MS_CLK
MS_INS#

MS_D7
MS_D3

MS_D6
MS_D2
MS_D0

MS_D4
MS_D1
MS_D5
MS_BS

White

D44

D44

96BP5_WHITE

96BP5_WHITE

HT-F1

HT-F1

Issued Date

Issued Date

Issued Date

CR_LED#

Compal Secret Data

Compal Secret Data

2007/08/28 2006/10/06

2007/08/28 2006/10/06

2007/08/28 2006/10/06

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

USB CardReader&CONN

USB CardReader&CONN

USB CardReader&CONN

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

of

33 55Monday, November 09, 2009

of

33 55Monday, November 09, 2009

of

33 55Monday, November 09, 2009

1.0

1.0

1.0

R1086 1.2K_0402_5%

R1086 1.2K_0402_5%

1 2

+5VS

A A

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https://t.me/biosarchive

5

4

2 1

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A

+3VS

R437

R437

BLM18BD601SN1D_0603

BLM18BD601SN1D_0603

C551

C551

0.1U_0402_16V4Z

0.1U_0402_16V4Z

33P_0402_50V8K

33P_0402_50V8K

HDA_BITCLK_CODEC<11>

HDA_SDIN0<11>

HDA_SDOUT_CODEC<11>

HDA_SYNC_CODEC<11>

HDA_RST#_CODEC<11,39>

+3VS

12

R1247

R1247

4.7K_0402_5%

4.7K_0402_5%

HDA_RST#_CODEC

1

C1443

C1443

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+3VS_HDA

1

2

DMIC_CLK<21>

DMIC_DAT<21>

SPDIF_OUT<36>

@C554

@

EAPD_CODEC<39>

C554

+3VS

R907 0_0603_5%R907 0_0603_5%

1 2

1 1

2 2

3 3

2009.08.18 Add R1247,C1442,C1443 for ESD

+3VS_DVDD

12

1

1

C553

C553

C976

C976

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

C1065 10U_0805_10V4ZC1065 10U _0805_10V4Z

12

R441

@R441

@

12

EC_MUTE#<35,39>

12

47_0402_5%

47_0402_5%

R444

R444

1 2

33_0402_5%

33_0402_5%

R679 100_0402_1 %PA@ R679 100_0402_1%PA@
R446 0_0603_5%PA@ R446 0_0603_5%PA@

R910 0_0402_5%R910 0_ 0402_5%

SPDIF_OUT

R908 10K_0402 _5%R 908 10K_0402_5%

+3VS

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

+3VS

1

C1442

C1442
100P_0402_50V8J

100P_0402_50V8J

2

HDA_BITCLK_CODEC

HDA_SDIN0_CODEC

HDA_SDOUT_CODEC

HDA_SYNC_CODEC

HDA_RST#_CODEC

1 2
1 2

1 2

1 2

EC_MUTE#

C1069

C1069

2

1

C1451

C1451

W=40Mil

2009.11.03 Reserve LDO for AVDD power

MDC 1.5 Conn.

JP8

JP8

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

Connector for MDC Rev1.5

CONN@

CONN@

1 2

HDA_SDOUT_MDC

HDA_SYNC_MDC
HDA_SDIN1_MDC

HDA_SDOUT_MDC<11>

HDA_SYNC_MDC<11>

HDA_SDIN1<11>

HDA_RST#_MDC<11>

H12

H12

H14

H14

HOLEA

HOLEA

HOLEA

4 4

HOLEA

1

1

R1100 33_0402_5%R1100 33_0402_5%

MDC Standoff

https://t.me/schematicslaptop
https://t.me/biosarchive

A

B

U22

U22

1

DVDD_CORE

9

DVDD

3

DVDD_IO

6

HDA_BITCLK

8

HDA_SDI

5

HDA_SDO

10

HDA_SYNC

11

HDA_RST#

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

46

DMIC1/GPIO0/SPDIF_OUT_1

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

7

DVSS

33

AVSS

30

AVSS

26

AVSS

42

PVSS

49

DAP

92HD80B1X5NLGXYD38 QFN48P

92HD80B1X5NLGXYD38 QFN48P

92HD80 SA00003G700



+5VALW

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SUSP#<31,39,41,43,46,47,48,51>

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

12

IAC_BITCLK

GND13GND14GND15GND16GND17GND

ACES_88018-124G

ACES_88018-124G

18

B

AVDD
AVDD

PVDD
PVDD

SENSE_A
SENSE_B

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_or_F

HP1_PORT_B_L

HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT_C

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

PORT_E_L

PORT_E_R

PORT_F_L

PORT_F_R

PC_BEEP

MONO_OUT

CAP2

VREFFILT

VREG

U60

U60

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

G9191-475T1U_SOT23-5

@

@

1 2

R1098 0_0603_5%

R1098 0_0603_5%

1 2

R1099 0_0603_5%R1099 0_0603_5%

+3VS

R1101

@R1101

@

10_0402_5%

10_0402_5%

C

R1267 0_0805_5%@ R1267 0_0805_5%@

+AVDD_CODEC

1

C1063

C1063

2

27
38

39

V-

5

4

12

45

13
14

28
29
23

31
32

19
20

24

40

41

43
44

15
16

17
18

12

25

22

21

34

37

@C1338

@

SENSE_A
SENSE_B

DOCK_LOUT_L
DOCK_LOUT_R

HP_OUT_L
HP_OUT_R

MIC_INL MIC_IN_L
MIC_INR MIC_IN_R
+VREFOUT_INTMIC

SPKL+
SPKL-

SPKR­SPKR+

DOCK_MICR DOCK_MICR _C

MIC_EXTL
MIC_EXTR

MONO_INR

1

2

2

1

C1072

C1072

C1071

C1071

10U_0805_10V4Z

10U_0805_10V4Z

+VDDA_CODEC

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

12

R1269

@R1269

@

0_0402_5%

0_0402_5%

1

C1453

C1453

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

+3VS

HDA_BITCLK_MDC <11>

1 2

C1338
10P_0402_25V8K

10P_0402_25V8K

R1268

R1268

0_0805_5%

0_0805_5%

PVDD

1

1

C1450

C1450

C1064

C1064

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1333

C1333
C1334

C1334

C561 0.1U_0402_16V4ZC 561 0.1U_0402_16V4Z

C563

C563

1

2

C1452

C1452

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C559 2.2U_0603_6.3V4ZOPP@ C559 2.2U_0603_6.3V4ZOPP @

1 2

C560 2.2U_0603_6.3V4ZOPP@ C560 2.2U_0603_6.3V4ZOPP @

1 2

1U_0603_10V6KPA@

1U_0603_10V6KPA@

1U_0603_10V6KPA@

1U_0603_10V6KPA@

10U_0805_10V4Z

10U_0805_10V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

Issued Date

Issued Date

Issued Date

DOCK_MICL_CDOCK_MICL

1 2
1 2

C557 2.2U_0603_6.3V4ZC557 2.2U_0603_6 .3V4Z

1 2

C558 2.2U_0603_6.3V4ZC558 2.2U_0603_6 .3V4Z

1 2

MONO_IN

12

2

1 2

C564

C564

1

1U_0603_10V6K

1U_0603_10V6K

+3VS

1

C1335

C1335

2

1000P_0402_50V7K

1000P_0402_50V7K

C

1

C1336

C1336

2

R1102

OPP@ R1102

+VREFOUT_INTMIC

+VDDA_CODEC

12

R904

R904

12

0_0805_5%

0_0805_5%

1

1

C1067

C1067

C1066

C1066

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1331

PA@+C1331

PA@

C1332

PA@+C1332

PA@

MONO_IN

C562

C562

1

C1337

@C1337

@

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

12

1

C1068

C1068

2

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0805_10V4Z

10U_0805_10V4Z

150U_Y_6.3VM

150U_Y_6.3VM

+

1 2

+

1 2

150U_Y_6.3VM

150U_Y_6.3VM

R1094 10K_0402_5%PA@ R1094 10K_0402_5%PA@

1 2

R1095 10K_0402_5%PA@ R1095 10K_0402_5%PA@

1 2

MIC_EXT_L
MIC_EXT_R

2

1

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+5VS

OPP@ R 1200

OPP@

SENSE_A
SENSE_B

DOCK_MICL_C

DOCK_MICR_C

1.21K_0402_1%

1.21K_0402_1%

R447 47K_0402 _5%R 447 47K_0402_5%

9/11 Delete EC_BEEP

R449

R449

10K_0402_5%

10K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

OPP@

0_0402_5%

0_0402_5%

OPP@ R1104

OPP@

4.7K_0402_5%

4.7K_0402_5%

MIC_IN_R

12

R1200

0_0402_5%

0_0402_5%

DOCK_LOUT_C_L <36>
DOCK_LOUT_C_R <36>

HP_OUT_L <35>
HP_OUT_R <35>

MIC_IN_L <35>
MIC_IN_R <35>

SPKL+ <35>
SPKL- <35>

SPKR- <35>
SPKR+ <35>

MIC_EXT_L <35>
MIC_EXT_R <35>

MIC_IN_L

R1087 2.49K _0402_1%

R1087 2.49K _0402_1%

1 2

R1092 39 .2K_0402_1%PA@R1092 39.2K_0402_1%PA@

1 2

R1089 20 K_0402_1%R1089 20K_0402_1%

1 2

R1090 10 K_0402_1%R1090 10K_0402_1%

1 2

C1329 1000P_0402_50V7KC1329 1000P_0402_50V7K

1 2

R1091 2.49K _0402_1%

R1091 2.49K _0402_1%

1 2

R1088 20 K_0402_1%R1088 20K_0402_1%

1 2

R1093 39 .2K_0402_1%PA@R1093 39.2K_0402_1%PA@

1 2

C1330 1000P_0402_50V7KC1330 1000P_0402_50V7K

1 2

HP Jack

Int MIC

Internal SPKR

DOCK_MIC_L <36>
DOCK_MIC_R <36>

Ext MIC

12

12

PA@

R1096

R1096

12

PA@

R1097

R1097

1.21K_0402_1%

1.21K_0402_1%

PA@

PA@

D

C1339

OPP@ C1339

OPP@

12

12

12

1U_0603_10V4Z

1 2

1U_0603_10V4Z

R1105

4.7K_0402_5%

4.7K_0402_5%

JACK_DET#
HP_DET#
INTMIC_DET#

EXTMIC_DET#
SENSE_B#

2N7002_SOT23-3

2N7002_SOT23-3

R1104

Dock

HP Jack

1/10*Vin
need close to
Codec

C1070 0.1U_0402_16V4ZC1070 0.1U_0402_16V4Z

D

1 2

OPP@R1105

OPP@

+VREFOUT_INTMIC

+AVDD_CODEC

R1260 1K_0402_5%R1260 1K_0402_5%

R431 1K_0402_5%@ R431 1K_0402_5%@

MIC_EXT_R

MIC_EXT_L

12

12

R434

R434

4.7K_0402_5%

4.7K_0402_5%

E

12

C546

C546

12

1U_0603_10V4Z

1U_0603_10V4Z

R435

R435

4.7K_0402_5%

4.7K_0402_5%

1 2

9/11 Use +AVDD_CODEC for EXT. MIC reference voltage

+AVDD_CODEC

JACK_DET# <36>
HP_DET# <35>
INTMIC_DET# <35>

+AVDD_CODEC

EXTMIC_DET# <35>
SENSE_B# <36>

92HD80 port define

DOCK HP

HP

INT. MIC

SPKR

DOCK MIC

EXT. MIC

Digital MIC

+AVDD_CODEC

D

D

Q38

Q38

S

S

R909

R909

10K_0402_5%

10K_0402_5%

1 2

13

2

G

G

SB_SPKR

Port A

Port B

Port C

Port D

Port E

Port F

DM0

SB_SPKR <11>

2009.08.18 Add 0.1u for ESD

C983 0.1U_0402_16V4ZC 983 0.1U_0402_16V4Z

1 2

C984 0.1U_0402_16V4ZC 984 0.1U_0402_16V4Z

1 2

C985 0.1U_0402_16V4ZC 985 0.1U_0402_16V4Z

1 2

C986 0.1U_0402_16V4ZC 986 0.1U_0402_16V4Z

1 2

C1444 0.1U_0402_16V4ZC1444 0.1U_0402_16V4Z

1 2

C1445 0.1U_0402_16V4ZC1445 0.1U_0402_16V4Z

1 2

C1446 0.1U_0402_16V4ZC1446 0.1U_0402_16V4Z

1 2

C1447 0.1U_0402_16V4Z@ C1447 0.1U_0402_16 V4Z@

1 2

C1448 0.1U_0402_16V4Z@ C1448 0.1U_0402_16 V4Z@

1 2

R139 0_0603_5%

R139 0_0603_5%

1 2

GNDA <35,36>

GNDAGND

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Codec_IDT92HD80

Codec_IDT92HD80

Codec_IDT92HD80

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

E

of

of

of

34 55Monday, November 09, 2009

34 55Monday, November 09, 2009

34 55Monday, November 09, 2009

1.0

1.0

1.0

A

B

C

D

E

SPEAK

ER

+AVDD

JP6

JP6

0

0

6

GND

2

5

GND

SPKR-

R45

R45

4 0

4 0

SPKR-<

34>

SPKR+<

34>

SPKL-<

34>

SPKL+<

1 1

34>

SPKR+
SPKL­SPKL+

1 2

R45

R45

5 0

5 0

1 2

6 0

6 0

R45

R45

1 2

7 0

7 0

R45

R45

1 2

HP de pop circuit

2 2

EC_MUTE#<34,39>

_

_

0603_5%

0603_5%

_

_

0603_5%

0603_5%
0603_5%

0603_5%

_

_

0603_5%

0603_5%

_

_

1

1

2

+5VALW

12

61

2

3

1

R76

R76
10K_0402_5%

10K_0402_5%

@

@

Q39A

Q39A

@

@

7002DW-7-F_SOT363-6

7002DW-7-F_SOT363-6
2N

2N

2

PSOT24C_SOT23-3

PSOT24C_SOT23-3

C569

C569

330P_0402_50V7K

330P_0402_50V7K

2

1

C571

C571

C570

C570

2

330P_0402_50V7K

330P_0402_50V7K

330P_0402_50V7K

330P_0402_50V7K

2

3

D15

D15

1

HP_OUT_L HP_OUT_R

61

2

Q28A

Q28A

@

@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

5

Q28B

Q28B

@

@

3

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

1

C572

C572

2

330P_0402_50V7K

330P_0402_50V7K

D16

D16

PSOT24C_SOT23-3

PSOT24C_SOT23-3

2

5

SPK_R
SPK_R
SPK_L
SPK_L

61

4

3

Q32A

Q32A

@

@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q32B

Q32B

@

@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

­+

­+

4

4

3

3

2

2

1

1

&

&

T_3806-F04N-02R

T_3806-F04N-02R

E

E

CONN@

CONN@

1

PACDN042_SOT23-3~D

PACDN042_SOT23-3~D

PACDN042_SOT23-3~D

PACDN042_SOT23-3~D

9/11 Delete ANA_MIC_DET

INTMIC_DET#<34>

MIC_IN_L

MIC_IN_R

2

3

D58

OPP@ D58

OPP@

1

MIC_EXT_R

MIC_EXT_L

2

3

D63

@D63

@

1

MIC_I

N_L<34>

N_R<34>

MIC_I

+3VS

61

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

@

@

Q88A

Q88A

12

R1106 10K_0402_5%OPP@ R1106 10K_0402_5%OPP@

2

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Audio/B & CIR

JP49

MIC_EXT_R<34>
MIC_EXT_L<34>

HP_OUT_R<34>
HP_OUT_L<34>

EXTMIC_DET#<34>
HP_DET#<34>

CIR_IN<36,39>

MIC_EXT_R
MIC_EXT_L

HP_OUT_R
HP_OUT_L

EXTMIC_DET#
HP_DET#

+5VL

CIR_IN

JP49

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

ACES_87213-1400G

ACES_87213-1400G

CONN@

CONN@

_CODEC

INTMIC IN

@

@

R1103

R1103
1

1

0K_0402_5%

0K_0402_5%

1 2

JP5

JP5

1

1

1

1

2

2

3

3

4

4

5

GND1

6

@

@
3

Q88B

Q88B

5

4

15

G1

16

G2

A

A

CONN@

CONN@

2

3

1

GND2

C

C

ES_88231-04001

ES_88231-04001

OPP@

OPP@

D62

D62

PACDN042_SOT23-3~D

PACDN042_SOT23-3~D

https://t.me/schematicslaptop
https://t.me/biosarchive

3 3

4 4

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

A

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

AMP & Audio Jack

AMP & Audio Jack

AMP & Audio Jack

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

E

1.0

1.0

1.0

of

of

of

35 55Monday, November 09, 2009

35 55Monday, November 09, 2009

35 55Monday, November 09, 2009

DOCK_PWR_ON Spec
0V = Notebook S4/S5, Dock
off

2.5V = Notebook S3, Dock on
4V = Notebook S0, Dock on

+5VS

+3VALW

PA@

PA@

R1111 1K_0402_5%

R1111 1K_0402_5%

1 2

R1112 1K_0402_5%

R1112 1K_0402_5%

1 2

PA@

PA@

SYSON#<41,47>

Q89

PA@

Q89

PA@

2N7002_SOT23-3

2N7002_SOT23-3

2

G

G

Dock
PRESENT

CONA#<39>

R1116

DOCK_PRESENT

R1116

1 2

22_0402_5%

22_0402_5%

PA@

PA@

13

D

D

S

S

12

12

PA@

PA@

R1113

R1113
10K_0402_5%

10K_0402_5%

R1117

R1117
2K_0402_5%

2K_0402_5%

PA@

PA@

PA@

PA@

D45

D45

2

3

DAN202U_SC70

DAN202U_SC70

+3VL

2

G

G

1

R1115

R1115
10K_0402_5%

10K_0402_5%

1 2

13

D

D

PA@

PA@

Q90

Q90
2N7002_SOT23-3

2N7002_SOT23-3

S

S

DOCK_PWRON

Atlas/ Saturn Dock

RED<20>
GREEN<20>
BLUE<20>
D_DDCDATA<20>
D_DDCCLK<20>
D_HSYNC<20>
D_VSYNC<20>

USB20_N3<14>

USB20_P3<14>

RJ45_MIDI3-<32>
RJ45_MIDI3+<32>
RJ45_MIDI2-<32>
RJ45_MIDI2+<32>
RJ45_MIDI1-<32>
RJ45_MIDI1+<32>
RJ45_MIDI0-<32>
RJ45_MIDI0+<32>

PJP903

PJP903

B+

21

PAD-OPEN 2x2m

PAD-OPEN 2x2m

MIC_Dock

DOCK_MIC_R<3 4>

DOCK_MIC_L<34>

RED
GREEN
BLUE
D_DDCDATA
D_DDCCLK
D_HSYNC
D_VSYNC
USB20_N3
USB20_P3

RJ45_MIDI3­RJ45_MIDI3+
RJ45_MIDI2­RJ45_MIDI2+
RJ45_MIDI1­RJ45_MIDI1+
RJ45_MIDI0­RJ45_MIDI0+

+V_BATTERY

PA@

PA@

PA@

PA@

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

JDOCK1

JDOCK1

38

CRT_Red

40

CRT_Green

34

CRT_Blue

36

DDC_DATA

30

DDC_Clock

32

Hsync

26

Vsync

28

USB-

22

USB+

24

Digital gnd

18

MDI3-

20

MDI3+

14

MD2I-

16

MDI2+

10

MDI1-

12

MDI1+

6

MDI0-

8

MDI0+

2

Battery out

4

Battery out

45

GND

46

GND

FOX_QL1122L-H212AR-7F

FOX_QL1122L-H212AR-7F

CONN@

CONN@

Need 600 Ohm 500 mA

L64

L64
FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

1 2

1 2

L65

L65

C1347

C1347

220P_0402_50V7K

220P_0402_50V7K

PA@

PA@

+3VS

GNDA GNDA

Audio Output gnd

Right headphone

DOCK_MIC_R_C

DOCK_MIC_L_C

1

1

C1348

C1348
220P_0402_50V7K

220P_0402_50V7K

2

2

PA@

PA@

Digital gnd

TV Luma

TV chroma

TV composite

TV ground

CIR input

PWR_ON

Mute_LED

Sleep Botton

Jack Detect

VOL_up

VOL_down

SPDIF

Left headphone

Mic_Right

Mic_Left

Mic gnd

Dock_present

GND
GND
GND
GND

39
37

11/07 Delete TVout function from

35

Docking

33

VGA_GND

31

CIR_IN

29

DOCK_PWRON

27

D_MUTE_LED

25

D_DOCK_SLP_BTN#

23

JACK_DET#

21

R_VOL_UP#

19

R_VOL_DWN#

17

SPDIFO_L

15

AUDIO_OGND

13

DOCK_LOUT_C_R

11

DOCK_LOUT_C_L

9

DOCK_MIC_R_C

7

DOCK_MIC_L_C

5

AUDIO_IGND

3

DOCK_PRESENT

1

41
42
43
44

+DOCKVIN

CIR_IN <35,39>

R1107 33_0402_5%PA@R1107 33_0402_5%PA@

1 2

R1108 33_0402_5%PA@R1108 33_0402_5%PA@

1 2

R1109 200_0402_5%

R1109 200_0402_5%

1 2

R1110 200_0402_5%

R1110 200_0402_5%

1 2

GNDA

DOCK_LOUT_C_R <34>
DOCK_LOUT_C_L <34>

GNDA

R1114 2K_0402_5%@R1114 2K_0402_5%@

1 2

C1340

C1340

C1341

C1341

11/17 Reserve

1

C1345

C1345

2

PA@

PA@

PA@

PA@
PA@

PA@

1000P_0402_50V7K

1000P_0402_50V7K

1 2

1 2

https://t.me/schematicslaptop
https://t.me/biosarchive

MUTE_LED <39>

DOCK_SLP_BTN# <39>

JACK_DET# <34>

DOCK_VOL_UP# <39>
DOCK_VOL_DWN# < 39>

+DOCKVIN

1000P_0402_50V7K@

1000P_0402_50V7K@

1000P_0402_50V7K@

1000P_0402_50V7K@

GNDA

1

C1346

C1346

2

PA@

PA@

1000P_0402_50V7K

1000P_0402_50V7K

PA@

PA@

11/17 Recommend

1

2

1

C1343

C1343

2

0.01U_0402_16V7K

0.01U_0402_16V7K

GNDA GNDA

PA@

PA@

C1342

C1342
1000P_0402_50V7K

1000P_0402_50V7K

DOCK_LOUT_C_RR_VOL_UP#
DOCK_LOUT_C_LR_VOL_DWN#

1

C1344

C1344

2

PA@

PA@

0.01U_0402_16V7K

0.01U_0402_16V7K

https://t.me/schematicslaptop
https://t.me/biosarchive

DOCK_MIC_L_C

PA@

PA@

R1122

R1122

1 2

10K_0402_5%

10K_0402_5%

R1123

PA@ R1123

PA@

47K_0402_5%

47K_0402_5%

13

D

D

Q91

Q91
2N7002_SOT23-3

2N7002_SOT23-3

S

S

PA@

PA@

SENSE_B# <34>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PA@

PA@

R1118

PA@

PA@

R1119

R1119

10K_0402_5%

10K_0402_5%

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

1 2

1 2

Q94

PA@

Q94

PA@

C

C

2

B

B

E

E

2

3 1

C1350

C1350

1

1U_0603_10V6K

1U_0603_10V6K

PA@

PA@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R1118
10K_0402_5%

10K_0402_5%

1 2

C

C

2

B

B

E

E

3 1

Q92

Q92
MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

2

G

G

PA@

PA@

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2007/08/28 2006/03/10

2009 7/1 Delete Q93, R1120

R1124

SPDIFO_L

R1124

1 2

0_0603_5%

0_0603_5%

PA@

PA@

220P_0402_25V8J

220P_0402_25V8J

R1121

C1349

C1349

PA@

PA@

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

12

1

R1125

C1351

C1351

PA@

PA@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

R1125
110_0402_5%

110_0402_5%

2

PA@

PA@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DOCK CONN.

DOCK CONN.

DOCK CONN.

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

R1121

1 2

220_0402_5%

220_0402_5%

PA@

PA@

SPDIF_OUT <34>

36 55Monday, November 09, 2009

36 55Monday, November 09, 2009

36 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

5

4

3

2

1

Left si

+5VAL

W

D D

1

2

C1352

C1352

.7U_0805_10V4Z

.7U_0805_10V4Z
4

4

Finger printer

Change Finger printer from USB port7 to USB port 11

C C

USB20_N11<14>
USB20_P11<14>

B B

USB cable connector for Right side

USB_EN#<39>

USB20_N2<14>
USB20_P2<14>

USB20_N1<14>
USB20_P1<14>

de USB Power Switch

U55

U55

USB_E

N#

PA@ R1128

PA@

PA@ R1129

PA@

+5VALW

1
2
3
4

R1128

1 2
1 2

R1129

PACDN042_SOT23-3~D

PACDN042_SOT23-3~D

USB_EN#

GND

N

I
I

N

EN#

G54

G54

7F2P81U MSOP 8P

7F2P81U MSOP 8P

8

OUT

7

OUT

6

OUT

5

OC#

0_0402_5%

0_0402_5%
0_0402_5%

0_0402_5%

D46

@D46

@

JP55

JP55

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND1

12

GND2

ACES_87213-1000G

ACES_87213-1000G

CONN@

CONN@

PA@ C1356

PA@

2

3

1

+USB_

W

=100mils

1

1

+

+

C1354

C1354

C1353

C1353

2

150U_B_6.3VM_R40M

150U_B_6.3VM_R40M

R1126 10K _0402_5%R1126 1 0K_0402_5%

1 2

1

C1356

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

USB20_N11_R
USB20_P11_R

R1130

@R1130

@

1 2

0_0402_5%

0_0402_5%

1

C1355

C1355

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

000P_0402_50V7K

000P_0402_50V7K
1

1

VCCC

R1127

PA@R1127

PA@

1 2

1
2
3
4
5
6
7
8

+5VALW

0_0603_5%

0_0603_5%

JP24

JP24

1
2
3
4
5
6
GND
GND

ACES_85201-06051

ACES_85201-06051

CONN@

CONN@

+3VS

+USB_

VCCC

USB20

R47

R47

9 0

9 0

USB20

_N0<14>

USB20

_P0<14>

SATA_TXP4<11>
SATA_TXN4<11>

SATA_RXN4_C<11>
SATA_RXP4_C<11>

WCM

WCM

-2012-900T_0805

-2012-900T_0805

1

1

USB20_N0 USB20_N0_R

4

4

L66

L66

@

@

D20

D20

+5VALW

USB20_N0_R

4

3

VIN

IO2

PJLCR05

PJLCR05

BT Connector

Change Bluetooth from USB port 6 to USB port 12

JP57

JP57

10

8

GND

7
6
5
4
3
2

9

1

GND

ACES_87213-0800G

ACES_87213-0800G

CONN@

CONN@

+3VS

BT_OFF<14>

8
7
6
5

USB20_N12_R

4

USB20_P12_R

3
2
1

R491

R491

1 2

0_0603_5%

0_0603_5%

R494 10K_0402_5%

R494 10K_0402_5%

1 2

R48

R48

0 0

0 0

1 2

PA@

PA@

C602 0.01U_0402_16V7K

C602 0.01U_0402_16V7K
C603 0.01U_0402_16V7K

C603 0.01U_0402_16V7K

PA@

PA@

2

2

3

3

USB20_P0_R

2

IO1

1

GND

(SoftBreeze)

R488 0_0402_5%R488 0_0402_5%
R487 0_0402_5%R487 0_0402_5%

1

C605

C605

2

1U_0603_10V4Z

1U_0603_10V4Z

1 2

_

_

0402_5%

0402_5%

_

_

0402_5%

0402_5%

12
12

USB20_P0_RUSB20_P0

12
12

+5VALW

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

S

S

12

@

@

R493

R493
100K_0402_5%

100K_0402_5%

USB20_N12_R

G

G

_N0_R

USB20

_P0_R

SATA_TXP4
SATA_TXN4

SATA_RXN4
SATA_RXP4

+5VALW

SATA_TXN4

Need change to New version

+3VAUX_BT

D23

D23

4

VIN

3

GND

IO2

PRT

PRT

R5V0U2X_SOT143-4

R5V0U2X_SOT143-4

Q20

Q20

D

D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

13

2

1

C606

C606

2

0.01U_0402_16V7K

0.01U_0402_16V7K

C609 0.1U_0402_16V4ZC 609 0.1U_0402_16V4Z

1 2

3

3

JP5

JP5

1

VBU

2

D

-

3

+

D

4

GND

5

GND

6

A+

7

A-

8

GND

9

B-

10

B+

11

GND

12

GND

13

GND

14

GND

15

GND

T

T

CO_1759576-1

CO_1759576-1

Y

Y

CONN@

CONN@

D21

D21

4

VIN

3

IO2

PJLCR05

PJLCR05

PA@

PA@

BT_LED <40>
USB20_N12 <14>
USB20_P12 <14>

2

IO1

1

ESD request

1

C607

C607

2

U

U

SB

SB

S

ESATA

ESATA

2

IO1

1

GND

ESD request

USB20_P12_R

+3VAUX_BT

1

C608

C608

2

4.

4.

7U_0805_10V4Z

7U_0805_10V4Z

SATA_TXP4

Left\ side ESATA/USB combination Connector

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

USB, BT, eSATA

USB, BT, eSATA

USB, BT, eSATA

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

37 55Monday, November 09, 2009

37 55Monday, November 09, 2009

37 55Monday, November 09, 2009

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

SPI ROM => 256K (EC code)

+3VL

20mils

1

C610

C610

0.1U_0402_16V4Z

0.1U_0402_16V4Z

FSEL#<39>

SPI_CLK<39>

C C

2

1 2

R495 0_0402_5%

R495 0_0402_5%

1 2

R496 0_0402_5%

R496 0_0402_5%

1 2

R497 0_0402_5%

R497 0_0402_5%

SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH
WIESO_G6179-100000_8P

SA00003GK00 S IC FL 2M MX25L2005CMI-12G SOP 8P (MXIC)

*

SA00003GM00 S IC FL 2M W25X20AVSNIG SOIC 8P (WINBOND)

SPI_FSEL#

SPI_CLK_R




U25

CONN@U25

CONN@

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

D

WIESON G6179 8P SPI

WIESON G6179 8P SPI

4

SPI_SOSPI_FWR#

2

Q

1 2

R498 33_0402_5%

R498 33_0402_5%

U25

U25

MX25L2005CMI-12G SOP 8P

MX25L2005CMI-12G SOP 8P

FRD#

SPI_CLK_R

FRD# <39>FWR#<39>

R233

@ R233

@

1 2

33_0402_5%

33_0402_5%

C391

@ C391

@

1 2

22P_0402_50V8J

22P_0402_50V8J

SPI ROM on PCH => 4M (ME code + System BIOS)

C773

C773

SPI_WP#

SPI_HOLD#

+3VS

1

2

U31

CONN@U31

CONN@

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

D

WIESON G6179 8P SPI

WIESON G6179 8P SPI

U31

U31

4

32M AT25DF321-SU SOIC 8P

32M AT25DF321-SU SOIC 8P

R662

R662

2

Q

1 2

15_0402_5%

15_0402_5%

SPI_SO_RSPI_SO_L

SPI_SO_R <11>

+3VS

R661

R661

15_0402_5%

15_0402_5%



+3VS

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R660

@ R660

@

1K_0402_5%

1K_0402_5%

1 2

1 2

SPI_SI<11>

PA/OPP

SPI_WP#

3.3K_0402_5%

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

SPI_SB_CS#

1 2

SPI_CLK_PCH

SPI_SI

SA000031Q00 S IC FL 32M AT25DF321-SU SOIC 8P

R658

R658

R659

R659

SPI_SB_CS#<11>

B B

SPI_CLK_PCH<11>

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

BIOS ROM

BIOS ROM

BIOS ROM

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

38 55Monday, November 09, 2009

38 55Monday, November 09, 2009

38 55Monday, November 09, 2009

1

1.0

1.0

1.0

of

of

of

+3VL_

EC

0

0

1U_0402_16V4Z

1U_0402_16V4Z

.

3

VCC

3V+/-5%

.

Ra 100K+/-5%

Board ID Rb V

Blade

UMA

0 0V 0V 0V

SG 10/26 Add R1265 for ATE test jig

Blade

Bee

UMA

Bee DIS

8.2K+/-5%

18K+/-5%

33K+/-5%

min

AD_BI

0.216V

0.436V

V

AD_BI

D

0.250V

0.503V

0.712V 0.819V

t

V

AD_BI

max

D

yp

D

0.289V

0.538V

0.875V

1

3

3

C61

C61

2

0

0

1U_0402_16V4Z

1U_0402_16V4Z

.

.

SMB_E

C_DA1

SMB_E

C_CK1

.

1

C61

C61

2

https://t.me/schematicslaptop
https://t.me/biosarchive

+3VL_EC

SYSON

R521

R521

8.2K_0402_5%

8.2K_0402_5%

1 2

Ra

Rb

PCI_PME#<14>

WL_BLUE_BTN<40>

EC_PME# PCI_RST#

1

C645

C645

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

EMI solution

LAN_POWER_OFF<32>

SUSP#

12

R522

R522

8.2K_0402_5%

8.2K_0402_5%

+3VL_EC

12

Board ID pin change to Pin75

00K_0402_5%

00K_0402_5%
1

1

R1239

R1239

Board_ID

12

12

R1240

R1240

R1264

R1264

.2K_0402_5%

.2K_0402_5%
8

8

PA@

PA@

OPP@

OPP@

DOCK_SLP_BTN#<36>

CLK_PCI_EC<14>

1 2

R517 4 7K_0402_5% R517 47K_0402_5%

C630 0.1U_0402_16V4ZC630 0.1U_040 2_16V4Z

3K_0402_5%

3K_0402_5%
3

3

R533

@R533

@

1 2

R1132

R1132

1 2

1

C646

C646

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

EC DEBUG port

1 2

0_

0_

ESB_CLK<40>

ESB_DAT<40>

12

PCI_RST#

12

R523

R523
100K_0402_5%

100K_0402_5%

PA@

PA@

R595

R595

R543

R543

0402_5%

0402_5%

C623

@C623

@

1 2

15P_0402_50V8J

15P_0402_50V8J

+3VALW

12

+3VL_EC

@R531

@

10K_0402_5%

10K_0402_5%

1 2

EC_PME#

0_0402_5%

0_0402_5%

EC_PME#

0_0402_5%OPP@

0_0402_5%OPP@

ON/OFFBTN#<40>

+3VL_EC

1 2

0_0402_5%

0_0402_5%

LAN_POWER_OFF_R

4.7K_0402_5%

4.7K_0402_5%

12

PA@

PA@

R1253

R1253

R516

@R516

@

1 2

33_0402_5%

33_0402_5%

+3VS

+3VALW

12

R532

R532
10K_0402_5%

10K_0402_5%

1 2

HDA_RST#_CODEC<11,34>

12

R525

R525
10K_0402_5%

10K_0402_5%

TP_BTN#

WWAN_POW ER_OFF<31>

3

2

12

J4

JOPENJ4JOPEN

2009.08.17 R526 PU change the
connection from +3VL to +3VALW

R526

R526
10K_0402_5%

10K_0402_5%

LID_SW#

R531

R538 4.7K_0402_5%R 538 4.7K_0402_5%

ON/OFFBTN#

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

9/11 Cap. sensor board change to +3VL

+3VL_EC+3VL_EC

4.7K_0402_5%

4.7K_0402_5%

1 2

PA@

PA@

R1254

R1254

+3VS +3VS

@

@

R544

R544

0

0

1

4

4

5

5

C61

C61

2

1

1

00P_0402_50V7K

00P_0402_50V7K

0

0

2 2

2 2

R51

R51

1 2

3 2

3 2

R51

R51

1 2

LPC_FRAME#<11,31>

EC_SCI#<14>

TP_BTN#<40>

CONA#<36>

SMB_EC_CK1<40,42>
SMB_EC_DA1<40,42>
SMB_EC_CK2<12>
SMB_EC_DA2<12>

EC_ACIN<13,26>

EC_UTX<31>

EC_URX<31>

C647

C647
15P_0402_50V8J

15P_0402_50V8J

1 2

Y6

Y6

4

OSC

NC

1

OSC

NC

1 2

C649

C649
15P_0402_50V8J

15P_0402_50V8J

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

12

@

@

R545

R545

PA@

PA@

1 2

R546 0_0402_5%

R546 0_0402_5%
R547 0_0402_5%

R547 0_0402_5%

PA@

PA@

1U_0402_16V4Z

1U_0402_16V4Z

.

.

1

C61

C61

2

2K_0402_5%

2K_0402_5%

.

.
2K_0402_5%

2K_0402_5%

.

.

GATEA20<14>
KB_RST#<14>
SIRQ<11>

LPC_AD3<11,31>
LPC_AD2<11,31>
LPC_AD1<11,31>
LPC_AD0<11,31>

PCI_RST#<14>

SLP_S3#<13>
SLP_S5#<13>
EC_SMI#<14>
LID_SW#<40>

EC_ACIN

WWAN_POW ER_OFF
EC_UTX
EC_URX

DIM_LED<41>

NUM_LED#<40 >

1 2
1 2

6

6

TP_BTN#

12

@

@

R539

R539
20M_0402_5%

20M_0402_5%

1

1

00P_0402_50V7K

00P_0402_50V7K

0

0

1

7

7

C61

C61

2

+3VL_

GATEA
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC
PCI_RST#
ECRST#

1 2

R518

R518

0_0402_5%

0_0402_5%

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

CONA#

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2

SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK_R
ESB_DAT_R
EC_PME#

ON/OFFBTN#

DIM_LED

NUM_LED#

CRY2

CRY1

+3V

EC

20

L

R51

R51

1 2

1
2
3
4
5
7
8

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

+EC_AVCC

1

C652
10P_0402_50V8J

10P_0402_50V8J

2

ESB_CLK_R
ESB_DAT_R

1

1

U27

U27

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

@C652

@

+3VL_

_

_

0805_5%

0805_5%

0

0

LPC & MISC

LPC & MISC

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

+3VL_EC

12

L26

L26
0_0603_5%

0_0603_5%

1 2

C650 0.1U_0402_16V4Z

C650 0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_A

EC

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

AD Input

AD Input

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GPIO

GPIO

GND

GND

GND

GND

GND

11

24

35

94

113

Issued Date

Issued Date

Issued Date

VCC

67

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

GPI

AGND

26QFD3_LQFP128_14X14

26QFD3_LQFP128_14X14

KB9

KB9

69

ECAGND

L27

L27

1 2

0_0603_5%

0_0603_5%

DOCK_

VOL_UP#

R1223 1

R1223 1

DOCK_

VOL_DWN#

+3V

21
23
26
27

63
64
65

66
75

SUS_PWR_DN_AC K

76

9/11 Pin 76 change to SUS_PWR_DN_ACK

68
70
71

72

83
84

85
86
87
88

97

DOCK_VOL_UP#

98

DOCK_VOL_DWN#

99
109

119

120

126
128

SPICS#

73

PCH_TEMP_ALERT#

74
89

90
91

92
93

95

121

127

100

R535

R535

101

102

103

104

105

106
107

GPXO10

108

GPXO11

110

112

114

GPXID3

115

GPXID4

116

GPXID5

117

GPXID6

118

GPXID7

124

V18R

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

For C
Revision

1

2

C651 100P_0402_50V8JC651 100P_0402_50V8J

1 2

R1224 1

R1224 1

1 2

L

12

R1265

R1265

00K_0402_5%

00K_0402_5%

1

1

R1204 2

R1204 2

1 2

FAN_PWM
ME_EN
ACOFF

BATT_TEMP
BATT_OVP
ADP_I
ADP_ID
Board_ID

DAC_BRIG
VCTRL
IREF
AC_SET

EC_MUTE#
USB_EN#
I2C_INT#
MUTE_LED
TP_CLK
TP_DATA

R524 0_0402_5%R524 0_0402_5%

R527 33_0402_5%

R527 33_0402_5%

1 2

R528 33_0402_5%

R528 33_0402_5%

1 2

R529 33_0402_5%

R529 33_0402_5%

1 2

R530 10K_0402_5%R530 10K_0402_5%

CIR_IN

FSTCHG
STD_ADP
CAPS_LED#
BAT_LED#
ON/OFFBTN_LED#
SYSON
VR_ON
AC_IN

EC_RSMRST#

EC_ON
WL_BLUE_LED#
PM_PWROK_R
BKOFF#_R
M_PWROK
TP_LED#

SLP_S4#
ENBKL
EAPD_CODEC
LAN_POWER_OFF_R
SUSP#
PWRBTN_OUT#
NMI_DBG#

R534 10K_0402_5%

R534 10K_0402_5%

1 2

0_0402_5%

0_0402_5%

R1222 22_0402_5%R1222 22_0402_5%

C648

C648

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

NMI_DBG# PCI_SERR#

AC_IN ACIN

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0K_0402_5%

0K_0402_5%

0K_0402_5%

0K_0402_5%

ATE_T

EST <41>

2_0402_5%@

2_0402_5%@

FAN_PWM <6>
ME_EN <11>
ACOFF <43>

C624

C624

1 2

BATT_TEMP <4 2>
BATT_OVP <42>
ADP_I <43>
ADP_ID <42>

SUS_PWR_DN_AC K <13>

DAC_BRIG <21>

VCTRL <43>
IREF <43>
AC_SET <43>

EC_MUTE# <34,35>

USB_EN# <37>
I2C_INT# <40>
MUTE_LED <36>

1 2

DOCK_VOL_UP# <36>
DOCK_VOL_DWN# <36>

1 2

CIR_IN <35,36>

PCH_TEMP_ALERT# <14>

FSTCHG <43>

STD_ADP <43>

CAPS_LED# <40>

BAT_LED# <40>

ON/OFFBTN_LED# <40>
SYSON <31,40,41,45>

VR_ON <49>

12

EC_RSMRST# <13>

EC_LID_OUT# <12>

EC_ON <44>

WL_BLUE_LED# <40>

1 2

M_PWROK <13>
TP_LED# <40>

SLP_S4# <13>

ENBKL <22>
EAPD_CODEC <34>

SUSP# <31,34,41,43,46,47,48,51>

PWRBTN_OUT# <13>

+3VL_EC

12

R540

R540

10K_0402_5%

10K_0402_5%

D25

D25

+3VL_EC

RB751V_SOD323

RB751V_SOD323

12

R541

R541
150K_0402_5%

150K_0402_5%

D26

D26

2 1

RB751V_SOD323

RB751V_SOD323

+3V

S

9/11 Pin26 change to ME_EN

INV_PWM <22>

01U_0402_16V7K

01U_0402_16V7K

0.

0.

ECAGND

PV check BOM structure

R519 4.7K_0402_5%R 519 4.7K_0402_5%
R520 4.7K_0402_5%R 520 4.7K_0402_5%

FRD#
FWR#
SPI_CLK
FSEL#

BKOFF#

PV PWROK sequence issue

21

I2C_INT#

1 2
1 2

TP_CLK <40>
TP_DATA <4 0>

11/09 don't stuff when use C0

+5VL

R536 100_0 402_5%

R536 100_0 402_5%

1 2

AC_LED# <42>

FRD# <38>
FWR# <38>
SPI_CLK <38>
FSEL# <38>

BKOFF# <21>

ADP_ID

2 1

PCI_SERR# <14>

ACIN <43>

D24

D24

RB751V_SOD323

RB751V_SOD323

C61

C61

2

2

OVP

+3VL_EC

12

R1169

R1169
1

1

0K_0402_5%

0K_0402_5%

+5V_TP

PM_PWROK <13>

BATT_

For E

KSO15

C61

C61

8 1

8 1

KSO10

9 1

9 1

C61

C61

KSO11

0 1

0 1

C62

C62

KSO14

C62

C62

1 1

1 1

KSO13

C622 100P_0402_50V8J@C622 100P_0402_ 50V8J@

KSO12

C625 100P_0402_50V8J@C625 100P_0402_ 50V8J@

KSO3

C626 100P_0402_50V8J@C626 100P_0402_ 50V8J@

KSO6

C627 100P_0402_50V8J@C627 100P_0402_ 50V8J@

KSO8

C628 100P_0402_50V8J@C628 100P_0402_ 50V8J@

KSO7

C629 100P_0402_50V8J@C629 100P_0402_ 50V8J@

KSO4

C631 100P_0402_50V8J@C631 100P_0402_ 50V8J@

KSO2

C632 100P_0402_50V8J@C632 100P_0402_ 50V8J@

KSI0

C633 100P_0402_50V8J@C633 100P_0402_ 50V8J@

KSO1

C634 100P_0402_50V8J@C634 100P_0402_ 50V8J@

KSO5

C635 100P_0402_50V8J@C635 100P_0402_ 50V8J@

KSI3

C636 100P_0402_50V8J@C636 100P_0402_ 50V8J@

KSI2

C637 100P_0402_50V8J@C637 100P_0402_ 50V8J@

KSO0

C638 100P_0402_50V8J@C638 100P_0402_ 50V8J@

KSI5

C639 100P_0402_50V8J@C639 100P_0402_ 50V8J@

KSI4

C640 100P_0402_50V8J@C640 100P_0402_ 50V8J@

KSO9

C641 100P_0402_50V8J@C641 100P_0402_ 50V8J@

KSI6

C642 100P_0402_50V8J@C642 100P_0402_ 50V8J@

KSI7

C643 100P_0402_50V8J@C643 100P_0402_ 50V8J@

KSI1

C644 100P_0402_50V8J@C644 100P_0402_ 50V8J@

KSO2

R1219 47K_0402_5%

R1219 47K_0402_5%

KSO1

1 2

R1220 47K_0402_5%

R1220 47K_0402_5%

1 2

ENBKL

@R741

@

14" INT_KBD

0

0

0P_0402_50V8J

0P_0402_50V8J

1

1

MI

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

R741

12

0

0

0P_0402_50V8J@

0P_0402_50V8J@

0P_0402_50V8J@

0P_0402_50V8J@

0

0

0P_0402_50V8J@

0P_0402_50V8J@

0

0

0

0

0P_0402_50V8J@

0P_0402_50V8J@

12

10K_0402_5%

10K_0402_5%

+3VL_EC

CONN.( TYPE "D"
KB)

+3VL_EC

ACES_85201-2405

ACES_85201-2405

Compal Electronics, Inc.

Compal Electronics, Inc.

i

Title

Title

T

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

tle

EC KB926/KB Conn.

EC KB926/KB Conn.

EC KB926/KB Conn.

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2

KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

JP19

CONN@JP19

CONN@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

G125G2

26

of

39 55Monday, November 09, 2009

of

39 55Monday, November 09, 2009

of

39 55Monday, November 09, 2009

1.0

1.0

1.0

A

B

C

D

E

System & Caps-Lock LED

White

R1133

D47

CAPS_LED#<39>

1 1

2 2

2009.10.23 Change R1151 to 300 ohm bead and
add C

ENE

BAT_LED#<39>

SATA_LED#<11>

HDDHALT_LED#<14>

AMBER

ON/OFFBTN_LED#

Capacitor Sensor Conn

1449 for EMI

WL_BLUE_BTN<39>

ON/OFFBTN_LED#<39>

SMB_EC_CK1<39,42>

ESB_CLK<39>
ESB_DAT<39>

I2C_INT#<39>

NUM_LED#<39>

SMB_EC_DA1<39,42>

ON/OFFBTN#<39>

Cypress

ESB_CLK

HT-F196BP5_WHITE

HT-F196BP5_WHITE

HT-F196BP5_WHITE

HT-F196BP5_WHITE

White

HT-F196BP5_WHITE

HT-F196BP5_WHITE

WL_BLUE_LED#

@R1155

@

33_0402_5%

33_0402_5%

SMB_EC_CK1
ESB_CLK
ESB_DAT

SMB_EC_DA1

R1155

D47

D48

D48

D49

D49

White

White

Amber

Amber

QSMF-C16E_AMBER-WH ITE

QSMF-C16E_AMBER-WH ITE

D52

D52

R1133

1 2

21

470_0402_5%

470_0402_5%

White

R1135

R1135

21

1 2

200_0402_5%

200_0402_5%

R1138

R1138
200_0402_5%

200_0402_5%

1 2

21

1 2

43

R1139

R1139
200_0402_5%

200_0402_5%

White

PA@

PA@

R1141

R1141

1 2

21

200_0402_5%

200_0402_5%

R1146 0_ 0402_5%OPP@ R1146 0_0402_5%OPP@
R1147 0_ 0402_5%OPP@ R1147 0_0402_5%OPP@

R1148 0_ 0402_5%OPP@ R1148 0_0402_5%OPP@
R1149 0_ 0402_5%PA@ R1149 0_0402_5%PA@
R1151 0_ 0402_5%PA@ R1151 0_0402_5%PA@
R1152 0_ 0402_5%PA@ R1152 0_0402_5%PA@

R1153 0_ 0402_5%

R1153 0_ 0402_5%

1 2

R1154 0_ 0402_5%OPP@ R1154 0_0402_5%OPP@

1 2

@

@

C1365

C1365

12

12

15P_0402_50V8J

15P_0402_50V8J

+5VS_LED

+5VALW_LED

+5VS_LED

+3VS

+5VALW_LED

1 2
1 2

1 2
1 2
1 2
1 2

15P_0402_50V8J

15P_0402_50V8J

Cap lock

Battery
Charge LED

HDD LED

System
Power LED

Change the Cap sensor board power plan to +3VL

9/11

+5VS_LED +3VS +5VALW_LED

R1142

@ R1142

@

33P_0402_50V8K

33P_0402_50V8K

C1449

C1449

1

1

@

@

C1362

C1362

2

2

reserve +3VL power for cypress Cap. board

12

0_0805_5%

0_0805_5%

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C1366

C1366

2

Switch function LED(test)

HT-F196BP5_WHITE

HT-F196BP5_WHITE

DGPU_PWR_EN<14,23,41,47,51>

@ R1243

@

200_0402_5%

200_0402_5%

@ D60

@

Q110A

@ Q110A

@

2

R1243

D60

+5VS

@ R1246

@

1 2

1 2

21

61

@ D61

@

1 2
3

@ Q110B

@

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

D60, D61 will light when switch to DIS mode

+3VL

12

12

R1143

R1143
0_0805_5%

0_0805_5%

OPP@

OPP@

R1258

0_0805_5%

0_0805_5%

PA@ R1258

PA@

10
11
12

JP59

JP59

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
GND
GND

ACES_85201-1005N

ACES_85201-1005N

CONN@

CONN@

ESB_DAT

R1145

@R1145

@

33_0402_5%

33_0402_5%

@

@

C1358

C1358

12

NUM_LED# I2C_INT#

1

@

@

2

C1360

C1360

15P_0402_50V8J

15P_0402_50V8J

R1246

470_0402_5%

470_0402_5%

D61

LTST-C191TBKT-5A_BLUE_0603~D

LTST-C191TBKT-5A_BLUE_0603~D

Q110B

DGPU_EDIDSEL <20,22>

5

12

15P_0402_50V8J

15P_0402_50V8J

1

2

C1361

C1361

0.1U_0402_16V4Z

0.1U_0402_16V4Z

T/P Board (Inculde T/P_ON/OFF)

TouchPAD ON/OFF LED

+5VS_LED

12

AMBER Whit

R1140

R1140

10K_0402_5%

10K_0402_5%

SYSON<31,39,41,45>

+5VS_LED

12

12

R1136

R1136

200_0402_5%

200_0402_5%

PA PR

D50

D50

PA@

PA@

Amber

Amber

QSMF-C16E_AMBER-WHITE

QSMF-C16E_AMBER-WHITE

2

G

G

Q95

Q95

2N7002_SOT23-3

2N7002_SOT23-3

R1137

R1137
200_0402_5%

200_0402_5%

21

43

13

D

D

S

S

AMBER White

White

White

D51

D51

e

OPP@

OPP@

TP_LED#

On (TP_LED#=L)-> White
Off (TP_LED#=H)-> Amber

21

43

Amber

Amber

QSMF-C16E_AMBER-WH ITE

QSMF-C16E_AMBER-WH ITE

TP_LED# <39>

T/P Board Conn

+5VALW +5V_TP

R1144 0_0603_5%

R1144 0_0603_5%

1 2

S

S

D

D

13

Q96

@

Q96

@R1150

@

10K_0402_5%

10K_0402_5%

SYSON

R1150

2

G

G

12

13

D

D

@

@

2N7002_SOT23-3

2N7002_SOT23-3

S

S

@

G

G

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

2

Q97

Q97

JP23

JP23

5

G1

6

G2

ACES_85201-04051

ACES_85201-04051

CONN@

CONN@

White

White

TP ON/OFF

+5V_TP

12

R1134

@R1134

@

10K_0402_5%

1

2

1

1

@C1364

@

100P_0402_50V8J

100P_0402_50V8J

2

2

10K_0402_5%

2

3

1

C1364

TP_BTN# <39>

D53

D53
PSOT24C_SOT23-3

PSOT24C_SOT23-3

TP_CLK <39>
TP_DATA <39>

SW1

SW1
TJG-533-V-T/R_6P

TJG-533-V-T/R_6P

3

4

5

6

TP_DATA
TP_CLK

+5V_TP

1

C1359

C1359

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

1

TP_CLK

2

2

TP_DATA

3

3

4

4

C1363

@C1363

@

100P_0402_50V8J

100P_0402_50V8J

3 3

Mini card LED

ON/OFF Button Connector

Keyboard backlight
Conn

+5VALW_LED

JP10

JP10

1

ON/OFFBTN#
ON/OFFBTN_LED#

Lid Switch

4 4

Connector

LID_SW#<39>

C1367

C1367

10P_0402_25V8K

10P_0402_25V8K

A

1

2

2

3

5

3

G1

4

6

4

G2

ACES_85201-04051

ACES_85201-04051

CONN@

CONN@

Change the Lid switch power plan to +3VALW

+3VALW

1

1

2

2

C1368

C1368

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JP11

JP11

1

1

2

2

3

3

G1

4

4

G2

ACES_85201-04051

ACES_85201-04051

CONN@

CONN@

5
6

https://t.me/schematicslaptop
https://t.me/biosarchive

+5VS_LED

B

R1157

@R1157

@

1 2

0_0805_5%

0_0805_5%

JP9

JP9

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_85201-04051

ACES_85201-04051

CONN@

CONN@

WL_LED#<31>

WW_LED#<31>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D54 RB751V_SOD323D54 RB751V_SOD323

D55 RB751V_SOD323D55 RB751V_SOD323

D

Q98

Q98

2N7002_SOT23-3

2N7002_SOT23-3

BT_LED<37>

100K_0402_5%

100K_0402_5%

21

21

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

12

R1158

R1158

WL_BLUE_LED#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

KBD, ON/OFF, SW, CIR

KBD, ON/OFF, SW, CIR

KBD, ON/OFF, SW, CIR

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

+3VS

12

R1156

R1156
10K_0402_5%

10K_0402_5%

WL_BLUE_LED# <39>

13

D

D

2

G

G

S

S

1.0

1.0

1.0

of

40 55Monday, November 09, 2009

of

40 55Monday, November 09, 2009

of

40 55Monday, November 09, 2009

E

5

4

3

2

1

+5VAL

W to +5VS Transfer +3VALW to +3VS Transfer

+5VAL

W

SI7

SI7

326DN-T1-E3_PAK1212-8

326DN-T1-E3_PAK1212-8

U28

+

B

D D

12

R58

R58

3

3

C67

C67

5

5

3

3

0K_0402_5%

0K_0402_5%

3

3

SUSP

2

Q10A

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q10A

U28

RUNON

4

12

1

2

1

2

10U_0805_10V4Z

10U_0805_10V4Z

61

+5VS to +5VSDGPU Transfer

C C

+5VS +5VSDGPU

R1201 0_0603_5%R1201 0_0603_5%

1 2

https://t.me/schematicslaptop
https://t.me/biosarchive

Discharge circuit DIM LED

+5VS

12

R588

+3VL

470_0402_5%

470_0402_5%

12

61

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

H6
HOLEAH6HOLEA

1

Q9A

Q9A

2

R588

61

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

9/20 change R590 to 220ohm for Intel check list update.

+3VL

12

R587

R587

100K_0402_5%

100K_0402_5%

3

Q6B

Q6B

5

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

H8

H7

HOLEAH8HOLEA

HOLEAH7HOLEA

1

1

B B

R586

R586

100K_0402_5%

100K_0402_5%

SYSON#<36,47> SUSP <47>

Q6A

H4
HOLEAH4HOLEA

1

Q6A

2

H5
HOLEAH5HOLEA

1

5

A A

H1
HOLEAH1HOLEA

SYSON<31,39,40,45> SUSP# <31,34,39,43,46,47,48,51>

H3

H13

H13

HOLEAH3HOLEA

HOLEC

HOLEC

1

1

1

+5V

1
2
35

R585

R585

470_0402_5%

470_0402_5%

C677

C677
4700P_0402_25V7K

4700P_0402_25V7K

+3VS

R589

R589

470_0402_5%

470_0402_5%

Q9B

Q9B

5

H10

H10

H9

HOLEA

HOLEA

HOLEAH9HOLEA

1

1

S

1

1

C671

C671

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

01/03 Sparate+5VS
and +3VS power
timing

12

220_0402_5%

220_0402_5%

3

SUSPSUSP SUSPSUSP SYSON#SUSP

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

H16

H16

H15

H15

HOLEA

HOLEA

HOLEA

HOLEA

1

+3VAL

+

B

12

1

1

R58

R58

3

3

0K_0402_5%

0K_0402_5%

3

C672

C672

10U_0805_10V4Z

10U_0805_10V4Z

3

SUSP

Q10B

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Q10B

W

SI7

SI7

326DN-T1-E3_PAK1212-8

326DN-T1-E3_PAK1212-8

U29

U29

1

9

9

C66

C66

1

1

U_0805_10V4Z

U_0805_10V4Z

0

0

2

RUNON

3

5

4

_3VS

4

12

1

2

9/20 change the C676 from 0.1u to 0.022u for power sequence.

+1.8VS to +1.8VSDGPU Transfer +1.5V to +1.5VS_NV Transfer

+1.8VS +1.5VSDGPU+1.5V

1

SG@

SG@

C1076

C1076

2

DGPU_PWR_EN#

+1.8VS +1.8VSDGPU +1.5VS +1.5VSDGPU

R1202 0_0603_5%

R1202 0_0603_5%

1 2

DIS@

DIS@

@

@

10U_0805_10V4Z

10U_0805_10V4Z

R916

R916

1 2

1K_0402_5%

1K_0402_5%

SG@

SG@

Q109

Q109

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

S

S

G

G

1

C1078

C1078

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C1454

C1454

+3V

1
2
35

R584

R584
470_0402_5%

470_0402_5%

C676

C676

0.022U_0402_25V7K

0.022U_0402_25V7K

D

D

13

2

1

DGPU_PWR_EN#

1U_0402_6.3V6K

1U_0402_6.3V6K

2

S

1

1

C673

C673

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8VSDGPU

1

SG@

SG@

C1074

C1074

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

G

G

2N7002_SOT23-3

2N7002_SOT23-3

C674

C674

10U_0805_10V4Z

10U_0805_10V4Z

300 mA

12

SG@

SG@

13

D

D

S

S

+1.5V to +1.5VS Transfer

C1432 0.1U_0402_10V6KC143 2 0.1U_0402_10V6K

C1434 0.1U_0402_10V6KC143 4 0.1U_0402_10V6K

C1437 0.1U_0402_10V6KC143 7 0.1U_0402_10V6K

C1438 0.1U_0402_10V6KC143 8 0.1U_0402_10V6K

B+

12

SG@

SG@

R594

R594

470_0402_5%

470_0402_5%

R1272 0_0402_5%SG@ R1272 0_0402_5%SG@

SG@

SG@

Q18

Q18

DGPU_PWR_EN#

SUSP

1 2

1 2

R1274 0_0402_5%@ R1274 0_0402_5%@

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

JP303

JP303

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

1 2

1 2

1 2

1 2

9/20 change the C770 from 0.1u to 0.022u for power sequence.

1

SG@

SG@

R918

R918

2

C1081

C1081

150K_0402_5%

150K_0402_5%

DGPUPWREN

Q17B

Q17B

SG@

SG@

9/20 change R593 to 22ohm for Intel check list update.

470_0402_5%

470_0402_5%

+3VS

G

G

2

H11

H11
HOLEA

HOLEA

1

Q7A

Q7A

1 3
12

12
SG@R925

SG@

2

D

D

1

1

R592

R592

S

S

+1.5V

12

61

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

+5VALW

10/28 Add for ATE test jig.

12

R926

R926
10K_0402_5%

10K_0402_5%

DGPU_PWR_EN#

13

D

D

SG@

SG@

Q86

Q86

2

2N7002_SOT23-3

2N7002_SOT23-3

G

G

S

S

FM2FM2

FM1FM1

1

FM3FM3

FM4FM4

1

12

R593

R593

22_0402_5%

22_0402_5%

3

Q7B

Q7B

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R1203

R1203

470_0402_5%

470_0402_5%

SUSP

2

G

G

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

DGPU_PWR_EN# <28>

3

12

@R1162

@

10K_0402_5%

10K_0402_5%

13

D

D

Q103

Q103
2N7002_SOT23-3

2N7002_SOT23-3

S

S

DIM_LED<39>

Compal Secret Data

Compal Secret Data

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DIM_LED

2

Q8A

Q8A

1

2

R590

R590

+1.5VS

H17

H17
HOLEA

HOLEA

12

61

ATE_TEST<39>

1

R591

R591

470_0402_5%

470_0402_5%

2

G

G

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

DGPU_PWR_EN<14,23,40,47,51>

H19

H19

H18

H18

HOLEC

HOLEC

HOLEA

HOLEA

1

1

4

+VCCP +0.75VS

12

Q112

Q112

13

D

D

2N

2N

7002_SOT23-3

7002_SOT23-3

S

S

Q115

Q115

R1266

R1266

1

1

K_0402_5%

K_0402_5%

R925

100K_0402_5%

100K_0402_5%

H20

H20
HOLEC

HOLEC

1

+1.5V to +1.5VS Transfer

+1.5V +1.5V

B

+

1

C1433

C1433

2

Q8B

Q8B

SUSP

5

1
2
35

4

DGPU_PWR_EN#

SUSP

12

1

2

0.1U_0402_25V4K

0.1U_0402_25V4K

R1244

R1244

1 2

0_0603_5%

0_0603_5%

S

S

D

D

Q99

@

Q99

@

13

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

G

G

2

R1245

R1245

1 2

0_0603_5%

0_0603_5%

S

S

Q101

@

Q101

@

G

G

DIM_LED#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

10U_0805_10V4Z

10U_0805_10V4Z

5

R1162

2

G

G

SG@

SG@

3

4

+5VALW

12

13

D

D

S

S

FDM

FDM

U50

U50

DIM_LED#

@

@

Q100

Q100
2N7002_SOT23-3

2N7002_SOT23-3

12

R1251

R1251

1

1

50K_0402_5%

50K_0402_5%

+1.5VS+1.5V

C8296_POWER33-8-5

C8296_POWER33-8-5

SG@

SG@

C1440

C1440

FDM

FDM

C8296_POWER33-8-5

C8296_POWER33-8-5

U58

10U_0805_10V4Z

10U_0805_10V4Z

RUNON_1.5VS

3

4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

U58

R1216

R1216

0_0402_5%

0_0402_5%

C770

C770

4

12

1

2

0.022U_0402_25V7K

0.022U_0402_25V7K

1
2
35

12

R1270

R1270

750K_0402_5%

750K_0402_5%

1

2

5A

1

2

C1079

C1079

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1273 0_0402_5%SG@ R1273 0_0402_5%SG@

1 2

1 2

R1275 0_0402_5%@ R 1275 0_0402_5%@

R1271

750K_0402_5%

750K_0402_5%

SG@ R1271

SG@

+5VALW_LED

JP304

JP304

PAD-OPEN 2x2m

PAD-OPEN 2x2m

1

C1370

C1370

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+5VS_LED+5VS

D

D

13

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

2

1

C1371

C1371

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DC/DC Interface

DC/DC Interface

DC/DC Interface

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

+3VALW+1.05VS

21

JP305

JP305

PAD-OPEN 2x2m

PAD-OPEN 2x2m

1

SG@

SG@

Q17A

Q17A

SG@

SG@

2

S

1

C1436

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

61

+3VS

C1436

2

10U_0805_10V4Z

10U_0805_10V4Z

R917

R917

470_0402_5%

470_0402_5%

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

1.0

1.0

1.0

of

41 55Monday, November 09, 2009

of

41 55Monday, November 09, 2009

of

41 55Monday, November 09, 2009

C1435

C1435

21

A

B

C

D

https://t.me/schematicslaptop

+3VALW

PQ3

PQ3
TP0610K -T1-E3_SOT23-3

TP0610K -T1-E3_SOT23-3

1 1

1 3

5

5

4

4

3

3

2

2

1

1

PJSOT24 CW_SOT323

PJSOT24 CW_SOT323

1 2

ACES_88 334-057N

ACES_88 334-057N

PJP1

PJP1

2 2

PR8

PR8
2K_0402 _5%

2K_0402 _5%

ADP_SIGNA L

ADPINADP IN

PD1

PD1

2

2

PR9

PR9

1 2

100K_04 02_5%

100K_04 02_5%

1 2

PR3

PR3
10K_040 2_5%

10K_040 2_5%

3

1

+3VL

connect to KBC pin97

AC_LED# <39>

12

PR2

PR2
10K_040 2_5%

10K_040 2_5%

1 2

12

12

PC3

PC3
1000P_0 402_50V7K

1000P_0 402_50V7K

100P_0402_50V8J

100P_0402_50V8J

PC2

PC2

12

PD4

PD4

RLZ3.6B_ LL34

RLZ3.6B_ LL34

PL1

PL1

SMB3025 500YA_2P

SMB3025 500YA_2P

PC4

PC4

PC12

PC12

12

@1000P_ 0402_50V7K

@1000P_ 0402_50V7K

12

PC5

PC5

100P_0402_50V8J

100P_0402_50V8J

ADP_ID <39>

VIN +DOCKVIN

PL2

PL2

SMB3025 500YA_2P

12

1000P_0402_50V7K

1000P_0402_50V7K

SMB3025 500YA_2P

12

BATT

12

+5VALW

PR1

PR1

340K_0402_1%

340K_0402_1%

12

PR4

PR4

499K_0402_1%

499K_0402_1%

12

PC6

PC6

0.01U_0402_25V7K

0.01U_0402_25V7K

12

PR6

PR6

105K_0402_1%

105K_0402_1%

12

PC1

PC1

0.01U_0402_25V7K

0.01U_0402_25V7K

3

2

PU1A

PU1A

LM358AD T_SO8

LM358AD T_SO8

8

P

+

1

0

-

G

4

PR5

PR5

10K_040 2_5%

10K_040 2_5%

https://t.me/biosarchive

12

BATT_OVP <39>

VMB

PJP2

PJP2

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

9

GND

10

GND

SUYIN_200275 MR008GXOLZR

SUYIN_200275 MR008GXOLZR

3 3

PR16

PR16

6.49K_04 02_1%

6.49K_04 02_1%

1 2

12

PR17

PR17
1K_0402 _5%

1K_0402 _5%

4 4

EC_SMD
EC_SMC

12

PR13

PR13

100_040 2_5%

100_040 2_5%

BAT_ID < 43>

+3VL

A

12

PR14

PR14
100_040 2_5%

100_040 2_5%

BATT_TE MP <39>

PJSOT24 CW_SOT323

PJSOT24 CW_SOT323

PD2

PD2

3

1

2

PD3

PD3

3

1

2

PJSOT24 CW_SOT323

PJSOT24 CW_SOT323

SMB_EC_ DA1

SMB_EC_ CK1

PL3

PL3

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

PL4

PL4

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

12

PC8

PC8
1000P_0 402_50V7K

1000P_0 402_50V7K

B

BATT

PH1 under CPU botten side :

12

PC9

PC9

0.01U_04 02_50V4Z

0.01U_04 02_50V4Z

SMB_EC_ DA1 <39,40 >

SMB_EC_ CK1 <39,40 >

0.22U_06 03_10V7K

0.22U_06 03_10V7K

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU thermal protection at 90 +-3 degree C

+5VS

CPU

12

PH1

PH1
10K_TH1 1-3H103FT_060 3_1%

10K_TH1 1-3H103FT_060 3_1%

PR10

PR10

200K_04 02_1%

200K_04 02_1%

1 2

+5VALW

12

12

PC10

PC10

2007/05/ 29 2008/05/ 29

2007/05/ 29 2008/05/ 29

2007/05/ 29 2008/05/ 29

2.37K_04 02_1%

2.37K_04 02_1%

1 2

PR11

PR11

150K_04 02_1%

150K_04 02_1%

PR12

PR12

150K_04 02_1%

150K_04 02_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PR15

PR15

C

12

604K_04 02_1%

604K_04 02_1%

1 2

5

6

12

PC11

PC11
1000P_0 402_50V7K

1000P_0 402_50V7K

PR7

PR7

8

P

+

-

G

4

7

0

PU1B

PU1B

LM358AD T_SO8

LM358AD T_SO8

EN0_TRIP <44>

13

D

D

PQ1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DC Connector/CPU_OTP

DC Connector/CPU_OTP

DC Connector/CPU_OTP

PQ1

G

G

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

S

S

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

D

of

42 55Monday, November 09, 2 009

of

42 55Monday, November 09, 2 009

of

42 55Monday, November 09, 2 009

1.0

1.0

1.0

A

B

C

D

https://t.me/schematicslaptop
https://t.me/biosarchive

VIN

PQ101

1 1

PR101

PR101

7K_0402_5%

7K_0402_5%

4

4

1 2

12

PC101

PC101

7P_0402_50V8J

7P_0402_50V8J
4

4

PR107

PR107
4

4

7K_0402_1%

7K_0402_1%

1 2

2 2

2

61

PQ109A

PQ109A

2

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

PACIN

ACOFF#

13

PQ105

PQ105
DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR111

PR111

3K_0402_1%

3K_0402_1%

1 2

PD101

PD101

1 2

1SS355_SOD323-2

1SS355_SOD323-2

2

PQ101
S

S

I4835BDY-T1-E3_SO8

I4835BDY-T1-E3_SO8

8
7

5

PQ104

PQ104

DTA144EUA_SC70-3

DTA144EUA_SC70-3

1 3

34

5

VCTRL<39>

PACIN_1

PQ109B

PQ109B

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

Charge Detector

VIN

PD104

PD104
1SS355_SOD323-2

1SS355_SOD323-2

PR123

PR123

1 2

1M_0402_5%

3 3

VIN

12

PR131

PR131
1

1

33K_0402_1%

33K_0402_1%

12

PR135

PR135
10K_0603_0.1%

10K_0603_0.1%

1.24VREF

4 4

1M_0402_5%

1 2

VIN_1

12

PR125

PR125

47_1206_5%

47_1206_5%

12

PC125

PC125

0.1U_0603_25V7K

0.1U_0603_25V7K

8

3

P

+

1

O

2

-

G

PU102A

PU102A
LM393DG_SO8

LM393DG_SO8

4

4

1 2

0.1U_0603_16V7K

0.1U_0603_16V7K

+3VL

12

PR129

PR129

10K_0402_1%

10K_0402_1%

STD_ADP <39>

P

1
2
36

12

PC106

PC106

0.1U_0603_16V7K

0.1U_0603_16V7K

PR114

PR114

43.2K_0402_1%

43.2K_0402_1%

PC117

PC117

+3VL

PR128

PR128

2

2

S

S

I4459ADY_SO8

I4459ADY_SO8

1
2
3 6

12

PR106

PR106

200K_0402_5%

200K_0402_5%

12

PR109

PR109
1

1

50K_0402_5%

50K_0402_5%

PR113

PR113

140K_0402_1%

140K_0402_1%

12

12

0K_0402_5%

0K_0402_5%
1

1

CHGEN#

61

PQ112A

PQ112A

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

FSTCHG<39>

4

PQ103

PQ103

AC_SET<39>

12

12

PR115

PR115
100K_0402_1%

100K_0402_1%

FSTCHG#

1 2

PR137

PR137
20K_0402_1%

20K_0402_1%

8
7

5

SUSP#<31,34,39,41,46,47,48, 51>

PC128

PC128

1 2

@180P_0402_50V8J

@180P_0402_50V8J

1U_0603_6.3V6M

1U_0603_6.3V6M

ADP_I<39>

PR104

PR104
0_0402_5%

0_0402_5%

1 2

PC107

PC107

@0.01U_0402_16V7K

@0.01U_0402_16V7K

PR110

PR110
0

0

_0402_5%

_0402_5%

1 2

PC112

PC112

1 2

PR116

PR116

15K_0402_1%

15K_0402_1%

12

PC120

PC120

0.22U_0603_10V7K

0.22U_0603_10V7K

+3VL

12

PR132

PR132

100K_0402_5%

100K_0402_5%

34

PQ112B

PQ112B

5

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

ACDET

12

PR138

PR138

100K_0402_1%

100K_0402_1%

12

BQ24740VREF

+3VL

12

PR118

PR118

10K_0402_5%

10K_0402_5%

1 2

@

@

470P_0402_50V7K

470P_0402_50V7K

ACSET

ACSET

12

PR140

PR140
100K_0402_5%

100K_0402_5%

8

IADSLP

9

AGND

10

VREF

11

VDAC

12

VADJ

13

EXTPWR

14

ISYNSET

PC121

PC121

100P_0402_50V8J

100P_0402_50V8J

PC123

PC123

0.1U_0402_10V7K

0.1U_0402_10V7K

ACDET

7

LPREF

IADAPT

15

IADAPT

12

P

4

PR102

PR102

0

0

.012_2512_1%

.012_2512_1%

1

12

2

PC133

PC133

1U_0603_6.3V6M

1U_0603_6.3V6M

12

PC108

PC108

0.1U_0603_25V7K

0.1U_0603_25V7K

4

6

5

LPMD

ACSET

ACDET

PU101

PU101
BQ24740RHDR_QFN28_5X5

BQ24740RHDR_QFN28_5X5

BAT

SRSET

SRN

17

16

18

BATT

SRN

12

12

PR121

PR121
2

2

1 2

PC102

PC102

2

3

ACP

SRP

20

19

SRP

PR120

PR120

133K_0402_1%

133K_0402_1%

00K_0402_1%

00K_0402_1%

B

+

PL101

PL101
H

H

CB2012KF-121T50_0805

CB2012KF-121T50_0805

1 2

4

3

12

PC109

PC109
@0.1U_0603_25V7K

@0.1U_0603_25V7K

CHGEN#

1

ACN

TP

CHGEN

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

DPMDET

CELLS

21

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

29

28

BST_CHG

27

DH_CHG

26

LX_CHG

25

REGNVADJ

24

DL_CHG

23

22

PQ111

PQ111

IREF <39>

12

PC103

PC103

PC110

PC110
1

1

U_0805_25V6K

U_0805_25V6K

1 2

PD102

PD102

RLS4148_LL34-2

RLS4148_LL34-2

12

PC119

PC119

1U_0603_10V6K

1U_0603_10V6K

1

1

00K_0402_5%

00K_0402_5%

1 2

13

D

D

G

G

S

S

12

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR108

PR108
10_1206_5%

10_1206_5%

1 2

12

PR117

PR117

2

12

PC104

PC104

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC111

PC111

.1U_0402_10V7K

.1U_0402_10V7K

0

0

1 2

AO4468L_SO8

AO4468L_SO8

BQ24740VREF

12

47K_0402_5%

47K_0402_5%
PR119

PR119

PC124

PC124

0.1U_0603_25V7K

0.1U_0603_25V7K

PC105

PC105

PQ110

PQ110

BAT

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PD103

PD103

12

PU104

PU104

VIN_1

NC

NC

12

PC131

PC131

1000P_0402_50V7K

1000P_0402_50V7K
@

@

VIN

12

PR127

PR127

10K_0402_1%

10K_0402_1%

12

3

2

1

T

PR103

PR103

4

4

7K_0402_5%

7K_0402_5%

PC132

PC132

1 2

2

PACIN

1.24VREF

VIN

ACOFF <39>

ACIN <39>

12

1000P_0402_50V7K

1000P_0402_50V7K
@

@

PR105

PR105
10K_0402_5%

10K_0402_5%

13

PQ106

PQ106
D

D

TC115EUA_SC70-3

TC115EUA_SC70-3

12

PC136

PC136

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR124

PR124
1K_0402_5%

1K_0402_5%

1 2

12

PR134

PR134

0K_0402_5%

0K_0402_5%

1

1

PQ102

PQ102
F

F

DS6675BZ_SO8

DS6675BZ_SO8

1
2

1

2

PC114

PC114

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

0.1U_0402_10V7K

0.1U_0402_10V7K

PC127

PC127

3 6

PR112

PR112

0.015_1206_1%

0.015_1206_1%

1 2

PC118

PC118

12

CHG_B

PR126

PR126

100K_0402_1%

100K_0402_1%

12

+

12

PC113

PC113

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

VIN

12

12

PR133

PR133
10K_0603_0.1%

10K_0603_0.1%

22P_0402_50V8J

22P_0402_50V8J

12

PR130

PR130

2.15K_0402_1%

2.15K_0402_1%

1 2

PC129

PC129

12

12

12

470P_0402_50V7K

470P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

PC130

PQ108

PQ108
AO4466L_SO8

AO4466L_SO8

3 6

241

3 6

241

BAT_ID <42>

12

PC122

PC122

0

0

PC130

270P_0402_50V7K

270P_0402_50V7K

PL102

PL102
10U_LF919AS-100M-P3_5.3A_20%

10U_LF919AS-100M-P3_5.3A_20%

1 2

12

PR141

PR141

.7_1206_5%

.7_1206_5%

4

4

PC135

PC135
470P_0603_50V8J

470P_0603_50V8J

1 2

@0.1U_0603_25V7K

@0.1U_0603_25V7K

PC126

PC126

.047U_0402_16V7K

.047U_0402_16V7K

PC134

PC134

4.7U_0805_25V6-K

4.7U_0805_25V6-K

CHG_B+

578

578

12

4

4

3

PR122

PR122
681K_0402_1%

681K_0402_1%

1 2

5

+

6

-

8
7

5

ACOFF#

BATT

12

PC115

PC115

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

8

PU102B

PU102B

P

7

O

G

LM393DG_SO8

LM393DG_SO8

4

PR136

PR136

60.4K_0402_1%

60.4K_0402_1%

1 2

4

REF

5

ANODE

LMV431ACM5X_SOT23-5

LMV431ACM5X_SOT23-5

12

PC116

PC116

RLZ4.3B_LL34

RLZ4.3B_LL34

CATHODE

https://t.me/schematicslaptop
https://t.me/biosarchive

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2007/05/29 2008/05/29

2007/05/29 2008/05/29

2007/05/29 2008/05/29

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Date: Sheet

Date: Sheet

Date: Sheet

Charger

Charger

Charger

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

D

of

43 55Monday, November 09, 2009

of

43 55Monday, November 09, 2009

of

43 55Monday, November 09, 2009

1.0

1.0

1.0

A

B

C

D

E

https://t.me/schematicslaptop
https://t.me/biosarchive

https://t.me/schematicslaptop
https://t.me/biosarchive

2VREF_51125

1 1

PR301

PR301

13.7K_04 02_1%

13.7K_04 02_1%

1 2

PR303

B+

2 2

3 3

4 4

PL301

PL301

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

PC316

PC316

B++

12

PC301

PC301

0.1U_0402_25V6

0.1U_0402_25V6
2200P_0402_50V7K

2200P_0402_50V7K

+3VALWP

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

+3VLP

12

12

PC303

PC303

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL302

PL302

3.3UH_SIQB 74B-4R7PF_5.9A_ 20%

3.3UH_SIQB 74B-4R7PF_5.9A_ 20%

1

+

+

2

PQ305A

PQ305A

12

PC309

PC309

220U_6.3VM_R15

220U_6.3VM_R15

ENTRIP1

ENTRIP1

61

2

PQ301

PQ301

S TR AO49 32 2N SO8

S TR AO49 32 2N SO8

1

D1

2

D1

1S/2D

3

G2

1S/2D

4

1S/2D

S2

5

1 2

100K_04 02_5%

100K_04 02_5%

13

D

D

PQ307

PQ307

2

G

G

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

S

S

8

1G

7
6
5

ENTRIP2

34

PQ305B

PQ305B

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

PR313

PR313

12

100K_04 02_5%

100K_04 02_5%
PR314

PR314

PR315

PR315

@4.7_1206_5%

@4.7_1206_5%

VL

12

PC306

PC306

10U_0805_6.3V6M

10U_0805_6.3V6M

1 2

PC307

PC307

0.1U_040 2_10V7K

0.1U_040 2_10V7K

LX_3V

LG_3V

12

12

PC314

PC314

@680P_0603_50V7K

@680P_0603_50V7K

+5VALW P

+3VALW P

EC_ON <39>

1 2

0_0402_ 5%

0_0402_ 5%

B++

EN0_TRIP<42>

PR307

PR307

PR309

PR309

1 2

1M_0402 _1%

1M_0402 _1%

1 2

1 2

PR303

20K_040 2_1%

20K_040 2_1%

1 2

PR305

PR305

100K_04 02_1%

100K_04 02_1%

1 2

PU301

PU301

25

P PAD

7

VO2

8

BST_3V BST_5V

UG_3V

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR311

PR311

191K_0402_1%

191K_0402_1%

2VREF_51125

PJP302

PJP302

PAD-OPEN 4x4m

PAD-OPEN 4x4m
PJP303

PJP303

PAD-OPEN 4x4m

PAD-OPEN 4x4m

12

1U_0603_16V7

1U_0603_16V7

PC302

PC302

PR302

PR302

30.9K_04 02_1%

30.9K_04 02_1%

1 2

PR304

PR304

20K_040 2_1%

20K_040 2_1%

1 2

113K_04 02_1%

2

17

VFB1

VREG5

ENTRIP1

1 2

1

ENTRIP1

VO1

PGOOD

VBST1

DRVH1

DRVL1

VCLK

18

113K_04 02_1%

LL1

ENTRIP2

6

ENTRIP2

EN0

13

5

4

VFB2

TONSEL

RT8205A GQW

RT8205A GQW

GND

SKIPSEL

15

14

3

VREF

VIN

16

VL

12

PC311

PC311

12

10U_0805_10V6K

B++

(4.5A,180mils ,Via NO.= 9)

+5VALW

(3A,120mils ,Via NO.= 6)

+3VALW

10U_0805_10V6K

PC312

PC312

0.1U_0603_25V7K

0.1U_0603_25V7K

PR306

PR306

24

23

22

21

20

19

2.2_0402 _5%

2.2_0402 _5%

1 2

UG_5V

LX_5V

LG_5V

PR318

PR318

1 2

0_0805_ 5%

0_0805_ 5%

PC304

PC304

2200P_0402_50V7K

2200P_0402_50V7K

PR308

PR308

PC308

PC308

0.1U_040 2_10V7K

0.1U_040 2_10V7K

1 2

+3_5V PWR_OK <13>

VL

+3VLP

B++

12

12

PC305

PC305

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PJP304

PJP304

2 1

PAD-OPEN 2x2m

PAD-OPEN 2x2m

PJP301

PJP301

2 1

PAD-OPEN 2x2m

PAD-OPEN 2x2m

12

12

PC318

PC318

PC317

PC317

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

4.7_1206_5%

4.7_1206_5%

PR316

PR316

12

578

0.1U_0402_25V6

0.1U_0402_25V6

578

PC315

PC315

680P_0603_50V7K

680P_0603_50V7K

PQ302

PQ302

AO4466L _SO8

AO4466L _SO8

3 6

241

PL303

PL303

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

3 6

241

PQ304

PQ304

AO4712L _SO8

AO4712L _SO8

+5VALWP

1

2

12

+

+

PC310

PC310

150U_D_6.3VM

150U_D_6.3VM

PC313

PC313
@22U_08 05_6.3V6M

@22U_08 05_6.3V6M

+5VL

+3VL

Security Class ification

Security Class ification

Security Class ification

2007/05/ 29 2008/05/ 29

2007/05/ 29 2008/05/ 29

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/ 29 2008/05/ 29

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

3.3VALWP/5VALWP

3.3VALWP/5VALWP

3.3VALWP/5VALWP

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

E

of

44 55Monday, November 09, 2 009

of

44 55Monday, November 09, 2 009

of

44 55Monday, November 09, 2 009

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

D D

1.5V_B+

PR404

PR404

SYSON<31,39,40,41>

C C

+5VALW

+5VALW

B B

1 2

PR409

PR409

316_040 2_1%

316_040 2_1%

PC411

PC411

1U_0603 _10V6K

1U_0603 _10V6K

0_0402_ 5%

0_0402_ 5%

+1.5VP

+1.5VP

12

12

PC406

PC406

12

@

@

0.1U_040 2_10V7K

0.1U_040 2_10V7K

1 2

PR408 0_040 2_5%PR408 0 _0402_5%

PR401

PR401

1 2

10.2K_06 03_0.1%

10.2K_06 03_0.1%

10K_060 3_0.1%

10K_060 3_0.1%

PR406

PR406
255K_04 02_1%

255K_04 02_1%

1 2

PR402

PR402

FB_1.5V

12

2

3

4

5

6

PU401

PU401

TON

VOUT

V5FILT

VFB

PGOOD

BST_1.5V

15

1

14

TP

VBST

EN_PSV

DRVH

V5DRV

DRVL

GND7PGND

8

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

TRIP

LL

PR405

PR405

2.2_0402 _5%

2.2_0402 _5%

1 2

UG_1.5V

13

LX_1.5V

12

1 2

11

1

0

LG_1.5V

9

PC409

PC409

0.1U_040 2_10V7K

0.1U_040 2_10V7K

1 2

PR403

PR403

+5VALW

15.4K_04 02_1%

15.4K_04 02_1%

+5VALW

12

PC410

PC410

4.7U_080 5_10V6K

4.7U_080 5_10V6K

PR407

PR407

0_0402_ 5%

0_0402_ 5%

1 2

UG1_1.5V

578

PQ402

PQ402

S TR FDS6 690AS_NL 1N SO 8

S TR FDS6 690AS_NL 1N SO 8

3 5

241

3 6

241

PQ401

PQ401
A

A

ON7408L _DFN8-5

ON7408L _DFN8-5

PL402

PL402

HCB1608 KF-121T30_060 3

HCB1608 KF-121T30_060 3

12

12

PC402

PC402

PC403

PC403

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2.2UH_PC MC063T-2R2MN_ 8A_20%

2.2UH_PC MC063T-2R2MN_ 8A_20%

1 2

12

PR410

PR410
@4.7_120 6_5%

@4.7_120 6_5%

12

PC412

PC412

@680P_0 603_50V7K

@680P_0 603_50V7K

PL401

PL401

.7U_0805 _6.3V6K

.7U_0805 _6.3V6K

4

4

B+

12

12

12

PC408

PC408

PC407

PC407

0.1U_0402_25V6

0.1U_0402_25V6

2200P_0402_50V7K

2200P_0402_50V7K

+1.5VP

1

+

+

PC401

PC405

PC405

PC401

2

1 2

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

PJP401

PJP401

2

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+1.5VP

A A

Security Class ification

Security Class ification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Class ification

2007/05/ 29 2008/05/2 9

2007/05/ 29 2008/05/2 9

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/ 29 2008/05/2 9

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

(8A,320mils ,Via NO.= 16)

+1.5V

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+1.5VP

+1.5VP

+1.5VP

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1.0

1.0

1.0

of

45 55Monday, November 09, 2 009

of

45 55Monday, November 09, 2 009

of

45 55Monday, November 09, 2 009

1

A

B

C

D

https://t.me/schematicslaptop
https://t.me/biosarchive

1 1

B+

PL702

PL702

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

2 2

VCCP_B+

12

PC708

PC708

2200P_0402_50V7K

2200P_0402_50V7K

+6269_V CC

2.2U_060 3_6.3V6K

2.2U_060 3_6.3V6K

12

PC704

PC704

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC711

PC711

1 2

0_0402_ 5%

0_0402_ 5%

12

PC707

PC707

0.1U_0402_25V6

0.1U_0402_25V6

SUSP#<31,34,39,41,43,47,48,51>

12

PC705

PC705

PR713

PR713

12

PR705

PR705

1K_0402 _5%

1K_0402 _5%

PC706

PC706

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

VTTPW RGOOD<6 >

1

12

PR711

PR711

0_0402_ 5%

0_0402_ 5%

1 2

2

3

4

12

PC712

PC712
@0.1U_04 02_10V7K

@0.1U_04 02_10V7K

+VCCP

+3VS

12

PR706

PR706

@1K_040 2_5%

@1K_040 2_5%

17

PU701

PU701

GND

VIN

VCC

ISL6269AC RZ-T_QFN16_4X 4

ISL6269AC RZ-T_QFN16_4X 4

FCCM

EN

COMP5FB6FSET

12

1 2

PR708

PR708

2.2_0603 _5%

2.2_0603 _5%

+5VALW

0_0402_ 5%

0_0402_ 5%

LG

PR709

PR709

12

11

10

9

12

2.2_0603 _5%

2.2_0603 _5%

1 2

1 2

DL_VCCP

SE_VCCP

LX_VCCP

DH_VCCP

BST_VCCP

14

16

PGOOD

13

15

UG

PHASE

BOOT

PVCC

PGND

ISEN

VO

8

7

+VCCP

1 2

PC709

PC709

0.22U_06 03_16V7K

0.22U_06 03_16V7K

PR710

PR710

PC710

PC710

2.2U_060 3_6.3V6K

2.2U_060 3_6.3V6K

1 2

PR704

PR704

6.98K_04 02_1%

6.98K_04 02_1%

1 2

PR707

PR707

0_0603_ 5%

0_0603_ 5%

+6269_V CC

578

PQ701

PQ701
AO4474L _SO8

DH_VCCP1

AO4474L _SO8

3 6

241

PQ702

PQ702

3 5

241

AON6718 L_PSO8

AON6718 L_PSO8

PL701

PL701

0.47UH_F DV0630-R47M-P3 _18A_20%

0.47UH_F DV0630-R47M-P3 _18A_20%

1 2

12

PR712

PR712

4.7_1206 _5%

4.7_1206 _5%

330U_D2 _2V_Y

330U_D2 _2V_Y

PC713

PC713

1 2

680P_06 03_50V7K

680P_06 03_50V7K

PC702

PC702

+VCCP

1

2

1

+

+

+

+

PC703

PC703

2

330U_D2 _2V_Y

330U_D2 _2V_Y

1

+

+

PC701

PC701
330U_D2 _2V_Y

330U_D2 _2V_Y

2

+VCCP

12

PR714

PR714

12

27.4K_0402_1%

PC715

PC715

22P_040 2_50V8J

22P_040 2_50V8J

3 3

VTT_SELECT<9>

VTT_SELECT= Low, 1.1V
VTT_SELECT= High, 1.05V

4 4

1 2

PR701

PR701

35.7K_04 02_1%

35.7K_04 02_1%

27.4K_0402_1%

12

PC716

PC716

6800P_0603_50V7K

6800P_0603_50V7K

FB_VCCP

PR715

PR715

49.9K_0402_1%

49.9K_0402_1%

1 2

12

PR703

PR703

1.96K_04 02_1%

1.96K_04 02_1%

12

12

PR702

PR702

1.58K_04 02_1%

1.58K_04 02_1%

@0.1U_04 02_10V7K

@0.1U_04 02_10V7K

PC714

PC714

0.01U_0402_16V7K

0.01U_0402_16V7K

PC717

PC717

+VCCP

1 2

PR716

PR716
10_0402 _5%

12

10_0402 _5%

1 2

PR717

PR717
0_0402_ 5%

0_0402_ 5%

VTT_SENSE <9>

https://t.me/schematicslaptop

Security Class ification

Security Class ification

https://t.me/biosarchive

A

Security Class ification

2008/09/ 15 2009/09/ 15

2008/09/ 15 2009/09/ 15

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/09/ 15 2009/09/ 15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

1.05V_VCCP

1.05V_VCCP

1.05V_VCCP

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

D

of

46 55Monday, November 09, 2 009

of

46 55Monday, November 09, 2 009

of

46 55Monday, November 09, 2 009

1.0

1.0

1.0

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

+1.5V

PU601

PU601

VIN1VCNTL

D D

W

+3VAL

PR614

PR614

12

1

1

0K_0402_1%

0K_0402_1%

PQ602

PQ602

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1.5VSCPU_DRAM_PWRGD<6>

1 2

PR613

PR613

0_0402_5%

0_0402_5%

PC617

PC617

@0.1U_0402_10V7K

@0.1U_0402_10V7K

13

D

D

2

G

G

S

S

12

SYSON#<36,41>

C C

PJP601

PJP601

+0.75VSP

+1.8VSP

B B

+1.1V_PCIE

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m

PJP602

PJP602

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m

PJP603

PJP603

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m

(2A,80mils ,Via NO.= 4)

+0.75VS

(1.5A,60mils ,Via NO.= 3)

+1.8VS

(3A,120mils ,Via NO.= 6)

+1.1VSDGPU

PR603@0_0402_5% PR603@0_0402_5%

1 2

1

1

0U_0805_10V6K

0U_0805_10V6K

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR604@0_0402_5% PR604@0_0402_5%

1 2

SUSP<41>

PC601

PC601

PQ601

PQ601

2

G

G

12

PC606

PC606
@0.1U_0402_10V7K

@0.1U_0402_10V7K

12

13

D

D

S

S

12

PC602

PC602

PR601

PR601

1

1

K_0402_1%

K_0402_1%

@10U_0805_10V6K

@10U_0805_10V6K

12

PR602

PR602
1K_0402_1%

1K_0402_1%

12

2

GND

3

VRE

4

VOU

G

G

2992F1U_SO8

2992F1U_SO8

12

12

PC605

PC605
10U_0805_6.3V6M

10U_0805_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

PC604

PC604

F

T

+0.75VSP

6

5

C

N

7

N

C

8

N

C

9

T

P

12

PC603

PC603
1

1

U_0603_10V6K

U_0603_10V6K

0K_0402_5%

0K_0402_5%

1

1

PR608

PR608

+5VAL

+3VS

W

PU602

PU602

7

POK

SUSP#<31,34,39,41,43,46,48,51>

12

SUSP#

@0.1U_0402_10V7K

@0.1U_0402_10V7K

1 2

PR605

PR605

0

0

_0402_5%

_0402_5%

PC609

PC609

8

EN

12

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

+5VAL

W

PC607

PC607

12

1

1

U_0603_10V6K

U_0603_10V6K

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

TP

GND

1

15K_0402_1%

15K_0402_1%

12K_0402_1%

12K_0402_1%

PR606

PR606

PR607

PR607

12

12

12

PC611

PC611
150P_0402_50V8J

150P_0402_50V8J

+3V

S

12

+1.8VSP

12

PC610

PC610
22U_0805_6.3V6M

22U_0805_6.3V6M

PC608

PC608
1

1

0U_0805_10V6K

0U_0805_10V6K

1.1VS_POK <28>

+5VALW

12

PC616

PC616
@47P_0402_50V8J

@47P_0402_50V8J

+1.5VS

12

12

PC615

PC615
22U_0805_6.3V6M

22U_0805_6.3V6M

PC613

PC613
10U_0805_10V6K

10U_0805_10V6K

<BOM Structure>

<BOM Structure>

+1.1V_PCIE

12

PC612

PC612
1

1

U_0603_10V6K

U_0603_10V6K

<BOM Structure>

<BOM Structure>

6

PU603

PC614

PC614

PU603

7

POK

8

EN

12

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

SUSP#

1 2

PR612

PR612

0_0402_5%

0_0402_5%

@

DGPU_PWR_EN<14,23,40,41,51>

@

1 2

PR609

PR609

0_0402_5%

0_0402_5%

@0.1U_0402_10V7K

@0.1U_0402_10V7K

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

TP

GND

1

5K_0402_1%

5K_0402_1%

1

1

3

3

9.2K_0402_1%

9.2K_0402_1%

PR610

PR610

PR611

PR611

12

12

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/11/23 2007/11/23

2006/11/23 2007/11/23

2006/11/23 2007/11/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

0.75VP/1.8VSP/1.1V_PCIE

0.75VP/1.8VSP/1.1V_PCIE

0.75VP/1.8VSP/1.1V_PCIE

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

47 55Monday, November 09, 2009

47 55Monday, November 09, 2009

47 55Monday, November 09, 2009

of

of

of

1.0

1.0

1.0

A

B

C

D

https://t.me/schematicslaptop
https://t.me/biosarchive

1 1

PR504

PR504

SUSP#<31,34,39,41,43,46,47,51>

2 2

+5VALW

+5VALW

3 3

1 2

PR509

PR509

316_040 2_1%

316_040 2_1%

PC509

PC509

1U_0603 _10V6K

1U_0603 _10V6K

12

10_0402 _5%

10_0402 _5%

0_0402_ 5%

0_0402_ 5%

+1.05VSP

+1.05VSP 1

PR512

PR512

12

PC505

PC505

12

@0.1U_04 02_10V7K

@0.1U_04 02_10V7K

PR508 0_0402 _5%PR5 08 0_04 02_5%

PR501

PR501

1 2

4.12K_04 02_1%

4.12K_04 02_1%

10.2K_04 02_1%

10.2K_04 02_1%

12

12

PR511

PR511
0_0402_ 5%

0_0402_ 5%

Close PCH

+1.05VS

+1.05VSP

PR506

PR506
255K_04 02_1%

255K_04 02_1%

1 2

PR502

PR502

1 2

FB_1.05V

12

2

3

4

5

6

PU501

PU501

TON

VOUT

V5FILT

VFB

PGOOD

BST_1.05 V

1

14

15

TP

EN_PSV

VBST

V5DRV

GND7PGND

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

8

DRVH

TRIP

DRVL

LL

PR505

PR505

2.2_0402 _5%

2.2_0402 _5%

1 2

UG_1.05V

13

LX_1.05V

12

11

1 2

+5VALW

10

LG_1.05V

9

PC508

PC508

0.1U_040 2_10V7K

0.1U_040 2_10V7K

1 2

PR503

PR503

13K_040 2_1%

13K_040 2_1%

+5VALW

12

PC510

PC510

4.7U_080 5_10V6K

4.7U_080 5_10V6K

PR507

PR507

0_0402_ 5%

0_0402_ 5%

1 2

FDMC829 6_POWER33 -8-5

FDMC829 6_POWER33 -8-5

UG1_1.05 V

PQ502

PQ502

PQ501

PQ501
AON7408 L_DFN8-5

AON7408 L_DFN8-5

3 5

241

3 5

241

12

PC506

PC506

0.1U_0402_25V6

0.1U_0402_25V6

+1.05VSP

1.05V_B+

12

12

PC507

PC507

PC502

PC502

2200P_0402_50V7K

2200P_0402_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2.2UH_PC MC063T-2R2MN_ 6A_20%

2.2UH_PC MC063T-2R2MN_ 6A_20%

12

PR510

PR510
@4.7_120 6_5%

@4.7_120 6_5%

12

PC511

PC511
@680P_0 603_50V7K

@680P_0 603_50V7K

PJP501

PJP501

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

12

PC503

PC503

PL501

PL501

1 2

PL502

PL502

HCB1608 KF-121T30_060 3

HCB1608 KF-121T30_060 3

1 2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_080 5_6.3V6K

4.7U_080 5_6.3V6K

+1.05VS

B+

+1.05VSP

1

+

PC504

PC504

1 2

+

2

PC501

PC501

220U_B2_2.5VM_R25M

220U_B2_2.5VM_R25M

(6A,320mils ,Via NO.= 16)

4 4

Security Class ification

Security Class ification

https://t.me/schematicslaptop
https://t.me/biosarchive

A

Security Class ification

2008/09/ 15 2009/09/ 15

2008/09/ 15 2009/09/ 15

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/09/ 15 2009/09/ 15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

1.05VSP

1.05VSP

1.05VSP

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

D

of

48 55Monday, November 09, 2 009

of

48 55Monday, November 09, 2 009

of

48 55Monday, November 09, 2 009

1.0

1.0

1.0

8

H H

G G

+3VS

F F

E E

D D

150P_0402_50V8J

150P_0402_50V8J

C C

B B

A A

PR235

PR235

.06K_0402_1%

.06K_0402_1%
8

8

H_DPRSLPVR<9>

VGATE<13,19>

PC221

PC221

VCCSENSE<9>

12

0<9>

H_VID

1<9>

H_VID

H_VID

2<9>

H_VID

3<9>

H_VID

4<9>

H_VID

5<9>

H_VID

6<9>

VR_ON<39>

CLK_EN#<19>

H_PROCHOT#<6>

10P_0402_50V8J

10P_0402_50V8J

1 2

VSSSENSE<9>

PR227

PR227
0_0402_5%

0_0402_5%

1 2

1 2

PR231 147K_0402_1%PR231 147K_0402_1%

+VCCP

12

1 2

PC220

PC220

1 2

PR211

PR211

+VCCP

PR222

PR222

1.91K_0402_1%

1.91K_0402_1%

12

1.91K_0402_1%

1.91K_0402_1%

+VCCP

H_PSI#<9>

PR233 0_0402_5%PR233 0_0402_5%

PC217

PC217

PR236

PR236

1 2

000P_0402_50V7K

000P_0402_50V7K
1

1

PR240

PR240
4

4

12K_0402_1%

12K_0402_1%

ISEN2

ISEN1

1 2

PR249 0_0402_5%PR249 0_0402_5%

PR252 0_0402_5%PR252 0_0402_5%

1 2

0_0402_5%

0_0402_5%

1 2

1 2

PR226

PR226

PR228 @1K_0402_5%PR228 @1K_0402_5%

PR229 0_0402_5%PR229 0_0402_5%

1 2

1 2

390P_0402_50V7K

390P_0402_50V7K

562_0402_1%

562_0402_1%

1 2

PR237

PR237

3.01K_0402_1%

3.01K_0402_1%

PR217

PR217

K_0402_1%

K_0402_1%

1

1

PR220

PR220

@1K_0402_1%

@1K_0402_1%

1 2

1 2

PR230

PR230

12

1

1

K_0402_1%

K_0402_1%

PR232

PR232
68_0402_5%

68_0402_5%

1 2

PC216

PC216

2

2

2P_0402_50V8J

2P_0402_50V8J

1 2

PC219

PC219

VSUM-

330P_0402_50V7K

330P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

https://t.me/schematicslaptop
https://t.me/biosarchive

8

12

PR219 0_0402_5%PR219 0_0402_5%

1 2

12

12

0.22U_0603_10V7K

0.22U_0603_10V7K
PC226

PC226

PC225

PC225

PC233

PC233

PC236

PC236

7

10

41

12

12

12

7

1
2
3
4
5
6
7
8
9

CLK_EN#

PU201

PU201

0.22U_0603_10V7K

0.22U_0603_10V7K

H_VID

PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2

AGND

PC237

PC237

12

1200P_0402_50V7K

1200P_0402_50V7K

@

@

H_VID

40

1
1

30P_0402_50V7K

30P_0402_50V7K
3

3

6

+VCCP

PR201

PR201

1 2

H_VID

0

@1K_0402_1%

1

VID031VID132VID233VID334VID536VID6
BOOT2

UGATE2

PHASE2

VSSP2

LGATE2

VCCP

PWM3

LGATE1

VSSP1

PHASE1

ISL62883HRZ-T_QFN40_5X5

ISL62883HRZ-T_QFN40_5X5

VIN

IMON18BOOT119UGATE1

20

17

12

12

PC222

PC222

1U_0603_10V6K

1U_0603_10V6K

2.5_0402_1%

2.5_0402_1%

PC234

PC234

0.01U_0402_25V7K

0.01U_0402_25V7K

PR253

PR253

1.3K_0402_1%

1.3K_0402_1%

1 2

PR256

PR256

1 2

100_0402_1%

100_0402_1%

@

@

@1K_0402_1%

PR212

PR212

1 2

1K_0402_1%

1K_0402_1%

30
29
28
27
26
25
24
23
2
21

PR239 0_0402_5%PR239 0_0402_5%

1 2

PR241 1_0402_5%PR241 1_0402_5%

1 2

PC223

PC223

0.22U_0603_25V7K

0.22U_0603_25V7K

PC230

PC230

0.022U_0402_16V7K

0.022U_0402_16V7K

H_VID

H_VID

2

H_VID

3

4

H_VID

5

6

39

37

35

38

VID4

VR_ON

CLK_EN#

DPRSLPVR

ISEN1

VSEN12RTN13ISUM-

ISUM+15VDD

4
1

16

12

PR245

PR245
8

8

12

PC238

PC238

1 2

2

12

PR203

PR203

PR202

PR202

1 2

1 2

1K_0402_1%

1K_0402_1%

PR214

PR214

PR213

PR213

1 2

1 2

@1K_0402_1%

@1K_0402_1%

PC215

PC215
1U_0603_10V6K

1U_0603_10V6K

1 2

12

PC218

PC218

1U_0603_10V6K

1U_0603_10V6K

PR204

PR204

1 2

@1K_0402_1%

@1K_0402_1%

PR216

PR216

1 2

1K_0402_1%

1K_0402_1%

1 2

0_0402_5%

0_0402_5%

PR234

PR234

CPU_B+

+5VALW

1

1

0.5K_0402_1%

0.5K_0402_1%

12

0.22U_0603_10V7K

0.22U_0603_10V7K

PC231

PC231

6

@1K_0402_1%

@1K_0402_1%

1K_0402_1%

1K_0402_1%

+5VALW

PR242

PR242

PR205

PR205

1 2

PR208

PR208

1 2

12

PC232

PC232

12

PR207

PR207

PR206

PR206

1 2

1 2

@1K_0402_1%

@1K_0402_1%

1K_0402_1%

1K_0402_1%

PR209

PR209

PR210

PR210

1 2

1 2

1K_0402_1%

1K_0402_1%

@1K_0402_1%

@1K_0402_1%

PR238 0_0402_5%PR238 0_0402_5%

1 2

12

12

PR246

PR246

2.61K_0402_1%

2.61K_0402_1%

.047U_0603_16V7K

.047U_0603_16V7K
0

0

12

PR255

PR255

11K_0402_1%

11K_0402_1%

PC239

PC239

0.1U_0402_16V7K

0.1U_0402_16V7K

1K_0402_1%

1K_0402_1%
@

@

K_0402_1%

K_0402_1%
1

1

IMVP_IMON <9>

PC224

PC224

0.22U_0603_25V7K

0.22U_0603_25V7K

VSSSENSE

VSUM+

12

12

PH201

PH201

10KB_0603_5%_ERTJ1VR103J

10KB_0603_5%_ERTJ1VR103J

VSUM-

BOOST_CPU2

UGATE_CPU2

PHASE_CPU2

LGATE_CPU2

5

PR215

PR215

2

2

.2_0603_5%

.2_0603_5%

12

PC213

PC213

0

0

.22U_0603_10V7K

.22U_0603_10V7K

1 2

4

PR218

PR218

0

0

_0603_5%

_0603_5%

12

578

PQ202

PQ202
A

A

3 6

241

PQ204

PQ204
TPCA8036-H_SOP-ADV8-5

TPCA8036-H_SOP-ADV8-5

3 5

241

3

CPU_B

O4406AL 1N SO8

O4406AL 1N SO8

+

12

PC211

PC211

2200P_0402_50V7K

2200P_0402_50V7K

12

12

PC207

PC207

PC206

PC206

PC205

PC205

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

PC214

PC214

80P_0603_50V7K

80P_0603_50V7K
6

6

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PR221

PR221

4.7_1206_5%

4.7_1206_5%

12

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

2

12

12

PC212

PC212

PC208

PC208

0.1U_0402_25V6

0.1U_0402_25V6

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

12

.65K_0603_1%

.65K_0603_1%
3

3

PR223

PR223

12

12

PR224

PR224

CB2012KF-121T50_0805

CB2012KF-121T50_0805

H

H

CB2012KF-121T50_0805

CB2012KF-121T50_0805

H

H

LF2

0K_0402_1%

0K_0402_1%
1

1

ISEN2

VSUM+

PL203

PL203

12

PL204

PL204

12

0.36UH +-20% MPO104F-R36H1 30A

0.36UH +-20% MPO104F-R36H1 30A

PL202

PL202

1

4

3

2

1

+

GFX_B

B

+

1

1

+

+

+

+

PC209

PC209

PC210

PC210

100U_25V_M

100U_25V_M

100U_25V_M

100U_25V_M
@

@

2

2

+VCC_CORE

V2N

12

PR225

PR225
1_0402_5%

1_0402_5%

VSUM-

https://t.me/schematicslaptop
https://t.me/biosarchive

CPU_B+

578

PQ201

BOOST_CPU1

UGATE_CPU1

PR244

PR244

2.2_0603_5%

2.2_0603_5%

PHASE_CPU1

LGATE_CPU1

5

PR243

PR243

0_0603_5%

0_0603_5%

12

PC229

PC229

0.22U_0603_10V7K

0.22U_0603_10V7K

12

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

4

2007/05/29 2008/05/29

2007/05/29 2008/05/29

2007/05/29 2008/05/29

PQ201
AO4406AL 1N SO8

AO4406AL 1N SO8

3 6

241

PQ203

PQ203
TPCA8036-H_SOP-ADV8-5

TPCA8036-H_SOP-ADV8-5

3 5

241

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

3

12

PC227

PC227

2200P_0402_50V7K

2200P_0402_50V7K

12

12

PC201

PC201

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

PC235

PC235

680P_0603_50V7K

680P_0603_50V7K

PC202

PC202

12

12

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR247

PR247

4.7_1206_5%

4.7_1206_5%

12

PC203

PC203

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

12

12

PC228

PC228

PC204

PC204

0.1U_0402_25V6

0.1U_0402_25V6

.7U_0805_25V6-K

.7U_0805_25V6-K
4

4

0.36UH +-20% MPO104F-R36H1 30A

0.36UH +-20% MPO104F-R36H1 30A

PL201

PL201

1

4

LF1

3

12

12

PR248

PR248

PR250

PR250

10K_0402_1%

10K_0402_1%

3.65K_0603_1%

3.65K_0603_1%

ISEN1

VSUM+

Title

Title

Title

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Date: Sheet

Date: Sheet

Date: Sheet

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+CPU_CORE

+CPU_CORE

+CPU_CORE

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

VSUM-

+VCC_CORE

V1N

12

PR251

PR251
1_0402_5%

1_0402_5%

1.0

1.0

1.0

of

49 55Monday, November 09, 2009

of

49 55Monday, November 09, 2009

of

49 55Monday, November 09, 2009

1

5

4

3

2

1

https://t.me/schematicslaptop
https://t.me/biosarchive

PL802

D D

PR804

PR804

10_0402 _5%

10_0402 _5%

1 2

VSS_AXG _SENSE<9>

VCC_AXG _SENSE<9>

+GFX_CO RE

C C

B B

10_0402 _5%

10_0402 _5%

1 2

B+

PR806

PR806

PC818

PC818

150P_04 02_50V8J

150P_04 02_50V8J

PL802

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

PL803

PL803

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

1 2

PC810

PC810
1000P_0 402_50V7K

1000P_0 402_50V7K

1 2

PC812

PC812
330P_04 02_50V7K

330P_04 02_50V7K

PR813

PR813

10.2K +-1% 0402

10.2K +-1% 0402

12

825K_04 02_1%

825K_04 02_1%

12

1 2

12

PR816

PR816

17.8K_04 02_1%

17.8K_04 02_1%

GFX_B+

12

PC805

PC805

2200P_0402_50V7K

2200P_0402_50V7K

12

PR814

PR814

1 2

PC814

PC814

100P_04 02_50V8J

100P_04 02_50V8J

PC819

PC819

22P_040 2_50V8J

22P_040 2_50V8J

1 2

GFXVR_P WRGD

GFXVR_C LKEN#

12

PC801

PC801

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC813

PC813
330P_04 02_50V7K

330P_04 02_50V7K

1000P_0 402_50V7K

1000P_0 402_50V7K

GFX_B+

12

12

PC802

PC802

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC815

PC815

12

12

PR817

PR817

8.06K_04 02_1%

8.06K_04 02_1%

PR833

PR833

0_0402_ 5%

12

22.6K_0402_1%

22.6K_0402_1%

LX_GFX

DL_GFX

0_0402_ 5%

GFXVR_IMO N <9>

PC809

PC809

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

VSS_AXG _SENSE

1 2

PC811

PC811

0.22U_06 03_16V7K

0.22U_06 03_16V7K

PR807

PR807

0_0603_ 5%

0_0603_ 5%

1 2

PR809

PR809

1 2

0_0603_ 5%

0_0603_ 5%

12

PC816

PC816

2.2U_060 3_6.3V6K

2.2U_060 3_6.3V6K

12

DH_GFX1DH_GFX

+5VALW

PQ802

PQ802

AON6718 L 1N DFN

AON6718 L 1N DFN

PR8210_ 0402_5% PR8210_0402_ 5%

12

PR8220_ 0402_5% PR8220_0402_ 5%

12

PR8240_ 0402_5% PR8240_0402_ 5%

12

PR8260_ 0402_5% PR8260_0402_ 5%

12

PR8270_ 0402_5% PR8270_0402_ 5%

12

PR8280_ 0402_5% PR8280_0402_ 5%

12

PR8300_ 0402_5% PR8300_0402_ 5%

12

PR8310_ 0402_5% PR8310_0402_ 5%

12

PR8320_ 0402_5% PR8320_0402_ 5%

12

578

PQ801

PQ801
AO4474L _SO8

AO4474L _SO8

3 6

241

3 5

241

GFXVR_V ID_0 <9 >
GFXVR_V ID_1 <9 >
GFXVR_V ID_2 <9 >
GFXVR_V ID_3 <9 >
GFXVR_V ID_4 <9 >
GFXVR_V ID_5 <9 >
GFXVR_V ID_6 <9 >
GFXVR_E N <9>
GFXVR_D PRSLPVR <9 >

12

PR810

PR810

2.2_1206 _5%

2.2_1206 _5%

PC817

PC817

1 2

680P_06 03_50V7K

680P_06 03_50V7K

ISUM+

ISUM-

PL801

PL801

1

2

.56UH +-20 % ETQP4LR56 W FC 21A

.56UH +-20 % ETQP4LR56 W FC 21A

12

PR811

PR811

3.65K_08 05_1%

3.65K_08 05_1%

PH801

PH801

PR815

PR815

2.61K_04 02_1%

2.61K_04 02_1%

PR818

PR818

1 2

11K_040 2_1%

11K_040 2_1%

PC820

PC820
.1U_0402 _16V7K

.1U_0402 _16V7K

1 2

1 2

PC821

PC821

0.1U_060 3_16V7K

0.1U_060 3_16V7K

PR829

PR829

82.5_040 2_1%

82.5_040 2_1%

1 2

0.01U_04 02_16V7K

0.01U_04 02_16V7K

1 2

3.01K_04 02_1%

3.01K_04 02_1%

1 2

4

3

12

PR812

PR812
0_0402_ 5%

0_0402_ 5%

10KB_06 03_5%_ERTJ1V R103J

10KB_06 03_5%_ERTJ1V R103J

PR825

PR825

1 2

1 2

PC822

PC822

1 2

1 2

+GFX_CORE

PR823

PR823
@100_04 02_1%

@100_04 02_1%

PC823

PC823
@180P 50 V J NPO 0402

@180P 50 V J NPO 0402

PR802

12

12

PC806

PC806

0.1U_0402_25V6

PC804

PC804

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.1U_0402_25V6

PR808

PR808

47K_040 2_1%

47K_040 2_1%

+GFX_CO RE

12

PC803

PC803

4.7U_0805_25V6-K

4.7U_0805_25V6-K

+5VALW

PR819

PR819

@1.91K_0402_1%

@1.91K_0402_1%

PR801

PR801

1_0603_ 5%

1_0603_ 5%

12

PR820

PR820

@10K_0402_1%

@10K_0402_1%

12

12

PC807

PC807
1U_0603 _6.3V6M

1U_0603 _6.3V6M

7

VSEN

6

FB

5

COMP

4

VW

12

3

RBIAS

2

PGOOD

1

CLK_EN#

29

AGND

PR802

0_0603_ 5%

0_0603_ 5%

ISUM+

ISUM-

10

11

9

8

RTN

PU801

PU801
ISL62881H RZ-T_QFN28_4X 4

ISL62881H RZ-T_QFN28_4X 4

28

12

VIN

VDD

ISUM

ISUM+

VID5

VID626VR_ON27DPRSLPVR

25

24

1 2
12

13

IMON

VID323VID4

PC808

PC808

0.22U_0603_25V7K

0.22U_0603_25V7K

BST_GFX

14

BOOT

UGATE

PHASE

VSSP

LGATE

VCCP

VID0

VID1

VID2

22

12

PR803

PR803

1 2

PR805

PR805

2.2_0603 _5%

2.2_0603 _5%

15

16

17

18

19

20

21

A A

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

Security Class ification

Security Class ification

Security Class ification

2008/10/ 31 2009/10/ 31

2008/10/ 31 2009/10/ 31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/ 31 2009/10/ 31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

VCCGFX

VCCGFX

VCCGFX

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

50 55Monday, November 09 , 2009

50 55Monday, November 09 , 2009

50 55Monday, November 09 , 2009

of

of

of

A

,40,41,47>

B

C

D

https://t.me/schematicslaptop

PR922

PR922

@

@

0_0402_ 5%

0_0402_ 5%

SUSP#

1 2

PR906

PR906

_0402_5 %

_0402_5 %

0

0

1 2

+VGA_CO REP1

0_0402_ 5%

0_0402_ 5%

0.1U_040 2_10V7K

0.1U_040 2_10V7K

@

@

12

PR914

PR914

12

PC905

PC905

1 2

PR901

PR901

15.4K_04 02_1%

15.4K_04 02_1%

1 2

@10P_04 02_50V8J

@10P_04 02_50V8J

12

PR915

PR915
10_0402 _5%

10_0402 _5%

PC912

PC912

PR909

PR909
255K_04 02_1%

255K_04 02_1%

1 2

12

0

0

_0402_5 %

_0402_5 %

PU901

PU901

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PR913

PR913

DGPU_PW ROK <14>

14

15

1

TP

EN_PSV

GND7PGND

8

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

BST_VGA

VBST

DRVH

LL

TRIP

V5DRV

DRVL

1 2

PR907

PR907

2.2_0402 _5%

2.2_0402 _5%

13

12

11

10

9

1 2

PC909

PC909

0.1U_040 2_10V7K

0.1U_040 2_10V7K

LX_VGA

+5VALW

DL_VGA

12

PC911

PC911

4.7U_080 5_10V6K

4.7U_080 5_10V6K

1 2

PR910

PR910
0_0402_ 5%

0_0402_ 5%

1 2

PR905

PR905

14.3K_04 02_1%

14.3K_04 02_1%

VGA_B

4.7U_0805_25V6-K

0.1U_0402_25V6

0.1U_0402_25V6

PC906

PC906

12

PQ901

PQ901
AON7408 L_DFN8-5

AON7408 L_DFN8-5

3 5

578

3 6

241

241

PQ902

PQ902
FDS6690 AS_G_SO8

FDS6690 AS_G_SO8

12

PR912

PR912
@4.7_120 6_5%

@4.7_120 6_5%

12

PC913

PC913
@680P_0 603_50V7K

@680P_0 603_50V7K

DH_VGA_ 1DH_VGA

4.7U_0805_25V6-K

12

1

1

UH_PCMC 063T-1R0MN_11 A_20%

UH_PCMC 063T-1R0MN_11 A_20%

1 2

316_040 2_1%

316_040 2_1%

PR911

PR911

1

1

U_0603_ 10V6K

U_0603_ 10V6K

SUSP#<

WR_EN

PR908

PR908

12

PC910

PC910

+5VALW

+5VALW

12

12

31,34,39,41,43,46,47,48>

1 1

3

14,2

+NVVDDP

2 2

DGPU_P

0_0402_ 5%

0_0402_ 5%

https://t.me/biosarchive

H

H

CB1608K F-121T30_0603

4

4
.7U_0805_25V6-K

.7U_0805_25V6-K

PC904

PC904

CB1608K F-121T30_0603

1 2

2

2
200P_0402_50V7K

200P_0402_50V7K

PC907

PC907

12

3

3
30U_D2_2V_Y

30U_D2_2V_Y

1

PC901

PC901

+

+

2

PC903

PC903

+

PL901

PL901

12

PL902

PL902

B

+

+NVVDDP

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

PC902

PC902

12

12

PR902

PR902

75K_040 2_1%

Close VGA

+VGA_CORE

3 3

GPU_VID1<26>

PR918

PR918

10K_040 2_5%

10K_040 2_5%

GPU_VID0<26>

PR921

PR921

10K_040 2_5%

10K_040 2_5%

4 4

PJP901

PJP901

+NVVDDP

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m
PJP902

PJP902

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

A

+VGA_CO RE

75K_040 2_1%

+NVVDDP

+3VS

PR916

PR916

10K_040 2_5%

10K_040 2_5%

1 2

12

12

1

1

0K_0402 _5%

0K_0402 _5%

61

2

12

2

PR919

PR919

PQ904A

PQ904A
2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

(11A,489mils ,Via NO.= 22)

PR917

PR917

15K_040 2_1%

15K_040 2_1%

61

PQ903A

PQ903A
2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

PR920

PR920

15K_040 2_1%

15K_040 2_1%

PC915

PC915

.022U_04 02_16V7K

.022U_04 02_16V7K

0

0

B

12

12

PC914

PC914

0.022U_0 402_16V7K

0.022U_0 402_16V7K

PR903

PR903

210K_04 02_1%

210K_04 02_1%

1 2

PQ903B

PQ903B

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

5

3 4

GPU_VID0 +VGA_CORE

1

0

0

12

12

PR904

PR904

76.8K_04 02_1%

76.8K_04 02_1%

1 2

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PQ904B

PQ904B

5

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

3 4

Compal Secret Data

Compal Secret Data

2007/05/ 29 200810/1 1

2007/05/ 29 200810/1 1

2007/05/ 29 200810/1 1

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

GPU_VID1

1

1

0

0.9V

05V

1.

1.1V

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

VGA_CORE

VGA_CORE

VGA_CORE

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

D

of

51 55Monday, November 09, 2 009

of

51 55Monday, November 09, 2 009

of

51 55Monday, November 09, 2 009

1.0

1.0

1.0

5

4

3

2

1

Item Fixed Issue PAGE Modify List Date

14PLT_RST# need a PD resistor

Remove MUX in CRT DDC circuit of SG design 20

2

Remove MUX in LVDS ENAVDD circuit of SG design 21

3

D D

LCD panel will fail in OPP SKU 21

4

Remove MUX in LVDS I2C circuit of SG design 2

5

SKU: M93 and VRAM may have leakage in S3 mode 41

OPP

6

8111VB power on timing issue 32

7

de 2.0 need Board ID 39

Bla

8

GPIO17 will be used for debug card 39

EC

9

Cap

. sensor board need to change the power source. 40

10

Lid switch need to change the power source. 40

11

C C

nge +1.8VS to +1.8VSDGPU Transfer design

Cha

12

for

cost down

BIOS team doesn't need XDP connector 6

13

Change +5VS to +5VSDGPU Transfer design

14

for cost down

PCH_DDR_RST need use PCH GPIO46 to control 6

15

Remove the 27MHz crystal of VGA 26

16

2

41

41

Add R185 PD for PLT_RST#

Change to MOS design

Change to MOS design

Add one 0 ohm resistor (R1238) for OPP SKU

Change to MOS design

Change the power plan to +1.5VS of JP303

Add R1083 and C1319 to fine tune the power on timing

Use EC GPIO48 for ID pin(Add R1239, R1240)

LAN_POWER_OFF signal change to EC GPXID4(Pin 115)

Change the power source of Cap. sensor baord to +3VS

Change the power source of Lid switch to +3VALW and R526 PU to +3VALW.

Change the power MOS(U49) to 2301 PMOS(Q109).

Remove the XDP connector

Use 0 ohm to contact +5VS and +5VSDGPU

PCH_DDR_RST MOS gate control signal change
from EC to PCH GPIO46

Use clock gen 27MHz source and stuff R216

08/6

08/6

08/6

08/6

08/6

08/6

08/10

08/12

08/12

08/13

08/13

08/13

08/13

08/13

08/13

08/14

Phase

PV1

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

PV

Q104 need change to low Vgs type 6

17

Cost down plan 9

18

Cost down plan 9

19

B B

Cost down plan 9

20

Cost down plan 9

21

Cost down plan 9

22

Docking no sound when play music 34

23

io new Mapping 34

Aud

24

won't have DIM_LED function 41

We

25

ESD issue 34

26

Black light issue(will see the garbage when boot) 22

27

A A

CPU leakage issue 6

28

https://t.me/schematicslaptop
https://t.me/biosarchive

5

4

Change the Q104 to BSS138 P/N:SB501380020

Change the C995,C996 330u to ESR=9m ohm

Change the C64 from 330u to 220u

Change the C61,C62,C67,C68,C69,C76,C82 from 22u to 10u

Change the C200 330u to ESR=9m ohm

Un-stuff C204,C228 and C229

Need to stuff R910

Exchange the port A and port F

Un-stuff Q99,Q101 and add two 0 ohm(R1244,R1245) resistors for LED power source.

Add R1247,C1442,C1443 and change the C983~C986, C1444~C1446 to 0.1u

Change the black light enable schematic design.

Change the design for Intel's power leakage issue when go into S3 mode

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

08/18

08/14

08/14

08/14

08/14

08/14

08/14

08/14

08/14

08/1

08/1

08/1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PIR-HW

PIR-HW

PIR-HW

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

1

PV

PV

PV

PV

PV

PV

PV

PV

PV

8

PV

8

PV

9

PV

of

52 55Monday, November 09, 2009

of

52 55Monday, November 09, 2009

of

52 55Monday, November 09, 2009

1.0

1.0

1.0

A

B

C

D

E

Item (Reas

.

MIC ESD issue

EXT.M

0

3

1

3

1 1

3

2

IC ESD issue 35

ve PU resistors to +3VL for ESB BUS 39

Reser

Make

sure power sequence is correct

33

+3VS_VGA will have leakage when switch to

34

IGPU mode

Need contact SUS_PWR_DN_ACK between EC and PCH 13 Use PCH GPIO30 and EC pin76 for SUS_PWR_DN_ACK

35

36

Change 27MHz clock source of VGA to Y7

37

Q37 dual package will have floating isse 22 Change Q37 to single package

38

Fix 8103 BOM isse 32 Add R1259 for 8103EL LAN chip

39

2 2

Fix EXT. MIC reference voltage issue 34 Change the reference voltage to +AVDD_CODEC

40

Remove EC_BEEP function 34 Delete EC_BEEP function

41

42

EMI need to add chock for ESATA/USB port 37 Add L66 for ESATA/USB port

43

HM55 PCH will disable USB port6 and port7

44

HM55 PCH will disable USB port6 and port7 Change Bluetooth from USB port 6 to USB port 12

45

on for change)Fixed Issue PAGE Modify List

3

5INT

6,4

Add D58 and D62 for ESD issue

R

eserve D63 for Ext. MIC

R

eserve R1253,R1254 for ESB bus

7

Use 1.5VSCPU_DRAM_PWRGD to enable 0.75VS power

Add inverter circuit for ME_EN signalAdd ME_EN# for PCH GPIO33 11

12 Change Q4 pin2 and pin5 to +3VS_VGA

14Need add VGA ID pin for M93 and M93 LP Use PCH GPIO57 for VGA ID pin

19,26 non-stuff R216

Delete ANA_MIC_DET signal from EC and codec35,39Remove Analog MIC detect function

37

Change Finger printer from USB port7 to USB port 11

37

Date Phase

08/1829

8/18

0

08/21

09/11

0

9/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

09/11

V

P

P

V

V

P

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

PV2

Remove EC_BEEP function 39 Change Pin 26 from EC_BEEP to ME_EN

45

Fix PV phase Board ID issue 39 Exchange TP_BTN# and Board_ID pin

46

3 3

Cypress Cap. sensor board need use +3VL power Change Cap. sensor board power to +3VL40

47

41Adjust +3VS / +1.5VS power sequence Change C676,C770 from 0.1u to 0.022u

PLT_RST# don't need PD resistor 14 Un-stuff R185

49

Follow Intel to adjust +0.75VS discharge timing

50

Follow Intel to adjust +1.5VS discharge timing

51

Follow Intel Check list 2.0 15 Un-stuff C187 and C192

52

EDID signal need to add PU resistor 22 Add R1261 for EDID DATA

53

VCCADAC dosen't need LC filter when DIS only 15 Change L45 to 0 ohm resistor for OPP SKU

54

4 4

GFX core power transient fail 9 Change C996 to 330u 7m ohm

55

https://t.me/schematicslaptop
https://t.me/biosarchive

A

41

41

B

Change R593 from 470ohm to 22ohm

Change R590 from 470ohm to 220ohm

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PIR-HW

PIR-HW

PIR-HW

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

09/11

09/11

09/11

09/12 PV248

09/20 MV

09/20

09/20

09/20

09/20

10/01 MV

10/21 MV

53 55Monday, November 09, 2009

53 55Monday, November 09, 2009

53 55Monday, November 09, 2009

E

of

of

of

PV2

PV2

PV2

MV

MV

MV

MV

1.0

1.0

1.0

5

4

3

2

1

Item (Reason for change)Fixed Issue PAGE Modify List Date Phase

Add M93 / M93LP / Park / Park LP ID pin 14 Use PCH GPIO28 and GPIO57 for VGA ID pin

10/2156

MV

RTC timing fast / slow issue 19 Change C259, C260 to 22P

57

ESB CLK can't pass EMI test. 40 Ch

58

D D

Intel PCH CLK jitter issue 12 Reserve Y2 for this issue.

59

ATE test jig issue(M/B will shutdown when no CPU)

60

ATE test jig issue

61

(nee

d to turn on +VGA_CORE when no CPU)

Ext. MIC record noise issue 34 Re

62

Int

63

64

65

C C

el CPU GFX overshoot issue 09 Fo

+1.

8VSDGPU power up/down timing issue 41 Change R916 to 1K and R926 to 10K then add C1454 to fine tune timing

+1.5VSDGPU / +1.5VS power quality issue 41 Change U50 and U58 to low RDSON NMOS

39 Add R1265 for ATE jig test

41 Add R1266 and reserve Q115 for ATE jig test

ange R1151 to 300 ohm bead and add C1449

serve LDO circuit for this issue.

llow Intel suggestion to change the R43 to 249 ohm

10/21 MV

10/21

10/23

10/2

10/29

MV

MV

3

MV

MV

11/03 MV

11/05 MV

11/05 MV

11/05 MV

B B

A A

Security Classification

Security Classification

https://t.me/schematicslaptop
https://t.me/biosarchive

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/28 2006/07/26

2007/08/28 2006/07/26

2007/08/28 2006/07/26

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR-HW

PIR-HW

PIR-HW

Calpella DIS LA-4107P

Calpella DIS LA-4107P

Calpella DIS LA-4107P

54 55Monday, November 09, 2009

54 55Monday, November 09, 2009

54 55Monday, November 09, 2009

1

1.0

1.0

1.0

of

of

of

A

B

C

D

E

Version Change List ( P. I. R. List ) for Power Circuit

Request

Request

Page#

Page#

Item

Page#Page#

ItemItem

1

1 1

2 2

44

2

49

3

47

4

43

5

6

49

7

46

8

45

9

46

10

49

4611 DB to PV1

Title

Title

TitleTitle

PWR-3.3V

PWR-C

PWR-CPU_CORE

PWR-0.75VP/1.8VSP

ALWP/5VALWP 8/12 PWR

PU_CORE

PWR-Charger 8/20

PWR-CPU_CORE

PWR-1.05V_VCCP 8/24

PWR-1.5VP 8/24

PWR-1.05V_VCCP PR703 from 8.06K to 6.98K

PWR-CPU-CORE Add PC2308/28 PWR

PWR-1.05V_VCCP

12 PWR-1.05V_VCCP

50

GFX_CORE 9/1113 PWR

47 PWR-0.75VP/1.8VSP14 9/11 PWR

RequestRequest

Date

Date

DateDate

Owner

Owner

OwnerOwner

8/13

PWR

8/17

PWR49

PWR

8/20

P

WR

8/20 PWR

PWR

PWR

8/24 PWR

9/2 PWR

9/3 PWR

Issue DescriptionItem

Issue DescriptionIssue Description

ap no more than 0805 Add PC318,PC305 from 1206 to 0805 and parallel with PC318

all c

OCP

& IMON ajustment and

LL to match INTEL Spec

Fixed

RF Solution

Cost Down plan

Solution Description

Solution Description

Solution DescriptionSolution Description

Change PR253 from 1.1K to 1.3K,Change PR242 from 8.25K to 10.5K

R237 from 2.43K to 3.01K

Change P

Change PQ201 PQ202 from AO4474L to
AO4406AL,PR215 PR244 from 0 to 2.2

Change PU602 from APL5915 to APL5930





Smart Charger Change PR113 from 143K to 140K, Change PC117 from 1u to 0.1u, Add PR114

Avoide DFX interfere

Delete PC209 and add P C210

Follow HW Suggestion Pull-up

resistor connect to 3VS

PU401 second source solution

Add PR705 connect to 3VS, remove PR706

PR403 from 13.7K to 15.4K

PU701 second source solution

Improve transient response

Cost down plan

Improve VCCP Ripple

Change PC701 PC702 PC703 from 330u 6m ohm

to 330u 9m ohm

Del PC71746

 

Let GFX IMON measure easily Add PR833 connect to GFRXVR_IMON and PU801 pin 13

For HW requirement add

1.5VSCPU_DRAM_PWRGD

Add 1.5VSCPU_DRAM_PWRGD add PR613 connect to PQ601 pin 2 and Delet PR604



Note

NoteIssue Description

NoteNote

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

DB to PV1

PV1 to PV2

PV1 to PV2

3 3

https://t.me/schematicslaptop
https://t.me/biosarchive

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

2007/08/02 2008/08/02

2007/08/02 2008/08/02

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

PIR-PWR

PIR-PWR

PIR-PWR

Calpella_UMA_LA4106P

Calpella_UMA_LA4106P

Calpella_UMA_LA4106P

55 55Monday, November 09, 2009

55 55Monday, November 09, 2009

55 55Monday, November 09, 2009

E

1.0

1.0

1.0

of

of

of