Mobile Penryn uFCPGA with Intel
Cantiga_GM+ICH9-M core logic
33
2009-02-16
REV:1.0
44
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2007/08/282006/03/10
Compal Secret Data
Deciphered Date
Title
Size Document NumberRev
Custom
D
Date:Sheetof
Compal Electronics, Inc.
Cover Sheet
Montevina UMA
E
146Wednesday, February 18, 2009
0.1
A
B
C
D
E
Compal confidential
11
LVDS Panel
Interface
CRT
Support V1.3
22
HDMI
RTL8103EL
(10/100M)
P25
P19
P18
P35
Mini-Card
WLANWWAN
RJ45/11 CONN
33
P25
Thermal Sensor
EMC1402
Fan conn
Mini-Card
Montevina Consumer UMA
Mobile Penryn
P06
P06
PCI-E BUS*4
New Card
P26P26
DMI X4
P26
uFCPGA-478 CPU
P6, 7, 8
H_A#(3..35)
H_D#(0..63)
FSB
667/800/1066 MHz 1.05V
Intel Cantiga MCH
FCBGA 1329
GM47
P9,10, 11, 12, 13, 14
C-Link
Intel ICH9-M
mBGA-676
P20,21,22,23
LPC BUS
CK505
Clock Generator
SLG8SP553V
DDR2 800MHz 1.8V
Dual Channel
USB2.0 X12
Azalia
SATA Master-1
SATA Slave
SATA Slave
72QFN
P17
DDR2 SO-DIMM X2
BANK 0, 1, 2, 3
USB conn x1
BT Conn
USB Camera
Finger print
CardReader
P15, 16
P30
P30
P19
P30
5 in1 Slot
P27
Audio CKTAMP & Audio Jack
Codec_IDT92HD75B
MDC
P28P29
P28
TPA6047
P27
SATA HDD Connector
P24
ENE
KB926
RTC CKT.
P21
LED
P33
ACCELEROMETER-1
ST
44
P24
Touch Pad CONN.
P33
SPI ROM
SST25VF080
P31
P32
Int.KBD
SPI
P32
K/B backlight Conn
P33
DC/DC Interface CKT.
A
P36
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2006/02/132006/03/10
Compal Secret Data
Deciphered Date
SATA ODD Connector
e-SATA Connector
Custom
D
P24
P30
USB Board Conn
USB port x2
Capsense switch Conn
Title
Size Document NumberRev
Date:Sheetof
Compal Electronics, Inc.
Block Diagram
Montevina UMA
E
246Wednesday, February 18, 2009
P30
P33
0.1
A
Symbol Note :
Voltage Rails
powerplane
State
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Batterydon't exist
11
O MEANS ONX MEANS OFF
+B
O
O
O
O
O
+5VALW
+3VALW
O
O
O
O
X
XX
+1.5V
: means Digital Ground
: means Analog Ground
+5VS+3VS+1.5VS+0.75V+VCCP+CPU_CORE+2.5VS+1.8V
O
O
O
X
X
X
O
O
X
X
X
X
@ : means just reserve , no build
45@ : means need be mounted when 45 level assy or rework stage.
DEBUG@ : means just reserve for debug.
BATT @ : means need be mounted when 45 level assy or rework stage.CONN@ : means ME part
ESATA @ : means just reserve for ESATA
GS @ : means just reserve for G sensor FP @ : means just reserve for Finger Print
Multi @ : means just reserve for Multi BayNewC@ : means just reserve for New card
Main@ : means just reserve for Main streamOPP@ : means just reserve for OPP2MiniC@ : means just reserve for 2nd Mini card slot
PA @ : means just reserve for PAPR@ : means just reserve for PR
USB assignment:
USB-0 Right side(with eSATA)USB-1 Left sideUSB-2 Left sideUSB-3 CardreaderUSB-4 CameraUSB-5 WLANUSB-6 Bluetooth USB-7 Finger PrinterUSB-8 MiniCard(WWAN/TV)USB-9 Express cardUSB-10 XUSB-11 X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
2007/08/282006/03/10
Compal Secret Data
Deciphered Date
Custom
Title
Size Document NumberRev
Date:Sheetof
Compal Electronics, Inc.
Notes List
Montevina UMA
346Wednesday, February 18, 2009
0.1
5
4
3
2
60mA
+3VAUX_BT
1
50mA
1A
0.3A
2A
+V_BATTERY
INVPWR_B+
B++
LVDS CON
1.7A
+3VALW
+1.5VS
+5VALW
177mA
300mA
ICH9
LAN
3.39A5.89A
+3VS
RT5158
657mA
2.2A0.3A
1.3A0.58A
1.56A
ICH_VCC1_5
ICH9
ICH9
+5VS
35mA
10mA
DD
VIN
AC
CC
B+
7A
25mA
20mA
10mA
1A
278mA
1.5A
250mA
1A
1A
+VDDA
IDT 9275B
+5VAMP
Finger printer
+3VS_DVDD
ALC268
+3VALW_EC
SPI ROM
New card
ICH9
+LCDVDD
LVDS CON
+3VS_CK505
Mini card (WLAN)
Mini card (TV tu/WWAN/Robeson)
1.8A
BB
3.7 X 3=11.1V
DC BATT
B+++
AA
5
CPU_B++VCC_CORE
12.11A1.9A
4.7A
10mA2A
+1.8V
1.05V_B+
34A/1.025V
4
3.7A
50mA
+VCCP
CPU
MCH
DDR2 800Mhz 4G x2
+0.9V
1.17A
1.26A
2.3A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
ICH9
MCH
CPU
2007/08/282006/03/10
700mA
50mA
Compal Secret Data
Deciphered Date
ODD
SATA
PC Camera(4.75V)
2
Compal Electronics, Inc.
Title
Size Document NumberRev
C
Montevina UMA
Date:Sheetof
Power delevry
1
446Wednesday, February 18, 2009
0.1
A
11
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
9
Thermal Pad
8
GND
7
GND
6
GND
5
GND
G996RD1U_TDFN8_3X3
Compal Secret Data
VEN
VIN
VO
VSET
FAN_SET32
Deciphered Date
U51
1
2
3
4
1
C4 2.2U_0603_6.3V4Z
2
+5VS_FAN
1
C1509
2.2U_0603_6.3V4Z
2
2
XDP_TRST#
XDP_TCK
This shall place near CPU
SMCLK
SMDATA
ALERT#
GND
+5VS
Title
Size Document NumberRev
Custom
Date:Sheetof
R754.9_0402_1%
12
R854.9_0402_1%
12
SMB_EC_CK2
8
SMB_EC_DA2
7
R610K_0402_5%
6
12
5
1
C5
0.1U_0402_16V4Z
2
CONN@
JFAN1
1
1
2
2
3
3
ACES_85204-03001
D63
3
Vcc
2
Line to be protected
1
GND
DLPT05-7-F_SOT23-3
FAN_SPEED
Compal Electronics, Inc.
Penryn(1/3)-AGTL+/ITP-XDP
Montevina UMA
1
SMB_EC_CK2 32
SMB_EC_DA2 32
+3VS
4
G1
5
G2
646Wednesday, February 18, 2009
0.1
5
4
3
2
1
H_D#[0..15]9
DD
H_DSTBN#09
H_DSTBP#09
H_DINV#09
H_D#[16..31]9
CC
* Route the TEST3 and TEST5 signals througha ground referenced Zo = 55-ohm trace thatends in a via that is near a GND via and isaccessible through an oscilloscopeconnection.
Resistor placed within 0.5"of CPU pin.Trace should beat least 25 mils away fromany other toggling signal.COMP[0,2] trace width is 18mils. COMP[1,3] trace widthis 4 mils.
Length match within 25 mils.The trace width/space/other is 20/7/25.
+VCC_CORE
R28100_0402_1%
12
R30100_0402_1%
12
+VCCP
10U_0805_6.3V6M
VCCSENSE
VSSSENSE
1
+
C6
330U_D2E_2.5VM_R7
2
1
C7
2
0.01U_0402_16V7K
+1.5VS
1
C8
2
Near pin B26
Close to CPU pin within
AA
Close to CPU pin AD26within 500mils.
500mils.
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
Place these capacitors onL8 (North side,SecondaryLayer)
Place these capacitors onL8 (North side,SecondaryLayer)
Place these capacitors onL8 (North side,SecondaryLayer)
Place these capacitors onL8 (North side,SecondaryLayer)
Mid Frequence Decoupling
Near CPU CORE regulator
+VCC_CORE
C41
+VCCP
1
C45
0.1U_0402_10V6K
2
3
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
+VCC_CORE
1
2
C9
10U_0805_6.3V6M
C17
10U_0805_6.3V6M
C25
10U_0805_6.3V6M
C33
10U_0805_6.3V6M
1
C10
10U_0805_6.3V6M
2
1
C18
10U_0805_6.3V6M
2
1
C26
10U_0805_6.3V6M
2
1
C34
10U_0805_6.3V6M
2
ESR <= 1.5m ohmCapacitor > 1980uF
1
1
@
+
C42
2
2
330U_D2_2VY_R7M
Inside CPU center cavity in 2 rows
1
C46
0.1U_0402_10V6K
2
1
+
C43
330U_D2_2VY_R7M
1
2
+
C44
2
330U_D2_2VY_R7M
C47
0.1U_0402_10V6K
1
+
2
330U_D2_2VY_R7M
1
C11
10U_0805_6.3V6M
2
1
C19
10U_0805_6.3V6M
2
1
C27
10U_0805_6.3V6M
2
1
C35
10U_0805_6.3V6M
2
1
C48
0.1U_0402_10V6K
2
1
C12
10U_0805_6.3V6M
2
1
C20
10U_0805_6.3V6M
2
1
C28
10U_0805_6.3V6M
2
1
C36
10U_0805_6.3V6M
2
1
C49
0.1U_0402_10V6K
2
1
C13
10U_0805_6.3V6M
2
1
C21
10U_0805_6.3V6M
2
1
C29
10U_0805_6.3V6M
2
1
C37
10U_0805_6.3V6M
2
1
C50
0.1U_0402_10V6K
2
2
1
C14
10U_0805_6.3V6M
2
1
C22
10U_0805_6.3V6M
2
1
C30
10U_0805_6.3V6M
2
1
C38
10U_0805_6.3V6M
2
1
C15
10U_0805_6.3V6M
2
1
C23
10U_0805_6.3V6M
2
1
C31
10U_0805_6.3V6M
2
1
C39
10U_0805_6.3V6M
2
1
2
1
2
1
2
1
2
1
C16
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
AA
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2007/08/282006/03/10
Compal Secret Data
Deciphered Date
Title
Size Document NumberRev
Custom
2
Date:Sheetof
Compal Electronics, Inc.
Penryn(3/3)-AGTL+/ITP-XDP
Montevina UMA
1
846Wednesday, February 18, 2009
0.1
5
H_RCOMP
12
R54
AD14
AA13
AA11
AD11
AD10
AD13
AE12
AE14
AE11
U2A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
H_D#_42
AA9
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA ES_FCBGA1329
+VCCP
12
221_0603_1%
12
100_0402_1%
H_ADSTB#_0
H_ADSTB#_1
H_BREQ#
H_DEFER#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
HOST
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
R47
+H_SWNG
1
C59
R55
2
0.1U_0402_16V4Z
H_D#[0..63]7
DD
CC
H_RESET#6
H_CPUSLP#7
BB
Layout note:
Route H_SCOMP and H_SCOMP# with tracewidth, spacing and impedance (55 ohm) same asFSB data traces
Layout Note:H_RCOMP / H_VREF / H_SWNGtrace width and spacing is 10/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2007/08/282006/03/10
Compal Secret Data
Deciphered Date
CFG69
CFG79
CFG89
CFG99
CFG109
2
R79
@
12
2.21K_0402_1%
R81
@
12
2.21K_0402_1%
R83
@
12
2.21K_0402_1%
R84
@
12
2.21K_0402_1%
R86
@
12
2.21K_0402_1%
Title
Cantiga(3/6)-VGA/LVDS/TV
Size Document NumberRev
Custom
Montevina UMA
Date:Sheetof
CFG119
CFG129
CFG139
CFG149
CFG159
CFG179
CFG189
Compal Electronics, Inc.
1
5
+3VS_DAC_BG
0.022U_0402_16V7K
C69
1
2
0.022U_0402_16V7K
C76
1
2
+3VS
220U_D2_4VM
R103
12
0_0603_5%
1U_0603_10V4Z
0.1U_0402_16V4Z
C70
1
2
R91
12
BLM18PG181SN1D_0603
0.1U_0402_16V4Z
1
2
R96
@
12
0_0603_5%
R97
12
0_0603_5%
1
C94
+
2
C102
1
2
C68
DD
+3VS_DAC_CRT
C75
+1.5VS
+VCCP
CC
BB
+3VS
R88
12
BLM18PG181SN1D_0603
10U_0805_10V4Z
+3VS
1
C89
0.1U_0402_16V4Z
2
R100
12
0_0805_5%
C95
1
2
+1.05VS_A_SM_CK
C103
1
1
2
2
+1.8V_TXLVDS
+1.5VS_PEG_BG
10U_0805_10V4Z
C96
4.7U_0805_10V4Z
10U_0805_10V4Z
C104
1
2
**RED Mark: Means UMA & dis@ Power select**~It check by INTEL Graphics Disable Guidelines~
+3VS_DAC_CRT
+3VS_DAC_BG
+1.05VS_DPLLA
+1.05VS_DPLLB
+1.05VS_HPLL
+1.05VS_MPLL
1
C88
1000P_0402_50V7K
2
+1.05VS_PEGPLL
+1.05VS_A_SM
1
1
C97
2
2
1U_0603_10V4Z
0.1U_0402_16V4Z
1U_0603_10V4Z
C105
1
2
+3VS_TVDAC
+1.5VS
+1.5VS_TVDAC
+1.5VS_QDAC
+1.05VS_HPLL
+1.05VS_PEGPLL
+1.8V_LVDS
4
U2H
73mA
B27
VCCA_CRT_DAC
A26
VCCA_CRT_DAC
2.68mA
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
13.2mA
J48
VCCA_LVDS
J47
VSSA_LVDS
414uA
AD48
VCCA_PEG_BG
50mA
AA48
VCCA_PEG_PLL
AR20
VCCA_SM
AP20
VCCA_SM
AN20
VCCA_SM
AR17
VCCA_SM
AP17
VCCA_SM
AN17
VCCA_SM
AT16
VCCA_SM
AR16
VCCA_SM
AP16
VCCA_SM
AP28
VCCA_SM_CK
AN28
VCCA_SM_CK
AP25
VCCA_SM_CK
AN25
VCCA_SM_CK
AN24
VCCA_SM_CK
AM28
VCCA_SM_CK_NCTF
AM26
VCCA_SM_CK_NCTF
AM25
VCCA_SM_CK_NCTF
AL25
VCCA_SM_CK_NCTF
AM24
VCCA_SM_CK_NCTF
AL24
VCCA_SM_CK_NCTF
AM23
VCCA_SM_CK_NCTF
AL23
VCCA_SM_CK_NCTF
B24
VCCA_TV_DAC
A24
VCCA_TV_DAC
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL
AA47
VCCD_PEG_PLL
M38
VCCD_LVDS
L37
VCCD_LVDS
60.31mA
CANTIGA ES_FCBGA1329
64.8mA
64.8mA
24mA
139.2mA
720mA
26mA
26mA
TVA 24.15mA
TVB 39.48mA
TVX 24.15mA
50mA
58.67mA
48.363mA
157.2mA
50mA
CRTPLLA PEGA SMTV
A LVDSHDA
POWER
A CK
105.3mA
1732mA
D TV/CRT
LVDS
852mA
SM CK
118.8mA
VCC_TX_LVDS
DMI
456mA
VTT
321.35mA
VCC_AXF
VCC_AXF
VCC_AXF
AXF
124mA
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_HV
VCC_HV
VCC_HV
HV
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
PEG
VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI
VTTLF
VTTLF
VTTLF
VTTLF
3
+VCCP
U13
VTT
T13
VTT
U12
VTT
T12
VTT
U11
VTT
T11
VTT
U10
VTT
T10
VTT
U9
VTT
T9
VTT
U8
VTT
T8
VTT
U7
VTT
T7
VTT
U6
VTT
T6
VTT
U5
VTT
T5
VTT
V3
VTT
U3
VTT
V2
VTT
U2
VTT
T2
VTT
V1
VTT
U1
VTT
B22
B21
A21
BF21
BH20
BG20
BF20
K47
C35
B35
A35
V48
U48
V47
U47
U46
AH48
AF48
AH47
AG47
A8
L1
AB2
C110
0.47U_0603_10V7K
+V1.05VS_AXF
+1.8V_SM_CK
+1.8V_TXLVDS
+VCC_PEG
+1.05VS_DMI
0.47U_0603_10V7K
C111
1
2
1
C71
2
1
C80
2
1
2
4.7U_0805_10V4Z
220U_D2_4VM
C72
1
+
2
4.7U_0805_10V4Z
0.47U_0603_10V7K
C81
+3VS_HV
C107
0.47U_0603_10V7K
C112
1
2
2.2U_0805_16V4Z
1
1
C82
2
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C86
1
2
0.1U_0402_16V4Z
C73
C87
+1.05VS_PEGPLL
2
+1.05VS_DPLLA+VCCP
12
R90
10U_0805_10V4Z
0.1U_0402_16V4Z
1
2
10U_0805_10V4Z
1
2
+1.05VS_HPLL
+1.05VS_MPLL
C99
10U_FLC-453232-100K_0.25A_10%
C74
1
2
C91
1
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C100
10U_0805_10V4Z
2
1
2
+VCCP+1.05VS_DPLLB
R98
12
MBK2012121YZF_0805
R101
12
MBK2012121YZF_0805
L1
12
BLM18PG121SN1D_0603
C108
+VCCP
R94
12
10U_FLC-453232-100K_0.25A_10%
0.1U_0402_16V4Z
C90
1
2
1
2
0.1U_0402_16V4Z
C106
1
2
21
+3VS
+VCCP
+VCCP
+VCCP
+VCCP_D
D3
CH751H-40PT_SOD323-2
@
C83
R105
12
10_0402_5%
+V1.05VS_AXF
+1.8V_SM_CK
10U_0805_10V4Z
1
2
+1.5VS_TVDAC
+VCC_PEG
C98
+1.05VS_DMI
10U_0805_10V4Z
1
2
C84
1
2
1
C92
2
1
+
2
1
2
R106
12
0_0402_5%
C78
10U_0805_10V4Z
0.022U_0402_16V7K
220U_D2_4VM
0.1U_0402_16V4Z
C109
1
1
C93
2
C101
1
2
R104
12
0_0603_5%
1U_0603_10V4Z
0.1U_0402_16V4Z
1
2
1
2
0.1U_0402_16V4Z
10U_0805_10V4Z
C79
C85
R99
12
0_0805_5%
R102
12
0_0805_5%
+VCCP
+3VS_HV
R93
12
0_0603_5%
R95
12
0_0805_5%
+VCCP
+VCCP
+1.8V
+1.5VS
+1.8V_LVDS
R107
12
1U_0603_10V4Z
10U_0805_10V4Z
+3VS_TVDAC
AA
0.022U_0402_16V7K
C117
1
2
C118
1
2
R111
12
BLM18PG181SN1D_0603
0.1U_0402_16V4Z
5
+3VS
+1.5VS_QDAC
C119
1
2
0.022U_0402_16V7K
0.1U_0402_16V4Z
C120
1
2
4
R112
12
100_0603_1%
+1.5VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2007/08/282006/03/10
Compal Secret Data
Deciphered Date
Title
Size Document NumberRev
Custom
2
Date:Sheetof
Compal Electronics, Inc.
Cantiga(6/6)-PWR/GND
Montevina UMA
1
1446Wednesday, February 18, 2009
0.1
5
DDR_A_DQS#[0..7]10
DDR_A_D[0..63]10
DDR_A_DM[0..7]10
DDR_A_DQS[0..7]10
DDR_A_MA[0..14]10
DD
CC
BB
AA
Layout Note:Place nearJP3
+1.8V
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C152
1
2
Layout Note:Place one cap close to every 2pullup resistors terminated to +0.9VS
+0.9V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C159
C158
DDR_A_BS2
DDR_CKE0_DIMMA
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA1
DDR_A_MA3
DDR_A_BS0
DDR_A_MA10
DDR_A_CAS#
DDR_A_WE#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_MA11
5
C147
1
2
0.1U_0402_16V4Z
1
2
C160
56_8P4R_0.05
56_8P4R_0.05
56_8P4R_0.05
23
14
12
R117 56_0402_5%
C153
1
2
0.1U_0402_16V4Z
1
2
C161
RP29
18
27
36
45
RP31
18
27
36
45
RP33
18
27
36
45
RP1156_0404_4P2R_5%
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C154
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C162
+0.9V
56_8P4R_0.05
56_8P4R_0.05
56_8P4R_0.05
+0.9V
C155
1
2
0.1U_0402_16V4Z
1
2
C163
RP30
18
27
36
45
RP32
18
27
36
45
RP34
18
27
36
45
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
1
2
2
C164
DDR_A_MA14
DDR_CKE1_DIMMA
DDR_A_MA6
DDR_A_MA7
DDR_A_MA2
DDR_A_MA4
DDR_A_BS1
DDR_A_MA0
DDR_A_MA13
M_ODT0
DDR_CS0_DIMMA#
DDR_A_RAS#
C156
0.1U_0402_16V4Z
C165
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C166
C149
C148
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C167
330U_D2E_2.5VM_R7
0.1U_0402_16V4Z
1
2
C168
1
C157
1
+
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
C169
C170
Layout Note:Place these resistorclosely JP3,alltrace length Max=1.5"
C150
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.