Hewlett Packard’s AT-33225 is a
low cost, NPN power silicon
bipolar junction transistor housed
in a miniature MSOP-3 surface
mount plastic package. This
device is designed for use as an
output device for AMPS and
ETACS mobile phones. The
AT-33225 features over 1 watt
CW␣ output power when operated
at 4.8 volts. Excellent gain and
superior efficiency make the
AT-33225 ideal for use in battery
powered systems.
The AT-33225 is fabricated with
Hewlett Packard’s 10 GHz Ft SelfAligned-Transistor (SAT) process.
The die are nitride passivated for
surface protection. Excellent
device uniformity, performance
and reliability are produced by the
use of ion-implantation, selfalignment techniques, and gold
metalization in the fabrication of
these devices.
4-71
5965-5910E
AT-33225 Absolute Maximum Ratings
Absolute
SymbolParameterUnitsMaximum
V
EBO
V
CBO
V
CEO
I
C
P
T
T
j
T
STG
Emitter-Base VoltageV1.4
Collector-Base VoltageV16.0
Collector-Emitter VoltageV9.5
Collector CurrentmA640
Power Dissipation
[2]
W1.6
Junction Temperature°C150
Storage Temperature°C-65 to 150
[1]
Thermal Resistance
[3]
:
θjc = 40°C/W
Notes:
1. Permanent damage may occur if
any of these limits are exceeded.
2. Derate at 25 mW/°C for T
Tc is defined to be the temperature
of the collector pin 4, where the
lead contacts the circuit board.
3. Using the liquid crystal technique,
= 4.5 V, Ic= 100 mA, T
V
CE
1-2␣ µm “hot-spot” resolution.
> 85°C.
C
=150°C,
j
Electrical Specifications, T
= 25° C
C
SymbolParameters and Test ConditionsUnits Min.Typ. Max.
Freq. = 900 MHz, VCE = 4.8 V, ICQ = 6 mA, CW operation, Test Circuit A,
unless otherwise specified
P
out
η
C
Output Power
Collector Efficiency
IMD33rd Order Intermodulation Distortion, 2 Tone Test,F1 = 899 MHzdBc-29
P
each Tone = +24 dBm
out
Mismatch Tolerance, No Damage
[1]
[1]
[1]
[1]
Pin = +22 dBmdBm+30.0+31.0
Pin = +22 dBm%6070
F2 = 901 MHz
P
= +31 dBm7:1
out
any phase, 2 sec duration
BV
BV
BV
h
FE
I
CEO
Note:
1. With external matching on input and output, tested in a 50 ohm environment. Refer to Test Circuit A (ETACS/ISM).
Emitter-Base Breakdown VoltageIE = 0.4 mA, open collectorV1.4
EBO
Collector-Base Breakdown VoltageIC = 2.0 mA, open emitterV16.0
CBO
Collector-Emitter Breakdown VoltageIC = 10.0 mA, open baseV9.5
CEO
Forward Current Transfer RatioVCE = 3 V, IC = 180 mA—80150330
Collector Leakage CurrentV
= 5 VµA30
CEO
4-72
AT-33225 Typical Performance, T
= 25° C
C
Frequency = 900 MHz, VCE = 4.8 V, ICQ = 6 mA, CW operation, Test Circuit A (ETACS/ISM), unless otherwise specified.
33
Γ
= 0.82 ∠ -163
source
30
Γ
= 0.67 ∠ -174
load
27
(dBm)
24
21
18
15
12
OUTPUT POWER
9
6
21461018 2422
P
out
η
INPUT POWER (dBm)
c
90
80
70
60
50
40
30
20
10
0
Figure 1. Output Power and Collector
Efficiency vs. Input Power.
35
Γ
= 0.82 ∠ -163
source
Γ
= 0.67 ∠ -174
load
30
(%)
25
(dBm)
20
15
10
OUTPUT POWER
5
COLLECTOR EFFICIENCY
0
21461018 242221461018 2422
INPUT POWER (dBm)
3.6 V
4.8 V
6.0 V
Figure 2. Output Power vs. Input
Power Over Bias Voltage.
90
Γ
= 0.82 ∠ -163
source
80
Γ
= 0.67 ∠ -174
load
(%)
70
60
50
40
30
20
COLLECTOR EFFICIENCY
10
0
INPUT POWER (dBm)
3.6 V
4.8 V
6.0 V
Figure 3. Collector Efficiency vs.
Input Power Over Bias Voltage.
34
Γ
= 0.82 ∠ -163
source
30
Γ
= 0.67 ∠ -174
load
26
(dBm)
22
18
14
OUTPUT POWER
10
6
21461018 2422
INPUT POWER (dBm)
TC = +85°C
= +25°C
T
C
= –40°C
T
C
Figure 4. Output Power vs. Input
Power Over Temperature.
-15
Γ
= 0.82 ∠ -163
source
Γ
= 0.67 ∠ -174
load
-20
-25
(dBc)
-30
IMD
-35
-40
-45
111713 1519 2125 2723
OUTPUT POWER/TONE (dBm)
IMD
3
IMD
5
Figure 5. IMD3, IMD5 vs. Output
Power Per Tone.
5
Γ
= 0.82 ∠ -163
source
0
Γ
= 0.67 ∠ -174
load
-5
(dB)
-10
-15
-20
RETURN LOSS
-25
-30
8008509501000900
Output R.L.
Input R.L.
FREQUENCY (MHz)
Figure 6. Input and Output Return
Loss vs. Frequency.
4-73
AT-33225 Typical Performance, T
= 25° C
C
Frequency = 836.5 MHz, VCE = 4.8 V, ICQ = 6 mA, CW operation, Test Circuit B (AMPS), unless otherwise specified.
33
Γ
= 0.81 ∠ -165
source
30
Γ
= 0.66 ∠ -174
load
27
(dBm)
24
21
18
15
12
OUTPUT POWER
9
6
21461018 2422
P
out
η
INPUT POWER (dBm)
c
90
80
70
60
50
40
30
20
10
0
Figure 7. Output Power and Collector
Efficiency vs. Input Power.
5
Γ
= 0.81 ∠ -165
source
Γ
= 0.66 ∠ -174
load
0
35
Γ
= 0.81 ∠ -165
source
Γ
= 0.66 ∠ -174
load
30
(%)
25
(dBm)
20
15
10
OUTPUT POWER
5
COLLECTOR EFFICIENCY
0
21461018 2422
INPUT POWER (dBm)
3.6 V
4.8 V
6.0 V
Figure 8. Output Power vs. Input
Power Over Bias Voltage.
90
Γ
= 0.81 ∠ -165
source
80
Γ
= 0.66 ∠ -174
load
(%)
70
60
50
40
30
20
COLLECTOR EFFICIENCY
10
0
21461018 2422
INPUT POWER (dBm)
3.6 V
4.8 V
6.0 V
Figure 9. Collector Efficiency vs.
InputPower Over Bias Voltage.
(dB)
-5
-10
-15
RETURN LOSS
-20
-25
750800850950900
Output R.L.
Input R.L.
836.5
FREQUENCY (MHz)
Figure 10. Input and Output Return
Loss vs. Frequency.
4-74
AT-33225 Typical Large Signal Impedances
6.0
6.5
7.0
10.0
9.5
8.5
9.0
7.5
8.0
0462108
Ccb
(pF)
Vcb (V)
Figure 11. Collector-Base
Capacitance vs. Collector-Base
Voltage (DC Test).