Holtek Semiconductor Inc HTG12G0 Datasheet
Features
•
Operating voltage: 2.4V~3.3V
•
Eight input lines
•
Two output lines
•
Five working registers
•
RC oscillator for system clock
•
Crystal oscillator for RTC and LCD clock
•
8K×8 program ROM
•
156×4 data RAM
•
50×8 segment LCD driver, 1/5 bias, 1/8 duty
•
8-bit programmable timer with built-in
frequency source
General Description
The HTG12G0 is a 4-bit singl e chip microcontroller specially designed for LCD product applications.
HTG12G0
Microcontroller
•
Internal timer overflow and RTC interrupt
•
16 kinds of programmable sound effects
•
Halt function and wake-up feature
reduce power consumption
•
One-level subroutine nesting
•
8-bit table read instruction
•
Up to 4.0µs instruction cycle with 1.0MHz
system clock at V
•
95 powerful instructions
It is ideally suited for applications requiring
low power consumption, with many L CD segments such as calculator , scale, subsystem controller, hand-held LCD products and electroni c
appliances.
DD
=3V
1 14th May ’99
Block Diagram
HTG12G0
Notes: ACC: Accumulator PC: Program counter
R0~R4: Working registers P A0~PA1: Output ports
PP , PS: Input ports PA3: ROM bank control bit
PA2: LCD on/off switch
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Pad Assignment
HTG12G0
Chip size: 3070 × 4440 (µm)
* The IC substrate should be connected to VSS in the PCB layout artwork.
3 14th May ’99
2
HTG12G0
Pad Coordinates Unit: µm
Pad No. X Y Pad No. X Y
1 –1403.50 2012.75 42 1412.00 –1270.25
2 –1403.50 1872.75 43 1412.00 –1134.25
3 –1403.50 1741.75 44 1412.00 –998.25
4 –1403.50 1610.75 45 1412.00 –862.25
5 –1304.00 1431.75 46 1412.00 –726.25
6 –1304.00 1276.25 47 1412.00 –590.25
7 –1358.50 1104.25 48 1412.00 –454.25
8 –1409.50 929.25 49 1412.00 –318.25
9 –1403.50 377.75 50 1412.00 –182.25
10 –1403.50 249.75 51 1412.00 –46.25
11 –1403.50 121.75 52 1412.00 89.75
12 –1403.50 –6.25 53 1412.00 225.75
13 –1403.50 –134.25 54 1412.00 361.75
14 –1403.50 –262.25 55 1412.00 497.75
15 –1403.50 –390.25 56 1412.00 633.75
16 –1403.50 –518.25 57 1412.00 769.75
17 –1403.50 –646.25 58 1412.00 905.75
18 –1403.50 –774.25 59 1412.00 1041.75
19 –1403.50 –902.25 60 1412.00 1177.75
20 –1403.50 –1030.25 61 1412.00 1313.75
21 –1403.50 –1158.25 62 1412.00 1449.75
22 –1403.50 –1286.25 63 1412.00 1585.25
23 –1403.50 –1414.25 64 1412.00 1720.75
24 –1403.50 –1542.25 65 1412.00 1865.25
25 –1409.50 –1680.75 66 1412.00 2034.75
26 –1342.00 –1926.25 67 1071.50 2037.25
27 –1071.50 –1920.25 68 490.00 2034.75
28 –871.50 –1920.25 69 358.00 2034.75
29 –640.00 –1994.75 70 228.00 2034.75
30 –500.00 –1994.75 71 105.00 2034.75
31 –360.00 –1994.75 72 –18.00 2034.75
32 –220.00 –1994.75 73 –141.00 2034.75
33 –80.00 –1994.75 74 –264.00 2034.75
34 60.00 –1994.75 75 –387.00 2034.75
35 200.00 –1994.75 76 –510.00 2034.75
36 340.00 –1994.75 77 –633.00 2034.75
37 1412.00 –2034.75 78 –756.00 2034.75
38 1412.00 –1877.25 79 –879.00 2034.75
39 1412.00 –1712.25 80 –1002.00 2034.75
40 1412.00 –1542.25 81 –1129.50 2034.75
41 1412.00 –1406.25
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Pad Description
Pad No. Pad name I/O Mask Option Description
1~4,
36~81
5
6
7 VDD I — Positive power supply
8
9
10
19
20
26
11~18 COM7~COM0 O — Output for LCD panel common plate
21~24 PS3~PS0 I
25 VSS I — Negative power supply, GND
27
28
29
30
31~34 PP0~PP3 I
35
SEG3~SEG0
SEG49~SEG4
BZ
BZ
OSCI
OSCO
T512
TEST1
TEST2
T1D
PA1
PA0
XIN
XOUT
RES I —
O — LCD driver outputs for LCD panel segment
O * Sound effect output
I
O
O
I
I
O
O
I
O
—
—
Pull-high or
None
**
CMOS or
NMOS
Open Drain
— 32768Hz crystal oscillator for time base
Pull-high or
None
**
An external resistor between OSCI and OSCO
is needed for internal system clock.
For test mode only
TEST1 and TEST2 must be open when the
HTG12G0 is in normal operation (with an
internal pull high resistor)
4-bit port for input only
2-bit latch port for output only
4-bit port for input only
Input for reset LSI inside
Reset is active at logical low level
HTG12G0
*: 6 internal sources deriving from the system clock can be selected as sound effect clock by mask
option. If Holtek’s sound library is invoked, only 128K and 64K is accepted.
**: Each bit of input ports PS, PP can be a trigger source of HALT interrupt. That can be specified
by mask option.
Absolu te Maximu m R a tin g s
Supply Voltage .........................VSS–0.3V to 13V Operating Temperature...................0°C to 70°C
Input V oltage.......................V
Note: These are stress ratings only. Stresses exceeding the range spe cified under “Absolute Maxi-
mum Ratings” may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
–0.3 to VDD+0.3 Storage Temperature.................–50°C to 125°C
SS
5 14th May ’99
HTG12G0
D.C. Characteristics Ta=25°C
Symbol Parameter
V
DD
I
DD
Operating Voltage — — 2.4 — 3.3 V
Operating Current 3V No load, f
Standby Current
I
STB
(RTC OSC ON)
and LCD ON
V
V
V
V
I
I
I
I
I
I
I
I
R
R
IL1
IH1
IL2
IH2
OL1
OH1
OL2
OH2
OL3
OH3
OL4
OH4
PH1
PH2
Input Low Voltage 3V PS, PP 0 — 0.6 V
Input High Voltage 3V PS, PP 2.1 — 3.0 V
Input Low Voltage 3V RES 0 — 0.6 V
Input High Voltage 3V RES 2.5 — 3.0 V
Port A, BZ and BZ
Output Sink Current
Port A, BZ and BZ
Output Source Current
Segment 0~7 Output
Sink Current
Segment 0~7 Output
Source Current
Segment 8~49 Output
Sink Current
Segment 8~49 Output
Source Current
Common Output Sink
Current
Common Output
Source Current
Pull-high Resistance 3V PS, PP 15 — 200 kΩ
Pull-high Resistance 3V RES 100 — 300 kΩ
Test Conditions
V
DD
Conditions
=500kHz — 100 500 µA
SYS
Min. Typ. Max. Uint
3V System halt — 10 20
3V V
3V V
3V V
3V V
3V V
3V V
3V V
3V V
=3V, VOL=0.3V 1.5 3.0 — mA
DD
=3V, VOH=2.7V –0.5 –1.5 — mA
DD
=3V, VOL=0.3V 80 100 — µA
LCD
=3V, VOH=2.7V –50 –70 — µA
LCD
=3V, VOL=0.3V 40 60 — µA
LCD
=3V, VOH=2.7V –20 –40 — µA
LCD
=3V, VOL=0.3V 100 120 — µA
LCD
=3V, VOH=2.7V –100 –130 — µA
LCD
µA
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HTG12G0
A.C. Characteristics Ta=25°C
Symbol Parameter
f
SYS
f
LCD
t
COM
t
CY
t
RES
f
SOUND
System Clock 3V R:620kΩ~51kΩ 100 — 1000 kHz
LCD Clock 3V — — 512 — Hz
LCD Common Period — 1/8 duty — (1/f
Cycle Time — f
Reset Pulse Width — — 5 — — ms
Sound Effect Clock — — — 64 or 128* — kHz
Test Conditions
V
DD
Conditions
=1.0MHz — 4.0 — µs
SYS
Min. Typ. Max. Unit
)x8 — sec
LCD
*: Only these two clock signal frequencies are supported by Holtek sound library.
7 14th May ’99
Functional Description
Program counter – PC
The 12-bit program counter is controlled by PA3
which can change the ROM bank of the program
memory. There are two program memory banks
which are selected by PA3, e ach bank is 4KB
ROM. The instruction“OUT PA, A” is used to
change the value of PA3. Then, low or hi gh 4K
ROM is selected accordingly. All instructions
are not effective on the crossin g bank, unless
the value of PA3 is changed in advance.
The 12-bit program counter (PC) controls the
sequence in which the instructions stored in the
program ROM are executed and its contents
specify a max. of 4096 address.
After accessing a memory word to fetch an instruction code, the contents of the program
counter are incremented by one or two, then the
program counter will point to the memory word
containing the next instruction code.
Mode
Initial
reset
Internal
interrupt
External
interrupt
Jump, call
instruction
Conditional
branch
Return from
subroutine
PA3 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
1 0 00000000 000
PA30 00000000 1 00
PA30 00000001 0 00
PA3 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PA3 @ PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PA3 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
HTG12G0
When executing the jump instruction (JMP,
JNZ, JC, JTMR...), subro uti ne cal l, intern al interrupt, RTC inte rrupt or return from su broutine, the PC manipulate s the pro gram transfer
by loading the address corresponding to each
instruction.
Progr a m me mory – ROM
The program memory is used to store program
instruction which is to be execu ted . It is orga nized into 8192
gram counter and PA3.
Certain locations in bank 0 of the program
memory are reserved for specific usage:
•
Location 0004H
This area is reserved for TIMER interrupt
service program. A timer interrupt results
from TIMER overflow, if interrupt is enabled,
the CPU begins execution at location 0004H.
Program Counter
×8 bits and addressed by the pro-
Notes: PC11~PC0: Instruction code bits @: PC11 keeps current value
S11~S0: Stack register bits P A3: Bank value bits
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•
Location 0008H
This area is reserved for RTC interrup t serv-
ice program.
•
Location 0n00H~0nFF H (n=current number)
and 0F00H~0FFFH.
The last 256 bytes of each page in the program
memory, addressed f rom 0n00H to 0n FFH and
0F00H to 0FFFH can be used as a look–up
table. The instructions READ R4A, READ
MR0A, READF R4A, READF MR0A can read
the table and transfer the contents of the table
to ACC and R4 or transfer to ACC and data
memory addresse d by register p air “R1, R0”.
These areas may function as a normal program memory depending on the requirements.
Certain locations in bank 1 of the program
memory are reserved for specific usage:
•
Location 1000H
This area is reserved for the initialization pro-
gram. After reset, the CPU always begins execution at location 1000H.
•
Location 1004H
This area is reserved for TIMER interrupt
service program. A timer interrupt results
from TIMER overflow, if interrupt is enabled,
the CPU begins execution at location 1004H.
•
Location 1008H
This area is reserved for RTC interrup t serv-
ice program.
•
Location 1n00H~1nFF H (n=current number)
and 1F00H~1FFFH.
The last 256 bytes of each page in the program
memory, addressed f rom 1n00H to 1n FFH and
1F00H to 1FFFH can be used as a look–up
table. The instructions READ R4A, READ
MR0A, READF R4A, READF MR0A can read
the table and transfer the contents of the table
to ACC and R4 or transfer to ACC and data
memory addresse d by register p air “R1, R0”.
These areas may function as a normal program memory depending on the requirements.
The program memory (ROM) mapping is
shown below:
HTG12G0
Program memory
In the execution of an instruction, the program counter is added before the executing
phase. So a careful manipulation of READ
MR0A and READ R4A is needed in the page
margin.
Stack register
This is a special group of register which is used
to save the contents of the program counter
(PC) and is organized with 13 bits
bit is used to sto re the ca rry flag. An inte rrupt
will force the contents of the PC and the carry
flag onto the stack register. A subroutine call
will also cause the PC contents to be pushed
onto the stack; however the carry flag will not
be stored. At the en d of a subroutine or interrupt routine which is signaled by a return instruction, RET or RETI restores the program
counter to its previous value from stack register.
Executing “RETI” instruction will restore the
carry flag from the stack register, but “RET”
does not.
×1 level. One
9 14th May ’99
HTG12G0
Working registers – R0, R1, R2, R3, R4
These five registers are usually used to store the
frequently accessed data. Th e workin g regi ster
can be incremented (+1) or decremented (–1).
The JNZ Rn,address (n=0,1,4) instruction
makes very efficient use of the working register
as program loop counter. The register pairs of
R1, R0 and R3, R2 can also be used as the data
memory pointer, when the data memory transfer instruction is executed.
Data memory – RAM
The data memory is a static RAM organized
with 256
× 4 bits and is used to store temporary
data and display data. All of the data memory
locations are indirectly addressable through the
register pair “R1, R0” or “R3, R2”.
There are two areas in the data memory , temporary data area and display data area. Access to
temporary data memory is made through
00H~9BH address, an d access to display data
memory is made in 9CH~FFH address.
When data is written in the di splay area, the
LCD driver automatically reads it and generates an LCD driving signal.
Data memory
Accumulator – ACC
The register ACC plays the most important role
in data manipulation and data transfer. It is not
only one of the s ources of inp ut to the A LU bu t
also the destin ation of the result due to ALU.
Data transfer can be performed b etween ACC
and other registers, data memory or I/O ports.
Arithmetic and log ic unit – ALU
This circuit performs arithmeti c and logic operation. The AL U provides the fol lowing functions:
•
Arithmetic operation
(ADD, ADC, SUB, SBC, DAA)
•
Logic operation (AND, OR, XOR)
•
Rotation (RL, RR, RLC, RRC)
•
Increment and Decrement (INC, DEC)
•
Branch decision (JZ, JNZ, JC, JNC...)
The ALU not only outputs the results of data
operation but also sets the status of carry flag
(C) in some instructions.
Timer
This is a programmable 8–bit count-up counter ,
internal frequency sources used to aid the user
in counting and generating accurate time base.
The Timer can be pre-set and read with software instructions. “TIMER XXH”, “MOV
TMRL, A” and “MOV TMRH, A” preload TIMER
value. “MOV A, TMR L” and “MOV A, TMRH”
read the contents of TIMER to ACC.
The Timer is stopped by a hardware reset or
“TIMER OFF” instruction and started by a
TIMER ON instruction.
Once the Timer is started, it will in crement to
its maximum count (FFH) and overflows to zero
(00H). It will not stop until there is a “TIMER
OFF” instruction or reset. When an overflow
occurs, it will set the Timer Flag (T F) simultaneously. If interrupt is enabled, the Timer circuit supports TF for internal interrupt. The
state of the TF can be tested with the conditional instruction JTMR.
The Timer flag is cleared after the interrupt or
JTMR instruction is executed.
The frequency of the internal frequency so urce
can be selected by mask option.
Frequency of TIMER clock
system clock
=
n
2
Where n=0,1,2......13 except 6, by mask option
(the sixth stage is reserved for internal use).
10 14th May ’99
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