Holtek Semiconductor Inc HT1650 Datasheet

64´32 LCD Controller for I/O MCU

Technical Document

·

FAQs

·

Application Note

Features

·

Operating voltage: 2.7V~5.2V

·

Built-in 32kHz RC oscillator

·

External 32.768kHz crystal oscillator or 32kHz fre quency source input

·

Standby current: <1mA at 3V, <2mAat5V

·

Internal resistor type: 1/6 bias or 1/5 bias, 1/32 duty, and 1/16 duty

·

Three selectable LCD frame frequencies: 64Hz, 89Hz or 170Hz

·

Max. of 64´32 patterns, 64 segments and 32 com mons

·

80 segments and 16 commons selectable by com mand method

·

Built-in bit-map display RAM: 2048 bits (=64´32 bits)

·

Built-in internal resistor type bias generator

HT1650

·

Six-wire interface (four data wires)

·

Eight kinds of time base or WDT selection

·

-

Time base or WDT overflow output

·

R/W address auto increment

·

Built-in buzzer driver (2kHz/4kHz)

·

Power down command reduces power consumption

·

Software configuration feature

·

Data mode and Command mode instructions

·

Three data accessing modes

·

Provides VLCD pin to adjust LCD operating voltage and max. VLCD voltage up to 7V

·

Provides three kinds of bias current programming

·

Control of TN-type and STN-type LCDs

·

128-pin QFP package

Applications

·

Leisure products

·

Games

·

Personal digital assistant

General Description

HT1650 is a peripheral device specially designed for I/O type MCUs which are used to expand the display capa bility. The max. display segment of the device are 2048 patterns (64 segments and 32 commons). It also sup ports four data bits interface, buzzer sound, Watchdog Timer or time base timer functions. The HT1650 is a memory mapping and multi-function LCD controller. It

·

Cellular phone

·

Global positioning system

·

Consumer electronics

can control TN-type (Twisted Nematic) or STN-type

-

(Super Twisted Nematic) LCDs. The software configu ration feature of the HT1650 make it suitable for multiple

-

LCD applications including LCD modules and display subsystems. Only six lines (CS

,WR, DB0~DB3) are re quired for the interface between the host controller and the HT1650.

-

Rev. 1.20 1 November 10, 2005

Block Diagram

HT1650

Pin Assignment

C O M 1 8 C O M 1 7 C O M 1 6

D B 0 D B 1 D B 2 D B 3 V S S

O S C I

O S C O

V D D

V L C D

I R Q

T 0 0 0

V L C D

C O M 0 C O M 1 C O M 2

O S C O

O S C I

C S

R D

W R

C o n t r o l

& T i m i n g C i r c u i t

D B 0

D B 3

V D D

V S S

B Z

C O M 1 9

1 2 8

1

2

3

4

N C

5

N C

6

N C

7

N C

8

N C

9

N C

1 0

C S

1 1

R D

1 2

W R

1 3

1 4

1 5

1 6

1 7

1 8

1 9

2 0

2 1

2 2

2 3

B Z

2 4

B Z

2 5

T 1

2 6

T 2

2 7

T 3

2 8

T 4

2 9

3 0

3 1

N C

3 2

N C

3 3

N C

3 4

N C

3 5

N C

3 6

3 7

3 8

3 9 5 4

C O M 3

T o n e F r e q u e n c y

G e n e r a t o r

N o t e : C S : C h i p s e l e c t i o n

B Z , B Z : T o n e o u t p u t s W R , R D : W R I T E c l o c k , R E A D c l o c k D B 0 ~ D B 3 : D a t a b u s C O M 0 ~ C O M 3 1 , S E G 0 ~ S E G 6 3 : L C D o u t p u t s I R Q : T i m e b a s e o r W D T o v e r f l o w o u t p u t

C O M 2 6

C O M 2 5

C O M 2 4

C O M 2 3

C O M 2 2

C O M 2 1

C O M 2 0

1 2 5

1 2 4 1 2 1

1 2 61 2 7

4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 04 0 5 1 5 2 5 3

C O M 5

C O M 4

1 2 21 2 3

C O M 1 0

C O M 9

C O M 8

C O M 7

C O M 6

C O M 2 9

C O M 2 8

C O M 2 7

1 2 0 1 1 9

1 1 8 1 1 7 1 1 6

1 2 8 Q F P - A

C O M 1 3

C O M 1 2

C O M 1 1

D i s p l a y R A M

L C D D r i v e r / B i a s C i r c u i t

W a t c h d o g T i m e r

&

T i m e B a s e G e n e r a t o r

C O M 3 1

C O M 3 0

S E G 6 3

1 1 5 1 1 4

S E G 6 0

S E G 6 1

S E G 6 2

1 1 2 1 1 1

1 1 3

H T 1 6 5 0

5 5 5 6 5 7 5 8 5 9

S E G 3

S E G 2

S E G 1

S E G 0

C O M 1 5

C O M 1 4

C O M 0

C O M 3 1

S E G 0

S E G 6 3

V L C D

I R Q

S E G 5 1

S E G 5 2

S E G 5 3

S E G 5 4

S E G 5 5

S E G 5 6

S E G 5 7

S E G 5 8

S E G 5 9

1 0 9

1 1 0

1 0 8 1 0 7

S E G 7

S E G 6

S E G 5

S E G 4

1 0 4 1 0 3

1 0 6 1 0 5

6 0 6 1 6 2 6 3 6 4

S E G 1 1

S E G 1 0

S E G 9

S E G 8

1 0 2

S E G 5 0

1 0 1

S E G 4 9

1 0 0

S E G 4 8

9 9

S E G 4 7

9 8

S E G 4 6

9 7

S E G 4 5

9 6

S E G 4 4

9 5

S E G 4 3

9 4

S E G 4 2

9 3

S E G 4 1

9 2

S E G 4 0

9 1

S E G 3 9

9 0

S E G 3 8

8 9

S E G 3 7

8 8

S E G 3 6

8 7

S E G 3 5

8 6

S E G 3 4

8 5

S E G 3 3

8 4

S E G 3 2

8 3

S E G 3 1

8 2

S E G 3 0

8 1

S E G 2 9

8 0

S E G 2 8

7 9

S E G 2 7

7 8

S E G 2 6

7 7

S E G 2 5

7 6

S E G 2 4

7 5

S E G 2 3

7 4

S E G 2 2

7 3

S E G 2 1

7 2

S E G 2 0

7 1

S E G 1 9

7 0

S E G 1 8

6 9

S E G 1 7

6 8

S E G 1 6

6 7

S E G 1 5

6 6

S E G 1 4

6 5

S E G 1 3

S E G 1 2

Rev. 1.20 2 November 10, 2005

Pad Assignment

1

S E G 4 7

2

S E G 4 8

3

S E G 4 9 S E G 5 0

4

S E G 5 1

5

S E G 5 2

6

S E G 5 3

7

S E G 5 4

8

S E G 5 5

9

S E G 5 6

1 0

S E G 5 7

1 1

S E G 5 8

1 2

S E G 5 9

1 3

S E G 6 0

1 4

S E G 6 1

1 5

S E G 6 2

1 6 1 7

S E G 6 3

1 8

C O M 3 1

1 9

C O M 3 0

2 0

C O M 2 9 C O M 2 8

2 1 2 2

C O M 2 7 C O M 2 6

2 3

C O M 2 5

2 4

2 5

C O M 2 4

2 6

C O M 2 3 C O M 2 2

2 7

C O M 2 1

2 8 2 9

C O M 2 0 C O M 1 9

3 0

3 1

C O M 1 8

S E G 4 4

S E G 4 5

S E G 4 6

1 1 5

1 1 4

1 1 7

1 1 6

3 4 3 5 3 6 3 7 3 8 3 9

3 3

3 2

C O M 1 7

C O M 1 6

C S

HT1650

S E G 1 7

S E G 1 8

S E G 1 9

S E G 2 0

S E G 2 1

S E G 2 2

S E G 2 3

S E G 2 4

S E G 2 5

S E G 2 6

S E G 2 7

S E G 2 8

S E G 2 9

S E G 3 0

S E G 3 1

S E G 3 2

S E G 3 3

S E G 3 4

S E G 3 5

S E G 3 6

S E G 3 7

S E G 3 8

S E G 3 9

S E G 4 0

S E G 4 1

S E G 4 2

S E G 4 3

1 0 3

1 0 6

1 0 9

1 1 2

1 1 1

1 1 3

1 1 0

W R

R D

D B 0

D B 1

1 0 5

1 0 8

1 0 7

4 0 4 1

D B 2

D B 3

V S S

1 0 4

4 2 4 3

O S C I

1 0 1

1 0 2

1 0 0

9 9

( 0 , 0 )

4 5

4 6

4 4

O S C O

I R Q

V L C D

V D D

9 5

9 69 79 8

9 39 4

5 0

4 9

4 8

4 7

T 2

T 1

B Z

8 9

9 1

9 0

9 2

8 8

8 7

S E G 1 6

8 6

S E G 1 5 S E G 1 4

8 5

S E G 1 3

8 4

S E G 1 2

8 3

S E G 1 1

8 2

S E G 1 0

8 1

S E G 9

8 0

S E G 8

7 9

S E G 7

7 8

S E G 6

7 7

S E G 5

7 6

S E G 4

7 5 7 4

S E G 3

7 3

S E G 2

7 2

S E G 1

7 1

S E G 0

7 0

C O M 1 5

6 9

C O M 1 4

6 8

C O M 1 3

6 7

C O M 1 2

6 6

C O M 1 1

6 5

C O M 1 0

6 4

C O M 9

6 3

C O M 8

6 2

C O M 7

6 1

C O M 6

6 0

C O M 5 C O M 4

5 9

C O M 3

5 8

5 2

5 1

5 3

5 4

T 0 0 0

T 4

T 3

5 7

5 5 5 6

V L C D

C O M 0

C O M 1

C O M 2

Chip size: 4105´3840 (mm)

2

* The IC substrate should be connected to VSS in the PCB layout artwork.

Pad Coordinates

Unit: mm

Pad No. X Y Pad No. X Y Pad No. X Y

10 11 12 13 14 15 16 17

1 2 3 4 5 6 7 8 9

-1921.00

1635.35 40

1535.35 41

1435.35 42

1335.35 43

-417.35 -1639.80

-276.25 -1639.80

-141.75 -1644.30

-3.55 -1644.30

1235.35 44 137.25

1135.35 45 212.30

1035.35 46 393.90

935.35 47 540.40

835.35 48 675.80

735.35 49 835.40

635.35 50 983.60

535.35 51 1130.60

435.35 52 1278.80

335.35 53 1425.80

235.35 54 1577.90

135.35 55 1714.90

35.35 56 1814.90

-1711.95

-1576.95

-1598.20

-1639.90

-1701.15

-1751.90

79 1918.10 639.60 80 1918.10 739.60 81 1918.10 839.60 82 1918.10 939.60 83 1918.10 1039.60 84 1918.10 1139.60 85 1918.10 1239.60 86 1918.10 1339.60 87 1918.10 1439.60 88 1454.90 1760.40 89 1354.90 1760.40 90 1254.90 1760.40 91 1154.90 1760.40 92 1054.90 1760.40 93 954.90 1760.40 94 854.90 1760.40 95 754.90 1760.40

Rev. 1.20 3 November 10, 2005

HT1650

Pad No. X Y Pad No. X Y Pad No. X Y

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

-1921.00 -64.65

-1921.00 -164.65

-1921.00 -264.65

-1921.00 -364.65

-1921.00 -464.65

-1921.00 -564.65

-1921.00 -664.65

-1921.00 -764.65

-1921.00 -864.65

-1921.00 -964.65

-1921.00 -1064.65

-1921.00 -1164.65

-1921.00 -1264.65

-1612.45 -1747.70

-1512.45 -1747.70

-1412.45 -1747.70

-1258.55 -1639.80

-1115.95 -1639.80

-980.55 -1639.80

-833.65 -1639.80

-698.25 -1639.80

-552.95 -1639.80

57 1914.90 58 1918.10 59 1918.10 60 1918.10 61 1918.10 62 1918.10 63 1918.10 64 1918.10 65 1918.10 66 1918.10 67 1918.10 68 1918.10 69 1918.10 70 1918.10 71 1918.10 72 1918.10 73 1918.10 39.60 112 74 1918.10 139.60 113 75 1918.10 239.60 114 76 1918.10 339.60 115 77 1918.10 439.60 116 78 1918.10 539.60 117

-1751.90

-1465.70

-1365.70

-1265.70

-1165.70

-1065.70

-965.70

-865.70

-765.70

-665.70

-565.70

-465.70

-365.70

-265.70

-160.40

-60.40

96 654.90 1760.40 97 554.90 1760.40 98 454.90 1760.40

99 354.90 1760.40 100 254.90 1760.40 101 154.90 1760.40 102 54.90 1760.40 103 104 105 106 107 108 109 110 111

-45.10

-145.10

-245.10

-345.10

-445.10

-545.10

-645.10

-745.10

-845.10

-945.10

-1045.10

-1145.10

-1245.10

-1345.10

-1445.10

1760.40

Pad Description

Pad No. Pad Name I/O Description

1~17 71~117

18~33 55~70

34 CS

35 RD

36 WR

37~40 DB0~DB3 I/O Parallel data input/output with pull-high resistor

41 VSS

42 43

44 VDD

45 VLCD I Power supply for LCD driver circuit

46 IRQ

47, 48 BZ, BZ

49~53 T1~T4, T000 I

SEG47~SEG63 SEG0~SEG46

COM31~COM16 COM0~COM15

OSCI OSCO

O LCD segment outputs

LCD common outputs, under 80´16 command mode, COM16~COM31 will

O

be shared with SEG64~SEG79. COM31/SEG64, COM30/SEG65,

COM29/SEG66....., COM18/SEG77, COM17/SEG78, COM16/SEG79

Chip selection input with pull-high resistor. When the CS data and command read from or write to the HT1650 are disabled. The serial interface circuit is also reset. But if the CS

I

the CS

pad, the data and command transmission between the host controller

and the HT1650 are all enabled.

READ clock input with pull-high resistor. Data in the RAM of the HT1650 are clocked out on the falling edge of the RD

I

pear on the data line. The host controller can use the next rising edge to latch the clocked out data.

WRITE clock input with pull-high resistor. Data on the DATA line are latched

I

into the HT1650 on the rising edge of the WR

Negative power supply for logic circuit, ground

¾

The OSCI and OSCO pads are connected to a 32.768kHz crystal in order to generate a system clock. If the system clock comes from an external clock

I

source, the external clock source should be connected to the OSCI pad. But

O

if an on-chip RC oscillator is selected, the OSCI and OSCO pads can be left open.

Positive power supply for logic circuit

¾

O Time base or Watchdog Timer overflow flag, NMOS open drain output.

O 2kHz or 4kHz frequency output pair (tristate output buffer)

Vary bias current pin It is usually not connected

is at a logic low level and is input to

signal. The clocked out data will ap

is logic high, the

-

signal.

Rev. 1.20 4 November 10, 2005

HT1650

Absolute Maximum Ratings

Supply Voltage...........................VSS-0.3V to VSS+5.5V

Input Voltage.............................V

-0.3V to VDD+0.3V

SS

Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil ity.

Storage Temperature ............................-50°Cto125°C

Operating Temperature...........................-25°Cto75°C

-

D.C. Characteristics

Symbol Parameter

V

DD

I

DD1

I

DD2

I

DD11

I

DD22

I

STB

V

IL

V

IH

I

OL1

I

OH1

I

OL2

I

OH2

I

OL3

I

OH3

I

OL4

I

OH4

R

PH

Operating Voltage

Operating Current

Standby Current

Input Low Voltage

Input High Voltage

BZ, BZ, IRQ Sink Current

BZ, BZ Source Current

DB0~DB3 Sink Current

DB0~DB3 Source Current

LCD Common Sink Current

LCD Common Source Current

LCD Segment Sink Current

LCD Segment Source Current

Pull-high Resistor

Test Conditions

V

DD

Conditions

¾¾

3V

No load/LCD ON On-chip RC oscillator

5V

3V

No load/LCD ON Crystal oscillator

5V

3V

No load/LCD OFF On-chip RC oscillator

5V

3V

No load/LCD OFF Crystal oscillator

5V

3V

No load, Power down mode

5V

3V

DB0~DB3, WR,CS,RD

5V 0

3V

DB0~DB3, WR,CS,RD

5V 4.0

V

3V

5V

3V

5V

3V

5V

3V

5V

3V

5V

3V

5V

3V

5V

3V

5V

3V

5V 60 125 210

=0.3V

OL

=0.5V

V

OL

V

=2.7V

OH

=4.5V

V

OH

V

=0.3V

OL

=0.5V

V

OL

V

=2.7V

OH

=4.5V

V

OH

V

=0.3V

OL

=0.5V

V

OL

V

=2.7V

OH

=4.5V

V

OH

V

=0.3V

OL

=0.5V

V

OL

V

=2.7V

OH

=4.5V

V

OH

DB0~DB3, WR,CS,RD

Min. Typ. Max. Unit

2.7

¾

5.2 V

¾

150 250

250 370

135 200

200 300

15 30

50 70

210

310

¾¾

0

2.4

¾

0.6 V

1.0 V

¾

1.2 2.5

36

-0.9 -1.8 ¾

-2 -4 ¾

1.2 2.5

36

-0.9 -1.8 ¾

-2 -4 ¾

80 160

180 360

-40 -80 ¾mA

-90 -180 ¾mA

50 100

120 240

-30 -60 ¾mA

-70 -140 ¾mA

150 250 410

Ta=25°C

mA

A

m

mA

1

mA

2

mA

3V

5V

mA

¾

mA

¾

mA

¾

mA

¾

mA

¾mA

kW

Rev. 1.20 5 November 10, 2005

HT1650

A.C. Characteristics

Symbol Parameter

f

t

f

t

System Clock

SYS1

System Clock

SYS2

System Clock

SYS3

LCD Frame Frequency

LCD1

LCD Frame Frequency

LCD2

LCD Frame Frequency

LCD3

LCD Common Period

COM

4-Bit Data Clock (WR Pin)

CLK1

4-Bit Data Clock (RD Pin)

CLK2

4-Bit Interface Reset Pulse Width

CS

(Figure 3)

WR,RDInput Pulse Width (Figure 1)

CLK

Rise/Fall Time Serial Data Clock

r,tf

Width (Figure 1)

Setup Time for DB to WR,RDClock

su

Width (Figure 2)

Hold Time for DB to WR,RDClock

h

Width (Figure 2)

Setup Time for CS to WR,RDClock

su1

Width (Figure 3)

Hold Time for CS to WR,RDClock

h1

Width (Figure 3)

Ta=25°C

Test Conditions

V

DD

3V

5V 24 32 40 kHz

Conditions

On-chip RC oscillator

3V

Crystal oscillator

5V

3V

External clock source

5V

3V

On-chip RC oscillator

5V 61/117 89/170 111/213 Hz

3V

Crystal oscillator

5V

3V

External clock source

5V

n: Number of COM

¾

3V

Duty cycle 50%

5V

3V

Duty cycle 50%

5V

CS

¾

Write mode 3.34

3V

Read mode 6.67

Write mode 1.67

5V

Read mode 3.34

3V

5V

¾¾

3V

5V

¾¾

3V

5V

¾¾

3V

5V

¾¾

3V

5V

¾¾

Min. Typ. Max. Unit

22 32 40 kHz

32.768

¾

32.768

¾

32

¾

kHz

61/117 89/170 111/213 Hz

n/f

64

LCD

250

¾

sec

150 kHz

300 kHz

75 kHz

150 kHz

¾

¾¾

¾

¾¾ms

120

100

¾

Hz

ns

Rev. 1.20 6 November 10, 2005

Holtek Semiconductor Inc HT1650 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

Technical Document

Features

Applications

General Description

Block Diagram

Pin Assignment

Pad Assignment

Pad Coordinates

Pad Description

Absolute Maximum Ratings

D.C. Characteristics

A.C. Characteristics