Holtek Semiconductor Inc HT1623 Datasheet
RAM Mapping 48´8 LCD Controller for I/O mC
Features
Operating voltage: 2.7V~5.2V
·
Built-in RC oscillator
·
External 32.768kHz crystal or 32kHz
·
frequency source input
1/4 bias, 1/8 duty, frame frequency is 64Hz
·
Max. 48´8 patterns, 8 commons, 48 segments
·
Built-in internal resistor type bias generator
·
3-wire serial interface
·
8 kinds of time base/WDT selection
·
Time base or WDT overflow output
·
Built-in LCD display RAM
·
General Description
HT1623 is a peripheral device specially de
signed for I/O type mC used to expand the dis
play capability. The max. display segment of
the device are 384 patterns (48´8). It also sup
ports serial interface, buzzer sound, watchdog
timer or time base timer functions. The
HT1623 is a memory mapping and
multi-function LCD controller. The software
HT1623
R/W address auto increment
·
Two selection buzzer frequencies
·
(2kHz/4kHz)
Power down command reduces power
·
consumption
Software configuration feature
·
Data mode and Command mode instructions
·
Three data accessing modes
·
VLCD pin to adjust LCD operating voltage
·
Cascade application
·
configuration feature of the HT1623 make it
suitable for multiple LCD applications includ
ing LCD modules and display subsystems. Only
three lines are required for the interface be
tween the host controller and the HT1623. The
HT162X series have many kinds of products
that match various applications.
-
-
Selection Table
HT162X HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
COM
SEG
Built-in Osc.
Crystal Osc.
448 8
32 32 32 32
ÖÖ Ö ÖÖÖ
ÖÖ Ö ÖÖÖ Ö
8
48
1 April 21, 2000
8161616
64 48 64 64
Block Diagram
HT1623
OSCO
OSCI
CS
RD
WR
DATA
VDD
VSS
BZ
Tone Frequency
BZ
Pin Assignment
CS
RD
WR
DATA
VSS
OSCI
OSCO
VDD
VLCD
IR Q
BZ
BZ
T1
T2
T3
COM 0
COM 1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
COM 2
COM 3
COM 4
SEG46
SEG47
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32 33 34 35 3637 38 39 40 41 42 43 44 45 46 4748 49 50
COM 7
COM 6
COM 5
C ontrol
and
Tim ing
Circuit
G enerator
SEG43
SEG44
SEG45
SEG 2
SEG 1
SEG 0
Tim e Base G enerator
SEG38
SEG39
SEG40
SEG41
SEG42
H T1623
100 Q FP
SEG 7
SEG 6
SEG 5
SEG 4
SEG 3
D isplay R A M
LCD Driver/
Bias Circuit
W atchdog Tim er
and
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
NC
SEG 12
SEG 11
SEG 10
SEG 9
SEG 8
NC
NC
NC
NC
NC
81828384858687888990919293949596979899100
NC
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
COM 0
COM 7
SEG 0
SEG 47
VLCD
IR Q
NC
NC
NC
NC
NC
NC
NC
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
NC
NC
NC
NC
2 April 21, 2000
Pad Assignment
HT1623
SEG 32
SEG 33
SEG 34
SEG 35
SEG 36
SEG 37
SEG 38
SEG 39
SEG 40
SEG 41
SEG 42
SEG 43
SEG 44
SEG 45
SEG 46
SEG 47
CS
RD
WR
DATA
VSS
OSCI
OSCO
VDD
VLCD
IR Q
BZ
BZ
COM 0
COM 1
COM 2
T1
T2
T3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
71
19
COM 3
20
COM 4
69 70
21
COM 5
68
22
COM 6
23
COM 7
66 67
63 64 65
24
25 26 27 28 29 30 31 32 33 34 35 36
SEG 1
SEG 2
SEG 0
59
57
(0 ,0 )
SEG 8
SEG 7
SEG 3
SEG 4
SEG 6
SEG 5
SEG 9
56
58
60 61 62
55
SEG 31
54
SEG 30
53
SEG 29
52
SEG 28
51
SEG 27
50
SEG 26
49
SEG 25
48
SEG 24
47
SEG 23
46
SEG 22
45
SEG 21
44
SEG 20
43
SEG 19
42
SEG 18
41
SEG 17
40
SEG 16
39
SEG 15
38
SEG 14
37
SEG 13
SEG 11
SEG 10
SEG 12
Chip size: 177 ´ 171 (mil)
2
* The IC substrate should be connected to VDD in the PCB layout artwork.
3 April 21, 2000
Pad Coordinates Unit: mil
Pad No. X Y Pad No. X Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28 4.76
29 11.39
30 23.80
31 30.43
32 42.84
33 49.47
34 61.88
35 68.51
36 80.92
-82.45
-82.45
-82.45
-83.21
-83.21
-83.21
-83.21
-83.21
-83.21
-83.21 -4.84
-83.21 -16.66
-83.21 -29.92
-83.21 -41.74
-83.21 -48.37
-83.21 -54.99
-83.21 -61.63
-83.21 -68.25
-82.88 -78.96
-72.50 -79.99
-65.88 -79.99
-59.24 -79.99
-52.62 -79.99
-45.73 -79.22
-33.32 -79.22
-26.69 -79.22
-14.28 -79.22
-7.65 -79.22
79.35 37 82.83
67.02 38 82.83
60.39 39 82.83
46.71 40 82.83
32.30 41 82.83
25.20 42 82.83
18.57 43 82.83
11.94 44 82.83 4.55
5.31 45 82.83 11.18
46 82.83 17.81
47 82.83 24.44
48 82.83 31.07
49 82.83 37.70
50 82.83 44.33
51 82.83 50.96
52 82.83 57.59
53 82.83 64.22
54 82.83 70.85
55 82.83 77.48
56 27.03 79.35
57 20.40 79.35
58 13.77 79.35
59 7.14 79.35
60 0.51 79.35
-79.22
-79.22
-79.22
-79.22
-79.22
-79.22
-79.22
-79.22
-79.22
61
62
63
64
65
66
67
68
69
70
71
-6.12
-12.75
-19.38
-26.01
-32.64
-39.27
-45.90
-52.53
-59.16
-65.79
-72.42
-52.44
-35.23
-28.60
-21.97
-15.34
-8.71
-2.08
79.35
79.35
79.35
79.35
79.35
79.35
79.35
79.35
79.35
79.35
79.35
HT1623
4 April 21, 2000
HT1623
Pad Description
Pad No. Pad Name I/O Description
Chip selection input with pull-high resistor. When the CS
high, the data and command read from or written to the HT1623
1CS
2RD
3WR
4 DATA I/O Serial data input/output with pull-high resistor
5 VSS
6 OSCI I The OSCI and OSCO pads are connected to a 32.768kHz crystal
7 OSCO O
8 VDD
9 VLCD I LCD operating voltage input pad.
10 IRQ
11, 12 BZ, BZ
13~15 T1~T3 I Not connected
16~23 COM0~COM7 O LCD common outputs
24~71 SEG0~SEG47 O LCD segment outputs
are disabled. The serial interface circuit is also reset But if the
I
CS
is at logic low level and is input to the CS pad, the data and
command transmission between the host controller and the
HT1623 are all enabled.
READ clock input with pull-high resistor. Data in the RAM of the
HT1623 are clocked out on the rising edge of the RD
I
clocked out data will appear on the data line. The host controller
can use the next falling edge to latch the clocked out data.
WRITE clock input with pull-high resistor. Data on the DATA
I
line are latched into the HT1623 on the rising edge of the WR sig
nal.
Negative power supply, ground
¾
in order to generate a system clock. If the system clock comes
from an external clock source, the external clock source should be
connected to the OSCI pad. But if an on-chip RC oscillator is se
lected instead, the OSCI and OSCO pads can be left open.
Positive power supply
¾
Time base or watchdog timer overflow flag, NMOS open drain
O
output
O 2kHz or 4kHz tone frequency output pair
is logic
signal. The
-
-
Absolute Maximum Ratings
Supply Voltage..............................-0.3V to 5.5V
Input Voltage................V
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maxi
mum Ratings² may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged expo
sure to extreme conditions may affect device reliability.
-0.3V to VDD+0.3V
SS
Storage Temperature.................-50°Cto125°C
Operating Temperature ..............-25°Cto75°C
5 April 21, 2000
-
-
HT1623
D.C. Characteristics
Symbol Parameter
V
DD
I
DD1
I
DD2
I
DD11
I
DD22
I
STB
V
IL
V
IH
I
OL1
I
OH1
I
OL1
I
OH1
I
OL2
I
OH2
Operating Voltage
Operating Current
Operating Current
Operating Current
Operating Current
Standby Current
Input Low Voltage
Input High Voltage
BZ, BZ, IRQ
BZ, BZ
DATA
DATA
LCD Common Sink Current
LCD Common Source Current
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
¾¾
3V
No load/LCD ON
On-chip RC oscillator
5V
3V
No load/LCD ON
Crystal oscillator
5V
3V
No load/LCD OFF
On-chip RC oscillator
5V
3V
No load/LCD OFF
Crystal oscillator
5V
3V
No load
Power down mode
5V
3V
DATA, WR,CS,RD
5V 0
3V
DATA, WR,CS,RD
5V 4.0
V
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
=0.3V
OL
=0.5V
V
OL
V
=2.7V
OH
V
=4.5V
OH
V
=0.3V
OL
V
=0.5V
OL
V
=2.7V
OH
=4.5V
V
OH
V
=0.3V
OL
=0.5V
V
OL
V
=2.7V
OH
V
=4.5V
OH
Ta=25°C
2.7
¾
¾
¾
¾
¾
¾
¾¾
¾¾
¾
¾
0
2.4
0.9 1.8
1.7 3
-0.9 -1.8 ¾
-1.7 -3 ¾
0.9 1.8
1.7 3
-0.9 -1.8 ¾
-1.7 -3 ¾
80 160
180 360
5.2 V
¾
155 310
260 420
150 310
250 420
830
20 60
20
35
110
220
0.6 V
¾
1.0 V
¾
3V
¾
5V
¾
¾
¾
¾
¾
¾mA
¾mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
-40 -80 ¾mA
-90 -180 ¾mA
6 April 21, 2000
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