Holtek Semiconductor Inc HT1620 Datasheet
RAM Mapping 32´4 LCD Controller for I/O mC
Features
Logic operating voltage: 2.4V~3.3V
·
LCD voltage: 3.6V~4.9V
·
Low operating current <3mAat3V
·
External 32.768kHz crystal oscillator
·
Selection of 1/2 or 1/3 bias, and selection of
·
1/2 or 1/3 or 1/4 duty LCD applications
Internal time base frequency sources
·
Two selectable buzzer frequencies
·
(2kHz/4kHz)
Built-in capacitor type bias charge pump
·
Time base or WDT overflow output
·
General Description
The HT1620 is a 128 pattern (32´4), memory
mapping, and multi-function LCD driver. The
S/W configuration feature of the HT1620
makes it suitable for multiple LCD applica
tions including LCD modules and display sub
systems. Only three or four lines are required
HT1620
8 kinds of time base/WDT clock source
·
32´4 LCD driver
·
Built-in 32´4-bit display RAM
·
3-wire serial interface
·
Internal LCD driving frequency source
·
Software configuration feature
·
R/W address auto increment
·
Data mode and command mode
·
instructions
Three data accessing modes
·
for the interface between the host controller
and the HT1620. The HT1620 consumes low
operating current owing to adopting capacitor
type bias charge pump. The HT162X series
have many kinds of products that match vari
ous applications.
-
Selection Table
HT162X
COM
SEG
Built-in Osc.
Crystal Osc.
HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
4 48 8 88161616
32 32 32 32 48 64 48 64 64
ÖÖ ÖÖ Ö Ö
ÖÖ ÖÖÖÖ Ö
1 July 26, 1999
Block Diagram
HT1620
OSCO
OSCI
CS
RD
WR
DATA
VDD
VSS
BZ
BZ
C ontrol
and
Tim ing
Circuit
Tone Frequency
G enerator
D isplay R A M
LC D Driver/
Bias Circuit
W atchdog Tim er
Tim e B ase G enerator
&
Notes: CS: Chip selection
BZ, BZ
: Tone outputs
WR
,RD, DATA: Serial interface
COM0~COM3, SEG0~SEG31: LCD outputs
IRQ
: Time base or WDT overflow output
VO15N: Half voltage circuit output pin
VEE: Double voltage circuit output pin
CC1/CC2: External capacitor pin, for double voltage and half voltage circuit use
COM 0
COM 3
SEG 0
SEG 31
CC1
CC2
VO 15N
VEE
IR Q
2 July 26, 1999
Pin Assignment
NC
CC1
BZ
BZ
HT1620
OSCO
DATA
OSCI
VDD
IR Q
VSS
WR
RD
CS
NC
NC
CC2
VO 15N
VEE
COM 0
COM 1
COM 2
COM 3
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
NC
H T1620
64 Q F P
SEG 13
SEG 14
SEG 15
565758596061626364 52535455
SEG 16
51
NC
50
NC
49
NC
48
NC
47
NC
46
NC
45
SEG31
44
SEG30
43
SEG29
42
SEG28
41
SEG27
40
SEG26
39
SEG25
38
SEG24
37
SEG23
36
SEG22
35
SEG21
34
SEG20
33
NC
SEG 17
SEG 18
SEG 19
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
2320 21 22 24 25 26 27 28 29 30 31 32
SEG 11
NC
SEG 9
SEG 10
SEG 12
3 July 26, 1999
Pad Assignment
CC1
BZ
BZ
HT1620
OSCO
OSCI
VDD
IR Q
DATA
VSS
WR
RD
CS
CC2
VO 15N
VEE
COM 0
COM 1
COM 2
COM 3
SEG 0
SEG 1
SEG 2
SEG 3
SEG 4
SEG 5
441945
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17
SEG 6
SEG7
SEG8
SEG9
20462147224823492450255126
18
SEG10
SEG11
SEG12
(0 ,0 )
SEG13
SEG14
SEG 15
SEG 16
SEG 17
SEG 18
Chip size: 142 ´ 141 (mil)
43
27
SEG 19
2
411642
40
SEG 31
39
SEG 30
38
SEG 29
37
SEG 28
36
35
SEG 27
34
SEG 26
33
SEG 25
32
SEG 24
31
SEG 23
SEG 22
30
SEG 21
29
SEG 20
28
* The IC substrate should be connected to VDD in the PCB layout artwork.
4 July 26, 1999
Pad Coordinates Unit: mil
Pad No. X Y Pad No. X Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 5.40
25 12.03
26 18.66
-61.58
-61.83
-61.83
-61.83
-61.83
-61.83
-61.83
-61.83
-61.83
-61.83 -2.68
-61.83 -9.31
-61.83 -15.94
-61.83 -22.57
-60.90 -64.26
-54.27 -64.26
-47.64 -64.26
-41.01 -64.26
-34.38 -64.26
-27.75 -64.26
-21.12 -64.26
-14.49 -64.26
-7.86 -64.26
-1.23 -64.26
63.62 27 25.29
50.83 28 66.98
43.73 29 66.98
37.10 30 66.98
30.47 31 66.98
23.84 32 66.98
17.21 33 66.98
10.58 34 66.98
3.95 35 66.98
36 66.98
37 66.98
38 66.98 3.65
39 66.98 10.28
40 65.71 64.39
41 59.08 64.39
42 52.45 64.39
43 40.59 64.39
44 29.75 64.39
45 22.95 64.39
46 16.32 64.39
47 9.56 64.39
-64.26
-64.26
-64.26
48
49
50
51
-2.21
-21.80
-39.52
-49.60
-64.26
-62.65
-56.01
-49.38
-42.76
-36.13
-29.50
-22.86
-16.24
-9.60
-2.97
64.30
64.39
64.39
63.62
HT1620
5 July 26, 1999
Pad Description
Pad No. Pad Name I/O Description
2 VO15N O Half voltage circuit output pin
3 VEE
4~7 COM0~COM3 O LCD common outputs
8~39 SEG0~SEG31 O LCD segment outputs
40 CS
41 RD
42 WR
43 DATA I/O Serial data input/output with pull-high resistor
44 VSS
45 OSCO O
46 OSCI I
47 VDD
48 IRQ
49, 50 BZ, BZ
51, 1 CC1, CC2 I
Double voltage circuit output pin
¾
Chip selection input with pull-high resistor
When the CS
written to the HT1620 are disabled. The serial interface circuit is
I
also reset. But if the CS
is logic high, the data and command, read from or
is at logic low level and is input to the CS
pad, the data and command transmission between the host con
troller and the HT1620 are all enabled.
READ clock input with pull-high resistor
Data in the RAM of the HT1620 are clocked out on the falling
I
edge of the RD signal. The clocked out data will appear on the
DATA line. The host controller can use the next raising edge to
latch the clocked out data.
WRITE clock input with pull-high resistor
I
Data on the DATA line are latched into the HT1620 on the rising
edge of the WR
Negative power supply, Ground
¾
signal.
The OSCI and OSCO pads are connected to a 32.768kHz crystal
in order to generate a system clock.
Positive power supply
¾
O Time base or WDT overflow flag, NMOS open drain output
O 2kHz or 4kHz tone frequency output pair (tri-state output buffer)
External capacitor pin, for double voltage and half voltage circuit
use
HT1620
-
Absolute Maximum Ratings
Supply Voltage..............................-0.3V to 3.6V
Input Voltage .................V
-0.3V to VDD+0.3V
SS
Storage Temperature.................-50
Operating Temperature...............-25
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maxi
mum Ratings² may cause substantial damage to the device. Functional operation of this de
vice at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
6 July 26, 1999
o
Cto125oC
o
Cto75oC
-
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