The HT1608L is an LCD driver LSI with 40
output channel s using CMOS technolo gy. It is
equipped with two sets of 20-bit bidire ctional
shift registers, 20-bi t data latches, 20-bit LCD
drivers, and logic control circuits.
The HT1608 can convert serial data received
Block Diagram
HT1608L
•
LCD driver with serial /parallel conversion
function
•
Common or segment driver output by
selection
•
Remote controllers
•
Calculators
from an LCD control ler into parallel da ta and
send out LCD d riving waveforms to the LCD
panel. The HT1608L is designed for general
purpose LCD drivers. It can drive both static
and dynamic drive LCDs. Th e chip can be applied to a common driver or a segment driver.
127th Aug ’98
Pin Assignment
HT1608L
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Pad Assignment
HT1608L
Chip size: 101 × 115 (mil)
* The IC substrate should be connected to VDD in the PCB layout artwork.
1~9Y28~Y20OLCD driver outputs for channel 2
10~23Y19~Y6OLCD driver outputs for channel 1
24VDD—Power supply ( positive )
25~30Y5~Y0OLCD driver ou tputs for channel 1
31VEEILCD power supply
32CLK1I
Latch signal for channel 1 on the falling edge
CLK1 is used for channel 2 when MODE is set to V
427th Aug ’98
(Note 1 )
SS
HT1608L
Pad No. Pad Name I/ODescription
33CLK2I
34VSS—Power supply (ground)
35DL1I/O Data input/output of channel 1 shift register
36DR1I/O Data input/output of channel 1 shift register
37DL2I/O Data input/output of channel 2 shift register
38DR2I/O Data input/output of channel 2 shift register
39ALTIAlternate signal input for LCD driving waveform
40SHF1IShift direction selection of channel 1 shift register (Note 2)
41SHF2IShift direction selection of channel 2 shift register (Note 2)
42MODEIMode select signal of channel 2 (Note 3)
43, 44V1, V2ILCD bias supply voltage for channels 1 and 2
45, 46V3, V4ILCD bias supply voltage for channel 1
47, 48V5, V6ILCD bias supply voltage for channel 2
49~59Y39~Y29OLCD driver outputs for channel 2
Shift signal for channel 1 on the falling edge and used for channel 2
when MODE is set to V
(Note 1)
SS
Note 1: Data is processed on the clock falling or rising edge as shown in the following table.
MODE= L (V
MODE= H (V
SS
DD
)
)
527th Aug ’98
HT1608L
Note 2 : Shift direction of channel 1 and 2
Shift Direction of Channel 1 (Channel 2)
SHF1 (SHF2)DL1 (DL2)DR1 (DR2)
HOUTIN
LINOUT
Note 3 :
The output lev els of channel 1 and 2 are decided by t he combination of MODE, ALT
and latched data. Refer to the following table:
MODELatched DataALT
HV1V2
LV2V1
HV3V6
(V
H
DD
H
)
L
LV4V5
HV1V1
LV2V2
HV3V5
L
(V
)
SS
H
L
LV4V6
Channel 1
(Y0~Y19)
Channel 2
(Y20~Y39)
627th Aug ’98
HT1608L
Absolu te Maxim um Ratings *
Supply Voltage........................ .... ..–0.3V to 5.5VStorage Temperature.................–50°C to 125°C
Input Voltage................. V
*Note: These are stress ra tings on ly. Stresses exceeding the range specifie d under “Ab solute Maxi -
mum Ratings” ma y cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
D.C. CharacteristicsTa=25°C
–0.3V to VDD+0.3VOperating Temperature...............–20°C to 70°C
Both channel 1 and 2 used as segment drivers (MODE=L)
When both channel 1 and 2 of the HT1608L are used as segment drivers, they will shift data on the
falling edge of CLK2 and shift latch data on the falling edge of CLK1. V3 and V5 or V4 and V6 are
shortened in the application circuit as shown in the following figure.
Both ch annel 1 an d 2 used as comm o n drivers (MODE=L )
When both channe l 1 an d 2 o f the HT1 608L are used a s co mm on d rivers, the MODE is s et low a nd
the signals (CLK1, CLK2, FRAME) from the controller are connected as shown in the following
figure.
827th Aug ’98
HT1608L
Channel 1 used as a segment driver an d ch an ne l 2 as a com m o n drive r (MOD E =H )
When channel 2 is used as a common drive r, MODE is connected to VDD. Channel 2 will shift data
on the rising edge of CLK1 and shift latch data on the rising edge of CLK2.
Static driver
When the HT1608 L is used as a static drive r, data is transferred on the falling edge of CLK2 and
latched on the falling edge of CLK1. The frequency of CLK1 becomes the frame frequency of the LCD
driver. The frequency of ALT has to be twice the frequency of CLK1. ALT has to be synchronized on
the falling edge of CLK1.
The power supply for the LCD driver is used by shortening V1, V4 and V6 or V2, V3 and V5. One of
the LCD output te rmi na ls can be used as a com mo n o utpu t . The app licati on circui t connecti on s are
shown below:
927th Aug ’98
Timing Diagrams
Segment data waveform (1/8 duty)
HT1608L
1027th Aug ’98
HT1608L
Common data wav eform (a typical wav eform of chan ne l 2 as a COMM O N drive r, 1/8 duty)
1127th Aug ’98
Application Circuits
HT1608L
1227th Aug ’98
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