HOLT HI-8685, HI-8686 User Manual

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HI-8685,HI-8686
ARINCINTERFACEDEVICE
February2001
ARINC429&561SerialDatato16-BitParallelData
DESCRIPTION
TheHI-8685andHI-8686aresystemcomponentsfor interfacingincomingARINC429signalsto16-bitparallel datausingproven+5Vanalog/digitalCMOStechnology. Bothproductsincorporatethedigitallogicandanalogline receivercircuitryinasingledevice.
ThereceiversontheHI-8685andtheHI-8686connect directlytotheARINC429Busandtranslatetheincoming signalstonormalCMOSlevels.Internalcomparatorlevels aresetjustbelowthestandard6.5voltminimumdata thresholdandjustabovethestandard2.5voltmaximumnull threshold.The-10versionoftheHI-8685allowst he
incorporationofanexternal10Kresistanceinserieswith eachARINCinputforlightningprotectionwithoutaffecting ARINCleveldetection.
Bothproductsofferhighspeed16-bitparallelbusinterface, a32-bitbuffer,anderrordetectionforwordlengthandparity. Aresetpinisalsoprovidedforpower-oninitialization.
FEATURES
PINCONFIGURATIONS (TopView)
DATARDY
D15 D14 D13 D12 D11 D10
GND
1 2 3 4 5 6
HI-8685PSI
HI-8685PST
7
D9
8 D8 D7 D6 D5 D4
HI-8685PSI-10
9
HI-8685PST-10
10 11 12 13 14
&
HI-8685
28-PinPlasticSOIC-WBPackage
28 27 26 25 24 23 22 21 20 19 18 17 16 15
Vcc GAPCLK TESTA TESTB RESET RINB(-10) RINA(-10) ERROR PARITYENB READ D0 D1 D2 D3
!
AutomaticconversionofserialARINC429,575& 561datato16-bitparalleldata
!
Highspeedparallel16-bitdatabus Errordetection-and
!
!
Resetinputforpower-oninitialization On-chiplinereceiver
!
Inputhysteresisofatleast2volts
!
Testlnputsbypassanaloginputs
!
Simplifiedlightningprotectionwiththeabilitytoadd
!
wordlengthparity
10Kohmexternalseriesresistors Small,packageoptions:
!
surfacemount,plastic
SOIC,TQFPandPLCC
Militaryprocessingavailable
!
N/C-1 D12-2 D11-3 D10-4
D9-5 D8-6 D7-7 D6-8
HI-8686PQI
HI-8686PQT
24­23-RINB-10 22-RINB 21-RINA 20-RINA-10 19-ERROR 18-PARITYENB 17-N/C
HI-8686
32-PinPlasticTQFPPackage
(Seepage8foradditionalpinconfigurations)
RESET
HOLTINTEGRATEDCIRCUITS
1(DS8685Rev.G)02/01
HI-8685,HI-8686
PINDESCRIPTIONS
SIGNALFUNCTIONDESCRIPTION
DATARDYOUTPUTReceiverdatareadyflag.Ahighlevelindicatesdataisavailableinthereceive
buffer.Flaggoeslowwhenthefirst16-bitbyteisread.
D0toD15OUTPUT16-bitparalleldatabus(tri-state)
GNDPOWER0V
READ
PARITYENBINPUTParityEnable-Ahighlevelactivatesoddparitycheckingwhichreplacesthe
ERROROUTPUTErrorFlag.Ahighlevelindicatesabitcounterror(numberofARINCbitswas
RINA/RINA-10INPUTPositivedirectARINCserialdatainput RINB/RINB-10INPUTNegativedirectARINCserialdatainput(bothRINBandRINB-10onHI-8686)
RESET
TESTAINPUTUsedinconjunctionwiththeTESTBinputtobypassthebuilt-inanalogline
TESTBINPUTU
GAPCLKINPUTGapClock.DeterminestheminimumtimerequiredbetweenARINCwordsfor
VccPOWER+5V±10%supply
INPUTReadstrobe.Alowleveltransfersreceivebufferdatatothedatabus
32ndARINCbitwithanerrorbit.Otherwise,the32ndARINCbitisunchanged
lessthanorgreaterthan32)and/oraparity errorifparitydetectionwasenabled (PARITYENBhigh)
(bothRINAandRINA-10onHI-8686)
INPUTInternallogicstatesareinitializedwithalowlevel
receivercircuitry
sedinconjunctionwiththeTESTAinputtobypassthebuilt-inanalogline
receivercircuitry
detection.Theminimumwordgaptimeisbetween16and17clockcyclesof thissignal.
FUNCTIONALDESCRIPTION
TheHI-8685andHI-8686areserialto16-bitparallelconvert­ers.Theincomingdatastreamisseriallyshiftedintoaninput register,checkedforerrors,andthentransferredinparallelto a32-bitreceivebuffer.Thereceivedatacanbeaccessedus­ingtwo16-bitparallelreadoperationswhilethenextserial datasteamisbeingreceived.
RECEIVERINPUTS
TheblockdiagramforboththeHI-8685andHI-8685-10prod­uctsisfoundinFigure1.Bothhavebuilt-inreceiverselimi­natingtheneedforadditionalexternalARINCleveldetection circuitry.Theonlydifferencebetweenthetwoproductsisthe am ountofinternalresistanceinserieswitheachARINCin­put.
HI-8685ARINCINPUTS(RINA&RINB)
Typically35KresistorsareinserieswithboththeRINAand RINBARINC429inputs.Theyconnecttoleveltranslators whoseresistancetoGNDistypically10KAfterleveltrans-
Ω.
HOLTINTEGRATEDCIRCUITS
lation,thebufferedinputsdriveadifferentialamplifier.The differentialsignaliscomparedtolevelsderivedfromadivider betweenVCCandGND.Thenominalsettingscorrespondto aOne/Zeroamplitudeof6.0VandaNullamplitudeof3.3V.A validARINCOne/ZeroinputsetsalatchandaNullinputre­setsthelatch.
HI-8685-10ARINCINPUTS(RINA-10&RINB-10)
Sinceanyaddedexternalseriesresistancewillaffectthevolt­agetranslation,theHI-8685-10producthasonly25Kof the35KseriesresistancerequiredforproperARINC429 leveldetection.Theremaining10Krequiredisavailableto theuserforincorporationinexterna lcircuitrysuchasfor
lightningprotection.
HI-8686ARINCINPUTS
TheHI-8686hasbothsetsofARINCinputs,RINA/RINA-10 andRINB/RINB-10availabletotheuser.
2
PARITY
ENB
HI-8685,HI-8686
CLK
PARITY
DETECT
ERROR
DETECT
ERROR
RINA
RINB
RINA-10
RINB-10
TESTA
TESTB
GAPCLK
RESET
READ
10K
10K
25K
25K
ESD
PROTECTION
&
LINE
RECEIVER
RXA
RXB
CLOCK
&
DATA
DETECT
DATA
Figure1.BlockDiagram
FUNCTIONALDESCRIPTION(cont.)
PROTOCOLDETECTION
BIT
COUNT
GAP
DETECT
GAPDETECTION
32-BIT SHIFT
REG.
BIT32
BIT32
32-BIT
RECEIVE
32 16
BUFFER
32-BIT
TO
32
16-BIT
MUX
BYTE
COUNT
D0-D15
DATARDY
TheARINCclockandOne/Zerodatathatarederivedfrom theoutputsofthebuilt-inlinereceiverisillustratedin
digital Figure3.Theresultingsteamofdigitaldataisshiftedintoa 32-bitinputregister.
TheARINCclockandOne/Zerodatacanalsobecreated fromtheTESTAandTESTBinputsasshowninFigure4. Wheneithertestinputishigh,thebuilt-inanaloglinedriver isdisabled.
ForARINC561operation,theTESTAandTESTBdigitalin­putdatastreamsmustbederivedfromtheARINC561data, clockandsyncwithexternallogic.
DATABUSBITPERIODMINIMUMGAPGAPCLOCKGAPDETECTION
TYPE(s)(s)MHzTIME(s)µµµ
42910450.7521.3-22.7
42969-133310-5990.1160-170 57569-133310-5990.1160-170 56169-133103-2000.280-85
Table1-TypicalGapDetectionTimes
Theendofadatawordisdetectedbyaninternalcounter thattimesoutwhenadataOneorZeroisnotreceivedfora periodequalto16cyclesoftheGAPCLKsignal.Thegap detectiontimemayvarybetween16and17cyclesofthe GAPCLKsignalsincetheincomingdataandGAPCLKare notusuallysynchronousinputs.Therequiredfrequencyof GAPCLKisafunctionofthemininumgaptimespecifiedfor thetypeofARINCdatabeingreceived.Table1indicates typicalfrequenciesthatmaybeusedforthevariousdata ratesnormallyencountered.
1.016-17
1.510.7-11.3
HOLTINTEGRATEDCIRCUITS
3
HI-8685,HI-8686
FUNCTIONALDESCRIPTION(cont.)
ERRORCHECKING
Onceawordgapisdetected,thedatawordintheinputreg­isteristransferredtothereceivebufferandcheckedforer­rors.
Whenparitydetectionisenabled(PARITYENBhigh),the receivedwordischeckedforoddparity.Ifthereisaparity error,the32ndbitofthereceiveddatawordissethigh.
Ifparitycheckingisdisabled(PARITYENBlow)the32nd bitofthedatawordisalwaysthe32ndARINCbitreceived.
TheERRORflagoutputissethighuponreceiptofaword gapandthenumberofbitsreceivedsincetheprevious wordgapislessthanorgreaterthan32.TheERRORflag isresetlowwhenthenext validARINCwordiswritteninto thereceivebufferorwhenispulsedlow.
READINGRECEIVEBUFFER
Whenthedatawordistransferredtothereceivebuffer,the DATARDYpingoeshigh.Thedatawordcanthenberead intwo16-bitbytesbypulsingtheinputlowasindi­catedinFigure5.ThefirstreadcycleresetsDATARDY lowandincrementsaninternalcountertothesecond 16-bitbyte.Therelationshipbetweeneachbitofan ARINCwordreceivedandeachbitofthetwo16-bitdata busbytesisspecifiedinFigure2.
WhenanewARINCwordisreceiveditalwaysoverwrites thereceivebuffer.Ifthefirstbyteofthepreviouswordhas notbeenread,thenpreviousdataislostandthereceive bufferwillcontainthenewARINCword.However,ifthe DATARDYpingoeshighbetweenthereadingofthefirst andsecondbytes,thefirstbyteisnolongervalidbecause thecorrespondingsecondbytehasbeenoverwrittenby thenewARINCword.Also,thenextreadwillbeofthefirst byteofthenewARINCwordsincetheinternalbytecounter isalwaysresettothefirstbytewhennewdataistrans­ferredtothereceivebuffer.
RESET
READ
ReadByteDataBusBitsARINCBits
1stByte1D0-D15ARINC1-ARINC16
2ndByte2D0-D15ARINC17-ARINC32
FIGURE2.ORDEROFRECEIVEDDATA
RESET
Alowontheinputsetsaflip-flopwhichinitializesthe internallogic.Whengoeshigh,theinternallogicre­mainsintheinitializedstateuntilthefirstwordgapisde­tectedpreventingreceptionofapartialword.
TESTMODE
Thebuilt-indifferentiallinereceivercanbedisabledallowing thedataandclockdetectioncircuitrytobedrivendirectly withdigitalsignals.ThelogicalORfunctionoftheTESTA andTESTBisdefinedinTruthTable1.Thetwoinputscan beusedfortestingthereceiverlogicandforinputtingARINC 429typedataderivedfromanothersource/protocol.See Figure4fortypi caltestinputtiming.
Thedeviceshouldalwaysbeinitializedwithimme­diatelyafterenteringthetestmodetoclearapartialword thatmayhavebeenreceivedsincethelastwordgap.Oth­erwise,anERRORconditionmayoccurandthefirst32bits ofdataonthetestinputsmaynotbeproperlyreceived.
Also,whenenteringthetestmode,bothTESTAandTESTB shouldbesethighandheldinthatstateforatleastone wordgapperiod(17gapclocks)aftergoeshigh.
Whenexitingthetestmode,bothtestinputsshouldbeheld
lowandthedeviceinitializedwith
RESET
RESET
RESET
RESET
RESET.
TRUTHTABLE1.
RINA(-10)RINB(-10)TESTATESTBRXARXB
-1.50Vto+1.50V-1.50Vto+1.50V0000
-3.25Vto-6.50V+3.25Vto+6.50V0001
+3.25Vto+6.50V-3.25Vto-6.50V0010
XX0101 XX1010
XX1100
X=don'tcare
HOLTINTEGRATEDCIRCUITS
4
TIMINGDIAGRAMS
HI-8685,HI-8686
VDIFF
RINA-RINB
DERIVEDDATA
DERIVEDCLOCK
TESTA
TESTB
DERIVEDDATA
DERIVEDCLOCK
2829303132124BitPeriodsMin.
ARINCDataBitsWordGap
+10V
0V
-10V
FIGURE3-RECEIVERINPUTTIMINGFORARINC429
ARINCDataBitsWordGap
2829303132124BitPeriodsMin.
+5V
0V
+5V
0V
DERIVEDDATA
DATARDY
READ
D0-D15
FIGURE4-TESTINPUTTIMINGFORARINC429
32nd
ARINCbit
t
DRDY
t
RDYCLR
t
RDPW
1st16-bits 2nd16-bits
t
RD
VALID
t
RR
t
FD
FIGURE5-RECEIVERPARALLELDATABUSTIMING
VALID
HOLTINTEGRATEDCIRCUITS
5
HI-8685,HI-8686
ABSOLUTEMAXIMUMRATINGS
AllvoltagesreferencedtoGND Supplyvoltages
V.......................................................+7.0V
CC
Voltageoninputs
RINA(-10)toRINB(-10).........+29Vto-29V
Allotherinputpins..................-0.3toVcc+0.3
DCcurrentperinputpin.......................+10mA
Powerdissipationat25°C
plastic28-pinSO.....1.8W,derate14.1mW/°C
plastic28-pinPLCC.2.3
plastic32-pinSO......1.6
SolderTemperature
Leads.............................+280°Cfor10sec
Packagebody..................................+220°C
StorageTemperature........ .....-65°Cto+150°C
W,derate18.2mW/°C W,derate15.4mW/°C
RECOMMENDEDOPERATINGCONDITIONS
SupplyVoltages
V.................................................+5V
CC ±10%
TemperatureRange
IndustrialScreening..............-40°Cto+85°C
Hi-TempScreening..............-55°Cto+125°C
MilitaryScreening..................-55°Cto+125°C
JunctionTemperature,Tj....................175°C
NOTE:Stressesaboveabsolutemaximum ratingsoroutsiderecommendedoperating conditionsmaycausepermanentdamageto thedevice.Thesearestressratingsonly. Operationatthelimitsisnotrecommended.
≤+
DCELECTRICALCHARACTERISTICS
Vcc=5V,GND=0V,TA=OperatingTemperatureRange(unlessotherwisespecified).
PARAMETERSSYMBOLTESTCONDITIONSMINTYPMAXUNITS ARINCBusInputs (RINA,RINB,RINA-10&RINB-10)
Differentialinputvoltage
oneorzeroVdifferentialvoltage6.510.013.0volts nullV""""--2.75volts commonmodeVwithrespecttoGND--5.0volts
Inputresistance
RINA(-10)toRINB(-10)Rsuppliesfloating3075-Kohm RINA(-10)orRINB(-10)toGNDorVR"""'1940-Kohm
CCSUP
Inputcapacitance(Guaranteedbutnottested)
differentialCRINA(-10)toRINB(-10)--20pF toGNDC--20pF toVC--20pF
CCH
DIN NIN
COM
DIFF
DIFF
G
HOLTINTEGRATEDCIRCUITS
6
HI-8685,HI-8686
DCELECTRICALCHARACTERISTICS(cont.)
Vcc=5V,GND=0V,TA=OperatingTemperatureRange(unlessotherwisespecified).
PARAMETERSSYMBOLTESTCONDITIONSMINTYPMAXUNITS DigitalInputs
(,GAPCLK,,PARITYENA,TESTA&TESTB)
RESETREAD
Inputvoltage
highV2.0-V lowV0.0-0.8volts
IHCC IL
volts
Inputcurrent
source--1.0 sink-1.0--
InputcapacitanceC--8.0pF
Outputs
(D0toD15,ERROR&DATARDY)
IV=5.0VA
IHIN
IV=0.0VA
ILIN
I
Outputvoltage
high lowI=1.6mA--0.4volts
VI=-1.0mA2.7--volts
OHOH
V
OL
OL
Outputtri-statecurrent(D0-D15only)
V=5.0V--1.0A
I
IH
IA
IL
Outputcapacitance--15pF
C
O
OH
V=0.0V-1.0--
OL
OperatingSupplyCurrent
µ µ
µ µ
VIV=0.0V,outputsopen--6.5mA
CCCCIN
ACELECTRICALCHARACTERISTICS
Vcc=5V,GND=0V,TA=OperatingTemperatureRange(unlessotherwisespecified).
PARAMETERSSYMBOLTESTCONDITIONSMINTYPMAXUNITS
READ Datadelayfromt20ns READ READ READREAD GAPCLKfrequencyf1MHz 32ndARINCbittoDATARDYt1617clocks
pulsewidtht50ns
READ todatafloatingt20ns toDATARDYcleart25ns pulsetonextpulset25ns
RDPW
RD
FD
RDYCLR
RR
GC
DRDY
HOLTINTEGRATEDCIRCUITS
7
HI-8685,HI-8686
ADDITIONALHI-8685PINCONFIGURATION
(Seepage1foradditionalpinconfigurations)
4321282726
5
D12
6
D11 D10
D9 D8 D7 D6
HI-8685PJI
7
HI-8685PJT
8 9
HI-8685PJT-10
10 11
12131415161718
&
HI-8685PJI-10
25
TESTB
24
RESET
23
RINB(RINB-10)
22
RINA(RINA-10)
21
ERROR
20
PARITYENB
19
READ
HI-8685
28-PinPlasticPLCC
ORDERINGINFORMATION
BUILT-IN
PARTPACKAGELINEEXT.10KTEMPERATUREBURNLEAD NUMBERDESCRIPTIONRECV'RREQUIREDRANGEFLOWINFINISH
HI-8685PJI28PINPLASTICPLCCNO
YES-40°CTO+85°CINOSOLDER HI-8685PJT28PINPLASTICPLCCYESNO-55°CTO+125°CTNOSOLDER HI-8685PSI28PINPLASTICSOIC-WBYESNO-40°CTO+85°CINOSOLDER HI-8685PST28PINPLASTICSOIC-WBYESNO-55°CTO+125°CTNOSOLDER HI-8686PQI32PINPLASTICTQFPYESOPTIONAL-40°CTO+85°CINOSOLDER HI-8686PQT32PINPLASTICTQFPYESOPTIONAL-55°CTO+125°CTNOSOLDER HI-8685PJI-1028PINPLASTICPLCCYESYES-40°CTO+85°CINOSOLDER HI-8685PJT-1028PINPLASTICPLCCYESYES-55°CTO+125°CTNOSOLDER HI-8685PSI-1028PINPLASTICSOIC-WBYESYES-40°CTO+85°CINOSOLDER
HI-8685PST-1028PINPLAST ICSOIC-WBYESYES-55°CTO+125°CTNOSOLDER
Legend:WB-WideBody
HOLTINTEGRATEDCIRCUITS
8
28-PINPLASTICPLCC
HI-8685,HI-8686PACKAGEDIMENSIONS
inches(millimeters)
PackageType:
28J
.045x45°
.490±.005
(12.446±.127)
SQ.
.152±.002
(3.861±.051)
.020MIN
(.508MIN)
PINNO.1IDENT
.454±.002
(11.532±.051)
SQ.
SEEDETAIL
A
.420±.010
(10.668±.254)
.026±.003x30°
(.660±.076x30°)
28-PINPLASTICSMALLOUTLINE(SOIC)-WB
(WideBody)
.017 ± .004
(.432 ± .102)
.010±.0003
(.256±.0076)
DETAILA
.050 ± .005
(1.27 ± .127)
.029±.003
(.737±.076)
.015 ± .002
(.381 ± .051)
.020MIN
(.508 ΜΙΝ )
.035R
TYP
(.889R)
PackageType:
28HW
.4065±.0125
(10.325±.318)
.050
(1.27)
.7055±.0045
(17.920±.114)
TYP
.295±.004
(7.493±.102)
.018
TYP
(.457)
0°to8°
.033±.017
(.838±.432)
HOLTINTEGRATEDCIRCUITS
9
.0105±.0015
(.2667±.0381)
SEEDETAILA
.095±.005
(2.413±.127)
.0075±.0035
(.191±.089)
DETAILA
HI-8685,HI-8686PACKAGEDIMENSIONS
32PINPLASTICTHINQUADFLATPACK(TQFP)
.00057.00022± (0.0145 ±).0055
.3543BSC
(9.00BSC )
SQ.
.2755BSC (7.00BSC )
SQ.
.0315BSC (0.80BSC )
.0148.0030± (0.375 ±).075
.0236.0059±
(0.60 ±).15
inches(millimeters)
PackageType:
32PTQS
.063MAX.
(1.60MAX. )
SeeDetailA
.0551.002±
(1.4 ± .05)
.0039.002±
(0.10 ±).05
.0055R.0024±
(0.14R ±).06
0°7°≤Θ≤
.0031RMIN. (0.08RMIN. )
DetailA
HOLTINTEGRATEDCIRCUITS
10
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