HI-8683,HI-8684
HOLTINTEGRATEDCIRCUITS
4
ERRORCHECKING
READINGRECEIVEBUFFER
Onceawordgapisdetected,thedatawordintheinputregisteristransferredtothereceivebufferandcheckedforerrors.
Whenparitydetectionisenabled(PARITYENBhigh),the
receivedwordischeckedforoddparity.Ifthereisaparity
error,the32ndbitofthereceiveddatawordissethigh.
Ifparitycheckingisdisabled(PARITYENBlow)the32nd
bitofthedatawordisalwaysthe32ndARINCbitreceived.
TheERRORflagoutputissethighuponreceiptofaword
gapandthenumberofbitsreceivedsincetheprevious
wordgapislessthanorgreaterthan32.TheERRORflag
isresetlowwhenthenext validARINCwordiswritteninto
thereceivebufferorwhenispulsedlow.
Whenthedatawordistransferredtothereceivebuffer,the
DATARDYpingoeshigh.Thedatawordcanthenberead
infour8-bitbytesbypulsingtheinputlowasindicatedinFigure5.ThefirstreadcycleresetsDATARDY
lowandincrementsaninternalcountertothenext8-bit
byte.Thecountercontinuestoincrementoneachreadcycleuntilallfourbytesareread.Therelationshipbetween
eachbitofanARINCwordreceivedandeachbitofthefour
8-bitdatabusbytesisspecifiedinFigure2.
WhenanewARINCwordisreceivedi talwaysoverwrites
thereceivebuffer.Ifthefirstbyteofthepreviouswordhas
notbeenread,thenpreviousdataislostandthereceive
bufferwillcontainthenewARINCword.However,ifthe
DATARDYpingoeshighbetweenthereadingofthefirst
andfourthbytes,thepreviousreadbytesarenolonger
validbecausetheunreadbyteshavebeenoverwrittenby
thenewARINCword.Also,thenextreadwillbeofthefirst
byteofthenewARINCwordsincetheinternalbytecounter
isalwaysresettothefirstbytewhennewdataistransferredtothereceivebuffer.
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FUNCTIONALDESCRIPTION(cont.)
TRUTHTABLE1.
RINARINBTESTATESTBRXARXB
-1.50to+1.50V-1.50Vto+1.50V0000
-3.25Vto-6.50V+3.25Vto+6.50V0001
+3.25Vto+6.50V-3.25Vto-6.50V0010
XX0101
XX1010
XX1100
X=don'tcare
ReadByteDataBusBitsARINCBits
1stByte1D0-D7ARINC1-ARINC8
2ndByte2D0-D7ARINC9-ARINC16
3rdByte3D0-D7ARINC17-ARINC24
4thByte4D0-D7ARINC25-ARINC32
FIGURE2.ORDEROFRECEIVEDDATA
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TESTMODE(HI-8684only)
Alowontheinputsetsaflip-flopwhichinitializes
theinternallogic.Whengoeshigh,theinternal
logicremainsintheinitializedstateuntilthefirstwordgapis
detectedpreventingreceptionofapartialword.
Thebuilt-indifferentiallinereceiverontheHI-8684canbe
disabledallowingthedataandclockdetectioncircuitryto
bedrivendirectlywithdigitalsignals.ThelogicalORfunctionoftheTESTAandTESTBisdefinedinTruthTable1.
Thetwoinputscanbeusedfortestingthereceiverlogicand
forinputtingARINC429typedataderivedfromanother
source/protocol.SeeFig ure4fortypicaltestinputtiming.
Thedeviceshouldalwaysbeinitializedwithimmediatelyafterenteringthetestmodetoclearapartialword
thatmayhavebeenreceivedsincethelastwordgap.Otherwise,anERRORconditionmayoccurandthefirst32
bitsofdataonthetestinputsmaynotbeproperlyreceived.
Also,whenenteringthetestmode,bothTESTAand
TESTBshouldbesethighandheldinthatstateforat
leastonewordgapperiod(17gapclocks)after
goeshigh.
Whenexitingthetestmode,bothtestinputsshouldbeheld
lowandthedeviceinitializedwith
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