HOLT HI-8020SM-64, HI-8020SM-61, HI-8020S-64, HI-8020S-61, HI-8020J-85 Datasheet

HI-8020/HI-8120

TheHI-8020&HI-8120highvoltagedisplaydrivers
arefunctionalreplacementsfortheAMIS5420and
MicrelMIC8013/8014series.TheseCMOSprod­uctsaredesignedtodriveliquidcrystaldisplaysby
converting5voltserialdatatoparallelsegmentand
backplanewaveformswithamplitudesupto30volts.
TheHI-8020&HI-8120differfromtheHI-8010by
onlytheshiftregisterclockandchipselectgating
logic.TheHI-8020hasTTLlogicinputswhereasthe
HI-8120hasCMOSlogicinputs.

Bothdevicescandriveupto38segmentsandhave3
possibleshiftregisterdatatapstoprovideoptionsto
c ascadedevicesforlargerdisplays.Dataisclocked
intoa38stageshiftregisterandparallellatched
beforetheoutputtranslatorsbyaLoadinput.

TheHI-8020&HI-8120areavailableinavarietyof
ceramicandplasticpackagingincludingDIP;leaded
andleadlesschipcarriers;andJ-leadandgull-wing
quadflatpacks.

!

!

!

DichroicLiquidCrystalDisplays
StandardLiquidCrystalDisplays
VacuumFluorescentDisplays

!

!

!

!

!

!

!

!

!

5voltinputtranslatedto30voltsorless
Pin-outadaptabletodrive30,32or38

LCDsegments
RCoscillatororhighvoltage(BP)clockinput
TTLcompatibleinputs(HI-8020only)

Lowpowerconsumption
Industrial(-40°Cto+85°C)&Military(-55°C

to+125°C)temperatureranges
PinforpincompatiblewiththeMicrel

MIC8010/8011seriesandtheAMIS4520
seriesdrivers

Cascadable
Militarylevelprocessingavailable

! CMOScompatibleinputs(HI-8120only)

PINCONFIGURATION (TopView)

FUNCTIONALBLOCKDIAGRAM

Þ BP

Oscillator

Divider

Voltage

Translator

HighVoltage

Buffer

38Stage

ShiftRegister

38BitLatch

Voltage

Translators

HighVoltage

Drivers

SEGMENTS

DATAIN

CLK

Þ
Þ
Þ

DOUT38
DOUT32
DOUT30

GENERALDESCRIPTION

DIN Þ

CL Þ

CS Þ

LD Þ

LCDØ Þ

LCDØOPT Þ

(Seepage3-6foradditionalpackagepinconfigurations)

FEATURES

January2001

HOLTINTEGRATEDCIRCUITS

3-901/01(DS8020Rev.B)

39
38
37
36
35
34
33
32
31
30
29

S17
S16
S15

S14
S13
S12
S11

S9
S8

V

S10

EE

S27
S28
S29
S30
S31
S32
N/C

V

LD

SS

CS

CL

7
8
9
10
11
12
13
14
15
16
17

HI-8020J-85

&

HI-8120J-85

44-PIN

PLASTIC

PLCC

FUNCTIONALDESCRIPTION

WheneveraLogic"0"isappliedtotheChipSelect()
input,onebitofdataisclockedintotheshiftregisterfromthe
serialdatainput(DIN)witheachnegativetransitionofthe
Clock()input.isinternallytiedtoVSSonsome
versions.ALogic"1"presentattheLoad(LD)inputwill
causeaparalleltransferofdatafromtheshiftregistertothe
datalatch.IftheLoad(LD)inputisheldhighwhiledatais
clockedintotheshiftregister,thelatchwillbetransparent.
AllfourlogicinputsareTTLcompatibleontheHI-8020and
CMOScompatibleontheHI-8120.

Todisplaysegments,aLogic"1"isstor edintheappropriate
shiftregisterbitposition,andthesegmentoutputisout-of­phasewiththebackplane.

Thebackplaneoutputfunctionsin1of2modes;externally
drivenorself-oscillating.WhentheLCDØinputisexternally
drivenwiththeLCDØOPTinputopencircuit(Figure2),the
backplaneoutputwillbein-phasewithLCDØ.Utilizingthe
self-oscillatingmode,inputsLCDØandLCDØOPTaretied
togetherandconnectedtoanRCcircuit(Figure3).
A150Kresistorwitha470pFcapacitorgeneratesan
approximatebackplanefrequencyof100Hz.The
LCDØ/LCDØOPToscillatorfrequencyi sdividedby256to
determinethebackplaneoutputfrequency.Theresistor
value(R)mustbeatleast30Kforproperself-oscillator
operation.

Fordisplayshavinganumberofsegmentsgreaterthan38,
twoormoreofthedisplaydriversmaybecascadedtogether
byconnectingtheserialdataoutput(DOUT)fromthefirst
driver,totheserialdatainput(DIN)ofthefollowingdriver,
etc.(SeeFigures2&3).Dataout(DOUT)willchangestate

CS

CLCS

W

W

HI-8020/HI-8120Series

TIMINGDIAGRAM

t

CSH

t

CSS

t

DS

t

DH

t

CL

t

CDO

t

LS

t

LW

t

CSL

t

LCS

CL

INPUT

DIN

INPUT

CS

INPUT

LD

INPUT

DOUT

OUTPUT

VALID

VALID

HOLTINTEGRATEDCIRCUITS

3-10

INTERNALOSCILLATORCIRCUIT

TOBACKPLANE

TRANSLATOR

ANDDRIVER

÷256

C

R

LCDØ

OPT

LCDØ

Figure1.

Q

VALID

ontherisingedgeoftheClock().Clock(),Load(LD)
andChipSelect()shouldbetiedincommonwitheach
other,respectively,betweenallcascadeddisplaydrivers.

CLCL

CS