HMS Anybus CompactCom B40-1 Design Manual
AAnnyybbuuss®®CCoommppaaccttCCoomm BB4400--11
DESIGN GUIDE
HMSI-27-230 3.4 en-US ENGLISH
Important User Information
Liability
Every care has been taken in the preparation of this document. Please inform HMS Industrial Networks of any
inaccuracies or omissions. The data and illustrations found in this document are not binding. We, HMS Industrial
Networks, reserve the right to modify our products in line with our policy of continuous product development. The
information in this document is subject to change without notice and should not be considered as a commitment by
HMS Industrial Networks. HMS Industrial Networks assumes no responsibility for any errors that may appear in this
document.
There are many applications of this product. Those responsible for the use of this device must ensure that all the
necessary steps have been taken to verify that the applications meet all performance and safety requirements
including any applicable laws, regulations, codes, and standards.
HMS Industrial Networks will under no circumstances assume liability or responsibility for any problems that may
arise as a result from the use of undocumented features, timing, or functional side effects found outside the
documented scope of this product. The effects caused by any direct or indirect use of such aspects of the product
are undefined, and may include e.g. compatibility issues and stability issues.
The examples and illustrations in this document are included solely for illustrative purposes. Because of the many
variables and requirements associated with any particular implementation, HMS Industrial Networks cannot assume
responsibility for actual use based on these examples and illustrations.
Intellectual Property Rights
HMS Industrial Networks has intellectual property rights relating to technology embodied in the product described in
this document. These intellectual property rights may include patents and pending patent applications in the USA
and other countries.
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Table of Contents
Page
1 Preface ................................................................................................................................. 3
1.1 About this Document........................................................................................................3
1.2 Related Documents .......................................................................................................... 3
1.3 Document history ...................................................... ....... ....... ....... ....... .......................... 3
1.4 Document Conventions ..................................................................................................... 4
1.5 Document Specific Conventions..........................................................................................4
1.6 Trademark Information .............................................................. ....... ....... ....... ....... ....... ....5
2 About the Anybus CompactCom B40-1.............................................................................. 6
2.1 General Information .... ............................................................... ....... ....... ....... ....... ....... ... 6
2.2 Features .........................................................................................................................7
3 Host Interface ...................................................................................................................... 8
3.1 Overview ....... ....... ....... ....... ....... ....... ....... ....... ....... ......................................................... 8
3.2 Host Application Connector ............ ....... .......................................................................... 10
3.3 Parallel Interface Operation ............................................................... ....... ....... ....... ....... .. 20
3.4 SPI Operation ................................................................................. ....... ........................ 26
3.5 Stand-alone Shift Register................................................................................................ 30
3.6 UART Operation... ....... ........................................................ ....... ....... ....... ....... ....... ....... . 37
4 Network Connector........................................................................................................... 40
4.1 Overview ....... ....... ....... ....... ....... ....... ....... ....... ....... ....................................................... 41
4.2 Power Supply Pins ........................................................................................... ....... ....... . 43
4.3 How to Connect Unused Network Connector Pins................................................................ 43
4.4 Ethernet Based Networks (Copper) ........................... ....... ................................................. 44
4.5 Ethernet Fiber Optic Networks ................................................. ....... ....... ....... ....... ....... ..... 45
4.6 DeviceNet...... ....... ....... ....... .......................................................................................... 47
4.7 PROFIBUS ............................................................................................. ........................ 47
4.8 CC-Link. ....... ....... ....... ........................................................ ....... ....... ....... ....... ....... ....... . 47
4.9 LED Indicators ..... ....... ........................................................ ....... ....... ....... ....... ....... ....... . 48
5 EMC .................................................................................................................................... 50
5.1 General ........................... ....... ....... ....... ....... ....... ....... ....... ............................................ 50
5.2 Bulk and Decoupling ....................................................................................................... 50
5.3 Reset Signal ................... ....... ....... ....... ........................................................ ....... ....... .... 50
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6 Black Channel/Safety Interface ........................................................................................ 51
A Mechanical Specification .................................................................................................. 53
A.1 Anybus CompactCom B40-1 ............................................................................................. 53
A.2 Connector Board for PROFIBUS ..... ....... ....... ....... ....... ....... ....... ....... .................................. 54
A.3 Connector Board for Copper Based Ethernet....................................................................... 55
A.4 Connector Board for Fiber Optic Ethernet . ....... ....... ....... ....... ....... ...................................... 56
A.5 Connector Board for CC-Link and DeviceNet ............................ ....... ....... ....... ....... ....... ........ 57
A.6 Footprints. ....... ....... ....... ....... ....... ....... ........................................................ ....... ....... .... 58
A.7 Height Restrictions ......................................................................................................... 59
A.8 Front Plate Restrictions .... ....... ....... ....... ........................................................ ....... ....... .... 60
A.9 Assembly.. ....... ....... ....... ....... ....... ....... ........................................................ ....... ....... .... 60
B Technical Specification...................................................................................................... 63
B.1 Environmental ................................................................................ ....... ........................ 63
B.2 Shock and Vibration .......... ....... ....... ....... ....... ....... .......................................................... 63
B.3 Electrical Characteristics .................................................................................................. 63
B.4 Regulatory Compliance ................................................................................................... 64
C How to Disable Ethernet Port 2 (EtherNet/IP) ................................................................ 65
D Implementation Examples ................................................................................................ 66
D.1 General ..... ....... ....... ....... .............................................................................................. 66
D.2 SPI.... ....... ....... ....... ...................................................................................................... 67
D.3 16-bit Parallel . ....... ....... ....... ....... ....... ....... ..................................................................... 68
D.4 8-bit Parallel............................... ....... ....... ....... ....... ....... ....... ....... ....... ........................... 69
D.5 Serial .................................................................................................... ....... ....... ....... .. 70
D.6 Network Status LED Outputs (LED[1A...4B]) .................................................... ....... ....... ...... 70
D.7 Power Supply Considerations ....................... ....... ............................................................. 72
E Design Examples, Network Interface ............................................................................... 74
E.1 Recommendations ....... ....... ....... ....... ....... ....... ....... ....... ................................................. 74
E.2 PCB Layout .. ....... ....... ........................................................ ....... ....... ....... ....... ....... ....... . 76
E.3 Network Interface Examples ........................................................... ....... ....... ....... ....... ..... 77
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Preface 3 (78)
1 Preface
1.1 About this Document
This document is intended to provide a good understanding of how to use the Anybus
CompactCom B40-1.
The reader of this document is expected to be familiar with hardware design and communication
systems in general. For additional information, documentation, support etc., please visit the
support website at www.anybus.com/support.
1.2 Related Documents
Document
Anybus CompactCom 40 Software Design Guide
Anybus CompactCom 40 Network Guides
Anybus CompactCom Host Application Implementation Guide
1.3 Document history
Author
HMS HMSI-216-125
HMS
HMS HMSI-27-334
Document ID
Version
1.23 2015-09-03 Last FM version.
2.0 2016-03-10
2.1 2016-12-07
3.0 2017-09-12
3.1 2018-03-09
3.2 2018-05-25
3.3 2018-10-23 Minor corrections
3.4 2019-02-27
Date
Description
Moved from FM to XML
Misc. updates
Added information for Anybus CompactCom B40 CC-Link IE Field
Minor corrections and updates
Added content to make the design guide independent of the M40 HWDG
Added new example schematics
Added BACnet/IP
Updated section on DIP1 and DIP2 usage
Added section on EMC
Misc corrections
Corrected pinnings for 8-bit parallel
Misc corrections
Updated for CANopen release
Rebranded
®
Anybus
CompactCom B40-1 Design Guide
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Preface 4 (78)
1.4 Document Conventions
Ordered lists are used for instructions that must be carried out in sequence:
1. First do this
2. Then do this
Unordered (bulleted) lists are used for:
• Itemized information
• Instructions that can be carried out in any order
...and for action-result type instructions:
► This action...
→ leads to this result
Bold typeface indicates interactive parts such as connectors and switches on the hardware, or
menus and buttons in a graphical user interface.
Monospaced text is used to indicate program code and other
kinds of data input/output such as configuration scripts.
This is a cross-reference within this document: Document Conventions, p. 4
This is an external link (URL): www.hms-networks.com
This is additional information which may facilitate installation and/or operation.
This instruction must be followed to avoid a risk of reduced functionality and/or damage
to the equipment, or to avoid a network security risk.
Caution
This instruction must be followed to avoid a risk of personal injury.
WARNING
This instruction must be followed to avoid a risk of death or serious injury.
1.5 Document Specific Conventions
• The terms “Anybus” or “module” refers to the Anybus CompactCom module.
• The terms “host” or “host application” refer to the device that hosts the Anybus.
• Hexadecimal values are written in the format NNNNh or 0xNNNN, where NNNN is the
hexadecimal value.
• A byte always consists of 8 bits.
• All dimensions in this document have a tolerance of ±0.10 mm unless otherwise stated.
• Outputs are TTL compliant unless otherwise stated.
• Signals which are “pulled to GND” are connected to GND via a resistor.
• Signals which are “pulled to 3V3” are connected to 3V3 via a resistor.
• Signals which are “tied to GND” are directly connected to GND,
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Preface 5 (78)
• Signals which are “tied to 3V3” are directly connected to 3V3.
1.5.1 PIN Types
The pin types of the connectors are defined in the table below. The pin type may be different
depending on which mode is used.
Pin type
I Input
O Output
I/O Input/Output (bidirectional)
OD Open Drain
Power
Definition
Pin connected directly to module power supply, GND or 3V3
1.6 Trademark Information
Anybus®is a registered trademark of HMS Industrial Networks.
EtherCAT®is a registered trademark and patented technology, licensed by Beckhoff Automation
GmbH, Germany.
All other trademarks are the property of their respective holders.
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About the Anybus CompactCom B40-1 6 (78)
2 About the Anybus CompactCom B40-1
2.1 General Information
The Anybus CompactCom B40-1 concept is developed for applications where the standard
Anybus CompactCom M40 cannot be used. The brick consists of a board with network
connectivity functionality, where the customer provides the physical network interface, including
network connectors. There are also available interface boards for several networks, providing
network connectors and physical interface.
All Anybus CompactCom B40-1 share footprint and electrical interface. The brick has two
connectors that provides communication with the host application board. The host application
connector provides an interface between the host application and the brick, while the network
connector provides network access. This enables full Anybus CompactCom functionality for all
applications without loss of network compatibility or environmental characteristics.
All dimensions expressed in this document are stated in millimeters and have a tolerance of
±0.10 mm unless stated otherwise.
For general information about the Anybus CompactCom 40 platform, consult the Anybus
CompactCom 40 Software Design Guide.
This a class A product. In a domestic environment, this product may cause radio
interference in which case the user may be required to take adequate measures.
This product contains ESD (Electrostatic Discharge) sensitive parts that may be damaged if
ESD control procedures are not followed. Static control precautions are required when
handling the product. Failure to observe this may cause damage to the product.
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About the Anybus CompactCom B40-1 7 (78)
2.2 Features
• Hardware support for triple buffered process data, which increases performance
• Supports synchronization for selected industrial networks
• Black channel interface, offering a transparent channel for safety communication for
selected networks
• Low latency
• Integrated protocol stack handling (where applicable)
• Control pins for status indications according to each network standard (where applicable)
• Separate network connector boards available
• Firmware upgradable (FLASH technology)
• 3.3 V design
• 8-bit and 16-bit parallel modes
• SPI mode
• Shift register mode
• UART/Serial mode
• Transparent Ethernet functionality
• Precompliance tested for network conformance (where applicable).
• Precompliance tested for CE & UL. Contact HMS Industrial Networks for further information.
All Anybus CompactCom B40-1 will be precertified for network conformance. This is done
to ensure that the final product can be certified, but it does not necessarily mean that the
final product does not require recertification. Contact HMS Industrial Networks for
further information.
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Host Interface 8 (78)
Host
CPU
Flash
Parallel Interface,
8-bit or 16-bit
Serial Interface
LED I/F
or RMII
RAM
A0 ... A13
Tx
Rx
LED[1A, 1B, 2A, 2B]
LED[3A, 3B, 4A, 4B]
RESET
OM[0...3]
MI[0...1]
MD
D0 ... D7
CS
OE
WE
IRQ
Physical Interface
Anybus
CPU
Network
Communications Controller
SPI
Shift Registers
SS
SCLK
MISO
MOSI
LD
SCLK
DO
DI
CT
PA
DIP1[0...7]
DIP2[0...7]
IRQ
D8 ... D15
3 Host Interface
This chapter describes the low level properties of the Anybus CompactCom interface.
3.1 Overview
The Anybus CompactCom has five different host communication interfaces, corresponding to
different operating modes. The figure below illustrates the basic properties of these interfaces as
well as various I/O and control signals, and how they relate to the host application.
Fig. 1
Please note that only one communication interface at a time is available. Which one is decided
at startup.
3.1.1 Parallel Interface, 8-bit or 16-bit
From an external point of view, the parallel interface is a common 8-bit or 16-bit parallel slave
port interface, which can easily be incorporated into any microprocessor based system that has
3.1.2 SPI
Anybus®CompactCom B40-1 Design Guide
implementing an 8-bit or 16-bit wide SRAM. Additionally, the parallel interface features an
interrupt request line, allowing the host application to service the module only when actually
needed.
The Serial Peripheral Interface (SPI) is a synchronous serial link. It operates in full duplex mode
and devices communicate in master/slave mode where the Anybus CompactCom modules
always act as slaves. The interface can provide much higher performance than the serial
interface, but not as high as the parallel interface.
an external address/data bus. Generally, implementing this type of interface is comparable to
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Host Interface 9 (78)
3.1.3 Stand-Alone Shift Register Interface
In this mode the Anybus CompactCom B40-1 operates stand-alone, with no host processor.
Process data is communicated to the shift registers on the host.
3.1.4 Serial Interface (UART)
The serial interface is provided for backward compatibility with the Anybus CompactCom 30. The
interface is event based, and has lower performance than the SPI and parallel modes. For more
information about the serial interface, see the Anybus CompactCom Hardware Design Guide for
the 30 series.
Please note that the Anybus CompactCom B40-1 is not backward compatible to the Anybus
CompactCom B30 hardware wise.
3.1.5 LED Interface
The status of the network LEDs is available as follows:
• As LED output signals on the network interface connector. These signals are able to drive a
LED directly and are available for all networks and operating modes. (Recommended)
• As LED output signals on the host interface connector for all operating modes except 16-bit
parallel mode. These signals are not able to drive a LED directly.
• In the LED status register for all modes, see Anybus CompactCom 40 Software Design guide
for more information.
3.1.6 Reduced Media-Independent Interface (RMII)
This interface is used for Transparent Ethernet, where Industrial Ethernet communication is
handled by the Anybus CompactCom and other Ethernet communication is routed to the host
application. 16–bit parallel mode and the LED Interface signals are not available in the host
application connector when Transparent Ethernet is enabled. The LED signals are still available
on the network connector of the Anybus CompactCom B40-1.
See RMII — Reduced Media-Independent Interface, p. 17 for mor information.
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Host Interface 10 (78)
Pin 1
Application
interface
Pin 1
Network
interface
Outline of brick
Top view
1
2
56
55
Top view
3.2 Host Application Connector
The host application connector provides an interface between the host application and the
Anybus CompactCom B40-1.
Fig. 2
The connector is implemented by a standard 1.27 mm 56 pin header surface mounted to the
bottom side of the PCB.
Fig. 3
The pictures shows the pinning of the mating connector on the host application seen from the
top.
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Host Interface 11 (78)
GND 2 1 3V3
A0/WEH/DIP1_0 4
3 RESET
A2/DIP1_2 6
5 A1/DIP1_1
GND 8
7 A3/DIP1_3
A5/DIP1_5 10
9 A4/DIP1_4
A7/DIP1_7 12
11 A6/DIP1_6
GND 14
13 A8/LD/SS
A10/DO/MISO 16
15 A9/SCLK
GND 18
17 A11/DI/MOSI
A13/ASI_TX 20
19 A12/ASI_RX
D6/DIP2_6 22
21 D7/DIP2_7
GND 24
23 D5/DIP2_5
D3/DIP2_3 26
25 D4/DIP2_4
GND 28
27 D2/DIP2_2
MD0 30
29 D1/DIP2_1
OM0 32
31 D0/DIP2_0
GND 34
33 OM1
CS 36
35 OM2
IRQ/PA 38
37 WE/WEL/CT
GND 40
39 OE
LED4B/D14 42
41 LED4A/D15
GND 44
43 LED3A/D13
LED2A/D11 46
45 LED3B/D12
LED1A/D9 48
47 LED2B/D10
GND 50
49 LED1B/D8
TX/ASI_TX/OM3 52
51 RX/ASI_RX
MI0/SYNC 54
53 MI1
GND 56
55 3V3
Anybus®CompactCom B40-1 Design Guide
Fig. 4
See Pin Overview, p. 12 for information on how each pin is used in the different modes.
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Host Interface 12 (78)
3.2.1 Pin Overview
Depending on operating mode, the pins have different names and different functionality.
Presented below is an overview of all pins except GND and 3V3.
The pin types of the connector are defined in PIN Types, p. 5. The pin type may be different
depending on which mode is used.
The ASI (Anybus Safety Interface) signals are used to connect a safety module to the safety interface of
an Anybus CompactCom 40-series module.
Note: The pin numbers of the Anybus CompactCom B40 (brick) host application
connector are different from those of the Anybus CompactCom M40 (module) host
application connector.
Pin Signal Name
Serial
Mode
4 DIP1_0 DIP1_0 A0 WEH DIP1_0 I
5 DIP1_1 DIP1_1 A1 A1 DIP1_1 I
6 DIP1_2 DIP1_2 A2 A2 DIP1_2 I
7 DIP1_3 DIP1_3 A3 A3 DIP1_3 I
9 DIP1_4 DIP1_4 A4 A4 DIP1_4 I
10 DIP1_5 DIP1_5 A5 A5 DIP1_5 I
11 DIP1_6 DIP1_6 A6 A6 DIP1_6 I
12 DIP1_7 DIP1_7 A7 A7 DIP1_7 I
13 SS A8 A8 LD
15 SCLK A9 A9 SCLK O, I
16 MISO A10 A10 DO O, I
17 MOSI A11 A11 DI I
19 ASI RX A12 A12 I
20 ASI TX A13 A13 O, I
31 DIP2_0 DIP2_0 D0 D0 DIP2_0
29 DIP2_1 DIP2_1 D1 D1 DIP2_1
27 DIP2_2 DIP2_2 D2 D2 DIP2_2
26 DIP2_3 DIP2_3 D3 D3 DIP2_3
25 DIP2_4 DIP2_4 D4 D4 DIP2_4
23 DIP2_5 DIP2_5 D5 D5 DIP2_5
22 DIP2_6 DIP2_6 D6 D6 DIP2_6
21 DIP2_7 DIP2_7 D7 D7 DIP2_7
49 LED1B LED1B LED1B D8 LED1B
48 LED1A LED1A LED1A D9 LED1A
47 LED2B LED2B LED2B D10 LED2B
46 LED2A LED2A LED2A D11 LED2A
45 LED3B LED3B LED3B D12 LED3B
43 LED3A LED3A LED3A D13 LED3A
42 LED4B LED4B LED4B D14 LED4B
41 LED4A LED4A LED4A D15 LED4A
37 WE WEL CT I
39 OE OE I
36 CS CS I
38 IRQ IRQ IRQ PA O
SPI Mode 8-bit
Mode
16-bit
Mode
Shift
Register
Mode
Type Notes
I/O
I, I/O
I, I/O
I, I/O
I, I/O
I, I/O
I, I/O
I, I/O
I, I/O
O, I/O
O, I/O
O, I/O
O, I/O
OD, I/O
OD, I/O
O, I/O
O, I/O
In modules supporting RMII,
these pins are used for the RMII
interface when this has been
activated, see RMII — Reduced
Media-Independent Interface, p.
17.
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Host Interface 13 (78)
Pin Signal Name
Serial
Mode
51 RX ASI RX ASI RX ASI RX ASI RX I
52
TX / OM3 ASI TX /
32 OM0 OM0 OM0 OM0 OM0 I
33 OM1 OM1 OM1 OM1 OM1 I
35 OM2 OM2 OM2 OM2 OM2 I
54 MI0
53 MI1 MI1 MI1 MI1 MI1 O
30 MD0 MD0 MD0 MD0 MD0 O
3 RESET RESET RESET RESET RESET I
SPI Mode 8-bit
OM3
MI0/SYNC MI0/SYNC MI0/SYNC MI0/SYNC
3.2.2 Power Supply Pins
Signal
GND Power 2, 8, 14, 18, 24,
3V3 Power 1, 55
Type
Mode
ASI TX /
OM3
16-bit
Mode
ASI TX /
OM3
Pin Description
28, 34, 40, 44,
50, 56
Ground
Power and signal ground reference.
3.3 V power supply.
Shift
Register
Mode
ASI TX /
OM3
Type Notes
I/O
O
Strapping input with internal
weak pull-up during powerup.
To configure OM3, use an
external pull-up/pull-down of
1.0 to 2.2 kΩ. The pin changes to
output after powerup
Low at power-up and before
reset release.
Tied to 3V
Tied to GND
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Host Interface 14 (78)
3.2.3 LED Interface / D8–D15 (Data Bus)
Signal Name
LED1A / D9 O / I/O
LED1B / D8 O / I/O
LED2A / D11 O / I/O
LED2B / D10 O / I/O
LED3A / D13 OD / I/O
LED3B / D12 OD / I/O
LED4A / D15 O / I/O
LED4B / D14 O / I/O
Pin Type Pin
48
49
46
47
43
45
41
42
Description, LED Interface
LED 1 Indication A
• Green
LED 1 Indication B
• Red
LED 2 Indication A
• Green
LED 2 Indication B
• Red
LED 3 Indication A
• Green
• Mainly used for link/
activity on network port 1
on the Ethernet modules.
Pin is open-drain to maintain
backward compatibility with
existing applications, where this
pin may be tied to GND.
LED 3 Indication B
• Yellow or red, depending
on network
• Mainly used for link/
activity on network port 1
on the Ethernet modules
(yellow).
Pin is open-drain to maintain
backward compatibility with
existing applications, where this
pin may be tied to GND.
LED 4 Indication A
• Green
• Mainly used for link/
activity on network port 2
on the Ethernet modules.
LED 4 Indication B
• Yellow or red, depending
on network
• Mainly used for link/
activity on network port 2
on the Ethernet modules
(yellow)
Description, Data Bus
D9 Data Bus
• "D9" in 16-bit parallel
mode.
D8 Data Bus
• "D8" in 16-bit parallel
mode.
D11 Data Bus
• "D11" in 16-bit parallel
mode.
D10 Data Bus
• "D10" in 16-bit parallel
mode.
D13 Data Bus
• "D13" in 16-bit parallel
mode.
D12 Data Bus
• "D12" in 16-bit parallel
mode.
D15 Data Bus
• "D15" in 16-bit parallel
mode.
D14 Data Bus
• "D14" in 16-bit parallel
mode.
The LED signals are also available on the network connector as active high push/pull signals. Those
signals are easier to use for LEDs.
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Host Interface 15 (78)
3.2.4 Settings / Sync
Signal Name
OM0
OM1
OM2
OM3 (ASI TX) (TX)
MI0 / SYNC
MI1
MD0 O 30
ASI RX
ASI TX
RX
TX
Type
I
I
I
I (Used as OM3
during power up)
O
O
I
O
I
O
Pin Description
32
33
35
52
54
53
51
52
UART
operation:
19
20
51
52
Operating Mode
Used to select interface and baud rate, see below.
Module Identification
MI0 and MI1 can be used by the host application to determine
what type of Anybus CompactCom that is connected.
SYNC
On networks that support synchronous communication, a
periodic synchronization pulse is provided on the SYNC output.
The SYNC pulse is also available as a maskable interrupt using the
IRQ signal.
Module Detection
This signal can be used by the host application to determine that
an Anybus CompactCom is inserted into the slot, see Module
Detection, p. 16.
The signal is connected directly to GND on the Anybus
CompactCom.
Black Channel Communication
These signals can be connected to a safety module, e.g. to IXXAT
Safe T100 to provide a safe channel for black channel
communication
If not used, pin 51 (for UART operation pin 19) should be pulled
to 3V3.
Serial Communications Signals
®
Anybus
CompactCom B40-1 Design Guide
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Host Interface 16 (78)
Operating Modes
These inputs select the interface that should be used to exchange data (SPI, stand-alone shift
register, parallel or serial) and, if the serial interface option is used, the operating baud rate. The
state of these signals is sampled once during startup, i.e. any changes require a reset in order to
have effect.
OM3 OM2 OM1 OM0
LOW LOW LOW LOW
LOW LOW LOW HIGH SPI
LOW LOW HIGH LOW
LOW LOW HIGH HIGH
LOW HIGH LOW LOW
LOW HIGH LOW HIGH
LOW HIGH HIGH LOW
LOW HIGH HIGH HIGH
HIGH LOW LOW LOW
HIGH LOW LOW HIGH
HIGH LOW HIGH LOW
HIGH LOW HIGH HIGH
HIGH HIGH LOW LOW
HIGH HIGH LOW HIGH
HIGH HIGH HIGH LOW
HIGH HIGH HIGH HIGH
LOW = V
HIGH = V
IL
IH
These signals must be stable prior to releasing the RESET signal. Failure to observe this may result in
faulty behavior.
Operating Mode
Reserved
Stand-alone shift register
Reserved
Reserved
Reserved
Reserved
16-bit parallel
8-bit parallel
Serial 19.2 kbps
Serial 57.6 kbps
Serial 115.2 kbps
Serial 625 kbps
Reserved
Reserved
Service Mode
Module Detection
This signal is internally connected to GND, and can be used by the host application to detect
whether a module is present or not. When connecting an external pull-up resistor, a low signal
indicates that a module is present.
If not used, leave this signal unconnected.
Module Identification
These signals indicate which type of module that is connected. It is recommended to check the
state of these signals before accessing the module.
MI1 MI0
LOW LOW
LOW HIGH
HIGH LOW
HIGH HIGH
LOW = V
HIGH = V
OL
OH
On modules supporting “SYNC”, MI0 is used as a SYNC signal during operation. MI0 should only be
sampled by the application during the time period from power up to the end of SETUP state.
Module Type
Active Anybus CompactCom 30
Passive Anybus CompactCom
Active Anybus CompactCom 40
Customer specific
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 17 (78)
3.2.5 RMII — Reduced Media-Independent Interface
In RMII enabled modules, the pins described in the table below are used for the RMII
communication. They are set to tristate during startup, making it impossilbe to indicate e.g.
exception during setup. When setup is complete, they are set to inputs/outputs according to the
selected mode. See Anybus CompactCom 40 Software Design Guide for more information on
mode selection.
The 16-bit parallel mode can not be used when RMII is enabled
LED status will not be available when RMII is enabled.
Pin Signal Name
49 RXD0 O
48 RXD1 O
47 RXDV O
46 I
45 TXD0 I
43 TXD1 I
42 TXEN I
41 CLK I
Type Notes
3.2.6 IRQ (Interrupt Request)
Signal Name Pin Type Pin Description
IRQ O 38 Interrupt Request
The use of this signal is optional but highly recommended. Even if the host application lacks
interrupt capabilities, it is recommended to connect this signal to an input port to simplify
software design.
This signal must be pulled to 3V3 on the host application side to prevent spurious interrupts
during startup.
-
-
-
Not used (connect to external pull-down)
-
-
-
-
Active low interrupt signal.
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 18 (78)
Power
/RESET
0V
3.3V
Power
On
Power
Stable
t
B
t
A
V
IL
V
IH
t
t
3.2.7 RESET (Reset Input)
Signal Name
Pin Type Pin Description
RESET I 3 Reset
Used to reset the module.
The master reset input is active low. It must be connected to a host application controllable
output pin in order to handle the power up sequence, voltage deviations and to be able to
support network reset requests. If the brick is used in stand-alone mode, with no host processor,
a separate reset circuit can be used, see Reset Circuit Example, p. 36.
The brick does not feature any internal reset regulation. To establish a reliable interface, the host
application is solely responsible for resetting the module when the supply voltage is outside the
specified range.
Power Up
Fig. 5
Powerup time limits are given in the table below:
Symbol Min.
t
A
t
B
- -
1 ms
Max.
-
Definition
Time until the power supply is stable after power-on; the duration depends
on the power supply design of the host application and is thus beyond the
scope of this document.
Safety margin.
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 19 (78)
RESET
t
C
V
IL
V
IH
t
Restart
The reset pulse duration must be at least 10 µs in order for the NP40 to properly recognize a
reset.
Fig. 6
Symbol Min.
t
C
10 µs
Max.
-
Definition
Reset pulse width.
®
Anybus
CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 20 (78)
3.3 Parallel Interface Operation
3.3.1 General Description
The parallel interface is based on an internal memory architecture, that allows the Anybus
CompactCom module to be interfaced directly as a memory mapped peripheral. The M40
modules can be configured for 8-bit or 16-bit parallel operation. The access time is 30 ns.
Polled operation is possible, but at the cost of an overhead. For increased efficiency, an optional
interrupt request signal (IRQ) can relieve the host application from polling for new information,
thus increasing the performance.
The parallel interface must be enabled using OM[0...3].
3.3.2 Pin Usage in 8-bit Parallel Mode
The parallel 8-bit interface uses the following signals:
Pin Signal Name Pin Type
4
5
6
7
9
10
11
12
13
15
16
17
19
20
31
29
27
26
25
23
22
21
49
48
47
46
45
43
42
41
37 WE I
39 OE I
36 CS I
38 IRQ O
32
33
35
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
D0
D1
D2
D3
D4
D5
D6
D7
LED1B
LED1A
LED2B
LED2A
LED3B
LED3A
LED4B
LED4A
OM0
OM1
OM2
I
I/O
O
O
O
O
OD
OD
O
O
I
Description/Comments
A[0...3]: Mandatory address input signals.
Standard bidirectional data bus.
8-bit mode: LED functionality, see LED Interface, p. 9.
Active low write signal or combined read/write signal.
Bus output enable; enables output on the data bus when low.
Bus chip select enable; enables parallel access to the module when
low.
Active low Interrupt Request signal. Asserted by the Anybus
CompactCom module.
The use of this signal is optional but highly recommended. Even if the
host application lacks interrupt capabilities, it is recommended to
connect this signal to an input port to simplify software design.
This signal must be pulled to 3V3 on the host application side to
prevent spurious interrupts during startup.
Operating mode. Connect all three to GND for 8-bit parallel operating
mode.
For more information see Operating Modes, p. 16.
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 21 (78)
Pin Signal Name Pin Type
52
51 ASI RX I
54
53
30 MD0 O
3 RESET I
OM3 / ASI TX
MI0/SYNC
MI1
O, I
O
Description/Comments
Black channel output.
See Black Channel/Safety Interface, p. 51.
During startup the pin (with OM[0..2]) is used to define the operating
mode of the module. Connect to external pull-up for 8-bit parallel
operating mode, see Pin Overview, p. 12.
Black channel input. Tie to 3V3 if not used.
See Black Channel/Safety Interface, p. 51
See Module Identification, p. 16
See Module Detection, p. 16
See RESET (Reset Input), p. 18.
There are no internal pull-up resistors on any of the signals above, except for OM3, which has an internal
weak pull-up.
Function Table (CS, WE, OE, D[0...7])
CS WE OE
HIGH X X
LOW LOW X Data Input
LOW HIGH LOW Data Output
LOW HIGH HIGH
D[0...7] State
High
impedance
(Write)
(Read)
High
impedance
Comment
Module not selected.
Data on D[0...7] is written to location selected by
address bus.
Data from location selected by address bus is
available on D[0...7].
Module is selected, but D[0...7] is in a high
impedance state.
X = don’t care
LOW = V
HIGH = V
IL
IH
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 22 (78)
3.3.3 Pin Usage in 16-bit Parallel Mode
The parallel 16-bit interface uses the following signals:
Pin Signal Name Pin Type
5
6
7
9
10
11
12
13
15
16
17
19
20
31
29
27
26
25
23
22
21
49
48
47
46
45
43
42
41
4 WEH I
37 WEL I
39 OE I
36 CS I
38 IRQ O
32
33
35
54
53
52
51 ASI RX I
30 MD0 O
3 RESET I
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
OM0
OM1
OM2
MI0/SYNC
MI1
OM3 / ASI TX
I
I/O
I
O
O, Strap
Description/Comments
A[1...13]: Mandatory address input signals.
Selects source/target location.
Standard bidirectional data bus.
Write enable high byte.
Write enable low byte.
Bus output enable; enables output on the data bus when low.
Bus chip select enable; enables parallel access to the module when
low.
Active low Interrupt Request signal. Asserted by the Anybus
CompactCom module.
The use of this signal is optional but highly recommended. Even if the
host application lacks interrupt capabilities, it is recommended to
connect this signal to an input port to simplify software design.
This signal must be pulled to 3V3 on the host application side to
prevent spurious interrupts during startup.
Operating mode. Connect all three to 3V3 for 16-bit parallel operating
mode.
For more information see Operating Modes, p. 16
See Module Identification, p. 16
Black channel output.
See Black Channel/Safety Interface, p. 51
During startup the pin (with OM[0..2]) is used to define the operating
mode of the module. Connect to pull-down for 16-bit parallel
operating mode, see Pin Overview, p. 12.
Black channel input. Connect to 3V3 if not used.
See Black Channel/Safety Interface, p. 51
See Module Detection, p. 16.
See RESET (Reset Input), p. 18
The A0 signal is not needed in 16-bit parallel operating mode, as 16 bits are addressed instead of
8 bits. If there is need for writing one byte at the time signals WEH and WEL can be used to
enable writing to the high or low byte respectively. If both are enabled both bytes are written.
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 23 (78)
Function Table (CS, WEL, WEH, OE, D[0...15])
CS WEL WEH OE
HIGH X X X
LOW LOW HIGH X
LOW HIGH LOW X
LOW LOW LOW X
LOW HIGH HIGH LOW
LOW HIGH HIGH HIGH
D[0...15] State
High impedance Module not selected.
Data Input (Write) Data on D[0...7] is written to low byte of
Data Input (Write) Data on D[8...15] is written to high byte
Data Input (Write) Data on D[0 ...15] is written to location
Data Output (Read) Data from location selected by address
High impedance Module is selected, but D[0...15] is in a
Comment
location selected by address bus.
of location selected by address bus.
selected by address bus.
bus is available on D[0...15].
high impedance state.
X = don’t care
LOW = V
HIGH = V
IL
IH
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 24 (78)
Address
CS
OE
Data
Data valid
Data valid
tAA tAA
tACS
tAR
tHZ
tHZ
Address valid
Address valid
tDH
tRC
3.3.4 Memory Access Read Timing
The WE input signal must remain high during a read access. The timing diagram shows a burst
read, but the timing applies for a single read as well. The Anybus CompactCom B40-1 has no
setup or hold timing requirements on the address bus relative to CS during read operations. The
only limitation on read setup and hold times is that the pingpong and powerup interrupt will be
acknowledged if all address lines are high for 10-15 ns or more while CS is low.
Fig. 7
Symbol
tRC
tAA
tACS
tAR
tHZ
tDH
Parameter
Read cycle time
Address valid to Data valid
CS low to Data valid
OE low to Data valid
CS or OE high to output reached tristate
Data hold time
Min (ns) Max (ns)
30
-
-
-
-
0
-
30
30
15
15
-
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
Host Interface 25 (78)
Address
CS
WE
Data
Data valid
Data valid
tAS tAH
tWP
Address valid
Address valid
tDHtDS
tWR
tAS tAH
tWP
tDHtDS
tWC
tWR
Address valid
Address
CS
WE
Data
Data valid
Data valid
tAS tAH
tWP
Address valid
Address valid
tDHtDS
tWR
tAS tAH
tWP
tDHtDS
tWC
tWR
Address valid
3.3.5 Memory Access Write Timing
It doesn’t matter if the OE signal is low or high as long as WE is active (low). In 16 bit mode, the
timing requirements of WE applies to both WEL and WEH. The timing diagrams show a burst
write but the timing applies for a single write as well. The first diagram shows write enable
controlled write timing and the second shows chip select controlled write timing.
Fig. 8
Fig. 9
Symbol
tWC
tAS
tAH
tWP
tDS
tDH
Parameter
Write cycle time
Address valid before End-of-Write
Address valid after End-of-Write
CS and WE low pulse width
Data valid before End-of-Write
Data valid after End-of-Write
tWR Write recovery time 10
Min (ns) Max (ns)
30
15
0
15
15
0
-
-
-
-
-
-
-
Anybus®CompactCom B40-1 Design Guide
HMSI-27-230 3.4 en-US
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