2SJ244
2SJ244
Silicon P-Channel MOS FET
Application
High speed power switching
Low voltage operation
Features
•Very Low on-resistance
•High speed switching
•Suitable for camera or VTR motor drive circuit, power switch, solenoid drive and etc.
Outline
UPAK |
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1 |
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4 |
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D |
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G |
1. |
Gate |
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2. |
Drain |
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3. |
Source |
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4. |
Drain |
S
2SJ244
Absolute Maximum Ratings (Ta = 25°C)
Item |
Symbol |
Ratings |
Unit |
Drain to source voltage |
VDSS |
–12 |
V |
Gate to source voltage |
VGSS |
±7 |
V |
Drain current |
ID |
±2 |
A |
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Drain peak current |
ID(pulse)*1 |
±4 |
A |
Channel dissipation |
Pch*2 |
1 |
W |
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Channel temperature |
Tch |
150 |
°C |
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Storage temperature |
Tstg |
–55 to +150 |
°C |
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Notes: 1. PW ≤ 100 µs, duty cycle ≤ 10% |
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2.Value on the alumina ceramic board (12.5×20×0.7 mm)
3.Marking is “JY”.
Electrical Characteristics (Ta = 25°C)
Item |
Symbol |
Min |
Typ |
Max |
Unit |
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Test conditions |
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Drain to source breakdown |
V(BR)DSS |
–12 |
— |
— |
V |
I |
D = –1 mA, VGS = 0 |
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voltage |
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Gate to source breakdown |
V(BR)GSS |
±7 |
— |
— |
V |
I |
G = ±10 µA, VDS = 0 |
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voltage |
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Gate to source cutoff current |
IGSS |
— |
— |
±5 |
µA |
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VGS = ±6 V, VDS = 0 |
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Zero gate voltage drain current |
IDSS |
— |
— |
–1 |
µA |
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VDS = –8 V, VGS = 0 |
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Gate to source cutoff voltage |
VGS(off) |
–0.4 |
— |
–1.4 |
V |
I D = –100 µA, VDS = –5 V |
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Static drain to source on state |
RDS(on)1 |
— |
0.65 |
0.9 |
Ω |
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ID = –0.5 A*1, VGS = –2.5 V |
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resistance |
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Static drain to source on state |
RDS(on)2 |
— |
0.5 |
— |
Ω |
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ID = –1 A*1, VGS = –4 V |
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resistance |
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Forward transfer admittance |
|yfs| |
— |
1.8 |
— |
S |
I |
D = –1 A*1, VDS = –5 V |
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Input capacitance |
Ciss |
— |
130 |
— |
pF |
V |
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DS = –5 V, VGS = 0, |
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Output capacitance |
Coss |
— |
50 |
— |
pF |
f = 1 MHz |
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Reverse transfer capacitance |
Crss |
— |
260 |
— |
pF |
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Turn-on delay time |
t(on) |
— |
365 |
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ns |
I |
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D = –0.2 A*1, Vin = –4 V, |
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Turn-off delay time |
t(off) |
— |
1450 |
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ns |
R |
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L = 51 Ω |
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Body to drain diode forward |
V |
— |
— |
7 |
V |
I |
F |
= 4 A*1, V |
GS |
= 0 |
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DF |
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voltage
Note: 1. Pulse test
2
2SJ244
)W ( board) Pch |
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DissipationPower |
ceramicalumina the |
Channel |
(on |
Maximum Channel Power Dissipation Curve
2.0
1.5
1.0
0.5
0 |
50 |
100 |
150 |
200 |
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Ambient Temperature |
Ta ( °C ) |
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Maximum Safe Operation Area
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-10 |
Operation in this Area |
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is limited by RDS(on) |
PW = 1 ms 1 shot |
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-3 |
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A ) |
-1.0 |
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DC |
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Operation |
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D |
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I |
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Current |
-0.3 |
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(Ta=25°C) |
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Drain |
-0.1 |
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-0.03 |
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-0.01 |
-0.3 |
-1.0 |
-3 |
-10 |
-30 -100 |
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-0.1 |
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Drain to Source Voltage |
V DS (V) |
**on the alumina ceramic board
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Typical Output Characteristics |
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-5 |
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-5 |
-4 |
-3.5 |
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- 4.5 |
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) |
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A ) |
-4 |
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( A |
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( |
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-3 |
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D |
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D |
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-3 |
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I |
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I |
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Current |
-2 |
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-2.5 |
Current |
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Drain |
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-2 |
Drain |
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-1 |
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Pulse Test |
VGS = -1.5 V |
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Typical Forward Transfer Characteristics
-5 |
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VDS = -5 V |
Ta = -25 °C |
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Pulse Test |
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-4 |
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+25 |
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+75 |
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-3 |
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-2 |
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-1 |
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0 |
-2 |
-4 |
-6 |
-8 |
-10 |
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0 |
-1 |
-2 |
-3 |
-4 |
-5 |
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Drain to Source Voltage VDS |
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( V ) |
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Gate to Source Voltage VGS |
( V ) |
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