HIT HM62V8512CLTTI-7 Datasheet

HM62V8512CI Series

Wide Temperature Range Version

4 M SRAM (512-kword × 8-bit)

ADE-203-1215A (Z)

Rev. 1.0

Feb. 6, 2001

Description

The Hitachi HM62V8512CI is a 4-Mbit static RAM organized 512-kword × 8-bit. HM62V8512CI Series has
realized higher density, higher performance and low power consumption by employing CMOS process
technology (6-transistor memory cell). The HM62V8512CI Series offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It is packaged in standard 32-pin TSOP II.

Features

• Single 3.0 V supply: 2.7 V to 3.6 V

• Access time: 70 ns (max)

• Power dissipation
 Active: 6.0 mW/MHz (typ)
 Standby: 2.4 µW (typ)

• Completely static memory. No clock or timing strobe required

• Equal access and cycle times

• Common data input and output: Three state output

• Directly LV-TTL compatible: All inputs and outputs

• Battery backup operation

• Operating temperature: –40 to +85˚C

Ordering Information

Type No. Access time Package

HM62V8512CLTTI-7 70 ns 400-mil 32-pin plastic TSOP II (TTP-32D)

HM62V8512CI Series

Pin Arrangement

32-pin TSOP

A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V

SS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Pin Description

Pin name Function

A0 to A18 Address input
I/O0 to I/O7 Data input/output

CS Chip select
OE Output enable
WE Write enable

V

CC

V

SS

Power supply
Ground

(Top view)

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

V

CC

A15
A17

WE

A13
A8
A9
A11

OE

A10

CS

I/O7
I/O6
I/O5
I/O4
I/O3

2

Block Diagram

HM62V8512CI Series

LSB

MSB

A11

A9

A8
A15
A18
A10
A13
A17
A16
A14
A12

I/O0

I/O7

Row
Decoder

Input
Data
Control

•

•

•

•

•

•

•

LSB

Memory Matrix
2,048 2,048

Column Decoder

A3A2A1A0 A6A5

•

•

×

Column I/O

A4 A7

MSB

V

CC

V

SS

•

•

CS

WE

OE

Timing Pulse Generator

Read/Write Control

3

HM62V8512CI Series

Function Table

WE CS OE Mode VCC current Dout pin Ref. cycle

× H × Not selected I
H L H Output disable I
H L L Read I
L L H Write I
L L L Write I

, I

SB

SB1

CC

CC

CC

CC

Note: ×: H or L

Absolute Maximum Ratings

Parameter Symbol Value Unit

Power supply voltage V
Voltage on any pin relative to V

SS

Power dissipation P

CC

V

T

T

Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C
Storage temperature under bias Tbias –40 to +85 °C

Notes: 1. VT min: –3.0 V for pulse half-width ≤ 30 ns.

2. Maximum voltage is 4.6 V.

–0.5 to +4.6 V
–0.5*1 to VCC + 0.5*

1.0 W

High-Z —
High-Z —
Dout Read cycle
Din Write cycle (1)
Din Write cycle (2)

2

V

Recommended DC Operating Conditions (Ta = –40 to +85°C)

Parameter Symbol Min Typ Max Unit

Supply voltage V

Input high voltage V
Input low voltage V

CC

V

SS

IH

IL

Note: 1. VIL min: –3.0 V for pulse half-width ≤ 30 ns.

4

2.7 3.0 3.6 V
000V

2.4 — VCC + 0.3 V

*1

–0.3

— 0.6 V