HIT HM628512BLPI-7, HM628512BLPI-8, HM628512BLRRI-7, HM628512BLFPI-7, HM628512BLFPI-8 Datasheet
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HM628512BI Series
4 M SRAM (512-kword × 8-bit)
ADE-203-935C (Z)
Rev. 2.0
Aug. 24, 1999
Description
The Hitachi HM628512BI is a 4-Mbit static RAM organized 512-kword × 8-bit. HM628512BI Series has
realized higher density, higher performance and low power consumption by employing Hi-CMOS process
technology. The HM628512BI Series offers low power standby power dissipation; therefore, it is suitable for
battery backup systems. It has packaged in 32-pin SOP, 32-pin TSOP II and 32-pin DIP.
Features
• Single 5 V supply
• Access time: 70/85 ns (max)
• Power dissipation
Active: 50 mW/MHz (typ)
Standby: 10 µW (typ)
• Completely static memory. No clock or timing strobe required
• Equal access and cycle times
• Common data input and output: Three state output
• Directly TTL compatible: All inputs and outputs
• Battery backup operation
• Operating temperature: –40 to +85˚C
HM628512BI Series
Ordering Information
Type No. Access time Package
HM628512BLPI-7
HM628512BLPI-8
HM628512BLFPI-7
HM628512BLFPI-8
HM628512BLTTI-7
HM628512BLTTI-8
HM628512BLRRI-7
HM628512BLRRI-8
70 ns
85 ns
70 ns
85 ns
70 ns
85 ns
70 ns
85 ns
600-mil 32-pin plastic DIP (DP-32)
525-mil 32-pin plastic SOP (FP-32D)
400-mil 32-pin plastic TSOP II (TTP-32D)
400-mil 32-pin plastic TSOP II reverse (TTP-32DR)
2
Pin Arrangement
HM628512BI Series
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
HM628512BLPI Series
HM628512BLFPI Series
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
(Top view)
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
HM628512BLTTI Series
(Top view)
HM628512BLRRI Series
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
Pin Description
Pin name Function
A0 to A18 Address input
I/O0 to I/O7 Data input/output
CS Chip select
OE Output enable
WE Write enable
V
CC
V
SS
Power supply
Ground
(Top view)
3
HM628512BI Series
Block Diagram
A18
A16
A1
A0
A2
A12
A14
A3
A7
A6
Row
Decoder
V
CC
V
SS
•
•
•
•
•
Memory Matrix
×
1,024 4,096
I/O0
I/O7
CS
WE
OE
•
•
Input
Data
Control
Timing Pulse Generator
Read/Write Control
Column I/O
Column Decoder
A17
A13
A15
A9
A8
•
•
•
•
A10A11
A4
A5
4
HM628512BI Series
Function Table
WE CS OE Mode VCC current Dout pin Ref. cycle
× H × Not selected I
H L H Output disable I
H L L Read I
L L H Write I
L L L Write I
, I
SB
SB1
CC
CC
CC
CC
Note: ×: H or L
Absolute Maximum Ratings
Parameter Symbol Value Unit
Power supply voltage V
Voltage on any pin relative to V
SS
Power dissipation P
CC
V
T
T
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C
Storage temperature under bias Tbias –40 to +85 °C
Notes: 1. –3.0 V for pulse half-width ≤ 30 ns
2. Maximum voltage is 7.0 V
–0.5 to +7.0 V
–0.5*1 to VCC + 0.3*
1.0 W
High-Z —
High-Z —
Dout Read cycle
Din Write cycle (1)
Din Write cycle (2)
2
V
Recommended DC Operating Conditions (Ta = –40 to +85°C)
Parameter Symbol Min Typ Max Unit
Supply voltage V
Input high voltage V
Input low voltage V
CC
V
SS
IH
IL
Note: 1. –3.0 V for pulse half-width ≤ 30 ns
4.5 5.0 5.5 V
000V
2.4 — VCC + 0.3 V
*1
–0.3
— 0.6 V
5
HM628512BI Series
DC Characteristics (Ta = –40 to +85°C, VCC = 5 V ±10% , VSS = 0 V)
Parameter Symbol Min Typ*1Max Unit Test conditions
Input leakage current |I
Output leakage current |ILO|——1µA CS = VIH or OE = VIH or
Operating power supply current: DC I
Operating power supply current I
Operating power supply current I
Standby power supply current: DC I
Standby power supply current (1): DC I
Output low voltage V
Output high voltage V
Note: 1. Typical values are at VCC = 5.0 V, Ta = +25°C and specified loading, and not guaranteed.
|——1µA Vin = VSS to V
LI
WE = V
CC
— 8 15 mA CS = VIL,
IL
others = V
CC1
CC2
— 45 70 mA Min cycle, duty = 100%
CS = V
I
= 0 mA
I/O
, others = VIH/V
IL
— 10 20 mA Cycle time = 1 µs,
duty = 100%
I
= 0 mA, CS ≤ 0.2 V
I/O
V
≥ VCC – 0.2 V, VIL ≤ 0.2 V
IH
SB
SB1
OL
OH
—1 3 mACS = V
IH
— 2 100 µA Vin ≥ 0 V, CS ≥ VCC – 0.2 V
— — 0.4 V IOL = 2.1 mA
2.4 — — V IOH = –1.0 mA
, V
I/O
IH/VIL
CC
= VSS to V
, I
= 0 mA
I/O
CC
IL
Capacitance (Ta = +25°C, f = 1 MHz)
Parameter Symbol Typ Max Unit Test conditions
Input capacitance*
1
Input/output capacitance*1C
Note: 1. This parameter is sampled and not 100% tested.
Cin — 8 pF Vin = 0 V
I/O
—10pFV
= 0 V
I/O
6
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