HIT HD74HCT74A Datasheet

HD74HCT74A

Dual D–type Positive Edge–triggered Flip Flops

with Clear and Preset

ADE-205-290 (Z)

1st. Edition

June 1999

Description

The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin
package. The logic level present at the data input is transferred to the output during the positive going
transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level
at the appropriate input.

Features

• VCC = 4.5 to 5.5 V operation

• Input terminal has protection diode

Function Table

Inputs Outputs
PRE CLR CLK D Q Q

LHXXHL
HLXXLH
LLXXH *1H
HH↑ HHL
HH↑ LLH
HHL XQ

H : High level
L : Low level
X : Immaterial
↑ : Low to high transition
Q

: Level to Q before the indicated steady state input conditions were established.

0

Note : 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if

preset and clear go high simultaneously.

0

*1

Q

0

HD74HCT74A

Pin Arrangement

1CLR

14

1

V

CC

1D
1CLK
1PRE

1Q

1Q

GND

2
3
4
5

6
7

13
12
11
10

9
8

2CLR
2D

2CLK
2PRE
2Q

2Q

(Top view)

Absolute Maximum Ratings

Item Symbol Ratings Unit

Supply voltage V
Input diode peak current I
Output diode peak current I
Output current I
VCC, GND current / pin ICC or I

CC

IK

OK

O

GND

Storage temperature Tstg –65 to 150 °C

–0.5 to 7.0 V

±20 mA
±20 mA
±25 mA
±50 mA

2

HD74HCT74A

Recommended Operating Conditions

Item Symbol Min Typ Max Unit

Supply voltage V
Input voltage V

Output voltage V
Output current I

Input rise / fall time tr, t

CC

IH

V

IL

V

I

O

OH

I

OL

f

Operating temperature Ta –40 — 85 °C

4.5 5.0 5.5 V

2.0 — — V
0 — 0.8
0—V

CC

0—VCCV
—–4—mA
—4 —
— — 500 ns

3