HD74HC78
Dual J-K Flip-Flops (with Preset, Common Clear and
Common Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. Each flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
• High Speed Operation: tpd (Clock to Q) = 20 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
HD74HC78
Function Table
Inputs Outputs
Preset Clear Clock J K Q Q
LHXXXHL
HLXXXL H
LLXXXH*
HH L L No change
HH LHLH
HH HLHL
HH H H Toggle
H H L X X No change
H H H X X No change
HH X X No change
Note: 1. Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable,
if Preset and Clear go HIGH simultaneously.
1
H*
1
Pin Arrangement
CK
1PR
1J
V
CC
CLR
2PR
2K
14
13
12
11
10
1K
1Q
1Q
GND
2J
9
2Q
8
2Q
1
2
3
4
5
6
7
K
CLR PR
Q Q
K
CLR PR
Q Q
Top view
CK
CK
J
J
2