HIT HD74HC73 Datasheet

HD74HC73
Dual J-K Flip-Flops (with Clear)
Description
The flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each flip-flop has independent, J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and accomplished by a low level on the input.
Features
High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs Outputs Clear Clock J K Q Q
LX X X L H H L L No change
H LHLH H HL HL H H H Toggle H L X X No change
H H X X No change H X X No change
HD74HC73
Pin Arrangement
Block Diagram
CLR
J
K
1CK
1CLR
1K
V
CC
2CK
2CLR
2J
14
13
12
11
10
1J
1Q
1Q
GND
2K
9
2Q
8
2Q
Q
Q
CK
1
2
3
4
5
6
7
CK
CK
CLR
J
CK
K
K
CK
J
CLR
(Top view)
CK
Q
Q
Q
Q
CK
CK
CK
CK
CK
2
CK
CK
HD74HC73
DC Characteristics
Ta = –40 to
Ta = 25°C
Item Symbol V
Input voltage V
IH
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 1.5 — 1.5 V
4.5 3.15 — 3.15
6.0 4.2 — 4.2
V
IL
2.0 0.5 — 0.5 V
4.5 1.35 — 1.35
6.0 1.8 — 1.8
Output voltage V
OH
2.0 1.9 2.0 — 1.9 V Vin = VIH or VILIOH = –20 µA
4.5 4.4 4.5 — 4.4
6.0 5.9 6.0 — 5.9
4.5 4.18 — 4.13 IOH = –4 mA
6.0 5.68 — 5.63 IOH = –5.2 mA
V
OL
2.0 0.0 0.1 — 0.1 V Vin = VIH or VILIOL = 20 µA
4.5 0.0 0.1 — 0.1
6.0 0.0 0.1 — 0.1
4.5 0.26 — 0.33 IOL = 4 mA
6.0 0.26 — 0.33 IOL = 5.2 mA Input current Iin 6.0 ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply
I
CC
6.0 2.0 — 20 µA Vin = VCC or GND, Iout = 0 µA current
+85°C
3
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