HIT HD74HC126, HD74HC125 Datasheet

HD74HC125/HD74HC126

Quad. Bus Buffer Gates (with 3-state outputs)

Description

The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into
the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low
to put the output into high impedance.

Features

• High Speed Operation: tpd = 8 ns typ (CL = 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: VCC = 2 to 6 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

Function Table

Inputs
C Output Y
HC125 HC126 A HC125 HC126

HLXZZ
LH L L L
LH H H H

X : Irrelevent
Z : Off (high-impedance) state of a 3-state output.

HD74HC125/HD74HC126

Pin Arrangement

HD74HC125

1C

1

14

V

CC

HD74HC126

1A

1Y

2C

2A

2Y

GND

1C

1A

2

3

4

5

6

7

(Top view)

1

2

13

12

11

10

14

13

4C

4A

4Y

3C

3A

9

3Y

8

V

CC

4C

3

1Y

4

2C

5

2A

6

2Y

GND

2

7

(Top view)

12

11

10

4A

4Y

3C

3A

9

3Y

8

HD74HC125/HD74HC126

Absolute Maximum Ratings

Item Symbol Rating Unit

Supply voltage range V
Input voltage V
Output voltage V
Output current I
DC current drain per VCC, GND ICC, I
DC input diode current I
DC output diode current I
Power dissipation per package P

CC

IN

OUT

OUT

GND

IK

OK

T

Storage temperautre Tstg –65 to +150 °C

–0.5 to +7.0 V
–0.5 to VCC + 0.5 V
–0.5 to VCC + 0.5 V

±35 mA
±75 mA
±20 mA
±20 mA

500 mW

3