HIT HD74AC539 Datasheet

HD74AC539
Dual 1-of-4 Decoder with 3-State Output
Description
The HD74AC539 contains two inpedendent decoders. Each accepts two Address (A0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H). An active LOW input Enable (E) is available for data demultiplexing; data is routed to the selected output in non-inverted form in the active LOW mode or in inverted form in the active HIGH mode. A HIGH signal on the active LOW Output Enable (OE) input forces the 3-state outputs to the high impedance state.
Feature
Outputs Source/Sink 24 mA
HD74AC539
Pin Arrangement
O2b
1
20
V
CC
Logic Symbol
2
O1b
O0b
3
Pb
4
OEb
5
A0a
6
7
A1a
O3a
8
O2a
9
GND
10 11
(Top view)
19
18
17
16
15
14
13
12
O3b
A1b
A0b
Eb
Ea
OE
Pa
O0d
O1a
a
P
A0
A1
E
DECODER a
OE
O0 O1 O2 O3
2
P
A0
E
DECODER b
OE
O0 O1 O2 O3
A1
Pin Names
HD74AC539
A0a to A A0b to A
Ea – E
b
OEa, OE
Pa, P
b
O0a to O O0b to O
1a
1b
b
3a
3b
Side A Address Inputs Side B Address Inputs Enable Inputs (Active LOW) Output Enable Inputs (Active LOW) Polarity Control Inputs Side A 3-State Outputs Side B 3-State Outputs
Truth Table
Inputs Outputs
Function OE E A
1
A
0
High impedance H X X X ZZZZ Disable L H X X On = P Active HIGH output LLLLHLLL (P = L) LLLHLHLL
LLHLLLHL
LLHHLLLH Active LOW output LLLLLHHH (P = H) LLLHHLHH
LLHLHHLH
LLHH HHHL H : High Voltage Level
L : Low Voltage Level X : Immaterial Z : High Impedance
O
0
O
1
O
2
O
3
3
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