HD74AC4514
4-bit Latch/4-to-16-Line Decoder
Description
This device presents a 4 to 16 line decoder with latched inputs. The HD74AC4514 presents a high level at
the selected output.
This device consists of four storage latches with common strobe and inhibit (G) inputs. When a low signal
is applied to the strobe input, the input data is stored, decoded, and presented to the output. When strobe is
high, all sixteen HD74HC4514 outputs are at a low logic level.
Feature
ā¢ Outputs Source/Sink 24 mA
HD74AC4514
Pin Arrangement
Strobe
Data1
Data2
S
S6
S5
S4
S3
S2
S1
S0
GND
1
2
3
7
4
5
6
7
8
9
10
11
12
Top view
24
23
22
21
20
19
18
17
16
15
14
13
VCC
Inhibit
Data4
Data3
S
10
S11
S8
S9
S14
S15
S12
S13
Logic Symbol
Data 1
Data 2
Data 3
Data 4
Strobe
Inhibit
21
22
23
11
S
0
9
S1
10
S2
8
S3
7
S4
2
3
Latch
1
A
B
C
D
4 to 16
Decoder
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
6
5
4
18
17
20
19
14
13
16
15
2
Pin Names
HD74AC4514
D1 to D
4
Data Inputs
Strobe Data Strobe Input
Data1 to 4 Data Inputs
S0 to S
15
Outputs
Inhibit Data Enable Input
Function Table (Strobe = High)
Data Inputs
Inhibit D C B A Select Outputs
L LLLLS
L LLLHS
LLLHLS
LLLHHS
LLHLLS
LLHLHS
L LHHLS
L LHHHS
L HLLLS
L HLLHS
LHLHLS
LHLHHS
LHHLLS
LHHLHS
L HHHLS
L HHHHS
H X X X X All output āLā
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
3