HAT2053M
Silicon N Channel Power MOS FET
Power Switching
Features
• Low on-resistance
• Low drive current
• High density mounting
• 2.5V gate drive device can be driven from 3V source
Outline
ADE-208-755B(Z)
Preliminary
3rd. Edition
December 1998
TSOP–6
3
G
12 5 6
DSD
DD
4
4
5
6
1
4 Source
3 Gate
1, 2, 5, 6 Drain
3
2
HAT2053M
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current ID*
Drain peak current I
Body-drain diode reverse drain current IDR*
Channel dissipation Pch
DSS
GSS
D(pulse)
Pch
2
*
2
(pulse)
(continuous)
1
2
*
3
*
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10µs, duty cycle ≤ 1 %
2. When using the alumina ceramic board (50 x 50 x 0.7 mm), PW≤ 5s,Ta=25°C
3. When using the alumina ceramic board (50 x 50 x 0.7 mm) ,Ta=25°C
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V
Gate to source leak current I
Zero gate voltege drain current I
Gate to source cutoff voltage V
Static drain to source on state R
resistance R
(BR)DSS
GSS
DSS
GS(off)
DS(on)
DS(on)
Forward transfer admittance |yfs| 6.5 11 — S ID = 3A, VDS = 10V *
Input capacitance Ciss — 570 — pF VDS = 10V
Output capacitance Coss — 220 — pF VGS = 0
Reverse transfer capacitance Crss — 160 — pF f = 1MHz
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Body–drain diode forward voltage V
Body–drain diode reverse
t
d(on)
r
d(off)
f
DF
rr
recovery time
Note: 1. Pulse test
20——V I
——±0.1 µAVGS = ±12V, VDS = 0
——1 µAVDS = 20 V, VGS = 0
0.4 — 1.4 V VDS = 10V, I D = 1mA
—2833mΩ ID = 3A, VGS = 4.5V *
—3748mΩ ID = 3A, VGS = 2.5V *
— 15 — ns VGS = 4.5V, ID = 3A
— 100 — ns RL = 3.3Ω
—90—ns
— 105 — ns
— 0.95 — V IF = 6.1A, VGS = 0 *
— (50) — ns IF = 6.1A, VGS = 0
20 V
±12 V
6.1 A
24.4 A
6.1 A
2.0 W
1.05 W
= 10mA, VGS = 0
D
diF/ dt =20A/µs
1
1
1
1
2