HAT1044M
Silicon P Channel Power MOS FET
Power Switching
Features
• Low on-resistance
• Low drive current
• High density mounting
• 4.5V gate drive device can be driven from 5V source
Outline
ADE-208-753C(Z)
Preliminary
4th. Edition
December 1998
TSOP–6
3
G
12 5 6
DSD
DD
4
4
5
6
1
4 Source
3 Gate
1, 2, 5, 6 Drain
3
2
HAT1044M
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current ID*
Drain peak current I
Body-drain diode reverse drain current IDR*
Channel dissipation Pch
DSS
GSS
D(pulse)
Pch
2
*
2
(pulse)
(continuous)
1
2
*
3
*
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10µs, duty cycle ≤ 1 %
2. When using the alumina ceramic board (50 x 50 x 0.7 mm), PW≤ 5s,Ta=25°C
3. When using the alumina ceramic board (50 x 50 x 0.7 mm) ,Ta=25°C
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V
Gate to source leak current I
Zero gate voltege drain current I
Gate to source cutoff voltage V
Static drain to source on state R
resistance R
(BR)DSS
GSS
DSS
GS(off)
DS(on)
DS(on)
Forward transfer admittance |yfs| 3 5.5 — S ID = -3A, VDS = -10V *
Input capacitance Ciss — 600 — pF VDS = -10V
Output capacitance Coss — 220 — pF VGS = 0
Reverse transfer capacitance Crss — 150 — pF f = 1MHz
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Body–drain diode forward voltage V
Body–drain diode reverse
t
d(on)
r
d(off)
f
DF
rr
recovery time
Note: 1. Pulse test
-30 — — V ID = 10mA, VGS = 0
——±0.1 µAVGS = ±20V, VDS = 0
——-1µAVDS = -30 V, VGS = 0
-1.0 — -2.5 V VDS = -10V, I D = -1mA
—5060mΩ ID = -3A, VGS = -10V *
— 80 105 mΩ ID = -3A, VGS = -4.5V *
— 12 — ns VGS = -10V, ID = -3A
— 85 — ns RL = 3.3Ω
—55—ns
—55—ns
— -0.95 — V IF = -4.5A, VGS = 0 *
— 50 — ns IF = -4.5A, VGS = 0
-30 V
±20 V
-4.5 A
-18 A
-4.5 A
2.0 W
1.05 W
diF/ dt =-20A/µs
1
1
1
1
2