Silicon N-Channel MOS FET
Application
High speed power switching
Features
• Low on-resistance
• High speed switching
• Suitable for low voltage operation
Outline
2SK1579
UPAK
G
1
2
3
4
D
1. Gate
2. Drain
3. Source
4. Drain
S
2SK1579
Absolute Maximum Ratings (Ta = 25°C unless otherwise specified.)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current I
Drain peak current I
Body to drain diode reverse drain current I
Channel power dissipation Pch*
DSS
GSS
D
D(pulse)
DR
1
*
2
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes 1. PW ≤ 100 µs, duty cycle ≤ 10%
2. Value on the almina ceramic board (12.5 × 20 × 0.7 mm)
12 V
±7V
2A
4A
2A
1W
2
2SK1579
Electrical Characteristics (Ta = 25°C unless otherwise specified.)
Item Symbol Min Typ Max Unit Test conditions
Drain to source cutoff current I
Gate to source cutoff current I
Gate to source cutoff voltage V
Drain to source on resistance
R
DSS
GSS
GS(off)
DS(on)
(1)
Drain to source on resistance
R
DS(on)
(2)
DC forward transfer admittance |yfs| 1 2.5 — S VDS = 5 V, ID = 1 A,
Input capacitance Ciss — 110 — pF VDS = 5 V, VGS = 0,
Reverse transfer capacitance Crss — 30 — pF f = 1 MHz
Output capacitance Coss — 150 — pF
Turn-on time t
Turn-off time t
(on)
(off)
Note 1. Marking is “DY”.
——1 µAVDS = 8 V, VGS = 0
——±5µAVGS = ±6.5 V, VDS = 0
0.4 — 1.4 V VDS = 5 V, ID = 100 µA
1 — 0.36 0.7 Ω VGS = 2.2 V, ID = 0.5 A
2 — 0.25 0.35 Ω VGS = 4 V, ID = 1 A
∆V
= 0.1 V
GS
— 500 — ns ID = 0.2 A, VGS = 0,
— 1500 — ns Vin = 4 V, RL = 51 Ω
3