Silicon P Channel MOS FET
High Speed Switching
Features
• Low on-resistance
RDS =2.8 Ω typ. (VGS = -10 V , ID = -50 mA)
RDS =5.7 Ω typ. (VGS = -4 V , ID = -50 mA)
• 4 V gate drive device.
Outline
2SJ588
ADE-208-802 (Z)
1st.Edition.
June 1999
G
SPAK
2
D
3
1
2
3
1. Source
2. Drain
3. Gate
1
S
2SJ588
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current I
Drain peak current I
Body-drain diode reverse drain current I
DSS
GSS
D
D(pulse)
DR
Note1
Channel dissipation Pch 300 mW
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Note: 1. PW ≤ 10 µs, duty cycle ≤ 1%
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown
V
(BR)DSS
voltage
Gate to source breakdown
V
(BR)GSS
voltage
Gate to source leak current I
Zero gate voltege drain
GSS
I
DSS
current
Gate to source cutoff voltage V
Static drain to source on state R
resistance R
GS(off)
DS(on)
DS(on)
Forward transfer admittance |yfs| 68 105 — mS I
Input capacitance Ciss — 25 — pF VDS = -10 V
Output capacitance Coss — 20 — pF VGS = 0
Reverse transfer capacitance Crss — 8 — pF f = 1 MHz
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
d(on)
r
d(off)
f
Note: 2. Pulse test
See characteristics curves of 2SJ575
-30 — — V ID = -100 µA, VGS = 0
±20 — — V IG = ±100 µA, VDS = 0
——±5 µAV
——-1µAV
-1.3 — -2.3 V ID = -10µA, VDS = -5 V
— 2.8 3.3 Ω I
— 5.7 7.9 Ω I
—10—nsI
—15—nsR
—40—ns
—45—ns
-30 V
±20 V
-100 mA
-400 mA
-100 mA
= ±16 V, VDS = 0
GS
= -30 V, VGS = 0
DS
= -50 mA,VGS = -10 V
D
= -50 mA,VGS = -4 V
D
= -50 mA, VDS = -10 V
D
= -50 mA, VGS = -10 V
D
= 200Ω
L
Note 2
Note 2
Note 2
2