HIT 2SJ530-S, 2SJ530-L Datasheet

2SJ530(L),2SJ530(S)
Silicon P Channel MOS FET
High Speed Power Switching
ADE-208-655B (Z)
3rd. Edition
Jun 1998
Features
R
DS(on)
= 0.08typ.
4V gate drive devices.
High speed switching.
Outline
1
2
3
4
4
1
2
3
DPAK–2
D
G
S
1. Gate
2. Drain
3. Source
4. Drain
2SJ530(L),2SJ530(S)
2
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
DSS
–60 V
Gate to source voltage V
GSS
±20 V
Drain current I
D
–15 A
Drain peak current I
D(pulse)
Note1
–60 A
Body-drain diode reverse drain current I
DR
–15 A
Avalanche current I
AP
Note3
–15 A
Avalanche energy E
AR
Note3
19 mJ
Channel dissipation Pch
Note2
30 W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C
Note: 1. PW 10µs, duty cycle ≤ 1 %
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg 50
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V
(BR)DSS
–60 V ID = –10mA, VGS = 0
Gate to source breakdown voltage V
(BR)GSS
±20——V I
G
= ±100µA, VDS = 0
Zero gate voltege drain current I
DSS
–10 µAVDS = –60 V, VGS = 0
Gate to source leak current I
GSS
——±10 µAVGS = ±16V, VDS = 0
Gate to source cutoff voltage V
GS(off)
–1.0 –2.0 V ID = –1mA, VDS = –10V
Static drain to source on state R
DS(on)
0.08 0.10 ID = –8A, VGS = –10V
Note4
resistance R
DS(on)
0.11 0.16 ID = –8A, VGS = –4V
Note4
Forward transfer admittance |yfs| 6.5 11 S ID = –8A, VDS = –10V
Note4
Input capacitance Ciss 850 pF VDS = –10V Output capacitance Coss 420 pF VGS = 0 Reverse transfer capacitance Crss 110 pF f = 1MHz Turn-on delay time t
d(on)
12 ns VGS = –10V, ID = –8A
Rise time t
r
75 ns RL = 3.75
Turn-off delay time t
d(off)
125 ns
Fall time t
f
—75—ns
Body–drain diode forward voltage V
DF
–1.1 V IF = –15A, VGS = 0
Body–drain diode reverse recovery time
t
rr
70 ns IF = –15A, VGS = 0
diF/ dt =50A/µs
Note: 4. Pulse test
2SJ530(L),2SJ530(S)
3
Main Characteristics
40
30
20
10
0
50 100 150 200
–100
–30 –10
–3
–1
–0.3 –0.1
–0.1 –0.3 –1 –3 –10
–20
–16
–12
–8
–4
0
–2 –4 –6 –8 –10
0 –1–2–3–4–5
–30 –100
–1000
–300
–3.5 V
–3 V
–20
–16
–12
–8
–4
–25 °C
25 °C
Tc = 75 °C
–10 V
–6 V
–5 V
100 µs
1 ms
Ta = 25 °C
10 µs
DS
PulseTest
V = –10 V
–4 V
V = –2.5 V
GS
PulseTest
PW = 10 ms (1 shot)
DC Operation
(Tc=25℃)
Channel Dissipation Pch (W)
Case Temperature Tc (°C)
Power vs. Temperature Derating
Drain to Source Voltage V (V)
DS
Drain Current I (A)
D
Maximum Safe Operation Area
Drain to Source Voltage V (V)
DS
Drain Current I (A)
D
Typical Output Characteristics
Gate to Source Voltage V (V)
GS
Drain Current I (A)
D
Typical Transfer Characteristics
Operation in this area is limited by R
DS(on)
2SJ530(L),2SJ530(S)
4
–4.0
–3.2
–2.4
–1.6
–0.8
0
–4 –8 –12 –16 –20
0.5
0.4
0.3
0.2
0.1
–40 0 40 80 120 160
0
–10 V
GS
V = –4 V
1
0.5
0.05
0.02
0.01
–0.1 –0.3 –1 –3 –10 –30 –100
–10 A
–5 A
0.2
0.1 –10 V
V = –4 V
GS
–15 A
-5,–10A
PulseTest
PulseTest
PulseTest
–0.1 –3 –100
0.1
30
100
10
1
0.3
–0.3 –1 –10 –30
3
–15 A
–10 A
–5 A
I = –15 A
D
75 °C
25 °C
Ta = –25 °C
V = –10 V
DS
PulseTest
Gate to Source Voltage V (V)
GS
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
V (V)
DS(on)
Drain to Source Saturation Voltage
Drain Current I (A)
D
Drain to Source On State Resistance
R ( )
DS(on)
Static Drain to Source on State Resistance
vs. Drain Current
Case Temperature Tc (°C)
R ( )
DS(on)
Static Drain to Source on State Resistance
Static Drain to Source on State Resistance
vs. Temperature
Drain Current I (A)
D
Forward Transfer Admittance |y | (S)
fs
Forward Transfer Admittance vs.
Drain Current
2SJ530(L),2SJ530(S)
5
500
200
100
20
50
10
5 –0.1 –0.3 –3
0 –10 –20 –30 –40 –50
5000
1000
300
100
0
–20
–40
–60
–80
0
0
–4
–8
–12
–16
–20–100
81624
32
40
1000
100
300
30
3
10
1
–0.1 –0.3 –1 –3 –10 –20
–1 –10
30
10
V = 0 f = 1 MHz
GS
Ciss
Coss
Crss
DS
V
GS
V
D
I = –15 A
V = –10 V
–25 V –50 V
DD
V = –50 V
–25 V –10 V
DD
t
f
r
t
d(off)
t
d(on)
t
DD
V = –10 V, V = –30 V Pw = 5 µs, duty < 1 %
GS
di / dt = 50 A / µs V = 0, Ta = 25 °C
GS
–20
Reverse Drain Current I (A)
DR
Reverse Recovery Time trr (ns)
Body–Drain Diode Reverse
Recovery Time
Capacitance C (pF)
Drain to Source Voltage V (V)
DS
Typical Capacitance vs. Drain to Source Voltage
Gate Charge Qg (nc)
Drain to Source Voltage V (V)
DS
Gate to Source Voltage V (V)
GS
Dynamic Input Characteristics
Drain Current I (A)
D
Switching Time t (ns)
Switching Characteristics
2SJ530(L),2SJ530(S)
6
–20
–16
–12
–8
–4
0
–0.4 –0.8 –1.2 –1.6 –2.0
D. U. T
Rg
I Monitor
AP
V Monitor
DS
V
DD
50
Vin –15 V
0
I
D
V
DS
I
AP
V
(BR)DSS
L
V
DD
E = • L • I •
2
1
V
V – V
AR
AP
DSS
DSS DD
2
V = 0, 5 V
GS
–10 V
–5 V
PulseTest
20
16
12
8
4
25 50 75 100 125 150
0
I = –15 A V = –25 V duty < 0.1 % Rg > 50
AP
DD
Repetitive Avalanche Energy E (mJ)
AR
Maximum Avalanche Energy vs.
Channel Temperature Derating
Avalanche Test Circuit Avalanche Waveform
Source to Drain Voltage V (V)
SD
Reverse Drain Current I (A)
DR
Reverse Drain Current vs.
Source to Drain Voltage
Channel Temperature Tch (°C)
2SJ530(L),2SJ530(S)
7
3
1
0.3
0.1
0.03
0.01 10 µ
100 µ 1 m 10 m
100 m 1 10
DM
P
PW
T
D =
PW
T
ch – c(t) = s (t) • ch – c ch – c = 4.17 °C/W, Tc = 25 °C
θ γ θ θ
D = 1
0.5
0.2
0.01
0.02
0.1
0.05
1 shot Pulse
Tc = 25°C
Vin Monitor
D.U.T.
Vin –10 V
R
L
V = –30 V
DD
tr
td(on)
Vin
90%
90%
10%
10%
Vout
td(off)
Vout Monitor
50
90%
10%
t
f
Switching Time Test Circuit Waveform
Pulse Width PW (S)
Normalized Transient Thermal Impedance
s (t)
γ
Normalized Transient Thermal Impedance vs. Pulse Width
2SJ530(L),2SJ530(S)
8
Package Dimensions
Unit: mm
6.5 ± 0.5
5.4 ± 0.5
1.15 ± 0.1
2.3 ± 0.2
0.55 ± 0.1
2.29 ± 0.5
0.55 ± 0.1 1.2 typ
1.7 ± 0.5
5.5 ± 0.53.1 ± 0.5
16.2 ± 0.5
2.29 ± 0.5
6.5 ± 0.5
5.4 ± 0.5
1.15 ± 0.1
0.8 ± 0.1
2.3 ± 0.5
0.55 ± 0.1
1.7 ± 0.5
5.5 ± 0.5
9.5 ± 0.5
2.5 ± 0.5
2.29 ± 0.5
2.29 ± 0.5
1.2 Max
0.55 ± 0.1
0 ~ 0.25
0.8 ± 0.1
type
L
S
type
4.7 ± 0.5
HIitachiCode EIAJ(Ltype)
EIAJ(Stype)
JEDEC
DPAK–2
SC–63 SC–64
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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