HIT 2SJ505-S, 2SJ505-L Datasheet
2SJ505(L), 2SJ505(S)
Silicon P Channel MOS FET
High Speed Power Switching
ADE-208-547
Target specification 1st. Edition
Features
• Low on-resistance
R
DS(on)
= 0.017Ω typ.
• Low drive current.
• 4V gate drive devices.
• High speed switching.
Outline
1. Gate
2. Drain
3. Source
4. Drain
1
2
3
4
1
2
3
4
LDPAK
D
G
S
2SJ505(L), 2SJ505(S)
2
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
DSS
–60 V
Gate to source voltage V
GSS
±20 V
Drain current I
D
–50 A
Drain peak current I
D(pulse)
*
1
–200 A
Body to drain diode reverse drain current I
DR
–50 A
Avalanche current IAP*
3
–50 A
Avalanche energy EAR*
3
214 mJ
Channel dissipation Pch*
2
75 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10µs, duty cycle ≤ 1 %
2. Value at Tc = 25°C
3. Value at Ta = 25°C, Rg ≥ 50 Ω, L=100µH
2SJ505(L), 2SJ505(S)
3
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown
voltage
V
(BR)DSS
–60 — — V ID = –10mA, VGS = 0
Gate to source breakdown
voltage
V
(BR)GSS
±20——V I
G
= ±100µA, VDS = 0
Zero gate voltege drain
current
I
DSS
— — –10 µAV
DS
= –60 V, VGS = 0
Gate to source leak current I
GSS
——±10 µAV
GS
= ±16V, VDS = 0
Gate to source cutoff voltage V
GS(off)
–1.0 — –2.0 V ID = –1mA, VDS = –10V
Static drain to source on state R
DS(on)
— 0.017 0.022 Ω ID = –25A, VGS = –10V*
1
resistance R
DS(on)
— 0.024 0.036 Ω ID = –25A, VGS = –4V*
1
Forward transfer admittance |yfs| 2739—S I
D
= 25A, VDS = 10V*
1
Input capacitance Ciss — 4100 — pF VDS = –10V
Output capacitance Coss — 2100 — pF VGS = 0
Reverse transfer capacitance Crss — 450 — pF f = 1MHz
Turn-on delay time t
d(on)
— 32 — ns VGS = –10V, ID = –10A
Rise time t
r
— 225 — ns RL = 3Ω
Turn-off delay time t
d(off)
— 530 — ns
Fall time t
f
— 330 — ns
Body to drain diode forward
voltage
V
DF
— –1.1 — V IF = –50A, VGS = 0
Body to drain diode reverse
recovery time
t
rr
— 110 — ns IF = –50A, VGS = 0
diF/ dt = 50A/µs
Note: 1. Pulse test