Application
High speed power switching
Features
• Low on-resistance.
• Low drive power
• High speed switching
• 2.5 V gate drive device.
2SJ450
Silicon P-Channel MOS FET
ADE-208-381
1st. Edition
Outline
UPAK
G
1
2
3
4
D
1. Gate
2. Drain
3. Source
4. Drain
S
2SJ450
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current I
Drain peak current I
Drain peak current I
Channel dissipation Pch*
DSS
GSS
D
D(pulse)
DR
1
*
2
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 100 µs, duty cycle ≤ 10%
2. When using aluminium ceramic board (12.5 × 20 × 70 mm)
–60 V
±20 V
–1 A
–2 A
–1 A
1W
2
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test conditions
Drain to source breakdown
V
(BR)DSS
voltage
Gate to source breakdown
V
(BR)GSS
voltage
Zero gate voltage drain current I
Gate to source leak current I
Gate to source cutoff voltage V
Static drain to source on state
R
DSS
GSS
GS(off)
DS(on)
resistance
Static drain to source on state
R
DS(on)
resistance
Fowerd transfer admittance |yfs| 0.6 1.0 — S ID = –0.5 A
Input capacitance Ciss — 150 — pF VDS = –10 V
Output capacitance Coss — 72 — pF VGS = 0
Reverse transfer capacitance Crss — 24 — pF f = 1 MHz
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Body to drain diode forward
V
d(on)
r
d(off)
f
DF
voltage
Body to drain diode reverse
t
rr
recovery time
Note: 1. Pulse Test
Marking is "UY".
–60 — — V ID = –10 mA, VGS = 0
±20 — — V IG = ±100 µA, VDS = 0
— — –50 µAVDS = –50 V, VGS = 0
——±10 µAVGS = ±16 V, VDS = 0
–0.5 — –1.5 V VDS = –10 V, ID = –1 mA
— 0.85 1.2 Ω ID = –0.5 A
V
= –4 V*
GS
— 1.1 1.9 Ω ID = –0.3 A
V
= –2.5 V*
GS
V
= –10 V
DS
1
1
—6 —nsVGS = –10 V, ID = –0.5 A
—9 —nsR
= 60 Ω
L
—50—ns
—35—ns
— –0.9 — V IF = –1 A, VGS = 0
— 100 — ns IF = –1 A, VGS = 0
diF/dt = 50A/µs
2SJ450
3