HID Global VERICLASS User Manual

15370 Barranca Parkway Irvine, CA 92618 USA

veriCLASS®

VP3500 Reader Board

P-Series Payment and Ticketing

Embedded Reader Platform

HARDWARE SPECIFICATION

March 2011

Document Number 3500-906, A.1

veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

Trademarks and Disclaimers

HID, HID Global, HID logo, iCLASS and veriCLASS are the trademarks or registered trademarks of HID Global Corporation in the U.S. and other countries.

The information contained in this document is provided “AS IS” without any warranty. HID Global hereby disclaims all warranties and conditions with regard to the information contained

herein, including all implied warranties of merchantability, fitness for a particular purpose, title and non-infringement.

In no event shall HID Global be liable, whether in contract, tort or otherwise for any indirect, special or consequential damages arising from the use of the information contained in this document.

Contacts

North America

15370 Barranca Parkway Irvine, CA 92618 USA Phone: 800 237 7769 Fax: 949 732 2120 Support: support.hidglobal.com

Europe, Middle East and Africa

AM Klingenweg 6a 65396 Walluf Germany Phone: +49 6123 7910 Fax: +49 6123 791 199 Support: support.hidglobal.com

Revision History

Date Author Description

3/7/11 HP Added FCC, IC and CE statements A.1 2/17/11 HP Initial version A.0

Document Version

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

Regulatory

FCC / Canada Radio Certification

CAUTION: Any changes or modiﬁcations to this device not explicitly approved by manufacturer could void your authority to operate this equipment.

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause h armful interference, and (2) thi s devi ce mu st accep t any interference received, incl uding in te rferen ce tha t may cau se undesired opera tion.

This device complies with Industry Canada licen se -exemp t RSS standard (s). Operatio n is subject to the fo llow ing two conditions:

(1) This device may not cause interference, and (2) This d evice must accept any interference, including interference that may cause undesired operation of the device.

CE Marking

HID Global hereby declares that these proximity readers are in compliance with the essential requirements and other relevant provisions of Directive 1999/5/EC.

Por el presente, HID Global d eclara que estos lectores de proximidad cumplen con los requisitos esenciales y otras disposiciones relevantes de la Directiva 1999/5/EC.

HID Global déclare par la présen te que ces lecteurs à proximité sont conformes aux exigences essentielles et aux autres stipulations pertinentes de la Directive 1999/5/CE.

A HID Global, por meio deste , de clara que estes leitores de proximidade e s tão em conformidade com as exigências essenciais e outras condições da di retiva 1999/5/EC.

HID Global bestätigt hiermit, dass die Leser die wesentli chen An forde rungen un d anderen re levan ten Be stimmungen der Richtlinie 1999/5/EG erfüllen.

HID Global dichiara che i lettori di prossimità sono conformi ai requisiti essenzi a li e ad altre misure ril evanti come previsto dalla Direttiva europea 1999/5/EC.

Download copies of the R&TTE Declaration of Conformity (DoC) at http://certifications.

hidglobal.com.

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

Reference Documents

3300-901 veriCLASS Quick Start Guide 3300-911 veriCLASS DTK Application Note 3300-905 veriCLASS Antenna Design Guide (*) 3300-906 veriCLASS Hardware Specification 3300-910 veriCLASS Software Developers Guide EMV 2000 Integrated Circuit Card Specification for Payment Systems Version 4.2 EMV Contactless Contactless Specification for Payment Systems Version 2 FCC 47 CFR Part 15 Radio Frequency Devices ISO/IEC 10373-6:2011 Identification Cards – Test Methods. – Part6: Proximity Cards ISO/IEC 14443-1:2008 Proximity Cards: Physical Characteristics ISO/IEC 14443-2:2001 Proximity Cards: Radio Frequency Power and Signal Interface ISO/IEC 14443-

2:2001/Amd1:2005 ISO/IEC 14443-2:2001/Amd1:2005/Cor1:2007 ISO/IEC 14443-3:2001 Proximity Cards: Initialization and Anti-collision ISO/IEC 14443-

3:2001/Amd1:2005 ISO/IEC 14443-3:2001/Amd1:2005/Cor1:2006 ISO/IEC 14443-

3:2001/Amd3:2006 ISO/IEC 14443-4:2008 Proximity Cards: Transmission protocol ISO/IEC 15693-1:2000 Vicinity Cards: Physical Characteristics ISO/IEC 15693-2:2006 Vicinity Cards: Air Interface and Initialization ISO/IEC 15693-3:2009 Vicinity Cards: Anti-collision and Transmission protocol ISO/IEC 7813:2006 Financial transaction cards ISO/IEC 7816-3:2006 Integrated circuit(s) cards: Electrical Interface and Transmission

USB Universal Serial Bus Specification Revision 2.0

(*) Contact HID Global Technical Support for further information.

Bit rates of fc64, fc/32 and fc/16

Bit rates of fc/64, fc/32 and fc/16

Handling of reserved field values

Protocols

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

1 Introduction

1.1 Product Description

The veriCLASS P-Series platform is a fully certified and easy-to-integrate reader product line that provides simultaneous support for multiple card technologies as well as open and closed loop payment schemes within one system. veriCLASS is tailored to meet the needs of Payment and Ticketing manufacturers, such as automated fare collection systems, handheld terminals, ATMs, vending, kiosk or retail applications. The platform offers ultimate integration flexibility for secure contactless cashless payment and AFC solutions.

In addition, the veriCLASS platform allows developers without RF design expertise to utilize the advantages of HID’s support. Provided are integration tools and product pre-certification based on industry recognized standards to develop market-ready products faster.

1.2 Key Features

 Single platform supporting

 Multiple contactless card technologies (for example, MIFARE, iCLASS, FeliCa)  Multiple contactless payment protocols (for example, Calypso, EMVCo)

 Multiple payment schemes (both open and closed)  A complete flexible product line of reader modules, antennas and accessories.  Developer tools and support. veriCLASS provides a fully featured Development Tool Kit (DTK)

providing web / desktop based tools and documentation.

 Development support from HID Global Support Services.  Product pre-certification for industry standard bodies such as modular-FCC, CE and EMVCo.  Field-upgradeability giving the installer the flexibility to implement new features in the field.

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

1.3 veriCLASS Platform Products

VP3300 Reader Core

 2 RF interfaces for

external 50 ohm antennas.

 4 ISO/IEC 7816

SmartCard Interfaces

 USB / UART

Connection

Development Tool Kit

 Development Board

(includes VP3300 Reader Core)

 2 development board

antennas (50 ohm).

 Sample Credentials.  Memory Stick containing

development tools and documentation.

VP3500 Reader Board

 Integrated Antenna  2 ISO/IEC 7816

SmartCard Sockets (ID000)

 USB / UART

Connection

VP3700 Enhanced Reader Board

 Integrated Antenna  1 External Antenna plus option for a total of 4 external antennas  4 ISO/IEC 7816 SmartCard Sockets (ID000)  2 External ISO/IEC 7816 SmartCard Sockets (ID000/1)  USB / UART Connection

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

1.4 Product Guide

Description Part Number

Readers

HID veriCLASS P3300 Reader Core VP3300A00 HID veriCLASS P3500 Standard Reader Board VP3500A00 HID veriCLASS P3700 Enhanced Reader Board VP3700A00 *

Antenna

HID veriCLASS Antenna 4090A05 *

Antenna Cable

HID veriCLASS Antenna Cable 4091A01 *

DTK

Figure 1: veriCLASS P Series Product Schematic

HID veriCLASS Developer Toolkit 3134ANJ0000

* Available soon. For further sales information contact AFC@hidglobal.com

1.5 Scope/Purpose

This document describes the hardware features of the veriCLASS P-series reader board VP3500A00.

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

1.6 Terms and Abbreviations

Abbreviation Description

ANT Antenna ARM Advanced RISC Machine DNC Do Not Connect EMC Electro Magnetic Compatibility LED Light Emitting Diode FeliCa Felicity Card H Magnetic Field Strength I/O Input / Output m Modulation index PCD Proximity Coupling Device PICC Proximity IC Card RF Radio Frequency Ta Ambient Temperature tf Fall time TTL Transistor – Transistor Logic tr Rise time UART Universal Asynchronous Receiver Transmitter USB Universal Serial Bus

2 Overview

2.1 Features

Type Feature Comment

RF Interface

Contact Interfaces

Host Interfaces

Digital I/Os

Environmental Properties

Table 1: Feature Overview

ISO/IEC 14443 Type A Up to 848kbps ISO/IEC 14443 Type B Up to 848kbps ISO/IEC 15693

HID iCLASS

Both ISO/IEC 14443 and ISO/IEC

15693 mode are supported Sony FeliCa One integrated antenna EMV Contactless compliant Two ISO/IEC 7816 contact card interfaces

ID-000 contact card holders USB Compliant with USB 2.0 Specification

UART TTL Levels 4 LED controls

EMV Contactless indication mode

supported Buzzer Control Storage Temperature -40 to 120C Operating Temperature -25 to 85C Humidity 0 – 90% Non condensing

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2.2 Block Diagram

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Figure 2: VP3500A00 Block Diagram

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2.3 Assembl y Drawing

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Figure 3: VP3500A00 Reader Board Assembly Drawing

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

3 Power Considerations

A single voltage through the USB or serial interface connector supplies the VP3500A00. Supported is a voltage range from 3VDC to 5VDC (only through serial interface).

Note: Use only one of these two options at a time. If using USB as the host interface, use VUSB to supply the board to ensure correct enumeration.

The VP3500A00 power consumption depends on the power consumption of the antenna. Metal or ferrite material within the proximity of the board affects the power consumption.

Table 2: Power Consumptions for different Operation Modes

Operation Mode Vin Typ Unit

Reader polling for cards; no contact card inserted

Constant carrier on; no contact card inserted

Carrier off; no contact card inserted

RF Interface turned off; no contact card inserted

RF interface and contact card interface turned off

3V 450 5V 220 3V 750 5V 370 3V 240 5V 125 3V 165 5V 100 3V 125 5V 75

mA

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

4 Host Interfaces

4.1 USB Interface P101

Used is a standard USB Mini-B connector (meeting the USB 2.0 Standard requirements).

Table 3: USB Interface

UART interface Function Signal Pin Description

VUSB 1 5VDC Bus Voltage DM 2 Data Minus Line DP 3 Data Plus Line ID 4 Not Connected for Type B GND 5 GND

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Figure 4: Mechanical Drawing USB Connector

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

4.2 UART Interface P104

UART interface Function Signal Pin Description

Vin Supply Voltage 1 Reader supply 2.5 VDC – 5.5 VDC RX Receive Signal 2 Receive signal of the VP3500A00 (Input) TX Transmit Signal 3 Transmit signal of the VP3500A00 (Output)

RTS Ready to Send 4 CTS Clear to Send 5 Signal line that indicates when the host is ready to receive (input)

nRST – Reset Line 6 Signal line resets the reader (low active) GND 7 GND

Supported are baud rates between 9600 and 460080 Baud.

As connector a 7 way Molex PicoBlade® is used:

Table 4: UART Interface

Signal line that indicates when the VP3300A00 is ready to receive (output)

Table 5: UART Connector

UART interface

Manufacturer Molex Series PicoBlade® Part Number 53261 0771 Maximum Current 1A

Image is for example only.

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

5 RF Interface

The VP3500A00 reader board offers one integrated antenna compliant with the EMV Contactless requirements. The tuning is optimized for operation with ISO/IEC14443 Type A & B credentials.

5.1 Operating Field Strength

The magnetic field strength was measured in accordance to ISO/IEC10373-6 (16.5MHz resonance frequency of reference PICC).

The measurements were taken for a concentric arrangement between reference PICC and test PCD in four different distances.

The field strength may vary slightly between different reader boards due to production tolerances. Note: Metal or ferrite material in proximity of the antenna will lead to detuning effects, which may

cause major changes in the RF properties.

Table 6: Field Strength Distance [mm] H [A/m]

2 7.5 12 20

6.27 5.83 5.38 4.29

7.5

6.5

5.5

4.5

H [A/m]

3.5

2.5

1.5 0 5 10 15 20 25

Distance [mm]

Figure 5: Operating Field Strength

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5.2 Modulation Waveforms

The measurements were taken for a concentric arrangement between reference PICC and test PCD in four different distances.

The results may vary slightly between different reader boards due to production tolerances. Note: Metal or ferrite material in proximity of the antenna will lead to detuning effects, which may

cause major changes in the RF properties.

5.2.1

ISO/IEC 14443 Type A Waveforms

The waveforms were measured in accordance to ISO/IEC10373-6 (16.5MHz resonance frequency of reference PICC).

Table 7: ISO/IEC 14443 Type A Waveforms

Distance 0mm @ 106kbps Distance 7.5mm @ 106kbps

t1 [ns] 2914 t1 [ns] 2913 t2 [ns] 2070 t2 [ns] 2057 t3 [ns] 438 t3 [ns] 436 t4 [ns] 236 t4 [ns] 239 Os [%] 0.35 Os [%] 0.48

Distance 12mm @ 106kbps Distance 20mm @ 106kbps

t1 [ns] 2912 t1 [ns] 2915 t2 [ns] 2018 t2 [ns] 1977 t3 [ns] 442 t3 [ns] 459 t4 [ns] 244 t4 [ns] 248 Os [%] 0.36 Os [%] 0.64

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

5.2.2

ISO/IEC 14443 Type B Waveforms

The waveforms were measured in accordance to ISO/IEC10373-6 (16.5MHz resonance frequency of reference PICC).

Table 8: ISO/IEC 14443 Type B Waveforms

Distance 0mm @ 106kbps Distance 7.5mm @ 106kbps

m [%] 11.01 m [%] 10.68 tr [ns] 389 tr [ns] 379 tf [ns] 384 tf [ns] 392 Os [%] 3.28 Os [%] 4.34 Us [%] 3.14 Us [%] 4.18

Distance 12mm @ 106kbps Distance 20mm @ 106kbps

m [%] 10.55 m [%] 9.70 tr [ns] 395 tr [ns] 386 tf [ns] 427 tf [ns] 423 Os [%] 4.32 Os [%] 4.11 Us [%] 4.11 Us [%] 4.05

Note: Measured with modulation conductance setting of 33Hex (ISO/IEC 14443 Type B register #2).

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5.2.3

ISO/IEC 15693 Waveforms

The waveforms were measured in accordance to ISO/IEC10373-6 (16.5MHz resonance frequency of reference PICC).

Reader configured for 100% modulation.

Table 9: ISO/IEC 15693 Waveforms

Distance 0mm Distance 7.5mm

tr [ns] 411 tr [ns] 408 tf [ns] 717 tf [ns] 718 Os [%] 1.06 Os [%] 0.28

Distance 12mm Distance 20mm

tr [ns] 391 tr [ns] 411 tf [ns] 746 tf [ns] 781 Os [%] 3.68 Os [%] 1.42

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

5.2.4

m [%] tr [ns] tf [ns] Os [%] Us [%]

FeliCa Waveforms

Distance 0mm Distance 7.5mm

17.01 422 398

0.00

0.05

Distance 12mm Distance 20mm

Table 10: FeliCa Waveforms

m [%] tr [ns] tf [ns] Os [%] Us [%]

16.81 431 408

0.00

0.25

m [%] tr [ns] tf [ns] Os [%] Us [%]

16.31 413 424

0.00

0.70

m [%] tr [ns] tf [ns] Os [%] Us [%]

15.34 411 436

0.00

0.70

Note: Measured with modulation conductance setting of 99Hex (FeliCa register #2).

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6 Contact Interfaces

The reader board provides four ISO/IEC7816 contact interfaces. Both interfaces offer ID-000 cardholders (P102 and P103).

6.1 Assembl y Drawing

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Figure 6: VP3500A00 Reader Contact Interfaces

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

7 Visual /Audio Interface

The veriCLASS reader board offers four LEDs and one buzzer to fulfill the requirements of the EMV Contactless specification on visual and audio interface. Both LEDs and buzzer are fully configurable through software (for example, veriCLASS web server).

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Figure 7: veriCLASS Buzzer

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Figure 8: veriCLASS LEDs (Bottom)

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

8 I/O

The veriCLASS reader board offers four dedicated LED controls and one dedicated buzzer control line (open collector). The board itself already has all LED’s and the buzzer populated but the control lines are still available in through connector P105 in case the visual/audio interface needs to be placed off the board.

Note: The onboard LEDs and buzzer are using the same signal lines provided by the connector.

Table 11: UART Interface

UART interface Function Signal Pin Description

+5V 1 Regulated 5VDC from the reader board LED1 2 Control line LED1 LED2 3 Control line LED2 LED3 4 Control line LED3 LED4 5 Control line LED4 Buzzer 6 Control line for Buzzer (open collector) RFU 7 Reserved for future use RFU 8 Reserved for future use RFU 9 Reserved for future use GND 10 GND

Table 12: I/O Connector

UART interface

Manufacturer Molex Series PicoBlade® Part Number 053398 1071 Maximum Current 1A

Example Picture only

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9 VP3500A00 Electrical Characteristics

9.1 Absolute Maximum Ratings

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Table 13: Absolute Maximum Ratings

Operating Temperature Storage Temperature Voltage on Input Pins in respect to Ground Maximum Operating Voltage

-25 to 85˚C

-40 to 120˚C

-0.3V to 5.5V

5.5V

9.2 Power Supply

Table 14: Electrical Characteristics Power Supply

Signal Parameter Min Typ Max Unit

Input Voltage 2.7 5.5 V

Vin (P104)

VUSB (P101) Input Voltage 4.3 5.5 V

Current Consumption at 5VDC

mA

Note: The power consumption depends on the operation mode and the supply voltage. For more details reference 0

Power Considerations.

9.3 Host Interfaces

9.3.1 USB Interface (P101)

Table 15: Electrical Characteristics USB Interface

Signal Parameter Min Typ Max Unit

VUSB

DP, DM

Input High-level Voltage 4.2 5.5 V Input Low-level Voltage -0.3 0.8 V Input High-level Voltage 2 5.5 V Input Low-level Voltage -0.3 0.8 V Output High-level Voltage 2.9 3.3 V Output Low-level Voltage 0.2 V

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

9.3.2

UART Interface (P104)

Table 16: P104 - Electrical Characteristics UART Interface

Signal Parameter Min Typ Max Unit

Input High-level Voltage 2 5.5 V Input Low-level Voltage -0.3 0.8 V

RX, CTS

TX, RTS

nRST

Input Leakage Current Typ: Ta=25˚C Max: Ta=85˚C

Output High-level Voltage 2.9 3.3 V Output Low-level Voltage 0.2 V Input Low-level Voltage -0.15 0.15*CVCC V Input High-level Voltage 0.7CVCC CVCC+0.5 V Input Low-level Current 600 uA Input Low-level Current -40 40 uA

40 400 nA

9.4 Contact Interfaces (P102, P103)

Table 17: P102 - Contact Interface 1 Class A, 5V

Signal Parameter Min Typ Max Unit

CVCC (P102)

Contact Card Voltage Load = 60mA

Maximum Load Current 75 mA

4.6 5 5.4 V

Table 18: P102 - Contact Interface 1 Class B, 3V

Signal Parameter Min Typ Max Unit

CVCC (P102)

Contact Card Voltage Load = 60mA

Maximum Load Current 60 mA

2.76 3 3.24 V

Table 19: P102 - Contact Interface 1 Class B, 1.8V

Signal Parameter Min Typ Max Unit

CVCC (P102)

Contact Card Voltage Load = 35mA

Maximum Load Current 75 mA

1.656 1.8 1.944 V

Table 20: P103- Contact Interface 2 Class A, 5V

Signal Parameter Min Typ Max Unit

CVCC (P103)

Contact Card Voltage Load = 30mA

Maximum Load Current 70 mA

4.6 5 5.4 V

Table 21: P103 - Contact Interface 2 Class B, 3V

Signal Parameter Min Typ Max Unit

CVCC (P103)

Contact Card Voltage Load = 30mA

Maximum Load Current 70 mA

2.76 3 3.24 V

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Table 22: P103 - Contact Interface 2 Class C, 1.8V

Signal Parameter Min Typ Max Unit

CVCC (P103)

Contact Card Voltage Load = 30mA

Maximum Load Current 70 mA

1.656 1.8 1.944 V

Table 23: Contact Interface 1, 2 Clock

Signal Parameter Min Typ Max Unit

Output Low-level Voltage 0.3 V Output High-level Voltage 0.8*CVCC V

CCLK1 (P102, P103)

Rise Time Cl=30pF

Fall Time Cl=30pF

16 ns

16 Ns

Table 24: Contact Interface I/Os

Signal Parameter Min Typ Max Unit

Output Low-level Voltage 0.3 V Output High-level Voltage 0.8*CVCC V Input Low-level Voltage -0.15 0.15*CVCC V

CIO (P102, P103)

CRST (P102, P103)

Input High-level Voltage 0.7CVCC CVCC+0.5 V Input Low-level Current 600 uA Input Low-level Current -40 40 uA Rise Time

Cl=30pF Fall Time

Cl=30pF

100 ns

100 Ns

9.5 Electrical I/O (P105)

Table 25: P105 - Electrical Characteristics I/Os

Signal Parameter Min Typ Max Unit

Output High-level Voltage 2.9 3.3 V

LED1-4

Buzzer

Output Low-level Voltage 0.2 V Current Draw 8 mA Current Draw

(Open Collector)

60 mA

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veriCLASS Hardware Specification VP3500 Reader Board, 3500-906

10 VP3500 Mechanical Characteristics

10.1 Mechanical Drawings

Figure 9: Mechanical Drawing (Dimensions = mm)

Weight: 38Gramm

Page 28 of 28 March 2011

HID Global VERICLASS User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Regulatory

FCC / Canada Radio Certification

CE Marking

Reference Documents

Contents

1 Introduction

1.1 Product Description

1.2 Key Features

1.3 veriCLASS Platform Products

1.4 Product Guide

1.5 Scope/Purpose

1.6 Terms and Abbreviations

2 Overview

2.1 Features

2.2 Block Diagram

2.3 Assembl y Drawing

3 Power Considerations

4 Host Interfaces

4.1 USB Interface P101

4.2 UART Interface P104

5 RF Interface

5.1 Operating Field Strength

5.2 Modulation Waveforms

ISO/IEC 14443 Type A Waveforms

ISO/IEC 14443 Type B Waveforms

ISO/IEC 15693 Waveforms

FeliCa Waveforms

6 Contact Interfaces

6.1 Assembl y Drawing

7 Visual /Audio Interface

8 I/O

9 VP3500A00 Electrical Characteristics

9.1 Absolute Maximum Ratings

9.2 Power Supply

9.3 Host Interfaces

9.3.1 USB Interface (P101)

UART Interface (P104)

9.4 Contact Interfaces (P102, P103)

9.5 Electrical I/O (P105)

10 VP3500 Mechanical Characteristics

10.1 Mechanical Drawings