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HB7121B
Datasheet
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HEI HB7121B Datasheet

HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
Decoder/Pixel Driver Control Register & Logic
Electronics Industries Co., Ltd. System IC Division
DESCRIPTION
HB7122B is a highly integrated single chip CMOS B/W image sensor using Hyundai 0.5um CMOS process developed for image application to realize high efficiency photo sensor. The sensor has 414X314 pixels total, and 400X300 pixels effective. Each pixel is high photo sensitive, small size active pixel element that converts photons to analog voltage signal. The sensor has three on-chip 8 bit Digital to Analog Convert (DAC) and 414 comparators to digitize the pixel output. The three on-chip 8 bit DAC can be used for independent gain control. Hyundai proprietary on-chip Correlated Double Sampling (CDS) circuit can reduce Fixed Pattern Noise (FPN) dramatically. The whole 8 bit digital B/W raw data is directly available on the package pins and just a few control signals are needed for whole chip control, so it is very ease to configure a system using the sensor.
FEATURES
PRELIMINARY
l 400 x 300 pixels resolution l Full function control through standard I2C bus l 8um x 8um square pixel l Built-in Automatic Gain Control (AGC) l High efficiency photo sensors l 48 pin CLCC l Integrated 8-bit ADC for direct digital output l Anti-blooming circuit l Low power 3.3V operation (5V tolerant I/O) l Flexible exposure time control l Integrated pan control and window sizing l Integrated on-chip timing and drive control l Clock speed up to 15MHz l 1/4" optical format l Programmable frame rate and synchronous format
TECHNICAL SPECIFICATION FUNCTIONAL BLOCK DIAGRAM
Pixel resolution 402x302 Pixel size 8x8um
2
Fill factor 30% Format CIF Sensitivity 8.0V/luxžsec Supply voltage for analog 3.3V Supply voltage for digital 3.3V Supply voltage for 5V tolerant input 5.0V
I2C
Pixel Array
ADC Block
Power Consumption
TBD@15MHz
Line Buffer
Operating temperature 0~40 Centigrade Technology 0.5um 3metal CMOS
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
Electronics Industries Co., Ltd. System IC Division
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
l Supply voltage(Analog, Digital) : -0.4 V ~ 3.8 V l Voltage on any input pins : -0.4 V ~ VDD + 0.5 V
l Operating Temperature(Centigrade) : 0 ~ 40 l Storage Temperature(Centigrade) : -30 ~ 80
Note : Input pins are 5V tolerant. Stresses exceeding the absolute maximum ratings may induce failure.
DC Operating Conditions
PRELIMINARY
Symbol Parameter Units Min. Max. Load[pF] Notes
V
dd
V
ih
V
il
V
oh
V
ol
T
a
Internal operation supply voltage Volt 3.0 3.6
Input voltage logic "1" Volt 2.0 5 6.5
Input voltage logic "0" Volt 0 0.8 6.5 Output voltage logic "1" Volt 2.15 3.6 60 Output voltage logic "0" Volt 0.4 0.4 60
Ambient operating temperature Celsius 0 40
AC Operating Conditions
Symbol Parameter Max Operation Frequency Units Notes
MCLK Main clock frequency 20 MHz 1
SCK I2C clock frequency 400 KHz 2
1. MCLK can be divided according to Clock Divide Register for internal clock.
2. SCK is driven by host processor. For the detail serial bus timing, refer to I
2
C Spec.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
Electronics Industries Co., Ltd.
CMOS IMAGE SENSOR
With 8-bit ADC
System IC Division
PRELIMINARY
ELECTRO-OPTICAL CHARACTERISTICS
color temperature of light source: 3200K / IR cut-off filter (CM-500S, 1mmt) is used.
Parameter Units Min. Typical Max. Note
Sensitivity mV / luxžsec 8000 1)
HB7121B
Dark Signal mV/sec
50
Output Saturation Signal mV 1200 3)
Dynamic Range dB 48 4)
Output Signal Shading % 8 13 5)
Dark Signal Shading mV/sec 10 6)
Frame Rate fps 60 7)
Note:
1) Measured at 8lux illumination for exposure time 10 ms.
2) Measured at zero illumination for exposure time 50 ms. (T
= 40 Centigrade)
temp
3) Measured at Vdd =3.3V and 100lux illumination for exposure time 50msec.
4) 48dB is limited by 8-bit ADC.
5) Variance of average value of 4x4 pixels response of each block over all equal blacks at 50% saturation level illumination for exposure time 10msec.
6) Range between V
and V
max
at zero illumination for exposure time 50msec, where V
min
are the maximum and minimum values of each block’ s response, respectively.
and V
max
2)
min
7) Measured at MCLK 15MHz.
Integration time must be set in order for effective window height not to exceed window height. It’ s because effective window height is directly proportional to integration time.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
MCLK
Electronics Industries Co., Ltd. System IC Division
INPUT / OUTPUT AC CHARACTERISTICS
l All output timing delays are measured with output load 60[pF]. l Output delay include the internal clock path delay 6[ns] and output driving delay that changes in
respect to the output load, the operating environment, and a board design.
l Due to the variable valid time delay of the output, output signals may be latched in the negative
edge of MCLK for the stable data transfer between the image sensor and a host for less than 15MHz operation.
MCLK to HSYNC/VSYNC Timing
PRELIMINARY
T
1
MCLK
HSYNC/VSYNC
T
1
T
2
T1 : MCLK rising to HSYNC/VSYNC valid maximum time : 18ns [output load: 60pF] T2 : HSYNC/VSYNC valid time : minimum 1clock(subject to T1, T2 timing rule)
MCLK to DATA Timing
DATA[7:0]
T
3
valid data
T
3
T3 : MCLK rising to DATA valid maximum time : 18ns [output load: 60pF] Note) HSYNC signal is high when valid data is on the DATA bus.
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
Electronics Industries Co., Ltd.
CMOS IMAGE SENSOR
With 8-bit ADC
System IC Division
PRELIMINARY
INPUT / OUTPUT AC CHARACTERISTICS (Continue)
ENB Timing
T
4
MCLK
T
6
ENB
HB7121B
T
5
T4 : ENB Setup Time : 5[ns] T5 : ENB Hold Time : 5[ns] T6 : ENB valid Time : minimum 2 clock
RESET Timing
Must in Valid (active low) state at least 8 MCLK periods
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
Electronics Industries Co., Ltd.
CMOS IMAGE SENSOR
With 8-bit ADC
System IC Division
PRELIMINARY
INPUT / OUTPUT AC CHARACTERISTICS CONTINUE
I2C Bus (Programming Serial Bus) Timing
HB7121B
stop start
SDA
tbuf
SCK
thd;sta
tlow
I2C Bus Interface Timing
Parameter Symbol Min. Max. Unit
SCK clock frequency f
Time that I2C bus must be free before a new
transmission can start
tr
tf
thd;dat thigh tsu;dat tsu;sta tsu;sto
0 400 KHz
1.2 us
t
sck
buf
thd;sta
stopstart
Hold time for a START thd;s
LOW period of SCK t
HIGH period of SCK t
Setup time for START tsu;s
Data hold time thd;d
Data setup time tsu;d
Rise time of both SDA and SCK t
Fall time of both SDA and SCK t
Setup time for STOP tsu;s
Capacitive load of each bus lines(SDA,SCK) C
ta
low
high
ta
at
at
r
f
to
b
1.0 us
1.2 us
1.0 us
1.2 us
1.3 us
250 ns
250 ns 300 ns
1.2 us pf
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
Electronics Industries Co., Ltd.
CMOS IMAGE SENSOR
With 8-bit ADC
System IC Division
PIN CONFIGURATION (48 pin CLCC)
HB7121B
PRELIMINARY
PIN NO. NAME PIN NO. NAME
1 SCK 26 DGND 2 DGND 27 DATA3 3 ENB 28 DATA2 4 DGND 29 DATA1 5 MCLK 30 DATA0 6 VDD5 31 DVDD 7 AVDD 32 DGND
8 AGND 42 DVDD 17 AGND 43 RESET 18 AVDD 44 VSYNC 21 DGND 45 HSYNC 22 DATA7 46 DGND 23 DATA6 47 SDA 24 DATA5 48 DGND 25 DATA4
Pin9~16, Pin19~20, Pin33~41 : No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
Electronics Industries Co., Ltd.
CMOS IMAGE SENSOR
With 8-bit ADC
System IC Division
PIN DESCRIPTIONS (48 Pin CLCC)
HB7121B
PRELIMINARY
PIN NAME I/O
1 SCK I I2C Clock ; I2C clock control from I2C master 2 DGND I Digital Ground 3 ENB I Sensor Enable Signal ; 'H' enable normal operation
'L' disable sensor 4 DGND I Digital Ground 5 MCLK I Master Clock (up to 15MHz)
; Global master clock for image sensor internal timing control 6 VDD5 I I/O bias voltage for 5V tolerant *1) 7 AVDD I Analog Supply Voltage 3.3V 8 AGND I Analog Ground
9 ~ 16 N.C No Connection
17 AGND I Analog Ground 18 AVDD I Analog Supply Voltage 3.3V
19, 20 Reserved Reserved
21 DGND I Digital Ground 22 DATA7 O Image Data bit 7 23 DATA6 O Image Data bit 6 24 DATA5 O Image Data bit 5 25 DATA4 O Image Data bit 4 26 DGND I Digital Ground 27 DATA3 O Image Data bit 3 28 DATA2 O Image Data bit 2 29 DATA1 O Image Data bit 1 30 DATA0 O Image Data bit 0 31 DVDD I Digital Supply Voltage 3.3V 32 DGND I Digital Ground
33 ~ 41 N.C No Connection
42 DVDD I Digital Supply Voltage 3.3V 43 RESET I Hardware Reset Signal, Active Low 44 VSYNC O Vertical synchronization signal / Frame start output
; Signal pulse at start of image data frame with programmable
blanking duration
45 HSYNC O Horizontal synchronization signal / Data valid output
/DVALID ; Data valid when 'H' with programmable blanking duration 46 DGND I Digital Ground 47 SDA I/O I2C Data ; I2C standard data I/O port 48 DGND I Digital Ground
DESCRIPTION
*1) Tie to DVDD for 3.3V operation / Tie to 5V for 5V tolerant operation
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
Electronics Industries Co., Ltd. System IC Division
Register map
Register Name address 7 6 5 4 3 2 1 0
Mode A 00h model_name rev_num Mode B 01h oper_mode data_type hs_out scr_size shot int_sel Mode C 02h reserved sw_enb pwr_dn color reserved
Row Start Address High 10h reserved r_ad[8]
Row Start Address Low 11h r_ad[7:0]
Column Start Address High 12h reserved c_ad[8]
Column Start Address Low 13h c_ad[7:0]
Window Height Address High 14h reserved h_ad[8]
Window Height Address Low 15h h_ad[7:0] Window Width Address High 16h reserved w_ad[8]
PRELIMINARY
Window Width Address Low 17h w_ad[7:0] HSYNC Blanking Time High 20h h_blank[15:8]
HSYNC Blanking Time Low 21h h_blank[7:0]
VSYNC Blanking Time High 22h v_blank[15:8]
VSYNC Blanking Time Low 23h v_blank[7:0]
Integration Time High 25h int_time[23:16]
Integration Time Middle 26h int_time[15:8]
Integration Time Low 27h int_time[7:0] Master Clock Divider 28h reserved clk_div[3:0]
Reset Level Control 30h rst_level[5:0]
Red Color Gain 31h reserved red_color[5:0]
Green Color Gain 32h reserved green_color[5:0]
Blue Color Gain 33h reserved blue_color[5:0]
Pixel Bias Voltage 34h reserved pixel_bias[3:0]
Red Offset Gain Control 50h reserved red_offset[6:0]
Green Offset Gain Control 51h reserved green_offset[6:0]
Blue Offset Gain Control 52h reserved blue_offset[6:0]
Low Reference Number High 57h low_ref_no[15:8]
Low Reference Number Low 58h low_ref_no[7:0] High Reference Number High 59h high_ref_no[15:8] High Reference Number Low 5Ah high_ref_no[7:0]
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. NO patent licenses are implied.
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