HEI GMS87C2020Q, GMS87C2020LQ, GMS87C2020K, GMS81C2020LQ, GMS81C2020K Datasheet
...
HYUNDAI MICRO ELECTRONICS
8-BIT SINGLE-CHIP MICROCONTROLLERS
GMS81C2012
GMS81C2020
User’s Manual
+<81'$,
MicroElectronics
Semiconductor Group of Hyundai Electronics Industrial Co., Ltd.
MAR. 2000 Ver 1.00
HYUNDAI MICRO ELECTRONICS
8-BIT SINGLE-CHIP MICROCONTROLLERS
GMS81C2012
GMS81C2020
+<81'$,
MicroElectronics
Semiconductor Group of Hyundai Electronics Industrial Co., Ltd.
User’s Manual (Ver. 1.00)
Version 1.00
Published by
MCU Application Team
2000 HYUNDAI Micro Electronics All right reserved.
Additional information of this manual may be served by HYUNDAI Micro Electronics offices in Korea or Distributors and
Representatives listed at address directory.
HYUNDAI Micro Electronics reserves the right to make changes to any information here in at any time without notice.
The information, diagrams and other data in this manual are co rrect and reliable; ho wever, HYUNDAI Micro Electronics is
in no way responsible for any violations of patents or other rights of the third party generated by the use of this manual.
Table of Contents
1. OVERVIEW ...........................................1
Description......................................................... 1
Features ............................... ..............................1
Development Tools ............................................2
Ordering Information ..........................................2
2. BLOCK DIAGRAM ................................3
3. PIN ASSIGNMENT ...............................4
4. PACKAGE DIAGRAM .............................. 6
5. PIN FUNCTION .....................................8
6. PORT STRUCTURES .........................11
7. ELECTRICAL CHARACTERISTICS... 14
Absolute Maximum Ratings............................. 14
Recommended Operating Conditions.............. 14
A/D Converter Characteristics ......................... 14
DC Electrical Characteristics for Standard Pins(5V)
..........................................................................15
DC Electric al Characterist ics for High-Vol tage Pins
..........................................................................16
AC Characteristics ...........................................17
AC Characteristics ...........................................18
Typical Characteristics .....................................19
8. MEMORY ORGANIZATION................ 21
Registers.......................................................... 21
Program Memory ........... ....... ...... ....... ...... ........ 24
Data Memory ...................................................27
Addressing Mode .............................................31
9. I/O PORTS ..........................................35
10. BASIC INTERVAL TIMER .................39
11. WATCHDOG TIMER......................... 41
12. TIMER/EVENT COUNTER............... 44
8-bit Timer / Counter Mode.............................. 46
16-bit Timer / Counter Mode ............................50
8-bit Compare Output (16-bit) ..........................51
8-bit Capture Mode ..........................................51
16-bit Capture Mode ............ ...... ....... ...... ....... ..5 4
PWM Mode ......................................................55
13. ANALOG DIGITAL CONVERTER ....58
14. SERIAL PERIPHERAL INTERFACE 61
Transmission/Recei vi ng Timi ng .... .................. 63
The method of Serial I/O................................. 64
The Method to Test Correct Transmission ...... 64
15. BUZZER FUNCTION ........................ 65
16. INTERRUPTS ...................................67
Interrupt Sequence .......................................... 69
Multi Interrupt .................................................. 71
External Interrupt ............................................. 72
17. Power Saving Mode.......................... 74
Operating Mode .............................................. 75
Stop Mode ....................................................... 76
Wake-up Timer Mode ...................................... 77
Internal RC-Oscillated Watchdog Timer Mode 78
Minimizing Current Consumption.................... 79
18. OSCILLATOR CIRCUIT ....................81
19. RESET.............................................. 82
External Reset Input ........................................ 82
Watchdog Timer Reset .............................. ..... 82
20. POWER FAIL PROCESSOR ............83
21. OTP PROGRAMMING...................... 85
DEVICE CONFIGURATION AREA ...................... 85
A. CONTROL REGISTER LIST................. i
B. INSTRUCTION.................................... iii
Terminology List................................................ iii
Instruction Map ..................................................iv
Instruction Set .................................................... v
C.MASK ORDER SHEET........................ xi
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 5
GMS81C2012/GMS81C2020
CMOS Single-Chip 8-Bit Microcontroller
with A/D Converter & VFD Driver
1. OVERVIEW
1.1 Description
The GMS81C2012 and GMS81C2020 are advanced CMOS 8-b it micro contr oller with 12 K/20K bytes of ROM. Thes e are a
powerful microcontroller which provides a highly flexible and cost effective solution to many VFD applications. These provide the following standard features: 12K/20K bytes of ROM, 448 bytes of RAM, 8-bit timer/counter, 8-bit A/D converter,
10-bit High Speed PWM Output, Programmable Buzzer Driving Port, 8-bit Basic Interval Timer, 7-bit Watch dog Timer,
Serial Peripheral Interface, on-chip oscillator and clo ck circuitry. They also come with h igh voltage I/O p ins that can dir ectl y
drive a VFD (Vacuum Fluores cent Displ ay). I n addit ion, t he GMS81C20 12 and GMS 81C202 0 suppor t po wer saving modes
to reduce power consumption.
1.2 Features
• 20K/12K bytes ROM(EPROM)
• 448 Bytes of On-Chip Data RAM
(Including STACK Area)
• Minimum Instruction Execution time:
- 1uS at 4MHz (2cycle NOP Instruction)
• One 8-bit Basic Interval Timer
• One 7-bit Watch Dog Timer
• Two 8-bit Timer/Counters
• 10-bit High Speed PWM Output
• One 8-bit Serial Peripheral Interface
• Two External Interrupt Ports
• One Programmable 6-bit Buzzer Driving Port
• 60 I/O Lines
- 56 Programmable I/O pins
(Included 30 high-voltage pins Max. 40V)
- Three Input Only pins: 1 high-voltage pin
- One Output Only pin
• Eight Interrupt Sources
- Two External Sources (INT0, INT1)
- Two Timer/Counter Sources (Timer0, Timer1)
- Four Functional Sources (SPI,ADC,WDT,BIT)
• 12-Channel 8-bit On-Chip Analog to Digital
Converter
• Oscillator:
- Crystal
- Ceramic Resonator
- External R Oscillator
• Low Power Dissipation Modes
- STOP mode
- Wake-up Timer Mode
- Standby Mode
- Watch Mode
- Sub-active Mode
• Operating Voltage: 2.7V ~ 5.5V (at 4.5MHz)
• Operating Frequency: 1MHz ~ 4.5MHz
• Sub-clock: 32.768KHz Crystal Oscillator
• Enhanced EMS Improvement
Power Fail Processor
(Noise Immunity Circuit)
Device name ROM Size RAM Size OTP Package
GMS81C2012 12K bytes
448 bytes
-
64SDIP, 64MQFP,
64LQFP
GMS81C2020 20K bytes GMS87C2020
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
6 MAR. 2000 Ver 1.00
1.3 Development Tools
The GMS81C20xx are supported by a full-featured macro
assembler, an in-circuit emulator CHOICE-Jr.
TM
and OTP
programmers. There are third different type programmers
such as emulator add-on board type, s ingle type, gang typ e.
For mode detail, Refer to “21. OTP PROGRAMMING” on
page 89. Macro assembler operates under the MS-Windows 95/98
TM
.
Please contact sales part of Hyundai MicroElectronics.
1.4 Ordering Information
In Circuit
Emulators
CHOICE-Dr.
Socket Adapter
for OTP
CHPOD81C20D-64SD (64SDIP)
CHPOD81C20D-64QFP (64MQFP)
CHPOD81C20D-64LQFP (64LQFP)
Assembler
HME Macro Assembler
Device name ROM Size RAM size Package
Mask version
GMS81C2012 K
GMS81C2012 Q
GMS81C2012 LQ
GMS81C2020 K
GMS81C2020 Q
GMS81C2020 LQ
12K bytes
12K bytes
12K bytes
20K bytes
20K bytes
20K bytes
448 bytes
448 bytes
448 bytes
448 bytes
448 bytes
448 bytes
64SDIP
64MQFP
64LQFP
64SDIP
64MQFP
64LQFP
OTP version
GMS87C2020 K
GMS87C2020 Q
GMS87C2020 LQ
20K bytes OTP
20K bytes OTP
20K bytes OTP
448 bytes
448 bytes
448 bytes
64SDIP
64MQFP
64LQFP
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 7
2. BLOCK DIAGRAM
ALU
Interrupt Controller
Data Memor y
8-bit
ADC
8-bit
Counter
Timer/
Program
Memory
Data Table
PC
8-bit Basic
Timer
Interval
Watchdog
Timer
PC
R4 R5
R2
PSW
Syst
em controller
Timing generator
System
Clock Controller
Cloc k
Generator
RESET
X
IN
X
OUT
R40 / T0O
R41
R50
R20~R27
V
DD
V
SS
Power
Supply
8-bit serial
R51
R52
R53 / SCLK
R54 / SIN
R55 / SOUT
R56 / PWM1O/T1O
R57
R1
R10~R17
R3
R30~R35
Interface
Buzzer
Driver
R6
R60 / AN0
R61 / AN1
R62 / AN2
R63 / AN3
R64 / AN4
R65 / AN5
R66 / AN6
R67 / AN7
(448 bytes)
10-bit
AVDDAV
SS
ADC Power
Supply
Stack Pointer
R0
R04
R03/BUZO
R02/EC0
R00/INT0
Vdisp/RA
R7
R70 / AN8
R71 / AN9
R72 / AN10
R42
R43 R73 / AN11
Sub System
Clock Controller
SX
IN
SX
OUT
R05
R06
R07
R01/INT1
RA
PWM
A
X Y
High Voltage Port
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
8 MAR. 2000 Ver 1.00
3. PIN ASSIGNMENT
R40
R42
R43
R50
R51
R52
R53
R54
R55
R56
R57
RESET
XI
XO
V
SS
SCLK
SIN
SOUT
PWM1O/T1O
SXIN
SXOUT
AN0
R74
R75
AV
SS
R60
R61
R62
R63
R64
R65
R66
R67
R70
R71
R72
R73
AV
DD
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
RA
R35
R34
R33
R32
R31
R30
R27
R26
R25
R24
R23
R22
R21
R20
R17
R16
R15
R14
R13
R12
R11
R10
R07
R06
R05
R04
R03
R02
R01
R00
V
DD
R51
R30
R31
R32
R33
R34
R35
RA
R40
R41
R42
R43
R50
T0O
V
disp
R66
R04
R03
R02
R01
R00
V
DD
AV
DD
R73
R72
R71
R70
R67
AN6
AN8
AN7
R27
R25
R24
R23
R22
R21
R20
R17
R16
R15
R14
R13
R12
R11
R10
R07
R26
R06
R05
R52
R54
R55
R56
R57
RESET
XI
XO
V
SS
R74
R75
AV
SS
R60
R61
R62
R63
R53
R64
R65
SIN
SOUT
PWM1O/T1O
SXI
SXO
AN0
AN1
AN2
AN3
SCLK
AN4
AN5
123456789
101112131415161718
19
484746
45
4443424140
39
3837363534
33
515049
32
31
30
29
28
27
26
25
24
23
22
21
20
52
53
54
55
56
57
58
59
60
61
62
63
64
64MQFP
64SDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
BUZO
EC0
INT1
INT0
V
disp
R41
T0O
AN9
AN11
AN10
INT0
EC0
INT1
BUZO
High Voltage Port
GMS81C2012/20
GMS81C2012/20
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 9
R06
R05
R04
R03
R02
R01
R00
V
DD
AV
DD
R73
R72
R71
R70
R67
R66
R65
R26
R25
R24
R23
R22
R21
R20
R17
R16
R15
R14
R13
R12
R11
R10
R07
R54
R55
R56
R57
RESET
XIN
XOUT
V
SS
R74
R75
AV
SS
R60
R61
R62
R63
R64
123456789
10111213141516
R27
R30
R31
R32
R33
R34
R35
R40
R41
R42
R43
R50
R51
R52
R53
484746454443424140393837363534
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
64LQFP
SIN
SOUT
PWM1O/T1O
SXIN
SXOUT
AN0
AN1
AN2
AN3
AN4
AN6
AN8
AN7
AN5
V
disp
T0O
SCLK
RA
AN10
AN11
AN9
INT1
BUZO
EC0
INT0
High Voltage Port
GMS81C2012/20
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
10 MAR. 2000 Ver 1.00
4. PACKAGE DIAGRAM
UNIT: INCH
2.280
2.260
0.022
0.016
0.050
0.030
0.070 BSC
0.140
0.120
min. 0.015
0.680
0.660
0.750 BSC
0-15
°
64SDIP
0
.0
1
2
0
.0
0
8
0.205 max.
20.10
19.90
24.15
23.65
18.15
17.65
14.10
13.90
3.18 max.
0.50
0.35
1.00 BSC
SEE DETAIL "A"
1.03
0.73
0-7
°
0.36
0.10
0.23
0.13
1.95
REF
DETAIL "A"
UNIT: MM
64MQFP
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 11
1.60 max.
SEE DETAIL "A"
0.75
0.45
0-7
°
0.15
0.05
1.00
REF
DETAIL "A"
UNIT: MM
10.00 BSC
12.00 BSC
12.00 BSC
10.00 BSC
0.38
0.22
0.50 BSC
1.45
1.35
64LQFP
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
12 MAR. 2000 Ver 1.00
5. PIN FUNCTION
VDD: Supply voltage.
V
SS
: Circuit ground.
AV
DD
: Supply voltage to the ladder resistor of ADC circuit. To enhance the resolution of analog to digital converter, use independent po wer source as wel l as poss ible, oth er
than digital power source.
AV
SS
: ADC circuit ground.
RESET
: Reset the MCU.
X
IN
: Input to the inverting oscillator amplifier and input to
the internal clock operating circuit.
X
OUT
: Output from the inverting oscillator amplifier.
RA(V
disp
): RA is one-bit high-voltage input only port pin.
In addition, RA serves the functions of the V
disp
special
features. V
disp
is used as a high-voltage i nput power supply
pin when selected by the mask option.
R00~R07: R0 is an 8-bit h igh-voltage CMOS bidir ectional
I/O port. R0 pins 1 or 0 written to the Port Direction Register can be used as outputs or inputs. In addition, R0
serves the functions of the various following special features.
R10~R17: R1 is an 8-bit high-volta ge CMOS bidir ectional
I/O port. R1 pins 1 or 0 written to the Port Direction Register can be used as outputs or inputs.
R20~R27: R2 is an 8-bit high-volta ge CMOS bidir ectional
I/O port. R2 pins 1 or 0 written to the Port Direction Register can be used as outputs or inputs.
R30~R35: R3 is a 6-bit high-voltage CMOS bidirectional
I/O port. R3 pins 1 or 0 written to the Port Direction Register can be used as outputs or inputs.
R40~R43: R4 is a 4-bit CMOS bidirection al I/O port. R4
pins 1 or 0 written to the Port Direction Register can be
used as outputs or inputs. In addition, R 4 serves the func-
tions of the following special features.
R50~R57: R5 is an 8-bit CMOS bidirectional I/O port. R5
pins 1 or 0 written to the Port Direction Register can be
used as outputs or inputs. In addition, R5 serves the functions of the various following special features.
R60~R67: R6 is an 8-bit CMOS bidirectional I/O port. R6
pins 1 or 0 written to the Port Direction Register can be
used as outputs or inputs. In addition, R6 is shared with the
ADC input.
R70~R73: R7 is a 4-bit CMOS bidirectional I/O port. R6
pins 1 or 0 written to the Port Direction Register can be
used as outputs or inputs. In addition, R7 is shared with the
ADC input.
SX
IN
: Input to the internal subsystem clock operating circuit. In addition, SXIN serves the R74 pin when selected
by the code option. *R74 has a Pu ll-up circuit.
SX
OUT
: Output from the inverting subsystem oscillator
amplifier. In addition, SXOUT serves the R75 pin when
Port pin Alternate function
RA
V
disp
(High-voltage input power supply)
Port pin Alternate function
R00
R01
R02
R03
INT0 (External interrupt 0)
INT1 (External interrupt 1)
EC0 (Event counter input)
BUZO (Buzzer driver output)
Port pin Alternate function
R40 T0O (Timer/Counter 0 output)
Port pin Alternate function
R53
R54
R55
R56
SCLK (Serial clock)
SIN (Serial data input)
SOUT (Serial data output)
PWM1O (PWM1 Output)
T1O (Timer/Counter 1 output)
Port pin Alternate function
R60
R61
R62
R63
R64
R66
R66
R67
AN0 (Analog Input 0)
AN1 (Analog Input 1)
AN2 (Analog Input 2)
AN3 (Analog Input 3)
AN4 (Analog Input 4)
AN5 (Analog Input 5)
AN6 (Analog Input 6)
AN7 (Analog Input 7)
Port pin Alternate function
R70
R71
R72
R73
AN8 (Analog Input 8)
AN9 (Analog Input 9)
AN10 (Analog Input 10)
AN11 (Analog Input 11)
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 13
selected by the code option. *R75 has a Pull-up circuit.
Port pin Alternate function
SXI
SXO
R74(Included Internal Pull-up Resister)
R75(Included Internal Pull-up Resister)
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
14 MAR. 2000 Ver 1.00
PIN NAME In/Out
Function
Basic Alternate
V
DD
- Supply voltage
V
SS
- Circuit ground
RA (V
disp
)
I(I) 1-bit high-voltage Input only port High-voltage input power supply pin
RESET I Reset signal input
XIN I Oscillation input
XOUT O Oscillation output
SXIN(R74) I Sub Os cillation input
General I/O ports
SXOUT(R75) O Sub Oscillation output
R00 (INT0) I/O (I)
8-bit high-voltage I/O ports
External interrupt 0 input
R01 (INT1) I/O (I) External interrupt 1 input
R02 (EC0) I/O (I) Timer/Counter 0 external input
R03 (BUZO) I/O (O) Buzzer driving output
R04~R07 I/O
R10~R17 I/O 8-bit high-voltage I/O ports
R20~R27 I/O 8-bit high-voltage I/O ports
R30~R35 I/O 6-bit high-voltage I/O ports
R40 (T0O) I/O (O)
4-bit general I/O ports
Timer/Counter 0 output
R41~R43 I/O
R50~R52 I/O
8-bit general I/O ports
R53 (SCLK) I/O (I/O) Serial clock source
R54 (SIN) I/O (I) Serial data input
R55 (SOUT) I/O (O) Serial data output
R56 (PWM1O/T1O) I/O (O)
PWM 1 pulse output /Timer/Counter 1 out-
put
R57 I/O
R60~R67 (AN0~AN7) I/O (I) 8-bit general I/O ports
Analog voltage input
R70~R73
(AN8~AN11)
I/O (I) 4-bit general I/O ports
AV
DD
- Supply voltage input pin for ADC
AV
SS
- Ground level input pin for ADC
V
DD
- Supply voltage
V
SS
- Circuit ground
Table 5-1 GMS81C2020 Port Function Description
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 15
6. PORT STRUCTURES
R41~R43, R50~R52, R57
R00/INT0, R01/INT1, R02/EC0
R40/T0O
R53/SCLK
R54/SIN
Pin
Data Reg.
Dir.
Rd
V
DD
VSS
Reg.
Data Bus
MUX
V
DD
Mask
Option
Pull-up
Tr.
Pin
Data Reg.
Dir.
Rd
V
DD
Vdisp
Reg.
Data Bus
Selection
Data Reg.
EX) INT0
Alternate Function
Mask
Option
MUX
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
MUX
Selection
V
DD
Secondary
Function
Mask
Option
Pull-up
Tr .
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
MUX
Selection
SCLK Output
SCLK Input
V
DD
Mask
N-MOS
Open Drain Select
Option
Pull-up
Tr.
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
Selection
SIN Input
V
DD
Mask
N-MOS
Open Drain Select
Option
Pull-up
Tr.
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
16 MAR. 2000 Ver 1.00
R55/SOUT
RA/Vdisp
R64/AN7 ~ R67/AN7
R04~R07, R10~R17, R20~R27, R30~R35
RESET
SXIN, SXOUT
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
MUX
Selection
SOUT output
IOSWIN Input
V
DD
Mask
N-MOS
Open Drain Select
IOSWB
Option
Pull-up
Tr.
Rd
Vdisp
Data bus
V
DD
Mask
Option
Pin
Data Reg.
Dir.
Rd
V
DD
V
SS
Reg.
Data Bus
MUX
To A/D converter
Pin
Data Reg.
Dir.
Rd
V
DD
Vdisp
Reg.
Data Bus
MUX
Mask
Option
RESET
V
DD
V
SS
OTP :disconnected
Main :connected
SXOUT
V
DD
SXIN
Stop
Subclk Off
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 17
XIN, XOUT
R74, R75
R03/BUZO
R56/PWM1O/T1O
R60~R67/AN0~AN7, R70~R74/AN8~AN11
XOUT
V
DD
XIN
Stop
Mainclk Off
V
SS
Pin
Data Reg.
Dir.
Rd
V
DD
VSS
Reg.
Data Bus
MUX
V
DD
Pin
Data Reg.
Dir.
Rd
V
DD
Vdisp
Reg.
Data Bus
MUX
MUX
Selection
Data Reg.
Secondary
Function
Mask
Option
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
MUX
Selection
SOUT output
V
DD
Mask
N-MOS
Open Drain Select
Option
Pull-up
Tr.
Data Bus
V
DD
V
SS
Pin
Data Reg.
Direction
Reg.
Rd
V
DD
Mask
A/D
Analog
Converter
Input Mode
A/D Ch.
Selection
Option
Pull-up
Tr.
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
18 MAR. 2000 Ver 1.00
7. ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
Supply voltage............................................. -0.3 to +7.0 V
Storage Temperature ....................................-40 to +85 °C
Voltage on Normal voltage pin
with respect to Ground (V
SS
)
..............................................................-0.3 to V
DD
+0.3 V
Voltage on High voltage pin
with respect to Ground (V
SS
)
............................................................-45V to V
DD
+0.3 V
Maximum current out of V
SS
pin..........................150 mA
Maximum current into V
DD
pin ..............................80 mA
Maximum current sunk by (I
OL
per I/O Pin) ..........20 mA
Maximum output current sourced by (I
OH
per I/O Pin)
............................. ...... ....................................... ......... 8 mA
Maximum current (ΣI
OL
)......................................100 mA
Maximum current (ΣI
OH
)........................................50 mA
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause per manent damage to the d evice. This is a stress ra ting only and functional ope ration of
the device at any oth er c ond iti ons ab ov e tho se ind ic ated in
the oper ati o na l se c ti ons of this s pe c if i ca t ion i s no t i mp l ie d .
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
7.2 Recommended Operating Conditions
7.3 A/D Converter Characteristics
(TA=25°C, VDD=5V, VSS=0V, AVDD=5.12V, AVSS=0V @
f
XIN
=4MHz)
Parameter Symbol Condition
Specifications
Unit
Min. Max.
Supply Voltage
V
DD
fXI = 4.5 MHz
2.7 5.5 V
Operating Frequency
f
XIN
VDD = V
DD
14.5MHz
Operating Temperature
T
OPR
-40 85
°
C
Parameter Symbol Condition
Specifications
Unit
Min.
Typ.
1
1. Data in “Typ” column is at 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Max.
Analog Power Supply Input Voltage Range
AV
DD
AV
SS
-
AV
DD
V
Analog Input Voltage Range
V
AN
AV
SS
-0.3
AV
DD
+0.3
V
Current Following
Between AV
DD
and
AV
SS
I
AVDD
-
−200
uA
Overall Accuracy
CA
IN
-
±
1.5
±2
LSB
Non-Linearity Error
N
NLE
-
±
1.5
±2
LSB
Differential Non-Linearity Error
N
DNLE
-
±
0.5
±
1LSB
Zero Offset Error
N
ZOE
-
±
0.5
±
1.5 LSB
Full Scale Error
N
FSE
-
±
0.5
±
1LSB
Gain Error
N
NLE
-
±0
.5
±
1LSB
Conversion Time
T
CONV
f
XIN
=4MHz
--20us
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 19
7.4
DC Electrical Characteristics for Standard Pins(5V)
(VDD = 5.0V ± 10%, V
SS
= 0V, TA = -40 ~ 85°C, f
XIN
= 4 MHz, Vdisp = VDD-40V to VDD)
,
Parameter Pin Symbol Test Condition
Specification
Unit
Min
Typ.
1
1. Data in “Typ.” column is at 4.5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Max
Input High Voltage
XIN
,
SXIN V
IH1
External Clock
0.9V
DD
VDD+0.3
V
RESET,SIN,R55,SCLK,
INT0
&
1,EC0
V
IH2
0.8V
DD
VDD+0.3
R40~R43,R5,R6,R70~R73
V
IH3
0.7V
DD
VDD+0.3
Input Low Voltage
XIN, SXIN V
IL1
External Clock -0.3
0.1V
DD
V
RESET
,SIN,R55,SCLK,
INT0
&
1,EC0
V
IL2
-0.3
0.2V
DD
R40~R43,R5,R6,R70~R73
V
IL3
-0.3
0.3V
DD
Output High
Voltage
R40~R43,R5,R6,R70~R73
BUZO,T0O,PWM1O/T1O,
SCLK,SOUT
V
OH
I
OH
= -0.5mA VDD-0.5
V
Output Low
Voltage
R40~R43,R5,R6,R70~R73
BUZO,T0O,PWM1O/T1O,
SCLK,SOUT
V
OL1
V
OL2
I
OL
= 1.6mA
I
OL
= 10mA
0.4
2
V
Input High
Leakage Current
R40~R43,R5,R6,R70~R73
I
IH1
1
uA
XIN
I
IH2
1
Input Low
Leakage Current
R40~R43,R5,R6,R70~R73
I
IL1
-1
uA
XIN
I
IL2
-1
Input Pull-up
Current(*Option)
R40~R43,R5,R6,R70~R73
I
PU
50 100 180 uA
Power Fa il
Detect Voltage
V
DD
V
PFD
2.7 V
Current dissipation
in active mode
V
DD
I
DD
f
XIN
=4.5MHz 8 mA
Current dissipation
in standby mode
V
DD
I
STBY
f
XIN
=4.5MHz 3 mA
Current dissipation
in sub-active mode
V
DD
I
SUB
f
XIN
= Off
f
SXIN
=32.7KHz
100 uA
Current dissipation
in watch mode
V
DD
I
WTC
f
XIN
=Off
f
SXNI
=32.7KHz
20 uA
Current dissipation
in stop mode
V
DD
I
STOP
f
XIN
=Off
f
SXIN
=32.7KHz
10 uA
Hysteresis
RESET
,SIN,R55,SCLK,
INT0
,
INT1,EC0
V
T+~VT-
0.4 V
Internal RC WDT
Frequency
XOUT
T
RCWDT
830KHz
RC Oscillation
Frequency
XOUT
f
RCOSC
R= 120K
Ω
1.522.5MHz
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
20 MAR. 2000 Ver 1.00
7.5 DC Electrical Characteristics for High-Voltage Pins
(VDD = 5.0V ± 10%, V
SS
= 0V, TA = -40 ~ 85°C, f
XIN
= 4 MHz, Vdisp = VDD-40V to VDD)
Parameter Pin Symbol Test Condition
Specification
Unit
Min
Typ.
1
1. Data in “Typ.” column is at 4.5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Max
Input High Voltage R0,R1,R2,R30~R35,RA
V
IH
0.7V
DD
VDD+0.3
V
Input Low Voltage R0,R1,R2,R30~R35,RA
V
IL
VDD-40 0.3V
DD
V
Output High
Voltage
R0,R1,R2,R30~R35
V
OH
I
OH
= -15mA
I
OH
= -10mA
I
OH
= - 4mA
V
DD
-3.0
VDD-2.0
V
DD
-1.0
V
Output Low
Voltage
R0,R1,R2,R30~R35
V
OL
Vdisp = VDD-40
150KΩ atVDD-
40
V
DD
-37
VDD-37
V
Input High
Leakage Current
R0,R1,R2,R30~R35,RA
I
IH
VIN=VDD-40V
to V
DD
20 uA
Input Pull-down
Current(*Option)
R0,R1,R2,R30~R35
I
PD
Vdisp=VDD-35V
VIN=V
DD
200 600 1000 uA
Input High Voltage R0,R1,R2,R30~R35,RA
V
IH
0.7V
DD
VDD+0.3
V
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 21
7.6 AC Characteristics
(TA=-40~ 85°C, VDD=5V±10%, VSS=0V)
Figure 7-1 Timing Chart
Parameter Symbol Pins
Specifications
Unit
Min. Typ. Max.
Operating Frequency
f
CP
XIN 1 - 8 MHz
External Clock Pulse Width
t
CPW
XIN 80 - - nS
External Clock Transition Time
t
RCP,tFCP
XIN - - 20 nS
Oscillation Stabilizing Time
t
ST
XIN, XOUT - - 20 mS
External Input Pulse Width
t
EPW
INT0, INT1, EC0 2 - -
t
SYS
External Input Pulse Transition Time
t
REP,tFEP
INT0, INT1, EC0 - - 20 nS
RESET Input Width
t
RST
RESET 8--
t
SYS
t
RCP
t
FCP
XI
INT0, INT1
0.5V
V
DD
-0.5V
0.2V
DD
RESETB
t
REP
t
FEP
0.2V
DD
0.8V
DD
EC0
t
RST
t
EPW
t
EPW
1/f
CP
t
CPW
t
CPW
t
SYS
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
22 MAR. 2000 Ver 1.00
7.7 AC Characteristics
(TA=-20~+85°C, VDD=5V±10%, VSS=0V, f
XIN
=4MHz)
Figure 7-2 Serial I/O Timing Chart
Parameter Symbol Pins
Specifications
Unit
Min. Typ. Max.
Serial Input Clock Pulse
t
SCYC
SCLK
2t
SYS
+200
-8ns
Serial Input Clock Pulse Width
t
SCKW
SCLK
t
SYS
+70
-8ns
Serial Input Clock Pulse Transition
Time
t
FSCK
t
RSCK
SCLK - - 30 ns
SIN Input Pulse Transition Time
t
FSIN
t
RSIN
SIN - - 30 ns
SIN Input Setup Time (External SCLK)
t
SUS
SIN 100 - - ns
SIN Input Setup Time (Internal SCLK)
t
SUS
SIN 200 - ns
SIN Input Hold Time
t
HS
SIN
t
SYS
+70
-ns
Serial Output Clock Cycle Time
t
SCYC
SCLK
4t
SYS
-
16t
SYS
ns
Serial Output Clock Pulse Width
t
SCKW
SCLK
t
SYS
-30
ns
Serial Output Clock Pulse Transition
Time
t
FSCK
t
RSCK
SCLK 30 ns
Serial Output Delay Time
s
OUT
SOUT 100 ns
SCLK
SIN
0.2V
DD
SOUT
0.2V
DD
0.8V
DD
t
SCYC
t
SCKW
t
SCKW
t
RSCK
t
FSCK
0.8V
DD
t
SUS
t
HS
t
DS
0.2V
DD
0.8V
DD
t
RSIN
t
FSIN
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 23
7.8 Typical Characteristics
This graphs and tables provided in this section are for design guidance only and are not tested or guaranteed.
In some graphs or tables the data presented are outside specified operating range (e.g. outside specified
VDD range). This is for information only and devices
are guaranteed to operate properly only within the
specified range.
The data presented in this s ection is a statistical s ummary
of data collected on units from different lots over a period
of time. “Typical” represents the mean of the distribution
while “max” or “min” represents (mean + 3σ) and (mean −
3σ) respectively where σ is standard deviation
I
OH
−
V
OH
-1.6
-1.2
-0.8
-0.4
0
4.6 4.7
4.8 4.9
5.0
(V)
Ta=25°C
VDD=5.0V
(mA)
I
OH
V
OH
I
OH
−
V
OH
-1.6
-1.2
-0.8
-0.4
0
3.6 3.7
3.8 3.9
4.0
(V)
Ta=25°C
VDD=4.0V
(mA)
I
OH
V
OH
I
OH
−
V
OH
-1.6
-1.2
-0.8
-0.4
0
2.6 2.7
2.8 2.9
3.0
(V)
Ta=25°C
VDD=3.0V
(mA)
I
OH
V
OH
I
OL
−
V
OL
16
12
8
4
0
0.6 0.8
1.0 1.2
1.4
(V)
Ta=25°C
VDD=5.0V
(mA)
I
OL
V
OL
I
OL
−
V
OL
16
12
8
4
0
0.6 0.8
1.0 1.2
1.4
(V)
Ta=25°C
VDD=4.0V
(mA)
I
OL
V
OL
I
OL
−
V
OL
16
12
8
4
0
0.6 0.8
1.0 1.2
1.4
(V)
Ta=25°C
VDD=3.0V
(mA)
I
OL
V
OL
I
OH
−
V
OH
-16
-12
-8
-4
0
1.0 2.0
3.0 4.0
5.0
(V)
Ta=25°C
VDD=5.0V
(mA)
I
OH
V
OH
I
OH
−
V
OH
-16
-12
-8
-4
0
1.0 2.0
3.0 4.0
5.0
(V)
Ta=25°C
VDD=4.0V
(mA)
I
OH
V
OH
I
OH
−
V
OH
-16
-12
-8
-4
0
1.0 2.0
3.0 4.0
5.0
(V)
Ta=25°C
VDD=3.0V
(mA)
I
OH
V
OH
R40~R43, R5, R6, R70~R73
BUZO, T0O, PWM1O/T1O
SCLK, SOUT pins
R40~R43, R5, R6, R70~R73
BUZO, T0O, PWM1O/T1O
SCLK, SOUT pins
R0, R1, R2,RA
R30~R35 pins
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
24 MAR. 2000 Ver 1.00
Ta=25°C
I
DD
−
V
DD
4.0
3.0
2.0
1.0
0
(mA)
I
DD
23
45
6
V
DD
(V)
Normal Operation
I
STOP
−
V
DD
2.0
1.5
1.0
0.5
0
(µA)
I
DD
23
45
6
V
DD
(V)
Stop Mode
85°C
25°C
-20°C
f
XIN
= 4.5MHz
2.5MHz
Ta=25°C
I
SBY
−
V
DD
4.0
3.0
2.0
1.0
0
(mA)
I
DD
23
45
6
V
DD
(V)
Stand-by Mode
f
XIN
= 4.5MHz
2.5MHz
V
DD
−
V
IL2
4
3
2
1
0
(V)
V
IL2
23
45
6
V
DD
(V)
V
DD
−
V
IL1
4
3
2
1
0
(V)
V
IL1
23
45
6
V
DD
(V)
Ta=25°C
1
f
XIN
=4.5MHz
Ta=25°C
f
XIN
=4.5MHz
V
DD
−
V
IL3
4
3
2
1
0
(V)
V
IL3
23
45
6
V
DD
(V)
Ta=25°C
1
f
XIN
=4.5MHz
RESET, R55, SIN, SCLK
INT0, INT1, EC0 pinsXIN, SXIN pins
R40~R43, R5
R6, R70~R73 pins
V
DD
−
V
IH2
4
3
2
1
0
(V)
V
IH2
23
45
6
V
DD
(V)
V
DD
−
V
IH1
4
3
2
1
0
(V)
V
IH1
23
45
6
V
DD
(V)
Ta=25°C
1
f
XIN
=4.5MHz
Ta=25°C
f
XIN
=4.5MHz
V
DD
−
V
IH3
4
3
2
1
0
(V)
V
IH3
23
45
6
V
DD
(V)
Ta=25°C
1
f
XIN
=4.5MHz
RESET, R55, SIN, SCLK
INT0, INT1, EC0 pinsXIN, SXIN pins
R40~R43, R5
R6, R70~R73 pins
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 25
8. MEMORY ORGANIZATION
The GMS81C2012 and GMS81C2020 have separate address spaces for Program memory and Data Memory. Pro gram memory can only be read, not written to. It can be up
to 12K/20K bytes of Program memory. Data memory can
be read and written to up to 448 by tes includ ing the s tack
area.
8.1 Registers
This device has six registers that are the Program Counter
(PC), a Accumulator (A), two index registers (X, Y), the
Stack Pointer (SP), and the Program Status Word (PSW).
The Program Counter consists of 16-bit register.
Figure 8-1 Configuration of Registers
Accumulator: The Accumulato r is the 8-bit gen eral purpose register, used for data operation such as transfer, temporary saving, and conditional judgement, etc.
The Accumulator can be used as a 16-bit register with Y
Register as shown below.
Figure 8-2 Configuration of YA 16-bit Register
X, Y Registers: In the addressing mode which uses these
index registers, the register conten ts a re added to the specified address, which becomes the actual address. These
modes are extremely effective for referencing subroutine
tables and memory tables . The index regi sters also h ave increment, decrement, comparison and data transfer functions, and they can be used as simple accumulators.
Stack Pointer: The Stack Pointer is an 8-bit register used
for occurrence interrupts and calling out subroutines. Stack
Pointer identifies the location in the stack to be access
(save or restore).
Generally, SP is automatically updated when a subrout ine
call is executed or an interrupt is accepted. However, if it
is used in excess of the stack area permitted by the data
memory allocating configuration, the user-processed data
may be lost.
The stack can be located at any position within 100
H
to
1FF
H
of the internal data memory. The SP is not initialized
by hardware, requiring to write the initial v alue (the lo cation with which the use of the stack starts) by using the initialization routine. Normally, the initial value of “FF
H
” is
used.
Note: The Stack Pointer must be initialized by software be-
cause its value is undefined after RESET.
Example: To initialize the SP
LDX #0FFH
TXSP ; SP ← FFH
Program Counter: The Program Counter is a 16-bit wide
which consists of two 8-bit registers, PCH and PCL. This
counter indicates the address of the next instruction to be
executed. In reset state, the program counter has reset routine address (PC
H
:0FFH, PCL:0FEH).
Program Status Word: The Program Status Word (PSW)
contains several bits that reflect the current state of the
CPU. The PSW is described in Figure 8-3. It contains the
Negative flag, the Overflow flag, the Break flag the Half
Carry (for BCD operation), the Interrupt enable flag, the
Zero flag, and the Carry flag.
[Carry flag C]
This flag stores any carry or borrow from the ALU of CPU
after an arithmetic operation and is also changed by the
Shift Instruction or Rotate Instruction.
[Zero flag Z]
This flag is set when the result of an arithmetic operation
or data transfer is "0" and is cleared by any other result.
ACCUMULATOR
X REGISTER
Y REGISTER
STACK POINTER
PROGRAM COUNTER
PROGRAM STATUS
WORD
X
A
SP
Y
PCL
PSW
PCH
Two 8-bit Registers can be used as a "YA" 16-bit Register
Y
A
Y A
SP
01
H
Stack Address ( 100H ~ 1FEH )
Bit 15 Bit 087
Hardware fixed
00H~FF
H
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
26 MAR. 2000 Ver 1.00
Figure 8-3 PSW (Program Status Word) Register
[Interrupt disable flag I]
This flag enables/disables all interrupts except interrupt
caused by Reset or software BRK instruction. All interrupts are disabled when cleared to “0”. This flag immediately becomes “0” when an interrupt is served. It is set by
the EI instruction and cleared by the DI instruction.
[Half carry flag H]
After operation, this is set when there is a carry from bit 3
of ALU or there is no borrow from bit 4 of ALU. This bit
can not be set or cleared except CLRV instruction with
Overflow flag (V).
[Break flag B]
This flag is set by software BRK instruction to distinguish
BRK from TCALL instruction with the same vector address.
[Direct page flag G]
This flag assigns RAM page for direct addressing mode. In
the direct addressing mode, addressing area is from zero
page 00
H
to 0FFH when this flag is "0". If it is set to "1",
addressing area is assigned 100
H
to 1FFH. It is set by
SETG instruction and cleared by CLRG.
[Overflow flag V]
This flag is set to “1” when an overflow occurs as the result
of an arithmetic operation involving signs. An overflow
occurs when the result of an addition or subtraction exceeds +127(7F
H
) or -128(80H). The CLRV instruction
clears the overflow flag. There is no set instruction. When
the BIT instruction is executed, bit 6 of memory is copied
to this flag.
[Negative flag N]
This flag is set to match the sign bit (bit 7) status of the re-
sult of a data or arithmetic operation. When the BIT instruction is executed, bit 7 of memory is copied to this flag.
N
NEGATIVE FLAG
V G B H I Z C
MSB LSB
RESET VALUE : 00
H
PSW
OVERFLOW FLAG
BRK FLAG
CARRY FLAG RECEIVES
ZERO FLAG
INTERRUPT ENABLE FLAG
CARRY OUT
HALF CARRY FLAG RECEIVES
CARRY OUT FROM BIT 1 OF
ADDITION OPERLANDS
SELECT DIRECT PAGE
when G=1, page is selected to “page 1”
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 27
Figure 8-4 Stack Operation
At execution of
a CALL/TCALL/PCALL
PCL
PCH
01FB
SP after
execution
SP before
execution
01FC
01FC
01FD
01FE
01FE
Push
down
At acceptance
of interrupt
PCL
PCH
01FB
01FB
01FC
01FD
01FE
01FE
Push
down
PSW
At execution
of RET instruction
PCL
PCH
01FB
01FE
01FC
01FD
01FE
01FC
Pop
up
At execution
of RET instruction
PCL
PCH
01FB
01FE
01FC
01FD
01FE
01FB
Pop
up
PSW
0100H
01FEH
Stack
depth
At execution
of PUSH instruction
A
01FB
01FD
01FC
01FD
01FE
01FE
Push
down
SP after
execution
SP before
execution
PUSH A (X,Y,PSW)
At execution
of POP instruction
A
01FB
01FE
01FC
01FD
01FE
01FD
Pop
up
POP A (X,Y,PSW)
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
28 MAR. 2000 Ver 1.00
8.2 Program Memory
A 16-bit program counter is capable of addressing up to
64K bytes, but this device has 2 0K bytes program memory
space only physically implemented. Accessing a location
above FFFF
H
will cause a wrap-around to 0000H.
Figure 8-5, shows a map of Pr ogram Memory. After reset,
the CPU begins execution from reset vector which is stored
in address FFFE
H
and FFFFH as shown in Figure 8-6.
As shown in Figure 8-5, each area is assigned a fix ed location in Program Memory. Program Memory area contains
the user program.
Figure 8-5 Program Memory Map
Page Call (PCALL) area contains subroutine program to
reduce program byte length by using 2 bytes PCALL instead of 3 bytes CALL instruction. If it is frequently called,
it is more useful to save program byte length .
Table Call (TCALL) c auses the CPU to jump to each
TCALL address, where it commences the execution of the
service routine. The Table Call service area spaces 2-byte
for every TCALL: 0FFC0
H
for TCALL15, 0FFC2H for
TCALL14, etc., as shown in Figure 8-7.
Example: Usage of TCALL
The interrupt causes the CPU to jum p to specific location,
where it commences the execution of the service routine.
The External interrupt 0, for example, is assigned to location 0FFFA
H
. The interrupt service locations spaces 2-byte
interval: 0FFF8
H
and 0FFF9H for External Interru pt 1,
0FFFA
H
and 0FFFBH for External Interrupt 0, etc.
Any area from 0FF00
H
to 0FFFFH, if it is not going to be
used, its service location is available as general purpose
Program Memory.
Figure 8-6 Interrupt Vector Area
Interrupt
Vector Area
D000
H
FEFF
H
FF00
H
FFC0
H
FFDF
H
FFE0
H
FFFF
H
PCALL area
B000
H
TCALL area
GMS81C2012, 12K ROM
GMS81C2020, 20K ROM
LDA #5
TCALL 0FH ;
1BYTE INSTRUCTION
:;
IN STEAD OF 3 BYTES
:;
NORMAL CALL
;
;TABLE CALL ROUTINE
;
FUNC_A: LDA LRG0
RET
;
FUNC_B: LDA LRG1
RET
;
;TABLE CALL ADD. AREA
;
ORG 0FFC0H ;
TCALL ADDRESS AREA
DW FUNC_A
DW FUNC_B
1
2
0FFE0H
E2
Address Vector Area Memory
E4
E6
E8
EA
EC
EE
F0
F2
F4
F6
F8
FA
FC
FE
-
-
Serial Communication Interface
Basic Interval Timer
-
-
-
Timer/Counter 0 Interrupt
-
External Interrupt 0
-
RESET Vector Area
External Interrupt 1
Watchdog Timer Interrupt
"-" means reserved area.
NOTE:
Timer/Counter 1 Interrupt
-
A/D Converter
HYUNDAI MicroElectronics GMS81C2012/GMS81C2020
MAR. 2000 Ver 1.00 29
Figure 8-7 PCALL and TCALL Memory Area
PCALL
→
→ →
→
rel
4F35 PCALL 35H
TCALL
→
→ →
→
n
4A TCALL 4
0FFC0
H
C1
Address P ro gra m Mem o r y
C2
C3
C4
C5
C6
C7
C8
0FF00
H
Address
PCALL Area Memory
0FFFF
H
PCALL Area
(256 Bytes)
* means that the BRK software interrupt is using
same address with TCALL0.
NOTE:
TCALL 15
TCALL 14
TCALL 13
TCALL 12
TCALL 11
TCALL 10
TCALL 9
TCALL 8
TCALL 7
TCALL 6
TCALL 5
TCALL 4
TCALL 3
TCALL 2
TCALL 1
TCALL 0 / BRK *
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
4F
~
~
~
~
NEXT
35
0FF35
H
0FF00
H
0FFFF
H
11111111 11010110
01001010
PC:
FH FH DH 6H
4A
~
~
~
~
25
0FFD6
H
0FF00
H
0FFFF
H
D1
NEXT
0FFD7
H
➊
➋
➌
0D125
H
Reverse
GMS81C2012/GMS81C2020 HYUNDAI MicroElectronics
30 MAR. 2000 Ver 1.00
Example: The usage software example of Vector address for GMS81C2020.
ORG 0FFE0H
DW NOT_USED
DW NOT_USED
DW SIO ; Serial Interface
DW BIT_TIMER ; Basic Interval Timer
DW WD_TIMER ; Watchdog Timer
DW ADC ; ADC
DW NOT_USED
DW NOT_USED
DW NOT_USED
DW NOT_USED
DW TIMER1 ; Timer-1
DW TIMER0 ; Timer-0
DW INT1 ; Int.1
DW INT0 ; Int.0
DW NOT_USED ; DW RESET ; Reset
ORG 0B000H ; GMS81C2020(20K)ROM Start address
; ORG 0D000H ; GMS81C2012(12K)ROM Start address
;*******************************************
; MAIN PROGRAM *
;*******************************************
;
RESET: DI ;Disable All Interrupts
CLRG
LDX #0
RAM_CLR: LDA #0 ;RAM Clear(!0000H->!00BFH)
STA {X}+
CMPX #0C0H
BNE RAM_CLR
;
LDX #0FFH ;Stack Pointer Initialize
TXSP
;
LDM R0, #0 ;Normal Port 0
LDM R0IO,#82H ;Normal Port Direction
:
:
:
LDM TDR0,#125 ;8us x 125 = 1mS
LDM TM0,#0FH ;Start Timer0, 8us at 4MHz
LDM IRQH,#0
LDM IRQL,#0
LDM IENH,#0E0H ;Enable Timer0, INT0, INT1
LDM IENL,#0
LDM IEDS,#05H ;Select falling edge detect on INT pin
LDM R0FUNC,#03H ;Set external interrupt pin(INT0, INT1)
EI ;Enable master interrupt
:
:
:
:
:
NOT_USED:NOP
RETI
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