Harris Semiconductor SP720AB, SP720ABT, SP720AP Datasheet

SP720

[ /Title
(SP720
)
/Sub­ject
(Elec­tronic
Protec­tion
Array
for
ESD
and
Over­Volt­age
Protec­tion)
/Autho
r ()
/Key­words
(TVS,
Tran­sient
Sup­pres­sion,
Protec­tion,
ESD,
IEC,
EMC,
Elec­tro­magnet
ic
Com-

Data Sheet January 1998

Electronic Protection Array for ESD and
Over-Voltage Protection

The SP720 is an array of SCR/Diode bipolar structures for
ESD and over-voltage protection to sensitive input circuits.
The SP720 has 2 protection SCR/Diode device structures
per input. A total of 14 available inputs can be used to
protect up to 14 external signal or bus lines. Over-voltage
protection is from the IN (pins 1-7 and 9-15) to V+ or V-. The
SCR structures are designed for fast triggering at a
threshold of one +V
a -V

diode threshold below V- (Pin 8). From an IN input, a

BE

clamp to V+ is activated if a transient pulse causes the input
to be increased to a voltage level greater than one V
above V+. A similar clamp to V- is activated if a negative
pulse, one V
Standard ESD Human Body Model (HBM) Capability is:

HBM STANDARD MODE R C ESD (V)

IEC 1000-4-2 Air 330 Ω 150pF >15kV

MIL-STD-3015.7 Direct, In-circuit 1.5k Ω 100pF >15kV

Refer to Figure 1 and Table 1 for further detail. Refer to
Application Note AN9304 and AN9612 for additional
information.

BE

diode threshold above V+ (Pin 16) or

BE

less than V-, is applied to an IN input.

Direct 330 Ω 150pF >4kV

Direct, Dual Pins 330 Ω 150pF >8kV

BE

Ordering Information

TEMP. RANGE

PART NO.

SP720AP -40 to 105 16 Ld PDIP E16.3

SP720AB -40 to 105 16 Ld SOIC M16.15

SP720ABT -40 to 105 16 Ld SOIC

o

(

C) PACKAGE

Tape and Reel

PKG.

NO.

M16.15

Pinout

SP720 (PDIP, SOIC)

TOP VIEW

16

1

IN

2

IN

3

IN

4

IN

5

IN

6

IN

7

IN

8

V-

V+

15

IN

14

IN

13

IN

12

IN

11

IN

10

IN

9

IN

File Number 2791.10

Features

• ESD Interface Capability for HBM Standards

- MIL STD 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . .15kV

- IEC 1000-4-2, Direct Discharge,

Single Input. . . . . . . . . . . . . . . . . . . . . . . . 4kV (Level 2)

Two Inputs in Parallel . . . . . . . . . . . . . . . . 8kV (Level 4)

- IEC 1000-4-2, Air Discharge. . . . . . . . . . 15kV (Level 4)

• High Peak Current Capability

- IEC 1000-4-5 (8/20 µ s) . . . . . . . . . . . . . . . . . . . . . . ± 3A

- Single Pulse, 100 µ s Pulse Width . . . . . . . . . . . . . . ± 2A

- Single Pulse, 4 µ s Pulse Width . . . . . . . . . . . . . . . . ± 5A

• Designed to Provide Over-Voltage Protection

- Single-Ended Voltage Range to . . . . . . . . . . . . . . .+30V

- Differential Voltage Range to . . . . . . . . . . . . . . . . ± 15V

• Fast Switching . . . . . . . . . . . . . . . . . . . . . . . 2ns Risetime

• Low Input Leakages . . . . . . . . . . . . . . . 1nA at 25

• Low Input Capacitance. . . . . . . . . . . . . . . . . . . . 3pF (Typ)

• An Array of 14 SCR/Diode Pairs

• Operating Temperature Range . . . . . . . . . -40

o

C (Typ)

o

C to 105

o

Applications

• Microprocessor/Logic Input Protection

• Data Bus Protection

• Analog Device Input Protection

• Voltage Clamp

Functional Block Diagram

V+

16

3 - 7

IN

1

IN

V-

8

2

9 - 15

IN

C

6-3

NOTE: The design of the SP720 SCR/Diode ESD Protection Arrays is covered by Littelfuse patent

1-800-999-9445 or 1-847-824-1188

Copyright

|

Littelfuse, Inc. 1998

©

4567500.

Ω

±

SP720

Absolute Maximum Ratings Thermal Information

Continuous Supply Voltage, (V+) - (V-) . . . . . . . . . . . . . . . . . . +35V

Forward Peak Current, I

(Refer to Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 2A, 100 µ s

IN

to V

CC

, I

to GND

IN

ESD Ratings and Capability (Figure 1, Table 1)
Load Dump and Reverse Battery (Note 2)

Thermal Resistance (Typical, Note 1) . . . . . . . . . . . . .

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

Maximum Storage Temperature Range. . . . . . . . . . -65

Maximum Junction Temperature (Plastic Package) . . . . . . . . .150

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300

(SOIC Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θ

is measured with the component mounted on an evaluation PC board in free air.

JA

(

θ

JA

o

C to 150

o

C/W)

o
o
o

C
C
C

Electrical Specifications

T

= -40

A

o

C to 105

o

C; V

= 0.5V

IN

, Unless Otherwise Specified

CC

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Operating Voltage Range,
V

SUPPLY

= [(V+) - (V-)]

Forward Voltage Drop:

IN to V­IN to V+

Input Leakage Current I

Quiescent Supply Current I

V

SUPPLY

V

FWDL

V

FWDH

IN

QUIESCENT

I

= 1A (Peak Pulse)

IN

- 2 to 30 - V

-

-

2
2

-

-

-20 5 20 nA

- 50 200 nA

V
V

Equivalent SCR ON Threshold Note 3 - 1.1 - V

Equivalent SCR ON Resistance V

Input Capacitance C

Input Switching Speed t

IN

ON

FWD

/I

; Note 3 - 1 -

FWD

-3-pF

-2-ns

NOTES:

2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the
V+ and V- pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should
be connected in series between the external supply and the SP720 supply pins to limit reverse battery current to within the rated maximum
limits. Bypass capacitors of typically 0.01 µ F or larger from the V+ and V- pins to ground are recommended.

3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance.” These characteristics are given here
for thumb-rule information to determine peak current and dissipation under EOS conditions.

ESD Capability

ESD capability is dependent on the application and defined
test standard. The evaluation results for various test
standards and methods based on Figure 1 are shown in
Table 1.

For the “Modified” MIL-STD-3015.7 condition that is defined
as an “in-circuit” method of ESD testing, the V+ and V- pins
have a return path to ground and the SP720 ESD capability
is typically greater than 15kV from 100pF through 1.5k Ω . By
strict definition of MIL-STD-3015.7 using “pin-to-pin” device
testing, the ESD voltage capability is greater than 6kV. The
MIL-STD-3015.7 results were determined from AT&T ESD
Test Lab measurements.

The HBM capability to the IEC 1000-4-2 standard is greater
than 15kV for air discharge (Level 4) and greater than 4kV
for direct discharge (Level 2). Dual pin capability (2 adjacent
pins in parallel) is well in excess of 8kV (Level 4).

For ESD testing of the SP720 to EIAJ IC121 Machine Model
(MM) standard, the results are typically better than 1kV from

STANDARD TYPE/MODE R

MIL STD 3015.7 Modified HBM 1.5k Ω 100pF 15kV

IEC 1000-4-2 HBM, Air Discharge 330 Ω 150pF 15kV

EIAJ IC121 Machine Model 0k Ω 200pF 1kV

TABLE 1. ESD TEST CONDITIONS

C

D

D

Standard HBM 1.5k Ω 100pF 6kV

HBM, Direct Discharge 330 Ω 150pF 4kV

HBM, Direct Discharge,

330 Ω 150pF 8kV

Two Parallel Input Pins

R

H.V.

SUPPLY

°±V

D

R

1

CHARGE
SWITCH

IEC 1000-4-2: R150 to 100MΩ

MIL STD 3015.7: R11 to 10MΩ

C

D

D

DISCHARGE

SWITCH

IN

DUT

FIGURE 1. ELECTROSTATIC DISCHARGE TEST

200pF with no series resistance.

V

D

6-4