GSI GS88037AT-250I, GS88037AT-250, GS88037AT-225I, GS88037AT-225, GS88037AT-200I Datasheet

1/5

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision: 5/17/02

GS88019/33/37AT

Datasheet Errata

Base datasheet:

GS88019/33/37AT, Rev.1.00, 3/2002

Product(s) covered in this supplement:

GS88019/33/37AT-250/225/200/166/150/133

Product specification(s) addressed by this supplement:

Pin 14

Note: The specifications cited in the base datasheet for the products addressed by this errata remain in force except where superseded by the information in this errata.

2/5

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision: 5/17/02

GS88019/33/37AT

Datasheet Errata

GS88019A 100-Pin TQFP Pinout

80

79 78

77 76

75

74 73

72

71 70

69 68

67

66 65

64

63 62

61 60

59

58 57

56

55 54

53 52

51

1

2

3 4

5

6

7

8 9

10

11

12 13

14

15

16 17

18

19

20

21 22

23

24

25 26

27

28

29

30

V

DDQ

V

SS

DQB1 DQ

B2

V

SS

V

DDQ

DQB3 DQ

B4

V

DD

NC

V

SS

DQ

B5

DQB6

V

DDQ

V

SS

DQB7 DQB8 DQ

B9

V

SS

V

DDQ

V

DDQ

V

SS

DQ

A8

DQ

A7

V

SS

V

DDQ

DQA6 DQ

A5

V

SS

NC V

DD

ZZ DQ

A4

DQA3 V

DDQ

V

SS

DQ

A2

DQA1

V

SS

V

DDQ

LBO

A5A4A3A2A1A

0

NC

V

SS

V

DD

NC

A

17

A

10

A

11

A12 A13 A14 A

16

A

6

A

7

E

1

E

2

NC

B

A

E

3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADV

A

8

A

9

A

15

512K x 18

Top View

DQ

A9

A18

NC

10099989796959493929190898887868584838281

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

V

DDQ

/DNU

3/5

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision: 5/17/02

GS88019/33/37AT

Datasheet Errata

GS88033A 100-Pin TQFP Pinout

80

79 78

77 76

75

74 73

72

71 70

69 68

67

66 65

64

63 62

61 60

59

58 57

56

55 54

53 52

51

1

2

3 4

5

6

7

8 9

10

11

12 13

14

15

16 17

18

19

20

21 22

23

24

25 26

27

28

29

30

V

DDQ

V

SS

DQC4 DQ

C3

V

SS

V

DDQ

DQC2 DQ

C1

V

DD

NC

V

SS

DQ

D1

DQD2

V

DDQ

V

SS

DQD3 DQD4 DQ

D5

V

SS

V

DDQ

V

DDQ

V

SS

DQ

B4

DQ

B3

V

SS

V

DDQ

DQB2 DQ

B1

V

SS

NC V

DD

ZZ DQ

A1

DQA2 V

DDQ

V

SS

DQ

A3

DQA4

V

SS

V

DDQ

LBO

A5A4A3A2A1A

0

NC

V

SS

V

DD

NC

A

17 A10

A

11

A12 A13 A14 A

16

A

6

A

7

E

1

E

2

B

D

B

C

B

A

E

3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADV

A

8

A

9

A

15

256K x 32

Top View

DQ

B5

NC

DQ

B7

DQ

B8

DQB6

DQA6

DQA5

DQ

A8

DQ

A7

NC

DQ

C7

DQC8

DQC6

DQ

D6

DQD8

DQD7

NC

DQC5

NC

10099989796959493929190898887868584838281

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

V

DDQ

/DNU

4/5

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision: 5/17/02

GS88019/33/37AT

Datasheet Errata

GS88037A 100-Pin TQFP Pinout

80

79 78

77 76

75

74 73

72

71 70

69 68

67

66 65

64

63 62

61 60

59

58 57

56

55 54

53 52

51

1

2

3 4

5

6

7

8 9

10

11

12 13

14

15

16 17

18

19

20

21 22

23

24

25 26

27

28

29

30

V

DDQ

V

SS

DQC4 DQ

C3

V

SS

V

DDQ

DQC2 DQ

C1

V

DD

NC

V

SS

DQ

D1

DQD2

V

DDQ

V

SS

DQD3 DQD4 DQ

D5

V

SS

V

DDQ

V

DDQ

V

SS

DQ

B4

DQ

B3

V

SS

V

DDQ

DQB2 DQ

B1

V

SS

NC V

DD

ZZ DQ

A1

DQA2 V

DDQ

V

SS

DQ

A3

DQA4

V

SS

V

DDQ

LBO

A5A4A3A2A1A

0

NC

V

SS

V

DD

NC

A

17

A

10

A

11

A12 A13 A14 A

16

A

6

A

7

E

1

E

2

B

D

B

C

B

A

E

3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADV

A

8

A

9

A

15

256K x 36

Top View

DQ

B5

DQB9

DQ

B7

DQ

B8

DQB6

DQA6

DQA5

DQ

A8

DQ

A7

DQA9

DQ

C7

DQC8

DQC6

DQ

D6

DQD8

DQD7

DQD9

DQ

C5

DQ

C9

10099989796959493929190898887868584838281

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

V

DDQ

/DNU

5/5

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision: 5/17/02

GS88019/33/37AT

Datasheet Errata

TQFP Pin Description

Pin Location Symbol Type Description

37, 36 A0, A1 I Address field LSBs and Address Counter preset Inputs

35, 34, 33, 32, 100, 99, 82, 81, 44, 45, 46,

47, 48, 49, 50, 43

A

2–A17

I Address Inputs

80 A

18

I Address Inputs (x18 versions)

63, 62, 59, 58, 57, 56, 53, 52 68, 69, 72, 73, 74, 75, 78, 79

13, 12, 9, 8, 7, 6, 3, 2

18, 19, 22, 23, 24, 25, 28, 29

DQ

A1–DQA8

DQB1–DQB8 DQC1–DQC8 DQD1–DQD8

I/O Data Input and Output pins (x32, x36 Version)

51, 80, 1, 30

DQ

A9

, DQB9,

DQ

C9

, DQ

D9

I/O Data Input and Output pins (x36 Version)

14, 16, 38, 39, 42, 66 NC — No Connect (x32, x36 Version)

51, 80, 1, 30 NC — No Connect (x32 Version)

58, 59, 62, 63, 68, 69, 72, 73, 74

8, 9, 12, 13, 18, 19, 22, 23, 24

DQ

A1

–DQ

A9

DQB1–DQ

B9

I/O Data Input and Output pins (x18 Version)

51, 52, 53, 56, 57

75, 78, 79,

1, 2, 3, 6, 7,

25, 28, 29, 30, 95, 96, 42

NC — No Connect (x18 Version)

87 BW

IByte Write—Writes all enabled bytes; active low

93, 94 BA

, B

B

I Byte Write Enable for DQA, DQB Data I/Os; active low

95, 96 B

C

, B

D

I

Byte Write Enable for DQ

C

, DQD Data I/Os; active low

(x32, x36 Version)

89 CK I Clock Input Signal; active high

88 GW

I Global Write Enable—Writes all bytes; active low

98, 92 E

1, E3 I Chip Enable; active low

97 E

2 I Chip Enable; active high

86 G

I Output Enable; active low

83 ADV

I Burst address counter advance enable; active low

84, 85 ADSP

, ADSC I Address Strobe (Processor, Cache Controller); active low

64 ZZ I Sleep Mode control; active high

31 LBO

I Linear Burst Order mode; active low

15, 41, 65, 91

V

DD

I Core power supply

5, 10, 17, 21, 26, 40, 55, 60, 67, 71, 76, 90

V

SS

I I/O and Core Ground

4, 11, 20, 27, 54, 61, 70, 77

V

DDQ

I Output driver power supply

14

V

DDQ

/DNU

—

V

DDQ

or V

DD

(must be tied high)

or

Do Not Use (must be left floating)

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Preliminary

GS88019/33/37AT-250/225/200/166/150/133

512K x 18, 256K x 32, 256K x 36

9Mb Sync Burst SRAMs

250 MHz–133 MHz

2.5 V or 3.3 V V

DD

2.5 V or 3.3 V I/O

100-Pin TQFP Commercial Temp Industrial Temp

Features

• Single Cycle Deselect (SCD) operation

• 2.5 V or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• LBO pin for Linear or Interleaved Burst mode

• Internal input resistors on mode pins allow floating mode pins

• Default to Interleaved Pipeline mode

• Byte Write (BW) and/or Global Write (GW) operation

• Internal self-timed write cycle

• Automatic power-down for portable applications

• JEDEC-standard 100-lead TQFP package

Functional Description

Applications

The GS88019/33/37AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.

Controls

Addresses, data I/Os, chip enables (E1, E2, E3), address burst control inputs (ADSP, ADSC, ADV), and write control inputs (Bx, BW, GW) are synchronous and are controlled by a positive-edge-triggered clock input (CK). Output enable (G) and power down control (ZZ) are asynchronous inputs. Burst cycles can be initiated with either ADSP or ADSC inputs. In Burst mode, subsequent burst addresses are generated internally and are controlled by ADV. The burst address counter may be configured to count in either linear or interleave order with the Linear Burst Order (LBO) input. The Burst function need not be used. New addresses can be loaded on every cycle with no degradation of chip performance.

SCD Pipelined Reads

The GS88019/33/37AT is a SCD (Single Cycle Deselect) pipelined synchronous SRAM. DCD (Dual Cycle Deselect) versions are also available. SCD SRAMs pipeline deselect commands one stage less than read commands. SCD RAMs begin turning off their outputs immediately after the deselect command has been captured in the input registers.

Byte Write and Global Write

Byte write operation is performed by using Byte Write enable (BW) input combined with one or more individual byte write signals (Bx). In addition, Global Write (GW) is available for writing all bytes at one time, regardless of the Byte Write control inputs.

Sleep Mode

Low power (Sleep mode) is attained through the assertion (High) of the ZZ signal, or by stopping the clock (CK). Memory data is retained during Sleep mode.

Core and Interface Voltages

The GS88019/33/37AT operates on a 2.5 V or 3.3 V power supply. All input are 3.3 V and 2.5 V compatible. Separate output power (V

DDQ

) pins are used to decouple output noise

from the internal circuits and are 3.3 V and 2.5 V compatible.

-250 -225 -200 -166 -150 -133 Unit

Pipeline

3-1-1-1

t

KQ

tCycle

2.0

4.0

2.2

4.4

2.5

5.0

2.9

6.0

3.3

6.7

3.5

7.5nsns

3.3 V

Curr (x18)

Curr (x32/x36)

280 330

255 300

230 270

200 230

185 215

165 190mAmA

2.5 V

Curr (x18)

Curr (x32/x36)

275 320

250 295

230 265

195 225

180 210

165 185mAmA

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Preliminary

GS88019/33/37AT-250/225/200/166/150/133

GS88019A 100-Pin TQFP Pinout

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

V

DDQ

V

SS

DQB1 DQB2

V

SS

V

DDQ

DQB3 DQB4

V

DD

NC

V

SS

DQB5 DQB6

V

DDQ

V

SS

DQB7 DQB8 DQB9

V

SS

V

DDQ

V

DDQ

V

SS

DQA8 DQA7 V

SS

V

DDQ

DQA6 DQA5 V

SS

NC V

DD

ZZ DQA4 DQA3 V

DDQ

V

SS

DQA2 DQA1

V

SS

V

DDQ

LBO

A5

A4

A3

A2

A1

A0

NC

V

SS

V

DD

NC

A17

A10

A11

A12

A13

A14

A16

A6

A7

E1

E2

NC

BB

BA

E3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADVA8A9

A15

512K x 18

Top View

DQA9

A18

NC

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

NC

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Preliminary

GS88019/33/37AT-250/225/200/166/150/133

GS88033A 100-Pin TQFP Pinout

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

V

DDQ

V

SS

DQC4 DQC3

V

SS

V

DDQ

DQC2 DQC1

V

DD

NC

V

SS

DQD1 DQD2

V

DDQ

V

SS

DQD3 DQD4 DQD5

V

SS

V

DDQ

V

DDQ

V

SS

DQB4 DQB3 V

SS

V

DDQ

DQB2 DQB1 V

SS

NC V

DD

ZZ DQA1 DQA2 V

DDQ

V

SS

DQA3 DQA4

V

SS

V

DDQ

LBO

A5

A4

A3

A2

A1

A0

NC

V

SS

V

DD

NC

A17

A10

A11

A12

A13

A14

A16

A6

A7

E1

E2

BD

BC

BB

BA

E3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADVA8A9

A15

256K x 32

Top View

DQB5

NC

DQB7

DQB8

DQB6

DQA6

DQA5

DQA8

DQA7

NC

DQC7

DQC8

DQC6

DQD6

DQD8

DQD7

NC

DQC5

NC

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

NC

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Preliminary

GS88019/33/37AT-250/225/200/166/150/133

GS88037A 100-Pin TQFP Pinout

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

V

DDQ

V

SS

DQC4 DQC3

V

SS

V

DDQ

DQC2 DQC1

V

DD

NC

V

SS

DQD1 DQD2

V

DDQ

V

SS

DQD3 DQD4 DQD5

V

SS

V

DDQ

V

DDQ

V

SS

DQB4 DQB3 V

SS

V

DDQ

DQB2 DQB1 V

SS

NC V

DD

ZZ DQA1 DQA2 V

DDQ

V

SS

DQA3 DQA4

V

SS

V

DDQ

LBO

A5

A4

A3

A2

A1

A0

NC

V

SS

V

DD

NC

A17

A10

A11

A12

A13

A14

A16

A6

A7

E1

E2

BD

BC

BB

BA

E3

CK

GW

BW

V

DD

V

SS

G

ADSC

ADSP

ADVA8A9

A15

256K x 36

Top View

DQB5

DQB9

DQB7

DQB8

DQB6

DQA6

DQA5

DQA8

DQA7

DQA9

DQC7

DQC8

DQC6

DQD6

DQD8

DQD7

DQD9

DQC5

DQC9

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

NC