GSI GS74108TP-15, GS74108TP-12I, GS74108TP-12, GS74108TP-10I, GS74108TP-10 Datasheet

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GS74108TP/J
512K x 8
Commercial Temp Industrial Temp
4Mb Asynchronous SRAM
Features
• Fast access time: 8, 10, 12, 15ns
• CMOS low power operation: 150/125/110/90 mA at min. cycle time.
• Single 3.3V ± 0.3V power supply
• All inputs and outputs are TTL compatible
• Fully static operation
• Industrial Temperature Option: -40° to 85°C
• Package line up J: 400mil, 36 pin SOJ package TP: 400mil, 44 pin TSOP Type II package
Description
The GS74108 is a high speed CMOS static RAM organized as 524,288-words by 8-bits. Static design eliminates the need for exter­nal clocks or timing strobes. Operating on a single 3.3V power supply and all inputs and outputs are TTL compatible. The GS74108 is avail­able in 400 mil SOJ and 400 mil TSOP Type-II packages.
Pin Descriptions
Symbol Description
A0 to A18
DQ1 to DQ8 Data input/output
CE Chip enable input
WE Write enable input
OE Output enable input
VDD +3.3V power supply
VSS Ground
NC No connect
Address input
SOJ 512K x 8 Pin Configuration
A4
A3
A2
A1
A0
CE
DQ1
DQ2
VDD
VSS
DQ3
DQ4
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36 pin
400mil SOJ
8, 10, 12, 15ns
3.3V VDD
Center VDD & VSS
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19 NC
NC
A5
A6
A7
A8
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
A10
A11
A12
A18
Rev: 1.06 7/2000 1/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
TSOP-II 512K x 8 Pin Configuration
GS74108TP/J
NC NC
A4 A3 A2
A1 A0 CE DQ1 DQ2
VDD
VSS DQ3 DQ4
WE
A17 A16
A15 A14
A13
NC NC
1 2 3 4
5 6
7
8 9
10 11
12
13 14
15
16 17
18
19 20
21
22
44 pin
400mil TSOP II
44 43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC NC
NC A5
A6 A7
A8 OE DQ8
DQ7
VSS VDD DQ6 DQ5
A9 A10 A11
A12 A18
NC
NC NC
Block Diagram
A0
A18
CE
WE
OE
Address
Input
Buffer
Control
Row
Decoder
Memory Array
Column Decoder
I/O Buffer
DQ1
DQ8
Rev: 1.06 7/2000 2/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Truth Table
CE OE WE DQ1 to DQ8 VDD Current
H X X Not Selected ISB1, ISB2
L L H Read
L H H High Z
Note: X: “H” or “L”
Absolute Maximum Ratings
Parameter Symbol Rating Unit
Supply Voltage VDD -0.5 to +4.6 V
GS74108TP/J
IDDL X L Write
Input Voltage VIN
Output Voltage VOUT
Allowable power dissipation PD 0.7 W
Storage temperature TSTG -55 to 150
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
-0.5 to VDD+0.5
(4.6V max.)
-0.5 to VDD+0.5
(4.6V max.)
V
V
o
C
Rev: 1.06 7/2000 3/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Recommended Operating Conditions
Parameter Symbol Min Typ Max Unit
Supply Voltage for -10/12/15 VDD 3.0 3.3 3.6 V
Supply Voltage for -8 VDD 3.135 3.3 3.6 V
Input High Voltage VIH 2.0 - VDD+0.3 V
Input Low Voltage VIL -0.3 - 0.8 V
GS74108TP/J
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
Note:
1. Input overshoot voltage should be less than VDD+2V and not exceed 20ns.
2. Input undershoot voltage should be greater than -2V and not exceed 20ns.
TAc 0 - 70
TAI -40 - 85
Capacitance
Parameter Symbol Test Condition Max Unit
Input Capacitance CIN VIN=0V 5 pF
Output Capacitance COUT VOUT=0V 7 pF
Notes:
1. Tested at TA=25°C, f=1MHz
2. These parameters are sampled and are not 100% tested
DC I/O Pin Characteristics
Parameter Symbol Test Conditions Min Max
o
C
o
C
Input Leakage
Current
Output Leakage
Current
Output High Voltage VOH IOH = - 4mA 2.4
Output Low Voltage VOL ILO = + 4mA 0.4V
Rev: 1.06 7/2000 4/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
IIL VIN = 0 to VDD -1uA 1uA
ILO
Output High Z
VOUT = 0 to VDD
-1uA 1uA
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