GS70328SJ/TS
SOJ, TSOP
32K x 8
Commercial Temp
Industrial Temp
256Kb Asynchronous SRAM
Features
• Fast access time: 7, 8, 10, 12, 15 ns
• 75/65/50/50/50 mA at max cycle rate
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
SJ: 300 mil, 28-pin SOJ package
TS: 8 mm x 13.4 mm, 28-pin TSOP Type I package
Description
The GS70328 is a high speed CMOS static RAM organized as
32,763 words by 8 bits. Static design eliminates the need for
external clocks or timing strobes. The GS70328 operates on a
single 3.3 V power supply, and all inputs and outputs are TTLcompatible. The GS70328 is available in 300 mil, 28-pin SOJ
and 8 x 13.4 mm
2
, 28-pin TSOP Type-I packages.
1
2
3
4
5
6
28-pin
7
300 mil
8
9
10
11
12
13
14
SOJ
DQ
DQ
DQ
V
14
A
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
1
2
3
SS
Pin Configuration
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
WE
A
A
A
A
OE
A
CE
DQ
DQ
DQ
DQ
DQ
DD
13
8
9
11
10
8
7
6
5
4
Pin Descriptions
Symbol Description
A0–A
DQ
Top view
OE
A
11
9
A
A
8
A
13
WE
V
DD
A
14
A
12
A
7
A
6
A
5
A
4
A
3
7, 8, 10, 12, 15 ns
Corner VDD and V
14
1–DQ8 Data input/output
CE
WE
OE
V
DD
V
SS
NC No connect
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28- pin
8 x 13.4 TSOP I
Address input
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
28
27
26
25
24
23
22
21
20
19
18
17
16
15
3.3 V V
10
A
CE
8
DQ
DQ
7
DQ
6
DQ
5
DQ
4
V
SS
DQ
3
DQ
2
DQ
1
A
0
A
1
A
2
DD
SS
Rev: 1.10 10/2002 1/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Block Diagram
Truth Table
A
A
CE
WE
OE
GS70328SJ/TS
0
Address
Input
Buffer
14
Control
Row
Decoder
Memory Array
Column
Decoder
I/O Buffer
DQ
1
DQ
8
CE OE WE DQ1 to DQ
8
H X X Not Selected ISB1, ISB
L L H Read
LX L Write
LH H High Z
Note: X: “H” or “L”
Absolute Maximum Ratings
Parameter Symbol Rating Unit
Supply Voltage V
Input Voltage V
Output Voltage V
Allowable power dissipation PD 0.7 W
Storage temperature T
DD
IN
OUT
STG –55 to 150
–0.5 to +4.6 V
–0.5 to V
DD
(≤ 4.6 V max.)
–0.5 to VDD + 0.5
(≤ 4.6 V max.)
+ 0.5
V
V
o
C
VDD Current
2
DD
I
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.10 10/2002 2/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Recommended Operating Conditions
Parameter Symbol Minimum Typical Maximum Unit
GS70328SJ/TS
Supply Voltage for -7/8/10/12
Input High Voltage V
Input Low Voltage V
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
V
DD
IH
IL
T
Ac
I
T
A
3.0 3.3 3.6 V
2.0 —
–0.3 — 0.8 V
0—70
–40 — 85
Notes:
1. Input overshoot voltage should be less than V
+2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter Symbol Test Condition Maximum Unit
C
C
OUT
IN
Input Capacitance
Output Capacitance
Notes:
1. Tested at T
A = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
V
V
IN
OUT
= 0 V
= 0 V
V
DD
+ 0.3
V
o
C
o
C
5pF
7pF
DC I/O Pin Characteristics
Parameter Symbol Test Conditions Min Max
V
Input Leakage Current I
Output Leakage Current I
Output High Voltage V
Output Low Voltage V
IL
LO
OH
OL ILO = +4 mA — 0.4 V
Rev: 1.10 10/2002 3/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
= 0 to V
IN
DD
Output High Z
V
= 0 to V
OUT
OH
I
DD
= –4 mA 2.4 V —
–1uA 1uA
–1uA 1uA
Power Supply Currents
Parameter Symbol Test Conditions
≤ VIL
CE
Operating
Supply
Current
Standby
Current
Standby
Current
IDD
ISB1
ISB2
All other inputs
≥ VIH or ≤ VIL
Min. cycle time
IOUT = 0 mA
≥ VIH
CE
All other inputs
≥ VIH or ≤VIL
Min. cycle time
CE
≥ V
– 0.2 V
DD
All other inputs
– 0.2 V or
≥ V
DD
≤ 0.2 V
GS70328SJ/TS
0 to 70°C -40 to 85°C
7 ns 8 ns 10 ns 12 ns 15 ns 7 ns 8 ns 10 ns 12 ns 15 ns
75 mA 65 mA 50 mA 50 mA 50 mA 80 mA 70 mA 55 mA 55 mA 55 mA
35 mA 30 mA 25 mA 25 mA 25 mA 40 mA 35 mA 30 mA 30 mA 30 mA
1 mA 2 mA
AC Test Conditions
Parameter Conditions
Input high level VIH = 2.4 V
Input low level V
Input rise time tr = 1 V/ns
Input fall time tf = 1 V/ns
Input reference level 1.4 V
Output reference level 1.4 V
Output load Fig. 1& 2
Notes:
1. Include scope and jig capacitance
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for t
LZ, tHZ, tOLZ and tOHZ
IL
= 0.4 V
DQ
Output Load 1
VT = 1.4 V
Output Load 2
DQ
5pF
1
50Ω
3.3 V
589Ω
434Ω
30pF
1
Rev: 1.10 10/2002 4/12 © 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.