GOWIN GW1N-1, GW1N-2, GW1N-1S, GW1N-2B, GW1N-4 User Manual

Gowin UART Master and Slave IP

User Guide

IPUG511-1.4E, 09/29/2019

Copyright©2019 Guangdong Gowin Semiconductor Corporation. All Rights Reserved.

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Revision

Date

Revision

Description

12/20/2018

1.0E

Initial version published.

03/28/2019

1.1E

Supported products updated.

05/08/2019

1.2E

Changed AXI interface to SRAM interface.

07/22/2019

1.3E

Interface configuration added.

09/29/2019

1.4E

UART Master released as an IP; UART Slave released as
an open source reference design.

Contents

IPUG511-1.4E

i

Contents

Contents ................................................................................................................ i

List of Figures ..................................................................................................... iii

List of Tables ................................ ................................ ................................ ...... iv

1 About This Manual ........................................................................................... 1

1.1 Manual Content .................................................................................................................. 1

1.2 Applicable Products ............................................................................................................ 1

1.3 Related Documents ............................................................................................................ 1

1.4 Terms and Abbreviations .................................................................................................... 1

1.5 Technical Support and Feedback ....................................................................................... 2

2 Function Introduction ...................................................................................... 3

2.1 Overview ............................................................................................................................. 3

2.2 Features .............................................................................................................................. 3

2.2.1 Gowin UART Master IP ................................................................................................... 3

2.2.2 Gowin UART Slave IP ..................................................................................................... 3

3 Signal Definition .............................................................................................. 4

3.1 Gowin UART Master IP ...................................................................................................... 4

3.1.1 SRAM Interface Signal .................................................................................................... 4

3.1.2 UART Side Signal ............................................................................................................ 4

3.2 Gowin UART Slave IP ........................................................................................................ 5

4 Working Principle ............................................................................................ 6

4.1 System Diagram ................................................................................................................. 6

4.2 Gowin UART Master IP Register ........................................................................................ 6

4.2.1 Receive Buffer Register (RBR) ........................................................................................ 7

4.2.2 Transmit Holding Register (THR) .................................................................................... 7

4.2.3 Interrupt Enable Register (IER) ....................................................................................... 7

4.2.4 Interrupt Identification Register (IIR)................................................................................ 8

4.2.5 Line Control Register (LCR) ............................................................................................ 9

4.2.6 Modem Control Register (MCR) ...................................................................................... 9

4.2.7 Line Status Register (LSR) ............................................................................................ 10

4.2.8 Modem Status Register (MSR) ...................................................................................... 11

4.3 Gowin UART Slave Implementation ................................................................................. 12

5 Interface Configuration ................................................................................. 13

5.1 UART MASTER IP Core Interface .................................................................................... 13

5.2 UART SLAVE IP Core Interface ....................................................................................... 14

Contents

IPUG511-1.4E

ii

6 Reference Design .......................................................................................... 15

List of Figures

IPUG511-1.4E

iii

List of Figures

Figure 4-1 System Diagram ............................................................................................................... 6

Figure 4-2 Receive Buffer Register .................................................................................................... 7

Figure 4-3 Transmit Holding Register ................................................................................................ 7

Figure 4-4 Interrupt Enable Register.................................................................................................. 8

Figure 4-5 Interrupt Identification Register ........................................................................................ 8

Figure 4-6 Line Control Register ........................................................................................................ 9

Figure 4-7 Modem Control Register................................................................................................... 9

Figure 4-8 Line Status Register ......................................................................................................... 10

Figure 4-9 Modem Status Register .................................................................................................... 11

Figure 4-10 UART Slave Implementation Block Diagram .................................................................. 12

Figure 5-1 UART MASTER Configuration Interface .......................................................................... 13

Figure 5-2 UART SLAVE Configuration Interface .............................................................................. 14

List of Tables

IPUG511-1.4E

iv

List of Tables

Table 1-1 Terms and Abbreviations .................................................................................................... 1

Table3-1 SRAM Interface Signal Definition ........................................................................................ 4

Table3-2 UART Side Signal Definition ............................................................................................... 4

Table3-3 UART Slave Signal Definition ............................................................................................. 5

Table4-1 Gowin UART Master IP Register ........................................................................................ 7

Table4-2 Receive Buffer Register Bit Definition ................................................................................. 7

Table4-3 Transmit Holding Register Bit Definitions ............................................................................ 7

Table4-4 Interrupt Enable Register Bit Definition ............................................................................... 8

Table4-5 Interrupt Identification Register Bit Definition ...................................................................... 8

Table4-6 Line Control Register .......................................................................................................... 9

Table4-7 Modem Control Register ..................................................................................................... 9

Table4-8 Line Status Register ............................................................................................................ 10

Table4-9 Modem Status Register....................................................................................................... 11