Good Display GDON0129RGW User Manual

1.29 inch

GOOD DISPLAY

OLED Display Series

GDON0129RGW

Dalian Good Display Co., Ltd.

GDON0129RGW

GOOD DISPLAY

RReevviisseedd HHiissttoorryy

Part Number Revision Revision Content Revised on

GDON0129RGW 1.0 New 20190902

www.good-display.com 1.29 inch Series

i

GDON0129RGW

GOOD DISPLAY

CCoonntteenntts

RReevviissiioonn HHiissttoorry
CCoonntteenntts

11.. BBaassiicc SSppeecciiffiiccaattiioonns

1.1 Display Specifications .................................................................................................................... 1

1.2 Mechanical Specifications ............................................................................................................... 1

1.3 Active Area / Memory Mapping & Pixel Construction ........................................................................ 1

1.4 Mechanical Drawing ....................................................................................................................... 2

1.5 Pin Definition ................................................................................................................................ 3

1.6 Block Diagram ............................................................................................................................... 5

22.. AAbbssoolluuttee MMaaxxiimmuumm RRaattiinnggs

Optics & EElleeccttrriiccaall CChhaarraacctteerriissttiiccss ....................................................................................... 8~16

33..

3.1 Optics Characteristics .................................................................................................................... 8

3.2 DC Characteristics ......................................................................................................................... 8

3.3 AC Characteristics ................................................................................................................... 9~16

44.. FFuunnccttiioonnaall SSppeecciiffiiccaattiioon

4.1 Commands ................................................................................................................................. 17

4.2 Power down and Power up Sequence ........................................................................................... 17

4.3 Reset Circuit ............................................................................................................................... 17

4.4 Actual Application Example .................................................................................................... 18~27

55.. RReelliiaabbiilliitty

5.1 Contents of Reliability Tests ......................................................................................................... 26

5.2 Failure Check Standard ................................................................................................................ 26

66.. OOuuttggooiinngg QQuuaalliittyy CCoonnttrrooll SSppeecciiffiiccaattiioonns

6.1 Environment Required ................................................................................................................. 27

6.2 Sampling Plan ............................................................................................................................. 27

6.3 Criteria & Acceptable Quality Level ......................................................................................... 27~30

77.. PPaacckkaaggee SSppeecciiffiiccaattiioonns

88.. PPrreeccaauuttiioonnss WWhheenn UUssiinngg TThheessee OOEELL DDiissppllaayy MMoodduullees

8.1 Handling Precautions ................................................................................................................... 32

8.2 Storage Precautions..................................................................................................................... 33

8.3 Designing Precautions ................................................................................................................. 33

8.4 Precautions when disposing of the OEL display modules ................................................................ 33

8.5 Other Precautions.................................................................................................................. 33~34

s

y ................................................................................................................................ i

s ..................................................................................................................................... ii~iii

s ................................................................................................................ 1~6

1.6.1 VCC Supplied Externally ........................................................................................................ 5

1.6.2 VCC Generated by Internal DC/DC Circuit ............................................................................... 6

s ........................................................................................................ 7

3.3.1 68XX-Series MPU Parallel Interface Characteristics .......................................................... 9~10

3.3.2 80XX-Series MPU Parallel Interface Characteristics ........................................................ 11~12

3.3.3 Serial Interface Characteristics (4-wire SPI) .................................................................. 13~14

3.3.4 I2C Interface Characteristics ......................................................................................... 15~16

n ......................................................................................................

4.2.1 Power up Sequence ........................................................................................................... 17

4.2.2 Power down Sequence ...................................................................................................... 17

4.4.1 VCC Supplied Externally ............................................................................................... 18~21

4.4.2 VCC Generated by Internal DC/DC Circuit ..................................................................... 22~25

y ..................................................................................................................................

s ............................................................................ 27~30

6.3.1 Cosmetic Check (Display Off) in Non-Active Area ........................................................... 27~28

6.3.2 Cosmetic Check (Display Off) in Active Area ........................................................................ 29

6.3.3 Pattern Check (Display On) in Active Area ........................................................................... 30

s .............................................................................................................. 31

s ....................................................... 32~34

17~25

26

www.good-display.com 1.29 inch Series

ii

GDON0129RGW

GOOD DISPLAY

WWaarrrraanntty
NNoottiicce

y ........................................................................................................................................ 34

e ............................................................................................................................................. 34

www.good-display.com 1.29 inch Series

iii

GDON0129RGW

GOOD DISPLAY

11.. BBaassiicc SSppeecciiffiiccaattiioonnss

1.1 Display Specifications

1) Display Mode: Passive Matrix

2) Display Color: Monochrome (White)

3) Drive Duty: 1/64 Duty

1.2 Mechanical Specifications

1) Outline Drawing: According to the annexed outline drawing

2) Number of Pixels: 128  64

3) Panel Size: 32.42  21.36  1.427 (mm)

4) Active Area: 29.42  14.7 (mm)

5) Pixel Pitch: 0.23  0.23 (mm)

6) Pixel Size: 0.21  0.21 (mm)

7) Weight: 2.1 (g)

1.3 Active Area / Memory Mapping & Pixel Construction

3 C32 S12

C6

7 S0 C0 C31

3

0.2

2

0.0

tail Dots size

De

Sc

ale 10/1

23

0.
02

0.

1

0.2

21

0.

www.good-display.com 1.29 inch Series

1／34

1.4 Mechanical Drawing

GOOD DISPLAY

ginal Drawing
Ori

DateItem Remark

20190428

A

GDON0129RGW

v.

A

Re

D1

D0

D2D3D4D5D6

D7

NC

BS1

C1P

C2P

C1N

C2N

Symbol

N.C. (GND)

BS2

CS#

VSS

VSS

VBAT

D/C#

VDD

RES#

R/W#

E/RD#

NC

VCC

IREF

VCOMH

N.C. (GND)

Material

8

2

576

431

9

11

13

10

Pin

1215171614

.02
0

.23
0

21

23

20

18

19

0

.21

2225272624

.21
0

28

29

30

GDON0129RGW

Drawing Number

Dots size

0

32 S127 S0 C0 C31

63 C
C

0

.23

.02

etail
D

Scale 10/1

A3

Size

Sheet

1 of 1

me / Polyimide

i

1:1

Soda L

Scale

P.M.

Panel / E.

E.E.

GDON0129RGWFolding Type OEL Display Module

Drawn

Pixel Number: 128 x 64, Monochrome, COG Package

20190428

DALIAN GOOD DISPLAY CO., LTD.

7±0.1

.7

.42

0

1

t=0.15mm Max
Re

move Tape

t=0.2mm
Po

larizer

G

lue

Contact Side

15x8x0.05mm

Pr

otective Tape

03
.1±0.

0

Co

ct Side

nta

Unless Otherwise Specified

Title

mm

Unit

By

Date

±1

±0.3

Tolerance

Angle

Dimension

General Roughness

6

0.3
.5)

)

.3±
0

(1

(1

10 5

2±0.2

2 (V/A)

2.4

0.4

3

3

2±0.3 (Polarizer)

1.8

3x128-0.02=29.42 (A/A)

3

0.2
P

Dots (1.29")

28x64

1

2

4±0.05

-R0.

0.2
12±

N

.C.

(GND)

30

NC

VCC

VCOMH

IREF

D7

D6

D5

D4

D3

D2

D1

D0

E/RD#

R/W#

D/C#

RES#

CS#

BS2

BS

1

NC

VDD

VSS

VSS

AT

VB

C1N

C1P

C2P

C2N

N.C. (GND)

1

1 (Alignment Mark)
6±0.

1

=20.3±0.05(W0.40±0.03)

1

.85±0.

0.70x(30-1)

0

P

0.2
22±

Signature

Customer Approval

(1.5

(1)

0.3

±0.3

www.good-display.com 1.29 inch Series

P0.

)

23x64-0.02=14.7 (A/A)

15.

7 (V/A)

17.

1±0.3 (Polarizer)

17.

7±0.2 (cover glass)

21.

36±0.2

(34.

2±0.3

4±0

.2

4.7

5±0.2

(6.89)

(12.04)

13.

04±0.3

4)

:
otes

N

8-bit 68XX/80XX Parallel, 4-wire SPI, I2C

2. Driver IC: SSD1315

4. Interface:

3. FPC Number: NFP1315-10

1. Color: White

5. General Tolerance: ±0.30

2／34

1.5 Pin Definition

It

GOOD DISPLAY

Pin Number Symbol I/O Function

GDON0129RGW

PPoowweerr SSuuppppllyy

9 VDD P

8 VSS P

28 VCC P

DDrriivveerr

26 IREF I

27 VCOMH O

DDCC//DDCC CCoonnvveerrtteerr

6 VBAT P

4 / 5
2 / 3

IInntteerrffaaccee

11
12

C1P / C1N
C2P / C2N

BS1
BS2

14 RES# I

13 CS# I

15 D/C# I

17 E/RD# I

PPoowweerr SSuuppppllyy ffoorr LLooggiicc

This is a voltage supply pin. It must be connected to external source.

GGrroouunndd ooff LLooggiicc CCiirrccuuiitt

This is a ground pin. It acts as a reference for the logic pins. It must be
connected to external ground.

PPoowweerr SSuuppppllyy ffoorr OOEELL PPaanneell

This is the most positive voltage supply pin of the chip. A stabilization capacitor
should be connected between this pin and VSS when the converter is used.
must be connected to external source when the converter is not used.

CCuurrrreenntt RReeffeerreennccee ffoorr BBrriigghhttnneessss AAddjjuussttmmeenntt

This pin is segment current reference pin. A resistor should be connected
between this pin and VSS. Set the current at 12.5A maximum.

VVoollttaaggee OOuuttppuutt HHiigghh LLeevveell ffoorr CCOOMM SSiiggnnaal

This pin is the input pin for the voltage output high level for COM signals. A
capacitor should be connected between this pin and VSS.

PPoowweerr SSuuppppllyy ffoorr DDCC//DDCC CCoonnvveerrtteerr CCiirrccuuiitt

This is the power supply pin for the internal buffer of the DC/DC voltage converter.
It must be connected to external source when the converter is used. It should be
connected to VDD when the converter is not used.

PPoossiittiivvee TTeerrmmiinnaall ooff tthhee FFllyyiinngg IInnvveerrttiinngg CCaappaacciittoorr
NNeeggaattiivvee TTeerrmmiinnaall ooff tthhee FFllyyiinngg BBoooosstt CCaappaacciittoorr

I

The charge-pump capacitors are required between the terminals. They must be
floated when the converter is not used.

CCoommmmuunniiccaattiinngg PPrroottooccooll SSeelleecctt

These pins are MCU interface selection input. See the following table:

I

I2C 1 0
4-wire SPI 0 0
8-bit 68XX Parallel 0 1
8-bit 80XX Parallel 1 1

PPoowweerr RReesseett ffoorr CCoonnttrroolllleerr aanndd DDrriivveerr

This pin is reset signal input. When the pin is low, initialization of the chip is
executed. Keep this pin pull high during normal operation.

CChhiipp SSeelleecctt

This pin is the chip select input. The chip is enabled for MCU communication only
when CS# is pulled low.

DDaattaa//CCoommmmaanndd CCoonnttrrooll

This pin is Data/Command control pin. When the pin is pulled high, the input at
D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0
will be transferred to the command register.
When the pin is pulled high and serial interface mode is selected, the data at SDIN
will be interpreted as data. When it is pulled low, the data at SDIN will be
transferred to the command register. In I2C mode, this pin acts as SA0 for slave
address selection.
For detail relationship to MCU interface signals, please refer to the Timing
Characteristics Diagrams.

RReeaadd//WWrriittee EEnnaabbllee oorr RReeaadd

This pin is MCU interface input. When interfacing to a 68XX-series
microprocessor, this pin will be used as the Enable (E) signal. Read/write operation
is initiated when this pin is pulled high and the CS# is pulled low.
When connecting to an 80XX-microprocessor, this pin receives the Read (RD#)
signal. Data read operation is initiated when this pin is pulled low and CS# is
pulled low.
When serial or I2C mode is selected, this pin must be connected to VSS.

l

BS1 BS2

www.good-display.com 1.29 inch Series

3／34

1.5 Pin Definition (Continued)

GOOD DISPLAY

Pin Number Symbol I/O Function

GDON0129RGW

IInntteerrffaaccee ((CCoonnttiinnuueedd))

16 R/W# I

18~25 D0~D7 I/O

1，30

N.C. -

N.C. (GND) -

RReesseerrvvee

7，10，29

RReeaadd//WWrriittee SSeelleecctt oorr WWrriittee

This pin is MCU interface input. When interfacing to a 68XX-series
microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull
this pin to “High” for read mode and pull it to “Low” for write mode.
When 80XX interface mode is selected, this pin will be the Write (WR#) input.
Data write operation is initiated when this pin is pulled low and the CS# is pulled
low.
When serial or I2C mode is selected, this pin must be connected to VSS.

HHoosstt DDaattaa IInnppuutt//OOuuttppuutt BBuuss

These pins are 8-bit bi-directional data bus to be connected to the

microprocessor’s data bus. When serial mode is selected, D1 will be the serial

data input SDIN and D0 will be the serial clock input SCLK. When I2C mode is
selected, D2 & D1 should be tired together and serve as SDA
application and D0 is the serial clock input SCL.
Unused pins must be connected to VSS except for D2 in serial mode.

RReesseerrvveedd PPiinn

The N.C. pin between function pins are reserved for compatible and flexible
design.

RReesseerrvveedd PPiinn ((SSuuppppoorrttiinngg PPiinn))

The supporting pins can reduce the influences from stresses on the function pins.
These pins must be connected to external ground as the ESD protection circuit.

& SDAin in

out

www.good-display.com 1.29 inch Series

4／34

1.6 Block Diagram

GOOD DISPLAY

1.6.1 VCC Supplied Externally

A

ctive Are

a 0.96"

128 x 64 Pixels

GDON0129RGW

32

127

S

SD13

#
S1
B

BS0

BS2

CS

~

~ ~ ~

06

#

C#

ES#
R

~

D0

D/

R/W

D7

E/RD#

~

ommon 63
C

Common

Segment

P

1P

VSS

VDDB

C

C1N

C2N

C2

VDD

C1

C2

0

Common 31

Common

Segment 0

EF

VCC

VCOMH

IR

VLSS

C5

R1

C3

C4

MCU Interface Selection: BS0, BS1 and BS2
Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and D0~D7

C1, C3: 0.1μF
C2: 4.7μF
C4, C5: 4.7μF / 16V X7R
R1: 620kΩ, R1 = (Voltage at IREF - VSS) / IREF

www.good-display.com 1.29 inch Series

5／34

1.6.2 VCC Generated by Internal DC/DC Circuit

GOOD DISPLAY

GDON0129RGW

ctive A

A

rea 0.96"

128 x 64 Pixels

27

mon 63

~

Common 32

Com

Segment 1

SS

VSS

VDDB

C1P

C1N

C2N

C2P

C6

MCU Interface Selection: BS0, BS1 and BS2
Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and D0~D7

C2

~ ~ ~

~

D1306

1

VDD

C1

ES#

R/W#

BS2

BS0

BS

R

D/C#

CS#

#

E/RD

D0

Segment 0

~

Common 0

Common 31

EF

VCOMH

VLSS

VCC

D7

IR

C3C5

C4

R1

C1, C2: 1μF
C3: 2.2μF
C4: 4.7μF / 16V X7R
C5, C6: 1μF / 16V X5R
R1: 620kΩ, R1 = (Voltage at IREF - VSS) / IREF

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6／34

Min

GDON0129RGW

GOOD DISPLAY

22.. AAbbssoolluuttee MMaaxxiimmuumm RRaattiinnggss

Parameter Symbol

Supply Voltage for Logic VDD -0.3 4 V 1, 2

Supply Voltage for Display VCC 0 16.5 V 1, 2

Supply Voltage for DC/DC V

Operating Temperature TOP -40 85

Storage Temperature T

Life Time (120 cd/m2) 10,000 - hour 4

Life Time (80 cd/m2) 24,000 - hour 4
Life Time (60 cd/m2) 32,000 - hour 4

Note 1: All the above voltages are on the basis of “VSS = 0V”.
Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the

module may occur. Also, for normal operations, it is desirable to use this module under the
conditions according to Section 3. “Optics & Electrical Characteristics”. If this module is used
beyond these conditions, malfunctioning of the module can occur and the reliability of the module
may deteriorate.

Note 3: The defined temperature ranges do not include the polarizer. The maximum withstood

temperature of the polarizer should be 80C.

Note 4: VCC = 9.0V, Ta = 25°C, 50% Checkerboard.

Software configuration follows Section 4.4 Initialization.
End of lifetime is specified as 50% of initial brightness reached. The average operating lifetime at
room temperature is estimated by the accelerated operation at high temperature conditions.

Max Unit Notes

-0.3 4.5 V 1, 2

BAT

C

-40 85

STG

C

3

www.good-display.com 1.29 inch Series

7／34

nerated by Internal DC/DC)

GDON0129RGW

GOOD DISPLAY

33.. OOppttiiccss && EElleeccttrriiccaall CChhaarraacctteerriissttiiccss

3.1 Optics Characteristics

Characteristics Symbol Conditions Min Typ Max Unit

Brightness

(VCC Supplied Externally)

Brightness

(VCC Generated by Internal DC/DC)

C.I.E. (White)

Dark Room Contrast CR -

Viewing Angle - Free - degree

*Optical measurement taken at VDD = 2.8V, VCC = 9V & 12V.

Software configuration follows Section 4.4 Initialization.

3.2 DC Characteristics
Characteristics

Supply Voltage for Logic VDD 1.65 2.8 3.5 V

Supply Voltage for Display

(Supplied Externally)

Supply Voltage for DC/DC

Supply Voltage for Display

(Ge

High Level Input VIH I

Lbr Note 5 120 - - cd/m2

Lbr Note 6 90 110 - cd/m2

(x)
(y)

Symbol Conditions Min Typ Max Unit

VCC

V
VCC

(Internal DC/DC Disable)

BAT

C.I.E. 1931

Note 5

Internal DC/DC Enable

Note 6

(Internal DC/DC Enable)

= 100μA, 3.3MHz

OUT

0.25

0.27

11.5 12.0 12.5 V

3.6 - 4.5 V

- 9.0 - V

0.8VDD

0.29

0.31

2000:1

- VDD V

0.33

0.35

-

Low Level Input VIL I

High Level Output VOH I

Low Level Output VOL I

Operating Current for VDD IDD - 180 300 μA

Operating Current for VCC

(VCC Supplied Externally)

Operating Current for V

(VCC Generated by Internal DC/DC)

Sleep Mode Current for VDD I

Sleep Mode Current for VCC I

Note 5 & 6: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the change of the panel

characteristics and the customer’s request.

Note 7: VDD = 2.8V, VCC = 12V, 100% Display Area Turn on.

Note 8: VDD = 2.8V, VCC = 9V

V, 100% Display Area Turn on.

*Software configuration follows Section 4.4 Initialization.

BAT

ICC Note 7 - 21 28 mA

I

BAT

DD, SLEEP

CC, SLEEP

= 100μA, 3.3MHz 0 -

OUT

= 100μA, 3.3MHz

OUT

= 100μA, 3.3MHz 0 -

OUT

Note 8 - 41 46 mA

- - 10 μA

- - 10 μA

0.9VDD

0.2VDD

- VDD V

0.1VDD

V

V

www.good-display.com 1.29 inch Series

8／34

3.3 AC Characteristics

GOOD DISPLAY

3.3.1.1 68XX-Series MPU Parallel Interface Timing Characteristics:

Symbol Description Min Max Unit

t

Clock Cycle Time 300 - ns

cycle

tAS Address Setup Time 5 - ns

tAH Address Hold Time 0 - ns

t

Write Data Setup Time 40 - ns

DSW

GDON0129RGW

t

DHW

t

DHR

tOH Output Disable Time - 70 ns

t

ACC

PW

PW

tR Rise Time - 40 ns
tF Fall Time - 40 ns

* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C)

Write Data Hold Time 20 - ns

Read Data Hold Time 20 - ns

Access Time - 180 ns

Chip Select Low Pulse Width (Read) 180

CSL

Chip Select Low Pulse width (Write) 60
Chip Select High Pulse Width (Read) 60

CSH

Chip Select High Pulse Width (Write) 60

- ns

- ns

www.good-display.com 1.29 inch Series

9／34

GDON0129RGW

GOOD DISPLAY

3.3.1.2 68XX-Series MPU Parallel Interface wwiitthh IInntteerrnnaall CChhaarrggee PPuummpp

(When design main board, Please add Electronic Switch circuit, otherwise, will be caused leak current)

Recommended Components:

C1: 0.1μF / 6.3V, X5R
C1: 4.7μF / 6.3V, X5R
C3: 2.2Μf/16v
C4: 4.7μF / 16V, X7R
C5: 0.1μF / 16V, X7R
C6,C7: 1μF / 16V, X7R
R3: 620kΩ, R3 = (Voltage at IREF - VSS) / IREF
R1, R2: 47kΩ
Q1: FDN338P
Q2: FDN335N

Notes:

VDD: 1.65~3.5V, it should be equal to MPU I/O voltage.
Vin: 3.6~4.5V
* VBAT will be connected to VDD when VCC be connected to external source (12V), R3 should be

replaced as 910 kΩ.

www.good-display.com 1.29 inch Series

10／34

GDON0129RGW

GOOD DISPLAY

3.3.2.1 80XX-Series MPU Parallel Interface Timing Characteristics:

Symbol Description Min Max Unit

t

Clock Cycle Time 300 - ns

cycle

tAS Address Setup Time 10 - ns

tAH Address Hold Time 0 - ns

t

Write Data Setup Time 40 - ns

DSW

t

Write Data Hold Time 20 - ns

DHW

t

Read Data Hold Time 20 - ns

DHR

tOH Output Disable Time - 70 ns

t

Access Time - 180 ns

ACC

t

Read Low Time 180 - ns

PWLR

t

Write Low Time 60 - ns

PWLW

t

Read High Time 60 - ns

PWHR

t

Write High Time 60 - ns

PWHW

tCS Chip Select Setup Time 0 - ns

t

Chip Select Hold Time to Read Signal 0 - ns

CSH

t

Chip Select Hold Time 20 - ns

CSF

tR Rise Time - 40 ns
tF Fall Time - 40 ns

* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C)

(

Read Timing

)

(

Write Timing

www.good-display.com 1.29 inch Series

)

11／34

GDON0129RGW

GOOD DISPLAY

3.3.2.2 80XX-Series MPU Parallel Interface wwiitthh IInntteerrnnaall CChhaarrggee PPuummpp

(When design main board, Please add Electronic Switch circuit, otherwise, will be caused leak current)

Recommended Components:

C1: 0.1μF / 6.3V, X5R
C1: 4.7μF / 6.3V, X5R
C3: 2.2Μf/16v
C4: 4.7μF / 16V, X7R
C5: 0.1μF / 16V, X7R
C6,C7: 1μF / 16V, X7R
R3: 620kΩ, R3 = (Voltage at IREF - VSS) / IREF
R1, R2: 47kΩ
Q1: FDN338P
Q2: FDN335N

Notes:

VDD: 1.65~3.5V, it should be equal to MPU I/O voltage.
Vin: 3.6~4.5V
* VBAT will be connected to VDD when VCC be connected to external source (12V), R3 should be

replaced as 910 kΩ.

www.good-display.com 1.29 inch Series

12／34

GDON0129RGW

GOOD DISPLAY

3.3.3.1 Serial Interface Timing Characteristics: (4-wire SPI)

Symbol Description Min Max Unit

t

Clock Cycle Time 100 - ns

cycle

tAS Address Setup Time 15 - ns

tAH Address Hold Time 15 - ns

t

Chip Select Setup Time 20 - ns

CSS

t

Chip Select Hold Time 20 - ns

CSH

t

Write Data Setup Time 15 - ns

DSW

t

Write Data Hold Time 25 - ns

DHW

t

Clock Low Time 30 - ns

CLKL

t

Clock High Time 30 - ns

CLKH

tR Rise Time - 40 ns
tF Fall Time - 40 ns

* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C)

www.good-display.com 1.29 inch Series

13／34

GDON0129RGW

GOOD DISPLAY

4-wire Serial Interface wwiitthh IInntteerrnnaall CChhaarrggee PPuummpp

33..33..33..22

(When design main board, Please add Electronic Switch circuit, otherwise, will be caused leak current)

Recommended Components:

C1: 0.1μF / 6.3V, X5R
C1: 4.7μF / 6.3V, X5R
C3: 2.2Μf/16v
C4: 4.7μF / 16V, X7R
C5: 0.1μF / 16V, X7R
C6,C7: 1μF / 16V, X7R
R3: 620kΩ, R3 = (Voltage at IREF - VSS) / IREF
R1, R2: 47kΩ
Q1: FDN338P
Q2: FDN335N

Notes:

VDD: 1.65~3.5V, it should be equal to MPU I/O voltage.
Vin: 3.6~4.5V

* VBAT will be connected to VDD when VCC be connected to external source (12V), R3 should be
replaced as 910 kΩ.

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14／34

3.3.4.1 I2C Interface Timing Characteristics:

GOOD DISPLAY

Symbol Description Min Max Unit

t

Clock Cycle Time 2.5 - μs

cycle

t

Start Condition Hold Time 0.6 - μs

HSTART

GDON0129RGW

tHD

tSD Data Setup Time 100 - ns

t

SSTART

t

SSTOP

tR Rise Time for Data and Clock Pin 300 ns
tF Fall Time for Data and Clock Pin 300 ns

t

IDLE

* (VDD - VSS = 1.65V to 3.5V, Ta = 25°C)

Data Hold Time (for “SDA

Data Hold Time (for “SDA

Start Condition Setup Time
(Only relevant for a repeated Start condition)

Stop Condition Setup Time 0.6 - μs

Idle Time before a New Transmission can Start 1.3 - μs

” Pin) 0

OUT

” Pin) 300

IN

- ns

0.6 - μs

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15／34

GDON0129RGW

GOOD DISPLAY

3.3.4.2 I2C Interface wwiitthh IInntteerrnnaall CChhaarrggee PPuummpp

(When design main board, Please add Electronic Switch circuit, otherwise, will be caused leak current)

Recommended Components:

C1: 0.1μF / 6.3V, X5R
C1: 4.7μF / 6.3V, X5R
C3: 2.2Μf/16v
C4: 4.7μF / 16V, X7R
C5: 0.1μF / 16V, X7R
C6,C7: 1μF / 16V, X7R
R3: 620kΩ, R3 = (Voltage at IREF - VSS) / IREF
R1, R2: 47kΩ
R4, R5: 4.7kΩ
Q1: FDN338P
Q2: FDN335N

Notes:

VDD: 1.65~3.5V, it should be equal to MPU I/O voltage.
Vin: 3.6~4.5V

* VBAT will be connected to VDD when VCC be connected to external source (12V), R3 should be

replaced as 910 kΩ.

www.good-display.com 1.29 inch Series

16／34

p

p

y

y

V

V

B

B

// V

V

B

ooffff

p

p

y

y

V

V

B

CCC

C

B

// V

V

B

BBAAT

T

oonn

GDON0129RGW

GOOD DISPLAY

44.. FFuunnccttiioonnaall SSppeecciiffiiccaattiioonn

4.1 Commands

Refer to the Technical Manual for the SSD1315

4.2 Power down and Power up Sequence

To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include
a delay period between high voltage and low voltage power sources during turn on/off. It gives the
OEL panel enough time to complete the action of charge and discharge before/after the operation.

V

B

B

4.2.1 Power up Sequence:

1. Power up V

DD

V

oonn

D

DDD

2. Send Display off command

3. Initialization

4. Clear Screen

5. Power up VCC/ V

BAT

6. Delay 100ms
(When VCC is stable)

7. Send Display on command

s

a

DDiis

lla

ooffff

4.2.2 Power down Sequence:

1. Send Display off command

2. Power down VCC / V

BAT

3. Delay 100ms
(When VCC / V

is reach 0 and panel is

BAT

completely discharges)

4. Power down V

DD

DDiis

V

V

s

a

lla

oonn

B

B

ooffff

D

D

Note 13:

1) Since an ESD protection circuit is connected between VDD and VCC inside the driver IC, V
becomes lower than VDD whenever VDD is ON and VCC is OFF.

2) VCC / V

3) Power Pins (VDD, VCC, V

4) VDD should not be power down before VCC / V

should be kept float (disable) when it is OFF.

BAT

) can never be pulled to ground under any circumstance.

BAT

BAT

power down.

4.3 Reset Circuit

When RES# input is low, the chip is initialized with the following status:

1. Display is OFF

2. 12864 Display Mode

3. Normal segment and display data column and row address mapping (SEG0 mapped to column
address 00h and COM0 mapped to row address 00h)

4. Shift register data clear in serial interface

5. Display start line is set at display RAM address 0

6. Column address counter is set at 0

7. Normal scan direction of the COM outputs

8. Contrast control register is set at 7Fh

9. Normal display mode (Equivalent to A4h command)

CC

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17／34

4.4 Actual Application Example

Initial Settings

Configuration

Set Contrast Control

0x81, 0Xb0

GOOD DISPLAY

Command usage and explanation of an actual example

4.4.1 VCC Supplied Externally

<Power up Sequence>

GDON0129RGW

VDD/VCC off State

Power up VDD

(RES# as Low State)

Power Stabilized

(Delay Recommended)

Set RES# as High

(3μs Delay Minimum)

Initialized State

(Parameters as Default)

Set Display Off

0xAE

Set Display Offset

0xD3, 0x00

Set Display Start Line

0x40

Set Charge Pump

0x8D, 0x10

Set Segment Re-Map

0xA1

Set COM Output Scan Direction

0xC8

Set COM Pins Hardware Configuration

0xDA, 0x12

Set Entire Display On/Off

Set Normal/Inverse Display

Power up VCC & Stabilized

(Delay Recommended)

(100ms Delay Recommended)

0xA4

0xA6

Clear Screen

Set Display On

0xAF

Display Data Sent

Set Display Clock Divide Ratio/Oscillator Frequency

0xD5, 0xF0

Set Multiplex Ratio

0xA8, 0x3F

Set Pre-Charge Period

0xD9, 0Xf1

Set VCOMH Deselect Level

0xDB, 0x30

If the noise is accidentally occurred at the displaying window during the operation, please reset
the display in order to recover the display function.

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18／34

<Power down Sequence>

Power down VCC

GOOD DISPLAY

GDON0129RGW

Normal Operation

Set Display Off

0xAE

<Entering Sleep Mode>

Normal Operation

Set Display Off

0xAE

<Exiting Sleep Mode>

Power down VB

(100ms Delay Recommended)

Power down V

Sleep Mode

B

CC

DD

VDD/VCC off State

External setting

{

RES=1;
delay(1000);
RES=0;
delay(1000);
RES=1;
delay(1000);

write_i(0xAE); /*display off*/
write_i(0x00); /*set lower column address*/

write_i(0x10); /*set higher column address*/
write_i(0x40); /*set display start line*/

Sleep Mode

Power up VCC & Stabilized

(Delay Recommended)

Set Display On

0xAF

(100ms Delay Recommended)

Normal Operation

write_i(0xB0); /*set page address*/

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19／34

write_i(0x81); /*contract control*/

GOOD DISPLAY

write_i(0xB0); /*128*/
write_i(0xA1); /*set segment remap*/
write_i(0xa4); /*Resume to RAM content display*/
write_i(0xA6); /*normal / reverse*/
write_i(0xA8); /*multiplex ratio*/

write_i(0x3F); /*duty = 1/64*/
write_i(0xC8); /*Com scan direction*/
write_i(0xD3); /*set display offset*/

write_i(0x00);

GDON0129RGW

write_i(0xD5); /*set osc division*/
write_i(0xF0);

write_i(0xD9); /*set pre-charge period*/
write_i(0Xf1);

write_i(0xDA); /*set COM pins*/
write_i(0x12);

write_i(0xdb); /*set vcomh*/
write_i(0x30);

write_i(0x8d); /*set charge pump disable*/
write_i(0x10);

write_i(0xAF); /*display ON*/
}
void write_i(unsigned char ins)

{
DC=0;

CS=0;
WR=1;
P1=ins; /*inst*/
WR=0;
WR=1;
CS=1;
}

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20／34

void write_d(unsigned char dat)

GOOD DISPLAY

{
DC=1;
CS=0;
WR=1;
P1=dat; /*data*/
WR=0;
WR=1;
CS=1;
}

void delay(unsigned int i)
{

while(i>0)
{
i--;
}

}

GDON0129RGW

www.good-display.com 1.29 inch Series

21／34

4.4.2 VCC Generated by Internal DC/DC Circuit

GOOD DISPLAY

<Power up Sequence>

GDON0129RGW

VDD/V

(RES# as Low State)

(Delay Recommended)

(100ms Delay Recommended)

(3μs Delay Minimum)

(Parameters as Default)

off State

BAT

Power up VDD

Power Stabilized

Power up V

Set RES# as High

Initialized State

Set Display Off

0xAE

DDB

Set Multiplex Ratio

0xA8, 0x3F

Set Display Offset

0xD3, 0x00

Set Display Start Line

0x40

Set Segment Re-Map

0xA1

Set COM Output Scan Direction

0xC8

Set COM Pins Hardware Configuration

0xDA, 0x12

Set Contrast Control

0x81, 0Xb0

Set Entire Display On/Off

Set Normal/Inverse Display

(100ms Delay Recommended)

0xA4

0xA6

Clear Screen

Set Charge Pump

0x8D,

Set Display On

0xAF

Power Stabilized

Display Data Sent

0x95

Initial Settings

Configuration

Set Display Clock Divide Ratio/Oscillator Frequency

0xD5, 0xF0

Set Pre-Charge Period

0xD9, 0xF1

Set VCOMH Deselect Level

0xDB, 0x30

If the noise is accidentally occurred at the displaying window during the operation, please reset
the display in order to recover the display function.

www.good-display.com 1.29 inch Series

22／34

<Power down Sequence>

GOOD DISPLAY

GDON0129RGW

Normal Operation

Set Display Off

0xAE

Set Charge Pump

0x8D, 0x10

<Entering Sleep Mode>

Normal Operation

Set Display Off

0xAE

Power Stabilized

(100ms Delay Recommended)

Power down VB

(50ms Delay Recommended)

Power down V

Set Charge Pump

0x8D, 0x10

Power down V

BAT

DD

BAT

VDD/V

off State

BAT

Sleep Mode

<Exiting Sleep Mode>

Sleep Mode

Power up V

(100ms Delay Recommended)

BAT

Internal setting（Charge pump）

{

RES=1;
delay(1000);
RES=0;

delay(1000);
RES=1;
delay(1000);

write_i(0xAE); /*display off*/

Set Charge Pump

0x8D,

0x95

Set Display On

0xAF

Power Stabilized

(100ms Delay Recommended)

Normal Operation

write_i(0x00); /*set lower column address*/
write_i(0x10); /*set higher column address*/

www.good-display.com 1.29 inch Series

23／34

write_i(0x40); /*set display start line*/

GOOD DISPLAY

write_i(0xB0); /*set page address*/
write_i(0x81); /*contract control*/

write_i(0xB0); /*128*/
write_i(0xA1); /*set segment remap*/
write_i(0xa4); /*Resume to RAM content display*/
write_i(0xA6); /*normal / reverse*/
write_i(0xA8); /*multiplex ratio*/

write_i(0x3F); /*duty = 1/64*/

GDON0129RGW

write_i(0xC8); /*Com scan direction*/
write_i(0xD3); /*set display offset*/

write_i(0x00);
write_i(0xD5); /*set osc division*/

write_i(0xF0);
write_i(0xD9); /*set pre-charge period*/

write_i(0Xf1);

write_i(0xDA); /*set COM pins*/
write_i(0x12);

write_i(0xdb); /*set vcomh*/
write_i(0x30);

write_i(0x8d); /*set charge pump disable*/
write_i(0x95);

write_i(0xAF); /*display ON*/
}
void write_i(unsigned char ins)

{
DC=0;

CS=0;
WR=1;
P1=ins; /*inst*/

www.good-display.com 1.29 inch Series

24／34

WR=0;

GOOD DISPLAY

WR=1;
CS=1;
}

void write_d(unsigned char dat)
{
DC=1;
CS=0;
WR=1;
P1=dat; /*data*/
WR=0;
WR=1;
CS=1;
}

GDON0129RGW

void delay(unsigned int i)
{

while(i>0)
{
i--;
}

}

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25／34

GDON0129RGW

GOOD DISPLAY

55.. RReelliiaabbiilliittyy

5.1 Contents of Reliability Tests

High Temperature Operation 70C, 240 hrs
Low Temperature Operation -40C, 240 hrs
High Temperature Storage
Low Temperature Storage
High Temperature/Humidity Operation

Thermal Shock

* The samples used for the above tests do not include polarizer.
* No moisture condensation is observed during tests.

5.2 Failure Check Standard

After the completion of the described reliability test, the samples were left at room temperature for 2
hrs prior to conducting the failure test at 235C; 5515% RH.

Item Conditions Criteria

85C, 240 hrs

-40C, 240 hrs
60C, 90% RH, 120 hrs

-40C  85C, 24 cycles
60 mins dwell

The operational
functions work.

www.good-display.com 1.29 inch Series

26／34

Y

GDON0129RGW

GOOD DISPLAY

66.. OOuuttggooiinngg QQuuaalliittyy CCoonnttrrooll SSppeecciiffiiccaattiioonnss

6.1 Environment Required

Customer’s test & measurement are required to be conducted under the following conditions:

Temperature: 23  5C
Humidity: 55  15% RH
Fluorescent Lamp: 30W
Distance between the Panel & Lamp: ≥ 50cm
Distance between the Panel & Eyes of the Inspector: ≥ 30cm
Finger glove (or finger cover) must be worn by the inspector.
Inspection table or jig must be anti-electrostatic.

6.2 Sampling Plan

Level II, Normal Inspection, Single Sampling, MIL-STD-105E

6.3 Criteria & Acceptable Quality Level

Partition AQL Definition

Major 0.65 Defects in Pattern Check (Display On)
Minor 1.0 Defects in Cosmetic Check (Display Off)

6.3.1 Cosmetic Check (Display Off) in Non-Active Area

Check Item

Panel General Chipping Minor

Classification

Criteria

X > 6 mm (Along with Edge)
Y > 1 mm (Perpendicular to edge)

X

Y

X

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27／34

6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued)

GOOD DISPLAY

GDON0129RGW

Check Item

Panel Crack Minor

Copper Exposed

(Even Pin or Film)

Film or Trace Damage Minor

Classification

Minor Not Allowable by Naked Eye Inspection

Criteria

Any crack is not allowable.

Terminal Lead Prober Mark Acceptable

Glue or Contamination on Pin

(Couldn’t Be Removed by Alcohol)

Ink Marking on Back Side of panel

(Exclude on Film)

Minor

Acceptable Ignore for Any

www.good-display.com 1.29 inch Series

28／34

W

a: Major Axis

GDON0129RGW

GOOD DISPLAY

6.3.2 Cosmetic Check (Display Off) in Active Area
It is recommended to execute in clear room environment (class 10k) if actual in necessary.

Check Item

Any Dirt & Scratch on Polarizer’s

Protective Film

Scratches, Fiber, Line-Shape Defect

(On Polarizer)

Dirt, Black Spot, Foreign Material,

(On Polarizer)

Dent, Bubbles, White spot

(Any Transparent Spot on Polarizer)

Fingerprint, Flow Mark

(On Polarizer)

* Protective film should not be tear off when cosmetic check.
** Definition of W & L & Φ (Unit: mm): Φ = (a + b) / 2

Classification

Acceptable Ignore for not Affect the Polarizer

W ≤ 0.1 Ignore

Minor

Minor

Minor

Minor Not Allowable

W > 0.1

L ≤ 2 n ≤ 1
L > 2 n = 0

Φ ≤ 0.1 Ignore

0.1 < Φ ≤ 0.25 n ≤ 1

0.25 < Φ n = 0
Φ ≤ 0.5
➔ Ignore if no Influence on Display

0.5 < Φ n = 0

Criteria

L

b: Minor Axis

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29／34

6.3.3 Pattern Check (Display On) in Active Area

GOOD DISPLAY

GDON0129RGW

Check Item

No Display Major

Missing Line Major

Pixel Short Major

Classification

Criteria

Darker Pixel Major

Wrong Display Major

Un-uniform Major

www.good-display.com 1.29 inch Series

30／34

Primary Box C SET

C

GDON0129RGW

GOOD DISPLAY

77.. PPaacckkaaggee SSppeecciiffiiccaattiioonnss

EPE C O VE R FO A M 351x212x1,
A N T ISTA TIC x 1 Pcs

od

ule

M

ra

y 420x285 T=0.8m m

T

mm

1

pcs (Em pty)

x

1

5 pcs

x

A

ta

ggered Stacking

S

iccator x 2 pcs

xs

E

W rapped w ith adhesive tape

6 pcs

1

x

B

uum packing bag

ac

V

PE

PR O TEC T TIVE

E

70

m m x 280m m x 20m m

3

PR O TEC T TIVE

PE

E

16 Pcs Tray V acuum packing

B

ri

m ary B ox 4 SET

B

C A R TO N B O X

Label

m ary L450m m x W 296 x H 110, B w ave

ri

P

Label

x 4Pcs

C arton B ox L 464m m x W 313m m x H 472m m , A B w ave

(Major / Maximum)

ni

vision T echnology Inc.

U

Part ID :

Lot ID :

Q 'ty :

Q C :

Item Quantity

Module 810 per Primary Box

Holding Trays (A) 15 per Primary Box

Total Trays (B) 16 per Primary Box (Including 1 Empty Tray)

Primary Box (C) 1~4 per Carton (4 as Major / Maximum)

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31／34

GDON0129RGW

GOOD DISPLAY

88.. PPrreeccaauuttiioonnss WWhheenn UUssiinngg TThheessee OOEELL DDiissppllaayy MMoodduulleess

8.1 Handling Precautions

1) Since the display panel is being made of glass, do not apply mechanical impacts such us dropping

from a high position.

2) If the display panel is broken by some accident and the internal organic substance leaks out, be

careful not to inhale nor lick the organic substance.

3) If pressure is applied to the display surface or its neighborhood of the OEL display module, the cell

structure may be damaged and be careful not to apply pressure to these sections.

4) The polarizer covering the surface of the OEL display module is soft and easily scratched. Please

be careful when handling the OEL display module.

5) When the surface of the polarizer of the OEL display module has soil, clean the surface. It takes

advantage of by using following adhesion tape.
* Scotch Mending Tape No. 810 or an equivalent
Never try to breathe upon the soiled surface nor wipe the surface using cloth containing solvent
such as ethyl alcohol, since the surface of the polarizer will become cloudy.
Also, pay attention that the following liquid and solvent may spoil the polarizer:
* Water
* Ketone
* Aromatic Solvents

6) Hold OEL display module very carefully when placing OEL display module into the system housing.

Do not apply excessive stress or pressure to OEL display module. And, do not over bend the film
with electrode pattern layouts. These stresses will influence the display performance. Also,
secure sufficient rigidity for the outer cases.

7) Do not apply stress to the driver IC and the surrounding molded sections.

8) Do not disassemble nor modify the OEL display module.

9) Do not apply input signals while the logic power is off.

10) Pay sufficient attention to the working environments when handing OEL display modules to prevent

occurrence of element breakage accidents by static electricity.
* Be sure to make human body grounding when handling OEL display modules.
* Be sure to ground tools to use or assembly such as soldering irons.
* To suppress generation of static electricity, avoid carrying out assembly work under dry

environments.

* Protective film is being applied to the surface of the display panel of the OEL display module. Be

careful since static electricity may be generated when exfoliating the protective film.

11) Protection film is being applied to the surface of the display panel and removes the protection film

before assembling it. At this time, if the OEL display module has been stored for a long period of
time, residue adhesive material of the protection film may remain on the surface of the display
panel after removed of the film. In such case, remove the residue material by the method
introduced in the above Section 5).

12) If electric current is applied when the OEL display module is being dewed or when it is placed under

high humidity environments, the electrodes may be corroded and be careful to avoid the above.

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32／34

GDON0129RGW

GOOD DISPLAY

8.2 Storage Precautions

1) When storing OEL display modules, put them in static electricity preventive bags avoiding exposure

to direct sun light nor to lights of fluorescent lamps. and, also, avoiding high temperature and high
humidity environment or low temperature (less than 0°C) environments. (We recommend you to
store these modules in the packaged state when they were shipped from Dalian Good Display
Co., Ltd.)
At that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur
with them.

2) If electric current is applied when water drops are adhering to the surface of the OEL display

module, when the OEL display module is being dewed or when it is placed under high humidity
environments, the electrodes may be corroded and be careful about the above.

8.3 Designing Precautions

1) The absolute maximum ratings are the ratings which cannot be exceeded for OEL display module,

and if these values are exceeded, panel damage may be happen.

2) To prevent occurrence of malfunctioning by noise, pay attention to satisfy the VIL and V

specifications and, at the same time, to make the signal line cable as short as possible.

3) We recommend you to install excess current preventive unit (fuses, etc.) to the power circuit (VDD).

(Recommend value: 0.5A)

4) Pay sufficient attention to avoid occurrence of mutual noise interference with the neighboring

devices.

5) As for EMI, take necessary measures on the equipment side basically.

6) When fastening the OEL display module, fasten the external plastic housing section.

7) If power supply to the OEL display module is forcibly shut down by such errors as taking out the

main battery while the OEL display panel is in operation, we cannot guarantee the quality of this
OEL display module.

8) The electric potential to be connected to the rear face of the IC chip should be as follows: SSD1315

* Connection (contact) to any other potential than the above may lead to rupture of the IC.

IH

8.4 Precautions when disposing of the OEL display modules

1) Request the qualified companies to handle industrial wastes when disposing of the OEL display

modules. Or, when burning them, be sure to observe the environmental and hygienic laws and
regulations.

8.5 Other Precautions

1) When an OEL display module is operated for a long of time with fixed pattern may remain as an

after image or slight contrast deviation may occur.
Nonetheless, if the operation is interrupted and left unused for a while, normal state can be
restored. Also, there will be no problem in the reliability of the module.

2) To protect OEL display modules from performance drops by static electricity rapture, etc., do not

touch the following sections whenever possible while handling the OEL display modules.
* Pins and electrodes
* Pattern layouts such as the FPC

3) With this OEL display module, the OEL driver is being exposed. Generally speaking,

semiconductor elements change their characteristics when light is radiated according to the
principle of the solar battery. Consequently, if this OEL driver is exposed to light, malfunctioning
may occur.
* Design the product and installation method so that the OEL driver may be shielded from light in

actual usage.

* Design the product and installation method so that the OEL driver may be shielded from light

during the inspection processes.

4) Although this OEL display module stores the operation state data by the commands and the

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33／34

GDON0129RGW

GOOD DISPLAY

indication data, when excessive external noise, etc. enters into the module, the internal status may
be changed. It therefore is necessary to take appropriate measures to suppress noise generation
or to protect from influences of noise on the system design.

5) We recommend you to construct its software to make periodical refreshment of the operation

statuses (re-setting of the commands and re-transference of the display data) to cope with
catastrophic noise.

WWaarrrraannttyy::

The warranty period shall last twelve (12) months from the date of delivery. Buyer shall be completed to
assemble all the processes within the effective twelve (12) months. Dalian Good Display Co., Ltd. shall be
liable for replacing any products which contain defective material or process which do not conform to the
product specification, applicable drawings and specifications during the warranty period. All products must
be preserved, handled and appearance to permit efficient handling during warranty period. The
warranty coverage would be exclusive while the returned goods are out of the terms above.

NNoottiiccee::

No part of this material may be reproduces or duplicated in any form or by any means without the written
permission of Dalian Good Display Co., Ltd. Dalian Good Display Co., Ltd. reserves the right to make
changes to this material without notice. Dalian Good Display Co., Ltd. does not assume any liability of any
kind arising out of any inaccuracies contained in this material or due to its application or use in any product or
circuit and, further, there is no representation that this material is applicable to products requiring high level
reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by
implication or otherwise, and there is no representation or warranty that anything made in accordance with
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