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HG76360
UserMan
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Goetting KG HG76360 UserMan

DIN EN ISO 9001
Documentation Rev. 08
SR-Module HG 76360 ZA
Operational Description, Block Diagrams and Users Manual
Revision - History Documentation
Revision - History Software
Rev. Date Reason for Modification V0.20 10.08.2009 Module doesn’t start before Host configuration V0.21 11.09.2009 Debug version for log- analysis V0.22 13.10.2009 Different bug fixes Master of last connection is stored on slaves Packets have to be received successfully on both channels if slave looks for a master The configuration memory will be regularly written with meaningful values before each interrupt calling for configuration V0.24 29.01.2010 Detection and signalisation of burst errors V0.26 28.04.2010 Reading bus- test and debug information V0.28 11.08.2010 Quicker activation of radio chips (Warning: unstable) V0.29 16.08.2010 The “Lost-Sync” interrupt (BIT 5) is now redefined to a “Lost- Reg” interrupt, as already defined before. If text debugdata are provided, a SetDebugAvailable is set now, otherwise 0 (see GRFExternInterface, i.e. after SerDebug). So far only values from 1- 10 were correctly processed for the Master ID. From now on the Master ID can be set up to a value of 255 (as usual, only more options). The automatic search function only scans the first 10 options. Thus a conflict in an environment with a lot of operational systems can be avoided.
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DIN EN ISO 9001
Table of Contents
SR-Module HG 76360 ZA......................................................................................................1
Revision - History Documentation.......................................................................................1
Revision - History Software.................................................................................................1
Table of Contents ...............................................................................................................2
Documentation.....................................................................................................................4
Short-range transmission module (SR module for Transmodule)........................................4
General points ....................................................................................................................4
Block diagrams...................................................................................................................5
Timing.................................................................................................................................6
Signal integrity....................................................................................................................6
Registering a new vehicle, solving slave to master allocation problems..............................7
Allocating time slot to a sledge number and slave ID ..........................................................7
Sledge malfunction.............................................................................................................8
Commissioning new machine / new facility.........................................................................8
Commissioning, service (controlled by host).......................................................................9
Standard operation.............................................................................................................9
Memory configuration / structure.........................................................................................9
Configuration....................................................................................................................10
Start- Configuration register from offset 0x0400 (RXDPRAM):..........................................11
Frequency Hopping...........................................................................................................11
Data Memory....................................................................................................................12
Telegram Memory Configuration (received from offset 0x400)..........................................12
Telegram memory configuration (transmitting from offset 0x0000)....................................12
Status Information.............................................................................................................13
Control- and Status register (CTRL register from offset 0x800).........................................14
CRC Checksum................................................................................................................15
Initialising Process............................................................................................................16
Communication Cycle.......................................................................................................17
Timing...............................................................................................................................17
Time Slots.........................................................................................................................17
LED Status Signalling.......................................................................................................18
Module is configured as slave.......................................................................................18
Module is configured as master.....................................................................................18
Interrupts ..........................................................................................................................19
Write access..................................................................................................................19
Error analysis....................................................................................................................20
Bus test.............................................................................................................................20
Debug Log.......................................................................................................................20
Firmware Update- Serial...................................................................................................21
Cable Allocation................................................................................................................22
Firmwareupdate................................................................................................................22
Commands for the firmware update..................................................................................22
hCStartUpgrade............................................................................................................22
hcStartUpgradeDistribution ...........................................................................................22
hcExecuteLocalUpgrade...............................................................................................22
Assembly diagram, position of solder bridges in relation to IRQ setting ............................23
Commissioning for wireless measurements......................................................................24
Starting data transmission.............................................................................................25
Sending a continuous carrier:........................................................................................26
Setting up a wireless link...............................................................................................26
Labelling...........................................................................................................................27
Labelling of host device:................................................................................................27
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DIN EN ISO 9001
RF Exposure information:..............................................................................................27
Antenna:........................................................................................................................27
Specifications....................................................................................................................28
Glossary ...........................................................................................................................29
References:......................................................................................................................29
Structure of configuration data (Source code excerpt) ......................................................30
Structure of status information (Source code excerpt).......................................................31
FCC ID: NUDHG76360 This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Modifications not expressly approved by this company could void the user's authority to operate the equipment.
The SR-radio module HG 76360 meets the requirements according to R&TTE Directive 1999/5/EC: Safety/Health: EN 60950-1:2006 EN 50371:2002 EMC: EN 301 489-1 V1.8.1:2008-04 EN 301 489-3 V1.4.1:2002-08 Radio: EN 301 440-2 V1.2.1:2008-05
For more information according labelling see on page 27.
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DIN EN ISO 9001
Documentation
Short-range transmission module (SR module for Transmodule) General points
The SR module offers reliable, contact- free data transmission with real-time capability of data transmission within a set time frame between a Transmodule master control / master host, referred to in the following as a base station and up to 32 mobile, rail- mounted carriage controls / slave hosts, referred to in the following as mobile station. The SR modules communicate with the hosts using a PC / 104 structure. Data access is in 16-bit mode. External access is provided via the ISA bus and via a Dual- Ported RAM (DPRAM). There is an interrupt for events that can be configured with solder bridges. The structure of the SR modules for the base station and mobile station are identical. A configuration parameter tells the module whether it is being used as master, slave or is inactive. The SR modules have two separate wireless modules that operate in the ISM frequency band between 2400 MHz and 2483.5 MHz. These can be operated in full, semi­duplex or fully redundant mode with the Simplex procedure (alternating duplex). Currently the system is operated in Simplex-redundant mode. Data is either sent or received at the same time on both channels. High levels of availability are more important to the application than speed. In redundant mode, the same data is transmitted simultaneously on different frequencies, so that the likelihood of interrupting the entire transmission is almost zero. The channel spacing is 40 MHz, so that narrow band interferences can be concealed. The wireless transmission procedure is handled via an ARM7 derivate in conjunction with an FPGA. The high- frequency transmission is carried out on the stationary side via a radiating cable, which the SR master module’s two wireless channels are connected to directly using a 3 dB coupler / splitter. The SR mobile modules link their signal using a double coupler to the Radiating cable. The couplers are working bi-directionally. Depending on each time frame, the frequencies change (adaptive frequency hopping) to allow other ISM band users interruption- free communication. Channels that are occupied or experiencing interference are identified by CRC faults and passed over. The mobile SR modules do not only give the slave- host their according telegram, but telegrams for all vehicles. As a result, the slave- hosts are informed about the target status of all other vehicles. After receiving the data and transmitting it into the DPRAM, an interrupt is triggered that tells the vehicle’s computer that up-to-date data is available. The vehicle computer must only read off the data within a certain data frame, so that the buffer for the next transmission is free. Direct communication between the slave- hosts with one another is not envisaged. Each SR module has an RS- 232 interface, not used in normal mode, for directly debugging and for text and diagnosis purposes, as well as software updates. There is a special terminal program for this.
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DIN EN ISO 9001
Block diagrams
Figure 1
Figure 1 shows the block diagram of one SR-module. One pcb includes two radio-modules, a controlling FPGA and an arm processor. Figure 2 shows one complete system, including the master-module, the radiating cable and up to 32 slave modules. The two antenna ports of the master module are connected to a power combiner, connected to the radiating cable.
SLAVE 1
SLAVE 2
SLAVE 32
SPI
RF1
2.4Ghz
FPGA
PC104
PC104
RF2
2.4Ghz
PC104
PC104
RF2
2.4Ghz
RF2
SPI
Cntl.
SPI
2.4Ghz
MASTER
Cntl.
Processor
………...
SL2
Processor
RF1
SPI
SPI
2.4Ghz
RF1
2.4Ghz
FPGA
Cntl.
SPI
SL1
FPGA
SPI
RF1
2.4Ghz
FPGA
PC104
PC104
RF2
2.4Ghz
Processor
Cntl.
SPI
SL32
50R
Processor
PC104
PC104
HOST
Figure 2
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DIN EN ISO 9001
Timing
Because transmission takes some time, the master SR module controls the overall timing. It should be assumed that the master- host is in the position to send on or pick up data at adequate speed. There are differences in the timing (Figure 3) between the master and the slave- module.
Figure 3
Signal integrity
Errors in the data are identified by using addresses and creating a CRC check sum. Incorrect data is rejected, there is no FEC (forward error correction). The transmission is not repeated, as this would take just as long as transmitting new, up-to-date data. When transmission is carried out on two different frequencies at the same time, there may be interference in one of the two data sets, but the correct data set is displayed. If errors accumulate on one channel, a new channel can be selected. In each master frame, the next bottom channel to be used is coded. The top channel is 40 MHz above the bottom one. The information is available to both channels so that switching works reliably, even if there is interference on another channel. A new subscriber scans all 40 available channels for 10 ms each and is then up to date very quickly. As the cycle is 10 milliseconds, this procedure takes a maximum of 400 ms. The block error rate determines the signal integrity.
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DIN EN ISO 9001
Registering a new vehicle, solving slave to master allocation problems
As the module has no clear allocation from the configuration, the slave has to automatically identify its appropriate master. A clear identification by the master host (1-10) is issued on the stationary SR module. Where neighbouring Transmodules are concerned, this must be different so that a slave does not receive a master nearby that has the same ID. When changing the slaves to another machine, the voltage supply to the wireless module is interrupted and therefore only has to find the allocation to its master when switched on. With these conditions in mind, the problem is solved as follows:
• The slave starts and looks for a master on the frequencies and addresses possible
• Once a master is found, the slave tries to synchronise to it
• The slave now waits until it has received 10,000 packages from the master. If until
that point fewer than 20 CRC errors have occurred, standard communication operation is triggered. If more than 20 CRC errors have occurred, the search for a master is started again.
From V0.22 on: After successfully connecting, the slave ID (1..32) and the master that has been found (1..10) are saved. These settings are used during a reboot, so that contact to the master can be made more quickly. Strict conditions are used to test whether the master is the correct one. If the master last used is not considered good, the search for the master is started once more.
Absolute reliability that the slaves contact the correct master is not guaranteed. If successful, the whole procedure takes approx. 30 seconds until communication starts. When a sledge is added to a Transmodule and communication is experiencing interference, the master will not use the new sledge if the identification process can not be completed. This can for example occur at the turning position that is affected frequently by CRC errors because of poor coupling.
Allocating time slot to a sledge number and slave ID
A customer’s sledge pool can include up to 999 vehicles (sledges). A plate showing the sledge number is applied to the outside of the sledge so that the user can read it. To begin with, the sledge number is not available in the sledge. The user does not need to issue the time- slot number, as the SR slave module reports to the SR master module which allocates the next free time slot. The master host identifies a new sledge as soon as in a previously unused receiving- data range data is transmitted from a slave host. The offset of the received- data memory range is calculated from the (slave ID-1) x 32. The base address is 0x400. A slave ID can be allocated to the SR slave module by the slave host, which can however lead to collisions if a slave ID is allocated twice. Therefore, the system usually allocates these slave IDs automatically. Via a wireless connection, the master host will then ask for the MAC address of the slave host. The master host will then link the MAC address with the carriage number that the operator has to enter. As only one transmission data address range exists on the slave, the slave host does not need to know the slave ID. The slave ID can be obtained at any time by looking at the status information.
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DIN EN ISO 9001
Sledge malfunction
If a wireless slave / carriage fails, no login is carried out. If login lapses, the master host must always check the slave host by asking for the MAC address and reacting accordingly. This is the only way of guaranteeing that the master host has an up-to-date overview of its sledges.
Commissioning new machine / new facility
For the wireless modules commissioning new machinery / facility is no different to an interruption in the electricity supply. When switching on, a search for a master will always be carried out. The slave contains no configuration data on a particular master and therefore no machinery number either. It always logs into the master to which the transmission is better than the defined quality criterion. This means of course that after a reboot the master host has to request all MAC addresses to learn which is the current carriage. Actually the sledges contain a memory card (SD-card) which holds the configuration of the machine. Therefore no master search is necessary.
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DIN EN ISO 9001
Commissioning, service (controlled by host)
The block error rates on both channels are constantly captured and can be read out. The transmission capacity of the master module can now slowly and gradually be reduced in three increments. The increments decrease in units of 6 dB each (0 dBm, - 6 dBm, - 12dBm and – 18 dBm), so that finally a transmission is carried out at an output power of – 18 dBm (0,016 mW). The block error rate is identified for each transmission level. The data is entered in the DPRAM and is available to the host for analysis. Reducing the transmission capacity to –18 dBm must not lead to an significant increase in the block error rate.
Standard operation
The maximum transmitter power is used during standard operation. In the standard transmission mode, the block error rates for each radio channel used are constantly identified, in order to be able to recognize previously unpredictable ageing effects and failures at an early state.
Memory configuration / structure
An ISA bus structure is used, which is implemented via a PC/104 interface for the SR module to communicate with the host. The external control computer (controller) can access the SR module’s memory via memory I/O access. The quantity of payload data to be transmitted is 16 bytes per slave. Some 16 bytes of status information is reserved per frame. A maximum of 32 vehicles can communicate with the master. This results in 32 blocks of 16 bytes each = 512 TX bytes and 32 blocks of 32 bytes each = 1024 RX bytes that have to be made available by the SR module. Additional memory area with control registers is planned from 0x800 for control and monitoring. The memory blocks are clearly allocated to the slave ID: Address = I/O-offset + (Slave-ID-1) x sizeof(block). Via the configuration blocks to be transmitted by the master, the slaves can be put into other definable operating modes, such as software update, commissioning. Table 1 shows the memory structure for transmitting data from the SR module to the host. For data transmission addresses 0x0000-0x01FF, for data receiving addresses 0x0400­0x07FF is provided. 0x200 to 0x3FF is for status information. From 0x800 onwards control registers will follow.
I/O-Offset
0xXX0000
CTRL Register
0xXX0800 0xXX07FF
DPRAM RX
0xXX0400 0xXX03FF
STATUS
0xXX0200 0xXX01FF
DPRAM TX
0xXX0000
Table 1
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DIN EN ISO 9001
Configuration
The maximum number of mobile subscribers can be configured during booting. The appropriate parameter is entered when commissioning the system and as a result defines the maximum number of addresses occurring. Therefore, automatic registering (see above) is guaranteed and the frame time optimised. The number of bytes per subscriber to be transmitted is currently compiled in the source text for controller and FPGA. Consequently the duration of the transmission can be enhanced. The value is currently set to 16 bytes. This value cannot be configured. Wireless software upload is implemented. The configuration is stipulated by the host controller and cannot be read back. A configuration tool for the RS- 232 interface was created. During real operations the configuration and firmware uploads are carried out via the ISA bus. All subscribers to the system must have the same parameters. The set of parameters is retransmitted in each cycle as a broadcast message in the service blocks. Therefore, configuration is done on the master and radio- transmitted to the slaves. In the module itself, the serial number and the I/O offset address is stored for access to the ISA bus. Configuration is carried out via the memory for receiving data (RXDPRAM). Notification that configuration has been completed is shown when the first data word is nonzero (0x000). After booting the modules, an interrupt is triggered that is initially actively masked.
This configuration range is pre- initialised by the wireless module with meaningful values. In the testing phase the module boots with the pre-set default values if the host computer has not written any other configuration for three seconds. From version V0.20 the module does not boot until the host has given it a configuration.
From V0.22 the memory for the initial configuration is now written with meaningful default values before each interrupt that calls for configuration. Parameters that are not of interest should not be changed. Bytes that exceed the length of the configuration may not be changed as they should contain settings for the new firmware versions which for downwards compatibility reasons are yet not processed.
After writing the configuration the memory area must not be written for at least 150 ms. Normally this should not happen, as the memory area concerns the receiving memory that is only read during operation. Please must be regarded during a memory test: The configuration range is written on every 100 ms with the default configuration.
Only the master / slave configuration (Word [1]) is required for all subscribers and clear identification of the Transmodule (Word [28]) at the master. The rest, which is shown as optional in the table, can be ignored at the moment and is only displayed for reference purposes should there be any unpredictable changes.
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