Global 3308200 User Manual

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Page 1

User’s Manual

Single B oard Computer 3308200 Version 1.0 ,

March 2009

Page 2

Copyrights

This manual is copyrighted and all rights are reserved. It does not allow any non authorization in copied, photocopied, translated or reproduced to any electronic or machine readable form in whole or in part without prior written consent from the manufacturer.

In general, the manufacturer will not be liable for any direct, indirect, special, incidental or consequential damages arising from the use of inability to use the product or documentation, even if advised of the possibility of such damages. The manufacturer keeps the rights in the subject to change the contents of this manual without prior notices in order to improve the function design, performance, quality and reliability. The author assumes no responsibility for any errors or omissions, which may appear in this manual, nor does it make a commitment to update the information contained herein.

Trademarks

Intel is a registered trademark of Intel Corporation. Award is a registered trademark of Award Software, Inc.

All other trademarks, products and or product's name mentioned herein are mentioned for identification purposes only, and may be trademarks and/or registered trademarks of their respective companies or owners.

Page 3

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

1Chapter 1

Introduction

Chapter 1 - Introduction

Page 4

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

1.7 Packing List

If any of the above items is damaged or missing, contact your vendor immediately.

x 3308200 3.

” Embedded Board

1 x Driver CD

1 x Quick Installation Guide

Page 5

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

1.9 Specication

Form Factor 3.5” Embedded MiniBoard

CPU

Onboard Intel

Celeron M 1.0GHz zero cache processor,

FAB400MHz.

Chipset Intel

852GM + Intel® ICH4

System Memory

1 x 200-pin SO-DIMM socket for DDR Up to

1GB

SDRAM

VGA Controller

Intel

852GM Exreme Graphics2 Engine up to 64MB UMA Video RAM CRT

, 18/36-bit LVDS, Dual mode independent display

Ethernet

1 x Intel

82562 10/100 Base-T Fast Ethernet LAN

I/O Chips Winbond W83627HG

BIOS Phoenix-Award PnP Flash BIOS

Audio ALC655

AC’97 Codec, MIC-in/Line-in/Line-out

IDE Interface 1 x Ultra DMA

33, support 2 IDE devices

Serial Port 2 x COM port (RS-232)

Parallel Port/ Floppy

1 x SPP/EPP/ECP

mode

1 x Floppy connector share with LPT port

IrDA 1 x IrDA

connector

KBMS Standard PS/2 Keyboard and Mouse

Universal Serial Bus 6 x USB 2.0 compliant

DIO 8-bit programmable Digital I/O

Expansion Interface

1 x Mini PCI slot 1

x CF II Socket

Hardware Monitor Chip Integrated in W83627HG

RTC Real Time Clock

Operation Temp. -20

C ~ +70oC (-4oF ~ 158oF)

Watchdog Timer 255

-level Reset

Dimension (L x W) 146 x

102 mm ( 5.7 ” x 4.0 ” )

Page 6

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

1.10 Board Dimensions

Unit:mm

Layout Top View

Page 7

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

Unit:mm

Layout Bottom View

Page 8

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Introduction

1.11 Installing the Memory

To install the Memory module, locate the Memory SO-DIMM slot on the board and perform as below:

1. Adjust the socket polarizing key and the board key to the same direction.

2. Insert the board obliquely. Moreover, lay the board in parallel to the opening at angle of 20

to 30o, and softly insert the board so as to hit the

socket bottom. Stopping insertion halfway will result in improper insertion.

3. Applying the board side notch in parallel to the socket bottom so that the board position cannot be displaced, press the board side notch up,

and x it to the latch portion at both socket edges. Press the board side

notch, and release the notch with a snap “click” tone, if the printed board exceeds the latch claw head.

Latch knob

Latch claw

Latch section

Latch arm

Polarizing key

Procedures for board extraction

Apply the thumb nail to the latch knob at both socket edges. Forcibly widen the latch knobs to right and left ways, and release the latch. Then draw the board out along an angle where the board is raised.

Side notch

Key

Page 9

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

2Chapter 2

Installation

Chapter 2 - Installation

Page 10

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

2.1 Block Diagram

Analog

R.G.B.

VGA

LVDS

Intel®

852GM

Intel® Celeron M

1.0GHz CPU

1 x Mini PCI

LAN Controller

Fast LAN

(RJ-45)

FSB 400MHz

USB I/F

IDE ATA I/F

Intel®

ICH4

DIO

1 x IDE

6 x USB

Audio

Memory Bus

Super IO

COM1

COM2

LPT1/

FDD

IrDA

Codec

AC’97

1 x CF II

LVDS

LPC I/F

1 x 200pin DDR

SO-DIMM socket

PCI Bus

Page 11

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

2.2 Jumpers and Connectors

Page 12

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

Jumpers

JVLCD1: LCD Panel Voltage Select (15)

The voltage of LCD panel could be selected by JVLCD1 in +5V or +3.3V. Connector type: 2.54mm pitch 1x3 pin header

Pin Voltage

1-2 +5V

23 1

2-3 +3.3V (Default)

23 1

JBAT1: CMOS Setup (12)

If the board refuses to boot due to inappropriate CMOS settings here is how to proceed to clear (reset) the CMOS to its default values. Connector type: 2.00mm pitch 1x3 pin header

Pin Mode

1-2 Keep CMOS (Default)

23 1

2-3 Clear CMOS

23 1

You may need to clear the CMOS if your system cannot boot up because you forgot your password, the CPU clock setup is incorrect, or the CMOS settings need to be reset to default values after the system BIOS has been updated. Refer to the following solutions to reset your CMOS setting:

Solution A:

1. Power off the system and disconnect the power cable.

2. Place a shunt to short pin 1 and pin 2 of JBAT1 for ve seconds.

3. Place the shunt back to pin 2 and pin 3 of JBAT1.

4. Power on the system.

Solution B:

If the CPU Clock setup is incorrect, you may not be able to boot up. In this case, follow these instructions:

1. Turn the system off, then on again. The CPU will automatically boot up

using standard parameters.

2. As the system boots, enter BIOS and set up the CPU clock.

Note:

If you are unable to enter BIOS setup, turn the system on and off a few times.

Page 13

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

Connectors

IR1: Infrared Connector (2)

Connector type: 2.54mm pitch 1x5 pin header

Pin Description

1 +5V

2 N/C

3 IRRX

4 GND

5 IRTX

The IR connector can be congured to support wireless infrared module, user can transfer les to or from notebooks, PDA and printers.

Install infrared module onto IrDA connector and enable infrared function from BIOS setup and make sure to have correct orientation when you plug onto IrDA connector.

INV1: LCD Inverter Connector (1)

Connector type: 2.00mm pitch 1x5-pin box wafer connector.

Pin Description

1 2 3 4 5

1 +12V

2 GND

3 Backlight on/off

4 Brightness control

5 GND

Page 14

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

IDE1: IDE Connector (3)

An IDE drive ribbon cable has two connectors to support two IDE devices. If a ribbon cable connects to two IDE drives at the same time, one of them has

to be congured as Master and the other has to be congured as Slave by

setting the drive select jumpers on the drive. Consult the documentation that came with your IDE drive for details on jumper locations and settings. You must orient the cable connector so that the pin 1 (color) edge of the cable corresponds to pin 1 of the IDE connector. Connector type: 2.00mm pitch 2x22 pin header

Pin Description Pin Description

4443

1 IDE RESET 2 GND

3 DATA7 4 DATA8

5 DATA6 6 DATA9

7 DATA5 8 DA

TA10

9 DATA4 10 DA

TA11

11 DATA3 12 DA

TA12

13 DATA2 14 DA

TA13

15 DATA1 16

DATA14

17 DATA0 18 DA

TA15

19 GND 20 N/C (Key)

21 REQ 22

GND

23 IO WRITE 24 GND

25 IO READ 26

GND

27 IO READY 28 N/C

29 DACK 30 GND

31 IRQ1

4 32 N/C

33 ADDR1 34 A

TA66 DETECT

35 ADDR0 36 ADDR2

37 CS#2 38 CS#3

39 IDEACTP 40 GND

41 +5

V 42 +5V

GND 44 N/C

Page 15

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

SMBUS1: External SMBUS Connector (4)

Connector type: 2.54mm pitch 1x3 box wafer connector.

Pin Description

1 2 3

1 Data

2 Clock

3 GND

DIO1: Digital I/O Connector (5)

DIO1 is a 8-bit DIO connector that supports 4-bit In/ 4-bit Out. Connector type: 2.00 mm pitch 2x5 pin header

Pin Description Pin Description

1 DIO1 2 DIO2

3 DIO3 4 DIO4

5 DIO5 6

DIO6

7 DIO7 8 DIO8

9 +5

V 10 GND

Page 16

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

JFRT1: Switches and Indicators (6)

It provides connectors for system indicators that provides light indication of the computer activities and switches to change the computer status. Connector type: 2.00 mm pitch 2x5 pin header

Pin Description Pin Description

1 RESET+ 2 RESET-

3 Power LED+ 4 Power LED-

5 HDD LED+ 6 HDD LED-

7 SPEAKER+ 8 SPEAKER-

9 PSON+ 10

PSON-

RES: Reset Button, pin 1-2.

This 2-pin connector connects to the case-mounted reset switch and is used to reboot the system.

PLED: Power LED Connector, pin 3-4.

This 2-pin connector connects to the case-mounted power LED. Power LED can be indicated when the CPU card is on or off. And keyboard lock can be used to disable the keyboard function so the PC will not respond by any input.

HLED: HDD LED Connector, pin

5-6.

This 2-pin connector connects to the case-mounted HDD LED to indicate hard disk activity.

SPK: External Speaker, pin 7-8.

This 2-pin connector connects to the case-mounted speaker.

PWRBTN: A

TX soft power switch, pin 9-10.

This 2-pin connector connects to the case-mounted Power button.

COM2: RS-232 Connectors (7)

Connector type: 2.54mm pitch 2x5 box header.

Pin Description Pin Description

1 DCD# 2 RXD

3 TXD 4 DTR#

5 GND 6 DSR#

7 RTS# 8 CTS#

9 RI# 1

N/C

9 10

Page 17

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

LPT1: Parallel Port or FDD Connector (8)

LPT1 is shared with FDD. Connector type: 2.00mm pitch 2x10 pin header.

Pin Description Pin Description

2019

1 2

1 STROBE 2 AFD

3 PTD0 4 ERROR

5 PTD1 6

INIT

7 PTD2 8 SLIN

9 PTD3 10

GND

11 PTD4 12

GND

13 PTD5 14 GND (Key)

15 PTD6 16

BUSY

17 PTD7 18

19 ACK 20 SELECT

LPT1 can be congured as a connector oppy disk drive interface through

BIOS setup.

Pin Description Pin Description

N/C

RWC-

RINDEX-

HEAD-

TRAK0-

DIR-

WP-

STEP-

RDATA-

GND

DSKCHG-

GND

N/C

MOB-

N/C

WD-

DSB-

WE-

BIOS Setup

The default is to set LPT1 as FDD connector. To change the value, get into BIOS setup --> Integrated Peripheral --> Super IO Device.

BIOS Option Setting Description

External FDD Controller Enabled Set as FDD connector

Onboard Parallel Port Disabled

External FDD Controller Disabled

Onboard Parallel Port 378/IRQ7 Set as Parallel Port

Page 18

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

USB2/ USB3 supports four USB 2.0 w/ 480MB/s by 2.00mm pitch 2x5 pin header

Pin Description Pin Description

1 +5

V 2 +5V

3 USBD- 4 USBD-

5 USBD+ 6 USBD+

7 GND 8 GND

9 GND 10

N/C (Key)

USB2/ USB3: USB Connector (9), (10)

AUDIO1: Front Panel AUDIO Connector (11)

Connect a tape player or another audio source to the light blue Line-in connector to record audio on your computer or to play audio through your computer’s sound chip and speakers. Connect a micro-phone to the pink microphone connector to record audio to your computer. Connector type: 2.00mm pitch 2x5 pin header.

Pin Description Pin Description

1 2

1 Line-in Left 2 Line-in Right

3 GND 4 GND

5 MIC1 6

MIC2/N.C

7 GND 8 GND

9 Line-out Left 10

Line-out Right

MINIPCI1: MiniPCI slot (13)

Page 19

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

LVDS1: LVDS LCD Connector (14)

The LVDS connector supports 18-bit or 36-bit LVDS. VDD could be selected by JVLCD1 in +5V or +3.3V. Connector type: DF-13-30DP-1.25V

Pin Description Pin Description 1 VDD 2 VDD 3 TX2CLK+ 4 TX1

CLK+

5 TX2CLK- 6 TX1

CLK7 GND 8 GND 9 TX2D0+ 10

TX1D0+

11 TX2D0- 12

TX1D0-

13 GND 14

GND

15 TX2D1

+ 16 TX1D1+ 17 TX2D1- 18 TX1D119 GND 20 GND 21 TX2D2+ 22

TX1

D2+

23 TX2D2- 24 TX1

D225 GND 26 GND 27 TX2D3+ 28 TX1

D3+ 29 TX2D3- 30 TX1

D3-

2930

USB3 supports two USB 2.0 w/ 480MB/s by USB connector type A.

USB1: USB Stack Connector (16)

USB

LAN2 supports 1

0/100 Mbps Fast Ethernet

LAN1: 10/100 RJ-45 (17)

LAN2

Page 20

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

KBM1: Keyboard & Mouse (18)

Mini-Din Keyboard & Mouse connector

Pin Description

1 KB Data

2 MS Data

3 GND

4 +5

5 KB Clock

6 MS Clock

Note: KBM1

supports PS/2 keyboard directly, and PS/2 mouse supported

with the additional PS/2 1-to-2 cable.

VGA1: CRT Connector (19)

Connector type: D-Sub 15-pin female.

Pin Description Pin Description

1 RED 9 +5V

2 GREEN 10

GND

3 BLUE 11 N/C

4 N/C 12

VDDAT

5 GND 13

HSYNC

6 GND 14

VSYNC

7 GND 15 VDCLK

8 GND

COM1: RS-232 Connector (20)

Connector type: D-Sub 9-pin male.

Pin Description Pin Description

1 DCD# 6 DSR#

2 RXD 7 RTS#

3 TXD 8 CTS#

4 DTR# 9 RI#

5 GND

Page 21

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

FAN1: CPU Fan Power Connector (23)

CPUF1 is 3-pin header for the system fan. The fan must be a +12V fan.

Pin Description

1 GND

2 +1

3 FAN_Detect

PWR1: Power Supply Connector (21)

Connector type: 5.08mm pitch 1x4-pin wafer connector

Pin Description

1 2 3 4

1 +12V

2 GND

3 GND

4 +5

EATX1: ATX Feature Connector (22)

Connector type: 2.54mm pitch 1x3-pin box wafer connector

Pin Description

1 2 3

1 PS-ON

2 GND

3 5V_SB

Page 22

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

CFD1: Compact Flash II Socket (24)

Connector type: 50-pin compact ash connector

Pin Description Pin Description

1 GND 26 N/C 2 SDD3 27 SDD1

3 SDD4 28 SDD1

4 SDD5 29

SDD13

5 SDD6 30 SDD1

6 SDD7 31 SDD

7 SDCS1

# 32 SDCS3# 8 GND 33 N/C 9 GND 34 SDIOR# 1

0 GND

35 SDIOW#

1 GND 36 +5

V 12 GND 37 IRQ15 1

3 +5V 38 +5

V 14 GND 39 CSEL# 15 GND 40 N/C 1

6 GND

41 IDERST2#

17 GND

42 SIORDY

18 SDA2

43 SDDREQ

SDA1 44 SDDACK#

20 SDA0 4

5 HD_LED2#

21 SDD0

46 SDIAG#

22 SDD

1 47

SDD8 23 SDD2 48 SDD9 24 IOCS

6# 49 SDD10

25 N/C 50

GND

The interface of Compact Flash socket is designated to use IDE2.

Installation instructions

Compact Flash (CF) card is “ not hot-swap ”. If the CF card is swapped in the condition of system power-on, it will damage the CF card.

1. Make sure the Single Board Computer is powered OFF.

2. Plug the Compact Flash Type II device into its socket. Verify the direction is correct.

3. Power up the system.

Page 23

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Installation

2.3 The Installation Paths of CD Driver

Driver Path AUDIO \AUDIO\REALTEK\AC97 CHIPSET \CHIPSET\INTEL\INF 6.3 LAN \ETHERNET\INTEL\PRO

0&100

VGA \GRAPHICS\INTEL\85

Page 24

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

BIOS

3.15 BIOS Beep Sound code list

Address Device Description

E000:0000h - F000:FFFFh System BIOS Area

D000:2000h - D000:FFFFh Free space

D000:0000h - D000:1

FFFh LAN ROM

C000:E000h - CF00:FFFFh Free space

C000:0000h - C000:DFFFh VGA BIOS

A000:0000h - B000:FFFFh VGA RAM

0000:0000h - 9000:FFFFh DOS 640K

3.16 BIOS memory mapping

Beep Sound Message

1 short (Beep) System booting is normally

2 short (Beep) CMOS setting error

1 long -

1 short (Beep) DRAM error

1 long - 2 short (Beep)

Display card or monitor connected error

1 long - 3 short (Beep)

Keyboard error

1 long - 9 short (Beep)

ROM error

Long (Beep) continuous DRAM hasn’t inset correctly

Short (Beep) continuous POWER supply has problem

Page 25

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

BIOS

CFh Test CMOS read/write functionality C0h

Early chipset initialization: Disable shadow RAM, L2 cache (socket 7 and below), program basic chipset registers

C1h

Detect memory:

Auto detection of DRAM size, type and ECC, auto

detection of L2 cache (socket 7 and below)

C3h

Expand compressed BIOS code to DRAM

C5h

Call chipset hook to copy BIOS back to E000 & F000 shadow RAM

01h

Expand the Xgroup codes located in physical memory address 1000:0 02h Reserved 03h Initial Superio_Early_Init switch 04h Reserved 05h Blank out screen; Clear CMOS error ag 06h

Reserved 07h Clear 8042 interface; Initialize 8042 self test

08h

Test special keyboard controller for Winbond 977 series Super I/O

chips; Enable keyboard interface 09h Reserved

0Ah

Disable PS/2 mouse interface (optional); Auto detect ports for

keyboard & mouse followed by a port & interface swap (optional);

Reset keyboard for Winbond 977 series Super I/O chips 0Bh Reserved

0Ch Reserved 0Dh Reserved

0Eh

Test F000h segment shadow to see whether it is read/write capable or

not.

If test fails, keep beeping the speaker

0Fh Reserved 10h

Auto detect ash type to load appropriate ash read/write codes into

the run time area in F000 for ESCD & DMI support 11

Reserved 12h

Use walking 1

’s algorithm to check out interface in CMOS circuitry.

Also set real time clock power status and then check for override 13h Reserved

14h

Program chipset default values into chipset. Chipset default values

are MODBINable by OEM customers 15h Reserved

16h Initial Early_Init_Onboard_Generator switch 17h Reserved

18h

Detect CPU information including brand, SMI type (Cyrix or Intel) and

CPU level (5

86 or 686)

9h Reserved

1Ah Reserved

1Bh

Initial interrupts vector table. If no special specied, all H/W

interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to

SPURIOUS_soft_HDLR 1Ch Reserved

1Dh Initial EARL

Y_PM_INIT

switch 1Eh Reserved 1Fh Load keyboard matrix (notebook platform)

3.17 Award BIOS POST Codes

Page 26

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

BIOS

20h Reserved 21h HPM initialization (notebook platform) 22h Reserved

23h

Check validity of RTC value; Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead; Prepare BIOS resource map for PCI & PnP

use. If ESCD is valid, take into consideration of the ESCD's legacy information; Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots; Early PCI initialization - Enumerate PCI bus number, assign memory & I/O resource, search for a valid VGA device & VGA BIOS, and put it into C000:0

24h Reserved 25

h Reserved 26h Reserved 27h Initialize INT 09 buffer 28h Reserved

29h

Program CPU internal MTRR (P6 & PII) for 0-640K memory address; Initialize the APIC for Pentium class CPU; Program early chipset according to CMOS setup; Measure CPU speed; Invoke video BIOS

2Ah Reserved 2Bh Reserved 2Ch Reserved

2Dh

Initialize multilanguage; Put information on screen display, including Award title, CPU type, CPU speed, etc...

2Eh Reserved 2Fh Reserved 30h Reserved 3

h Reserved 32h Reserved 33h Reset keyboard except Winbond 977 series Super I/O chips 34h Reserved 3

h Reserved 36h Reserved 37h Reserved 38h Reserved 39h Reserved 3Ah Reserved 3Bh Reserved 3Ch T

est 8254

3Dh

Reserved 3Eh Test 8259 interrupt mask bits for channel 1 3Fh

Reserved 40h Test 9259 interrupt mask bits for channel 2 4

1h Reserved 42h Reserved 43h Test 8259 functionality 44h

Reserved

h Reserved

46h Reserved

Page 27

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

BIOS

47h Initialize EISA slot 48h Reserved

49h

Calculate total memory by testing the last double last word of each 64K page; Program writes allocation for AMD K

5 CPU

4Ah Reserved 4Bh Reserved 4Ch Reserved 4Dh Reserved

4Eh

Program MTRR of M1

CPU; initialize L2 cache for P6 class CPU & program cacheable range; Initialize the APIC for P6 class CPU; On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical

4Fh Reserved 50h Initialize USB 51h Reserved 52h T

est all memory (clear all extended memory to 0) 53h Reserved 54h Reserved 55h Display number of processors (multi-processor platform) 56h Reserved

57h

Display PnP

logo; Early ISA PnP initialization and assign CSN to

every ISA PnP device

58h Reserved 59h Initialize the combined

Trend Anti-Virus code

5Ah Reserved 5Bh

Show message for entering

AWDFLASH.EXE from FDD (optional

feature)

5Ch Reserved 5Dh

Initialize Init_Onboard_Super_IO switch; Initialize Init_Onboard_ AUDIO switch

5Eh Reserved 5Fh Reserved 60h

Okay to enter Setup utility

h Reserved 62h Reserved 63h Reserved 64h Reserved 6

h Initialize PS/2 mouse 66h Reserved 67h Prepare memory size information for function call: INT

15h ax=E820h 68h Reserved 69h Turn on L2 cache 6Ah Reserved

6Bh

Program chipset registers according to items described in Setup &

Auto-Conguration table

6Ch Reserved 6Dh

Assign resources to all ISA PnP devices; Auto assign ports to onboard COM ports if the corresponding item in Setup is set to “AUTO”

6Eh Reserved 6Fh Initialize oppy controller; Setup oppy related elds in 40:hardware

Page 28

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

BIOS

70h Reserved 71h Reserved 72h Reserved

73h

Enter AWDFLASH.EXE if: AWDFLASH.EXE is found in oppy dive

and ALT+F2 is pressed

74h Reserved 7

h Detect and install all IDE devices: HDD, LS120, ZIP, CDROM... 76h Reserved 77h Detect serial ports and parallel ports 78h Reserved 79h Reserved 7Ah Detect and install coprocessor 7Bh Reserved 7Ch Reserved 7Dh Reserved 7Eh Reserved

7Fh

Switch back to text mode if full screen logo is supported: if errors occur

, report errors & wait for keys, if no errors occur or F

1 key is

pressed continue - Clear EPA or customization logo

80h Reserved 81

h Reserved

82H

Call chipset power management hook: Recover the text fond used by EPA logo (not for full screen logo), If password is set, ask for password

83H Save all data in stack back to CMOS 84h Initialize ISA PnP boot devices

Final USB initialization; NET PC: Build SYSID structure; Switch screen back to text mode; Set up ACPI table at top of memory; Invoke ISA adapter ROM’s; Assign IRQ’s to PCI devices; Initialize APM; Clear noise of IRQ’s

86h Reserved 87h Reserved 88h Reserved 89h Reserved 90h Reserved 91

h Reserved 92h Reserved 93h Read HDD boot sector information for Trend Anti-Virus code

94h

Enable L2 cache; Program boot up speed; Chipset nal initialization; Power management nal initialization; Clear screen and display

summary table; Program K6 write allocation; Program P6 class write combining

h Program daylight saving; Update keyboard LED and typematic rate 96h

Build MP table; Build and update ESCD; Set CMOS century to 20h or 1

9h; Load CMOS time into DOS timer tick; Build MSIRQ routing table

FFh

Boot attempt (INT

19h)

Page 29

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Appendix

4Chapter 4

Appendix

Chapter 4 - Appendix

Page 30

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Appendix

Each peripheral device in the system is assigned a set of I/O port addresses which also becomes the identity of the device. The following table lists the I/O port addresses used.

4.1 I/O Port Address Map

Address Device Description

00000000 - 0000000F DMA Controller

00000080 - 0000009F DMA Controller

000000C0 - 000000DF DMA Controller

00000020 - 00000021 Programmable Interrupt Controller

000000A0 - 000000A1 Programmable Interrupt Controller

00000040 - 00000043 System

Timer

00000044 - 00000047 System Timer

00000060 - 00000064 Keyboard Controller

00000070 - 00000073 System CMOS/Real Time Clock

000000F0 - 000000FF Math Co-processor

000001F0 - 00000

1F7 Primary IDE

00000274 - 00000277 ISAPNP Read Data Port

00000279, 00000A79 ISAPNP Conguration

000002F8 - 000002FF Communications Port (COM2, If use)

00000378 - 0000037A Parallel Port (If use)

000003B0 - 000003BF MDA/MGA

000003C0 - 000003CF EGA/VGA

000003D4 - 000003D9 CGA CRT register

000003F0 - 000003F7 Floppy Diskette

000003F6 - 000003F6 Primary IDE

000003F8 - 000003FF Communications Port (COM1, If use)

00000400 - 000004

1F South Bridge SMB

000004D0 - 000004D1 IRQ Edge/Level Control Ports

00000500 - 00000

53F South Btidge GPIO

00000800 - 0000087F ACPI

00000A00 - 00000A07 PME

Page 31

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Appendix

00000A10 - 00000A17 Hardware Monitor

00000CF8 PCI Conguration Address

00000CFC PCI Conguration Data

Peripheral devices use interrupt request lines to notify CPU for the service required. The following table shows the IRQ used by the devices on board.

4.2 Interrupt Request Lines (IRQ)

Level Function

IRQ 0 System Timer

IRQ 1 Keyboard Controller

IRQ 2

VGA and Link to Secondary PIC

IRQ 3 Communications Port (COM2)

IRQ 4 Communications Port (COM1

)

IRQ 5 PCI Device

IRQ 6 Standard Floppy Disk Controller

IRQ 7 Parallel Port

IRQ 8 System CMOS/real time clock

IRQ 9 Microsoft ACPI-Compliant System

IRQ 1

0 PCI Device

IRQ 1

1 PCI Device

IRQ 1

2 PS/2 Compatible Mouse

IRQ 1

3 FPU Exception

IRQ 1

4 IDE Controller

IRQ 15 PCI Device

Page 32

Index

Chapter 1 Introduction ...........................................................1

Chapter 2 Installation ............................................................ 9

Chapter 3 BIOS ...................................................................... 25

Chapter 4 Appendix ............................................................... 56

Appendix

Address Device Description

00000h - 9FFFFh DOS Kernel

Area

A0000h, BFFFFh EGA and VGA V

ideo Buffer (128KB)

C00000h - CFFFFh EGA/VGA ROM

D0000h - DFFFFh Adaptor ROM

E00000h - FFFFFh System BIOS

4.3 BIOS memory mapping

Page 33

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