G-LINK GLT6200L08LL-85ST, GLT6200L08LL-85FG, GLT6200L08LL-70ST, GLT6200L08LL-70FG, GLT6200L08LL-55ST Datasheet
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G-LINK
GLT6200L08
Ultra Low Power 256k x 8 CMOS SRAM
Nov 2000(Rev. 1.0)
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 1 -
Features : Description :
∗ Low-power consumption.
-active: 30mA at 55ns.
-stand by :
10 µA (CMOS input / output)
2 µA (CMOS input / output, SL)
∗ Single +2.7 to 3.3V power supply.
∗ Equal access and cycle time.
∗ 55/70/85 ns access time.
∗ 1.0V data retention mode.
∗ TTL compatible, tri-state input/output.
∗ Automatic power-down when deselected.
∗ Industrial grade (-40°C ~ 85°C)
available.
∗ Package available: 32-sTSOP.
48Ball CSP-BGA
The GLT6200L08 is a low power CMOS Static
RAM organized as 262,144 x 8 bits. Easy memory
expansion is provided by an active LOW CE1 an
active LOW OE , and Tri-state I/O’s. This device has
an automatic power-down mode feature when
deselected.
Writing to the device is accomplished by taking
chip Enable 1 ( CE1 ) with Write Enable ( WE ) LOW.
Reading from the device is performed by taking Chip
Enable 1 ( CE1 ) with Output Enable ( OE ) LOW
while Write Enable ( WE ) and Chip Enable 2 (CE2)
is HIGH. The I/O pins are placed in a high-impedance
state when the device is deselected : the outputs are
disabled during a write cycle.
The GLT6200L08 comes with a 1V data retention
feature and Lower Standby Power. The GLT6200L08
is available in a 32-pin sTSOP packages.
Function Block Diagram :
ROW DECODER
Cell
Array
SENSE AMP
INPUT BUFFER
COLUMN DECODER
CONTROL
CIRCUIT
OE
WE
CE1
CE2
I/O7
I/O1
Column Address
Row Address
G-LINK
GLT6200L08
Ultra Low Power 256k x 8 CMOS SRAM
Nov 2000(Rev. 1.0)
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 2 -
Pin Configurations :
sTSOPI
GLT6200L08
A16
A7
1
2
3
4
5
6
8
9
10
11
12
13
22
21
19
18
17
26
25
24
23
GND
OE
A10
14
27
28
I/O7
I/O6
20 A0
7
WE
VCC
15
16
29
30
31
32A11
A9
A8
A13
CE2
A15
A14
A12
A6
A5
A4
A3
A2
A1
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
CE1
A17
48 Ball fpBGA :
1 2 3 4 5 6 7 8 A B C D E F G H
¡¡¡¡¡¡¡
¡
1
A0 I/O4 I/O5 VSS VCC I/O6 I/O7 A9
¡ ¡ ¡ ¡ ¡ ¡ ¡ ¡
2
A1 A2 NC NC NC NC
OE
A10
¡ ¡ ¡ ¡ ¡ ¡ ¡ ¡
3
CE2
WE
NC NC NC NC
CE
A11
¡ ¡ ¡ ¡ ¡ ¡ ¡ ¡
4
A3 A4 A5 NC NC A17 A16 A12
¡ ¡ ¡ ¡ ¡ ¡ ¡ ¡
5
A6 A7 NC NC NC NC A15 A13
¡ ¡ ¡ ¡ ¡ ¡ ¡ ¡
6
A8 I/O0 I/O1 VCC VSS I/O2 I/O3 A14
Note : NC means no Ball.
Pin Descriptions:
Name
Function
A0 – A
17
Address Inputs
CE
1
and CE2
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0 – I/O
7
Data Input and Data Output
V
CC
3V Power Supply
GND Ground
NC No Connection
G-LINK
GLT6200L08
Ultra Low Power 256k x 8 CMOS SRAM
Nov 2000(Rev. 1.0)
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 3 -
Truth Table:
CE
1
WE
OE
Data Mode
HXX
High-Z
Standby
XXX
High-Z
Standby
LHL
Data Out
Active, Read
LHH
High-Z
Active, Output Disable
LLX
Data Out
Active, Write
*Key : X = Don’t Care, L = Low, H = High
Absolute Maximum Ratings*
Parameter Symbol Minimum Maximum Unit
Voltage on Any Pin Relative to Gnd Vt -0.5 Vcc+0.5 V
Power Dissipation P
T
- 1.0 W
Storage Temperature (Plastic) Tstg -55 +150
°C
Temperature Under Bias Tbias -40 +85
°C
*Note : Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any conditions outside those indicated
in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Recommended Operating Conditions ( TA = -25°C to + 85°C)
Parameter Symbol Min Typ Max Unit
V
CC
2.7 3 3.3 V
Supply Voltage
Gnd 0.0 0.0 0.0 V
V
IH
2.0 - VCC+0.2 V
Input Voltage
V
IL
-0.5* - 0.6 V
* VIL min = -1.0V for pulse width less than tRC/2.
G-LINK
GLT6200L08
Ultra Low Power 256k x 8 CMOS SRAM
Nov 2000(Rev. 1.0)
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 4 -
DC Operating Characteristics ( Vcc=2.7V to 3.3V, T
A
=-25°C to + 85°C)
55 70 85
Parameter Sym. Test Conditions
Min Max Min Max Min Max
Unit
Input Leakage Current
I
LI
VCC = Max,
Vin = Gnd to V
CC
1 1 1
µA
Output Leakage
Current
I
LO
CE
1
=V
IH
VCC = Max, V
OUT
= Gnd to V
CC
1 1 1
µA
Operating Power
Supply Current
I
CC
CE
1
=VIL ,
VIN=VIH or VIL, I
OUT
=0mA
3 3 3 mA
I
CC1
CE
1
=VIL ,
I
OUT
= 0mA,
Min Cycle, 100% Duty
30 30 25 mA
Average Operating
Current
I
CC2
CE
1
=0.2V
I
OUT
= 0mA,
Cycle Time=1µs, 100% Duty
3 3 3 mA
Standby Power Supply
Current(TTL Level)
I
SB
CE
1
=V
IH
0.5 0.5 0.5 mA
10 10 10
µA
Standby Power Supply
Current (CMOS Level)
I
SB1
CE
1
≥ VCC-
0.2V or f=0
VIN ≤ 0.2V or
VIN ≥ VCC-0.2V
2 2 2
µA
Output Low Voltage V
OLIOL
= 2 mA 0.4 0.4 0.4 V
Output High Voltage V
OHIOH
= -1 mA 2.4 2.4 2.4 V
Data Retention
Parameter Sym. Test Conditions Min. Max. Unit
VCC for Data retention
V
DR
1.0 - V
Data Retention Current
I
CCDR
- 2
µA
Chip Deselect to Data Retention Time
t
CDR
0 - ns
Operating Recovery Time
(2)
t
R
CE
1
≥
VCC -0.2V or
V
IN
≥
VCC -0.2V or
V
IN
≤ 0.2V
t
RC
- ns
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