G-LINK GLT4160L04SE-70TC, GLT4160L04SE-70J3, GLT4160L04SE-60TC, GLT4160L04SE-60J3, GLT4160L04SE-50TC Datasheet
...
G-LINK
RAS
CAS
RAS
RAS
CAS
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
Features : Description :
GLT4160L04
May 2001 (Rev.3.1)
∗ 4,194,304 words by 4 bits organization.
∗ Fast access time and cycle time
∗ Low power dissipation.
∗ Read-Modify-Write,
-Before-
Refresh, Hidden Refresh.
-Only Refresh,
∗ 2,048 refresh cycles per 32ms.
∗ Available in 300 mil 26(24) SOJ and TSOPII.
∗ 3.3V±0.3V Vcc Power Supply voltage.
∗ All inputs and Outputs are LVTTL compatible.
∗ Extended Data-Out (EDO) Page access
cycle.
∗ Self-refresh Capability. (S-Version).
The GLT4160L04 is a high-performance
CMOS dynamic random access memory
containing 16,777,216 bits organized in a x4
configuration. The GLT4160L04 offers page
cycle access with Extended Data Output.
The GLT4160L04 has 11 row- and 11
column-addresses, and accepts 2048-cycle
refresh in 32 ms.
The GLT4160L04 provides EDO PAGE
MODE operation which allows for fast data
access within a row-address defined
boundary, up to 2048 x 4 bits with cycle
times as short as 18ns.
HIGH PERFORMANCE 40 50 60 70
Max.
Access Time, (t
RAC
)
40 ns 50 ns 60 ns 70 ns
Max. Column Address Access Time, (tAA) 20 ns 25 ns 30 ns 35 ns
Min. Extended Data Out Page Mode Cycle Time, (tPC) 18 ns 20 ns 25 ns 30 ns
Min. Read/Write Cycle Time, (tRC) 70 ns 84 ns 104 ns 124 ns
Max.
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
Access Time (t
CAC
)
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
12 ns 13 ns 15 ns 20 ns
- 1 -
G-LINK
RAS
CAS
WE
OE
Pin Configuration :
GLT4160L04
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
May 2001 (Rev.3.1)
Vcc
DQ0
DQ1
WE
RAS
NC
10
A
0
A
A1
A2
3
A
VCC
Pin Descriptions:
A0 - A
10
GLT4160L04
300mil 26(24) SOJ
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
VSS
DQ3
DQ2
CAS
OE
A9
8
A
A7
A6
A5
4
A
VSS
Vcc
DQ0
DQ1
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
GLT4160L04
300mil 26(24) TSOPII
1
2
3
4
5
6
8
9
10
11
12
13
Name Function
Address Inputs
Row Address Strobe
26
25
24
23
22
21
19
18
17
16
15
14
VSS
DQ3
DQ2
CAS
OE
A9
A8
A7
A6
A5
A4
VSS
DQ0 - DQ
V
CC
V
SS
NC No Connection
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
Column Address Strobe
Write Enable
Output Enable
3
Data Inputs / Outputs
+3.3V Power Supply
Ground
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 2 -
G-LINK
CAS
RAS
RAS
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
Absolute Maximum Ratings* Capacitance*
TA=25°C, VCC=3.3V±0.3V, VSS=0V
Operating Temperature, TA (ambient)
.............................................….0°C to
+70°C
For Extended Temperature……………..-20°C to 85°C
Storage Temperature(plastic)............-55°C to +150°C
Voltage Relative to VSS........................-0.5V to + 4.6V
Short Circuit Output Current...............................20mA
Power Dissipation...............................................1.0W
*Note: Operation above Absolute Maximum Ratings can
aversely affect device reliability.
Electrical Specifications
l All voltages are referenced to GND.
l After power up, wait more than 200µs and then, execute eight
refresh cycles as dummy cycles to initialize internal circuit.
Symbol
C
C
C
*Note: Capacitance is sampled and not 100% tested
Address Input
IN1
RAS, CAS, WE, OE
IN2
Data Input/Output
OUT
Parameter
-before-
GLT4160L04
May 2001 (Rev.3.1)
Max.
or
Unit
5
7
7
pF
pF
pF
-only
Block Diagram :
WE
CAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
RAS
11
11
NO.2 CLOCK
GENERATOR
COLUMN-
ADDRESS
BUFFER(11)
REFRESH
CONTROLLER
REFRESH
COUNTER
ROW
ADDRESS
BUFFERS(11)
NO.1 CLOCK
GENERATOR
11
11
ROW DECODER
2048
DATA-IN
BUFFER
DATA-OUT
BUFFER
COLUMN
DECODER
2048
SENSE AMPLIFIERS
I/O GATING
2048
2048 x 1024 x 4
MEMORY
ARRAY
4
4
4
4
DQ0
DQ1
DQ2
DQ3
OE
VDD
VSS
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 3 -
G-LINK
RAS
CAS
WE
OE
RAS
Truth Table:
GLT4160L04
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
May 2001 (Rev.3.1)
Function
Standby H
H→X
X X X X High-Z
ADDRESS DATA-IN/OUT
t
R
t
C
DQ1-DQ4
READ L L H L ROW COL Data-Out
EARLY WRITE L L L X ROW COL Data-In
READ WRITE L L
EDO-PAGE-MODE 1st Cycle L
READ 2nd cycle L
EDO-PAGE-MODE 1st Cycle L
EARLY-WRITE 2nd cycle L
EDO-PAGE-MODE 1st Cycle L
READ-WRITE 2nd cycle L
-ONLY REFRESH
HIDDEN REFRESH READ
WRITE
CBR REFRESH
SELF REFRESH
L→H→L
L→H→L
H→L
H→L
L H X X ROW n/a High-Z
H→L
H→L
H→L
H→L
H→L H→L L→H
H→L H→L L→H
H→L L→H
H L ROW COL Data-Out
H L n/a COL Data-Out
L X ROW COL Data-In
L X n/a COL Data-In
L H L ROW COL Data-Out
L L X ROW COL Data-In
L H X X X High-Z
L H X X X High-Z
ROW COL Data-Out,Data-In
ROW COL Data-Out,Data-In
n/a COL Data-Out,Data-In
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 4 -
G-LINK
Time
RAS, CAS
RAS
RAS
CAS
RAS
CAS
CAS
RAS
RAS, CAS
RAS
CAS
RAS=CAS
WE = OE = A~A=V
-0.2V or
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
DC and Operating Characteristics (1-2)
TA = 0°C to 70°C, -20°C to 85°C VCC=3.3V±0.3V, VSS=0V, unless otherwise specified.
GLT4160L04
May 2001 (Rev.3.1)
Sym. Parameter Test Conditions Access
I
Input Leakage Current
LI
(any input pin)
0V ≤ V
≤ VCC+0.3V
IN
(All other pins not under
Min. Typ Max. Unit Notes
-5 +5
µA
test=0V)
I
I
I
I
I
I
I
I
Output Leakage Current
LO
(for High-Z State)
Operating Current,
CC1
Random READ/WRITE
Standby Current (TTL)
CC2
Refresh Current,
CC3
-Only
Operating Current,
CC4
EDO Page Mode
Refresh Current,
CC5
Before
Standby Current, (CMOS)
CC6
Self refresh Current
CC7
0V ≤ V
out
≤ V
CC
Output is disabled (Hiz)
tRC = tRC (min.) t
at V
other inputs ≥V
cycling,
IH
SS
at V
IH
tRC = tRC (min.)
at VIL,
address
cycling:tPC=tPC(min.)
address cycling:
tRC=tRC (min.)
≥VCC-0.2V,
≥VCC-0.2V,
All other inputs V
SS
=0.2V,
0.2V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
RAC
= 40ns
= 50ns
= 60ns
= 70ns
= 40ns
= 50ns
= 60ns
= 70ns
= 40ns
= 50ns
= 60ns
= 70ns
= 40ns
= 50ns
= 60ns
= 70ns
-5 +5
130
120
80
70
130
120
80
70
130
120
80
70
130
120
80
70
300
300
µA
mA
1 mA
mA
mA
mA 1
µA
µA
1,2
2
1,2
1,5
DQ0~DQ3=VCC-0.2V,0.2V or
Open
V
V
V
V
Input Low Voltage -0.3 +0.8 V 3
IL
Input High Voltage 2.0 VCC+0.3 V 4
IH
Output Low Voltage IOL = 2mA 0.4 V
OL
Output High Voltage IOH = -2mA 2.4 V
OH
Notes:
1. ICC is dependent on output loading when the device output is selected. Specified ICC(max.) is measured with the output open.
2. ICC is dependent upon the number of address transitions specified ICC(max.) is measured with a maximum of one transition per address cycle
in random Read/Write and EDO Fast Page Mode.
3. Specified VIL(min.) is steady state operation. During transitions VIL(min.) may undershoot to –1V for a period not to exceed 15ns. All AC
parameters are measured with VIL(min.)≥VSS and VIH(max.)≤VCC.
4. Specified VIH(max.) is steady state operation . During transitions VIH(max.) may overshoot to VCC+1V for a period not to exceed 15ns. All AC
parameters are measured with VIL(min.) ≥ VSS and VIH(max.) ≤ VCC .
5. S-Version.
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 5 -
G-LINK
CAS
RAS
RAS
RAS
RAS
RAS
CAS
CAS
CAS
RAS
CAS
CAS
RAS
CAS
RAS
CAS
RAS
RAS
RAS
CAS
RAS
RAS
CAS
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
AC Characteristics
TA =0°C to 70°C , -20°C to 85°C VCC = 3.3 V ± 0.3V, VIH/VIL = 3/0 V, VOH/VOL = 2/0.8V
An initial pause of 200 µs and 8
Parameter
Read or Write Cycle Time
Read Modify Write Cycle Time
Precharge Time
Pulse Width
Access Time from
Access Time from
Access Time from Column Address
to Output Low-Z
to Output High-Z
Hold Time
Hold Time
Pulse Width
to
to Column Address Delay Time
to
Row Address Set-Up Time
Row Address Hold Time
Column Address Set-Up Time
Column Address Hold Time
Column Address to
Column Address Hold Time Referenced to
Read Command Set-Up Time
Read Command Hold Time Referenced to
Read Command Hold Time Referenced to
Write Command Set-Up Time
Write Command Hold Time
Write Command Pulse Width
Write Command to
Write Command to
Delay Time
Precharge Time
Lead Time
Lead Time
Lead Time
-before-
or
-only refresh cycles are required after power-up.
40 50 60 70
Symbol Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
t
t
RWC
t
t
RAS
t
RAC
t
CAC
t
t
t
CEZ
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
ASR
t
RAH
t
ASC
t
CAH
t
RAL
t
t
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
t
RWL
t
CWL
RC
RP
AA
CLZ
AR
WP
70 84 104 124 ns
91 116 140 170 ns
25 30 40 50 ns
40 10K 50 10k 60 10k 70 10k ns
40 50 60 70 ns 1,2,3
12 13 15 20 ns 1,5,10
20 25 30 35 ns 1,5,6
0 3 3 3 ns
3 8 3 13 3 15 3 20 ns
12 13 15 20 ns
34 38 45 50 ns
7 10k 8 10k 10 10k 15 10k ns
18 28 20 37 20 45 20 50 ns
13 20 15 25 15 30 15 35 ns 7
5 5 5 5 ns
0 0 0 0 ns
8 10 10 10 ns
0 0 0 0 ns
6 8 10 15 ns
20 25 30 35 ns
34 40 45 50 ns
0 0 0 0 ns
0 0 0 0 ns 4
0 0 0 0 ns 4
0 0 0 0 ns 8,9
6 10 10 15 ns
6 10 10 15 ns
12 13 15 30 ns
8 8 10 15 ns
GLT4160L04
May 2001 (Rev.3.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 6 -
G-LINK
RAS
RAS
CAS
CAS
WE
RAS
CAS
CAS
CAS
RAS
CAS
CAS
RAS
RAS
CAS
OE
OE
OE
OE
WE
OE
CAS
RAS
WE
OE
CAS
CAS
OE
OE
WE
CAS
CAS
RAS
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
AC Characteristics
Parameter
Data Set-Up Time
Data Hold Time
Data Hold Time Referenced to
to WE Delay Time
to WE Delay Time
Column Address to WE Delay Time
Precharge to
to
Precharge Time
precharge time
test cycle)
Access Time from
EDO Page Mode Cycle Time
EDO Page Mode Read-Modify-Write Cycle Time
Precharge Time (EDO Page Mode)
Pulse Width (EDO Page Mode Only)
Hold Time from
Access Time from
to Data Delay Time
to Output Low-Z
to Output High-Z
to Data Delay
Command Hold Time
Data Output Hold after
to Output High-Z
to Output High-Z
to
Hold Time
Hold Time to
Precharge Time
Puts width (EDO mixed read write cycle)
Set-Up Time for
(
Delay
Before
Precharge
precharge
low
-before-
counter
Cycle
GLT4160L04
May 2001 (Rev.3.1)
40 50 60 70
Symbol Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
t
DS
t
DH
t
DHR
t
RWD
t
CWD
t
AWD
t
CPWD
t
RPC
t
CPT
t
CPA
t
PC
t
PRWC
t
CP
t
RASP
t
RHCP
t
OEA
t
OED
t
OLZ
t
OEZ
t
WED
t
OEH
t
DOH
t
REZ
t
WEZ
t
OCH
t
CHO
t
OEP
t
WPE
t
CSR
0 0 0 0 ns
7 8 10 15 ns
36 40 45 50 ns
54 67 79 94 ns
24 30 34 44 ns
32 42 49 59 ns
47 47 54 64 ns
0 5 5 5 ns
20 20 20 25 ns
22 28 35 40 ns
18 20 25 30 ns
50 47 56 71 ns
6 8 10 10 ns
40 100k 50 100k 60 100k 70 100k ns
30 30 35 40 ns
12 13 15 0 20 ns 8
8 13 15 20 ns
3 3 0 0 ns
3 8 3 13 3 15 3 20 ns
15 15 15 20 ns
7 13 15 20 ns
3 5 5 5 ns
3 8 3 13 3 15 3 20 ns
3 10 3 13 3 15 3 20 ns
5 5 5 5 ns
5 5 5 5 ns
5 5 5 5 ns
5 5 5 5 ns
5 5 5 5 ns
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 7 -
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