Gigabyte W251U Schematic

1

www.bufanxiu.com

2

3

4

5

6

7

8

DW1 BLOCK DIAGRAM

Yonah / Calistoga / ICH7-M

A A

CPU Yonah/Merom

478P (uPGA)

PG 5,6

32.768KHz

Keyboard

HOST BUS

NORTH BRIDGE
Calistoga

1466P BGA

INTEGRADED VGA FUNCTION

PG 7,8,9,10,11,12

DMI LINK

PCI-E 4X

SOUTH BRIDGE

ICH7-M

652P BGA

PG 16,17,18,19

Express Card x1
NEW CARD

PG 30

FLASH

PG 30

3

DDRII 533,667 MHz

DDRII 533,667 MHz DDRII-SODIMM2

PCI-Express

4

DVI Bridge

DVI

B B

S-VIDEO

LCD Panel

CRT

PG 35
PG 35
PG 20
PG 32

CH7307

PG 13

S-VIDEO

LVDS X1

CRT

USB PORT 0,1,2,3

PG 23

USB PORT 4,5,6,7

Camera,Bluetooth,Mini
Card,New Card

SATA - HDD

C C

IDE - CDROM

PG 23

PG 33

USB 2.0

SATA 150MB

PATA 66/100/133

PG 33

3.3V LPC, 33MHz

32.768KHz

32.768KHz

TPM (1.2)

PG 35

PCLK_541

PC87541V

TQFP 176

D D

FAN

PG 32 PG 31PG 31

1

Touchpad

2

CPU THERMAL
SENSOR

MAX6657

CPUCLK, CPUCLK#

CLK_MCH_BCLK, CLK_MCH_BCLK#

DREFSSCLK, DREFSSCLK#
DREFCLK, DREFCLK#

CLK_PCIE_3GPLL, CLK_PCIE_3GPLL#

PG 5

DDRII-SODIMM1

PCLK_ICH
14M_ICH

SBLINKCLK, SBLINKCLK#

33MHZ, 3.3V PCI
Azalia

MINI-Card

PG 34PG 34

GigaLAN

Intel
82573E

PG 27,28

25MHz

RJ45
JACK

PG 27

5

PG 14,15

PG 14,15

SMARTDAA
MODEM,

CX20548

RJ11

14.318MHz

CLOCK GEN

ICS954206AG
56pins

Azalia

CX20549

DIB_DATAN
DIB_DATAP

PG 26

PG 26

CLK_PCIE_NEW_C, CLK_PCIE_NEW_C#

PG 24

AMP

TPA0312
GMT1427

AUDIO
JACK

6

PG 4

PCLK_TPM

PCLK_541

CLK_PCIE_MINI, CLK_PCIE_MINI#

PCLK_5C832

CARDREADER / IEEE 1394
CONTROLLER/CF

RICOH 5C832

3 IN 1

CARD READER
SD/MMC,MS

PG 24

MS-PRO

PG 23

PG 25

Size Document Number Rev

Date: Sheet

SYSTEM POWER MAX8743

PG 39

CPU CORE MAX8771

PG 41

SYSTEM MAX8734
POWER(3/5V)

PG 38

SYSTEM POWER MAX8632
(1.8VSUS/0.9V SMDDR_VREF)

PG 40

BATT CHARGER
MAX8724

PG 37

DISCHARGE

PG 36

24.576MHz

PG 21,22,23

1394
CONN

PG 22

PROJECT : DW1

Quanta Computer Inc.

BLOCK DIAGRAM

7

142Tuesday, January 03, 2006

8

1ACustom

of

5

www.bufanxiu.com

4

3

2

1

INDEX

Description

1

Schematic Block Diagram

2

System Information

D D

C C

B B

3

System Power Block Diagram

4

CLOCK GENERATOR

5-6

Intel Yonah CPU

7-12

Calistoga-GM

13

DVI Bridge

14-15

DDR II SO-DIMM

16-19

ICH7-M

20

LCD CONNECTOR / LCD PWR

21-22

CARD Reader(R5C832)

23

CARD Reader/USB Port

24-25

AUDIO CODEC / AUDIO JACK

26

MODEM(DAA)

27-28

GIGA-LAN 82573E

29

LED/Switch

30

KBC

31

Bluetooth/Touch Pad/Key board

32

FAN/CRT Port

33

SATA HDD / CD-ROM

34

NEW CARD/MINI CARD

35

TPM/DVI Port /S-Video

36

DISCHARGE

37

CHARGE

38

SYSTEM POWER(3V/5V)

39

SYSTEM POWER(1.05V/1.5V)

40

SYSTEM POWER(1.8V/0.9V)

41

CPU POWER(ISL6260/6280)

42

CPU Operation State

NOTEPg#

Power & Ground

Label

VIN
MBAT
VCCRTC
+15V
CPU_CORE
+1.05V

+3V
3VSUS
3V_S5 S5_ONS0, S3, S4, S5
3VPCU
+5V
5VSUS

5VPCU
+1.5V S0

1.5V_S5

1.8VSUS
+2.5V MAINONS0

SMDDR_VREF
VDDA

GND

AGND

T-GND

6260AGND

ACTIVE

S0, S3, S4, S5
S0, S3, S4, S5
S0, S3, S4, S5
S0, S3, S4, S5
S0
S0

S0
S0, S3

S0, S3, S4, S5
S0
S0, S3

S0, S3, S4, S5

S0, S3, S4, S5 S5_ON
S0, S3 SUSON

S0
S0, S3
S0 MAINON

ALL PAGES

Description

AC ADAPTER (19V)
MAIN BATTERY + (10~17V)
RTC & KBC POWER
+15V
CPU CORE POWER (1.25/1.15V)
FSB POWER (1.05V)

ALWAYS POWER (3V)

ALWAYS POWER (5V)

DDR CORE POWER

DDR COMMAND & CONTROL PULL UP POWER
DDR REF POWER
AUDIO ANALOG POWER (5V)

DIGITAL GROUND

AUDIO GND

AUDIO JACK GND

CPU ANALOG GROUND

(3_3V)

Control
Signal

VRON
VRON

MAIND
SUSON

MAIND
SUSON
S5_ONS0, S3, S4, S55V_S5

MAIND

MAINONSMDDR_VTERM
SUSON

PCI DEVICES IRQ ROUTING

A A

Ricoh 5C832 E,FAD25

5

PCI_INTDEVICE REQ/GNT #IDSEL #

0

LAYER 1 : TOP
LAYER 2 : GND
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : GND
LAYER 6 : IN3
LAYER 7 : VCC
LAYER 8 : BOT

4

PCB STACK UP

SM BUS

DEVICE

CLOCK GENERATOR
DDR II

3

ADDRESS

D2H
A0H
TBD
16H
98H

BUS

PCLK_SMB, PCLK_SMB(ICH6)

(ICH6)PCLK_SMB, PCLK_SMB

GMCHLCD EDID

MBDATA,MBCLK

(KBC)CHARGER

MBDATA,MBCLK

(KBC)CPU THERMAL SENSOR

2

PROJECT : DW1

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

System Information

1

of

242Tuesday, January 03, 2006

1ACustom

5

www.bufanxiu.com

4

3

S5_ON

2

1

SYSTEM POWER BLOCK DIAGRAM

MAINON

D D

S.W

Adaptor

C C

VIN

MOS-FET

VIN

MAX8734

+15V

3VPCU
ALWAYS

5VPCU
ALWAYS

MAIND

SUSD
MAIND

SUSD
S5_ON

S.W

MOS-FET

S.W

MOS-FET

S.W

MOS-FET

3V_S5

+2.5VSC4215

+3V

3VSUS

+5V

5VSUS

S.W

CHARGER

MOS-FET

3V_S5

MAX8724

MAINON

MAINON

1.05V

B B

VIN

MAX1540

5VPCU

MAX8632

SUSON

SMDDR_VTERM

1.8VSUS

+1.5V

MAINON

BATTERY

A A

S.W

MOS-FET

VIN

CPU_VID[0..5]
HWPG
DPRSLPVR
STP_CPU#

VRON

MAX8771

CPU_CORE

PROJECT : DW1

Size Docum e n t N u mb er Re v

5

4

3

2

Date: Sheet

Quanta Computer Inc.

System Power block diagram

1

342Tuesday, J anu ary 03, 2006

1AC

of

A

www.bufanxiu.com

B

C

D

E

FSC FSB FSA CPU SRC PCI

1 0 1 100 100 33

0 0 1 133 100 33

+3V(5,9,11,13, 1 4 ,15,16,17,18,19,20,24,29,30,31,32,33,34,35,36,38)

+1.05V(5,6,7,10,1 1 ,16,19,36,39)

Default

+3V
+1.05V

0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33

4 4

1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 200 100 33

VR_PWRGD_CK410#(18,41)

PM_STPPCI#(18)

L15
1T2012-121JT

+3V

120 ohms@100Mhz

3 3

L14
1T2012-121JT

+3V

120 ohms@100Mhz

2 2

VDD_SRC_CPU

C257

0.1U

R216 2.2/F

VDD_PCI

R158 2.2/F

R179 1

C264

0.1U

VDD_A

25 mils

C240

0.1U

VDD_48

VDD_REF

25 mils

C260

0.1U

C256

0.1U

C226

0.1U

C246

0.1U

C248

0.1U

C258
10U

C252

0.1U

C230
10U

C233
10U

C244
10U

C267
10U

DREFCLK(9)
DREFCLK#(9)

PM_STPCPU#(18)

CGCLK_SMB(14,15,34)
CGDAT_SMB(14,15,34)

CLKUSB_48(18)

CLK_BSEL0
CLK_BSEL1
CLK_BSEL2

Iref=5mA,
Ioh=4*Iref

DREFCLK R_DOT96
DREFCLK#

Close to IC <500mils

C228 33P

21

C227 33P

+3V

R200 475/F

RP37

1
3

33X2

CG_XIN

CL=20 - 22P

Y2

14.318MHZ

CG_XOUT RHCLK_CPU

R187 *10K

VR_PWRGD_CK410#
PM_STPPCI#
PM_STPCPU#

CGCLK_SMB

CGDAT_SMB

R186 33
R191 2.2K
R162 4.7K

VDD_REF
VDD_SRC_CPU

VDD_PCI

VDD_SRC_CPU

VDD_48

IREF

2

R_DOT96#

4

50
49

10
55
54

46
47

12
16
53

48
42

1
7

21
28
34

11
39

14
15

SMbus address D2 /IDT

U9

XTAL_IN
XTAL_OUT

Vtt_PwrGd#/PD
PCI/SRC_STOP#
CPU_STOP#

SCLK
SDATA

FSA/USB_48MHz
FSB/TEST_MODE
FSC/REF1

VDD_REF
VDD_CPU

VDD_PCI_1
VDD_PCI_2

VDD_SRC0
VDD_SRC1
VDD_SRC2

VDD_48
IREF

DOT96MHz
DOT96MHz#

ICS954206AG-T

VDD_A

CK-410M

GND_REF

GND_48

2

51

13

38

37

VDDA

GNDA

CPU2_ITP/SRC7

CPU2#_ITP/SRC7#

SRC0/DREFSSCLK

SRC0#/DREFSSCLK#

PCIF1/100_96M#

PCIF0/ITP_EN

GND_PCI_26GND_SRC29GND_CPU

GND_PCI_1

45

REF0

CPU0

CPU0#

CPU1

CPU1#

SRC6

SRC6#

SRC5

SRC5#

SRC4_SATA

SRC4#_SATA

SRC3

SRC3#

SRC2

SRC2#

SRC1

SRC1#

PCI5
PCI4
PCI3
PCI2

Place thes e t e r mination to close CK410M.

52
44

43
41

40
36

35
33

32
31

30
26

27
24

25
22

23
19

20
17

18

R_PCLK_541

5

R_PCLK_5C832

4

R_PCLK_TPM

3

R_PCLK_DBP

56

R_PCLK_ICH

9

R_PCLK_SIO

8

14M_REF

RHCLK_CPU#
RHCLK_MCH

RHCLK_MCH#

RSRC_MINI
RSRC_MINI#

RSRC_MCH
RSRC_MCH#

RSRC_SATA
RSRC_SATA#

RSRC_NEW
RSRC_NEW#

RSRC_ICH
RSRC_ICH#

RSRC_LAN
RSRC_LAN#

RDREFSSCLK
RDREFSSCLK#

R173 33

RP38

1
3

RP42

1
3

T194
T195

RP47

1
3

RP51

1
3

RP53

3
1

RP49

3
1

RP46

3
1

RP44

3
1

RP41

3
1

R176 33
R171 33
R159 33
R155 33
R183 33

R184 10K

R185 *10K
R175 10K

DREFSSCLK Frequency Select.
"0" : 96MHz
"1" : 100MHz

33X2

2
4

33X2

2
4

33X2

2
4

33X2

2
4

33X2

4
2

33X2

4
2

33X2

4
2

33X2

4
2

33X2

4
2

14M_ICH (18)

CLK_CPU_BCLK (5)
CLK_CPU_BCLK# (5)

CLK_MCH_BCLK (7)
CLK_MCH_BCLK# (7)

CLK_PCIE_MINI (34)
CLK_PCIE_MINI# (34)

CLK_PCIE_3GPLL (9)
CLK_PCIE_3GPLL# (9)

CLK_PCIE_SATA (16)
CLK_PCIE_SATA# (16)

CLK_PCIE_NEW (34)
CLK_PCIE_NEW# (34)

CLK_PCIE_ICH (17)
CLK_PCIE_ICH# (17)

CLK_PCIE_LAN (27)
CLK_PCIE_LAN# (27)

DREFSSCLK (9)
DREFSSCLK# (9)

PCLK_541 (30)
PCLK_5C832 (21)
PCLK_TPM (35)
PCLK_DBP (34)
PCLK_ICH (17)

EMI

48MHZ

CLKUSB_48

33MHZ

PCLK_541

PCLK_5C832

PCLK_TPM

PCLK_ICH

C245 *10P

C232 *10P

C225 *10P

C223 *10P

C239 *10P

14.318MHZ

14M_ICH

+3V

+3V

To check intel re ference circuit default setting.
100MHZ? or 96MHZ?
EMI problem?

C241 *10P

FSB frequency will be selected by CPU internal.

+1.05V

CPU_BSEL0(5)

+1.05V

CPU_BSEL1(5)

1 1

+1.05V

CPU_BSEL2(5) MCH_BSEL2 (9)

R206 56/F

R194 *0
R196 *1K

R211 *1K

R214 0
R207 *0

R154 *1K

R172 0
R177 *0

A

CLK_BSEL0

CLK_BSEL1

CLK_BSEL2

R202 1K

R212 1K

R160 1K

MCH_BSEL0 (9)

MCH_BSEL1 (9)

B

B Stage:
Change Q9,Q10 footprint.

PDAT_SMB(18,27,34)

PCLK_SMB(18,27,34)

+3V

R192

R188

2

3

3

C

1

Q9
2N7002E

+3V

2

1

Q10
2N7002E

10K

10K

CGDAT_SMB

CGCLK_SMB

D

Place thes e t e r mination to close CK410M.

CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#
DREFSSCLK#
DREFSSCLK
DREFCLK#
DREFCLK

RP39 49.9/FX2
RP43 49.9/FX2
RP54 49.9/FX2
RP52 49.9/FX2
RP50 49.9/FX2
RP45 49.9/FX2
RP48 49.9/FX2
RP40 49.9/FX2
RP36 49.9/FX2

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

PROJECT : DW1

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

CLOCK GENERATOR

442Tuesday, January 03, 2006

E

of

1ACustom

5

www.bufanxiu.com

H_A#[31:3](7)

D D

H_ADSTB#0(7)
H_REQ#[4:0](7)

H_A#[31:3]

C C

H_STPCLK#(16)

B B

H_ADSTB#1(7)

H_A20M#(16)
H_FERR#(16)

H_IGNNE#(16)

R99 0

H_INTR(16)

H_NMI(16)

H_SMI#(16)

T170
T9
T171
T11
T15
T22
T16
T12
T177
T19

T192

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK_R#

H_INTR
H_NMI
H_SMI#

TP_A32#
TP_A33#
TP_A34#
TP_A35#
TP_A36#
TP_A37#
TP_A38#
TP_A39#
TP_APM0#
TP_APM1#

TP_HFPLL

U28A

J4

A[3]#

L4

A[4]#

M3

A[5]#

K5

A[6]#

M1

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L1

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

L2

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L5

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U2

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W3

A[27]#

W5

A[28]#

Y4

A[29]#

W2

A[30]#

Y1

A[31]#

V4

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

AA1

RSVD[01]#

AA4

RSVD[02]#

AB2

RSVD[03]#

AA3

RSVD[04]#

M4

RSVD[05]#

N5

RSVD[06]#

T2

RSVD[07]#

V3

RSVD[08]#

B2

RSVD[09]#

C3

RSVD[10]#

B25

RSVD[11]#

PZ47903-2741-01

ADDR GROUP 0

XDP/ITP SIGNALS

THERMH CLK

RESERVED

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

CONTROL

INIT#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK
TDO

TMS

TRST#

DBR#

PROCHOT
THERMDA
THERMDC

THERMTRIP#

BCLK[0]
BCLK[1]

RSVD[12]#

RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#
RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#

TDI

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
B1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
A25

C7

A22
A21

T22

D2
F6
D3
C1
AF1
D22
C23
C24

4

H_ADS#
H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BREQ#0
IERR#

H_INIT#
H_LOCK#

H_CPURST#
H_RS#0

H_RS#1
H_RS#2
H_TRDY#

H_HIT#
H_HITM#

XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
SYS_RST#

H_PROCHOT#
H_THERMDA
H_THERMDC

TP_EXTBREF

TP_SPARE0
TP_SPARE1
TP_SPARE2
TP_SPARE3
TP_SPARE4
TP_SPARE5
TP_SPARE6
TP_SPARE7

T48

H_ADS# (7)
H_BNR# (7)
H_BPRI# (7)

H_DEFER# (7)
H_DRDY# (7)
H_DBSY# (7)

H_BREQ#0 (7)

H_INIT# (16)
H_LOCK# (7)

H_CPURST# (7)

H_RS#[2:0] (7)

H_TRDY# (7)
H_HIT# (7)

H_HITM# (7)

T6
T13
T176
T10
T175

T76

T20
T21
T18
T172
T173
T71
T73
T69

+1.05V

SYS_RST# (18)

PM_THRMTRIP# (9,16)

CLK_CPU_BCLK (4)
CLK_CPU_BCLK# (4)

+1.05V

+1.05V

R137
56/F

Near to MCH <500mils

R135
56/F

Layout note: 0.5" max
for GTLREF

3

+1.05V (4,6,7,10,11,16,19,36,39)

H_D#[63:0](7)

H_DSTBN#0(7)
H_DSTBP#0(7)
H_DINV#0(7)

+1.05V

R164
1K/F

R165
2K/F

H_DSTBN#1(7)
H_DSTBP#1(7)

R41 populate for Yonah B
stepping.

CPU_BSEL1(4)

H_D#[63:0]

R166
R167

2

AD26

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24

H26
F26
K22
H25
H23
G22

N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26

C26
D25

B22
B23
C21

J24
J23

J26

U28B

D[0]#
D[1]#
D[2]#

DATA GRP 0 DATA GRP 1

D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

MISC

TEST1
TEST2

BSEL[0]
BSEL[1]
BSEL[2]

PZ47903-2741-01

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#

DATA GRP 2

D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

DATA GRP 3

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

SLP#

PSI#

AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23

AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20

R26
U26
U1
V1

E5
B5
D24
D6
D7
AE6

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9

H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25

H_D#27
H_D#28
H_D#29
H_D#30
H_D#31 H_D#63
H_DSTBN#1
H_DSTBP#1
H_DINV#1

H_GTLREF

*1K/F
51

CPU_BSEL1
CPU_BSEL2

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42H_D#10
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58H_D#26
H_D#59
H_D#60
H_D#61
H_D#62

H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

ICH_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGDCPU_BSEL0
H_CPUSLP#
PSI#

27.4/F

H_D#[63:0]

H_DSTBN#2 (7)
H_DSTBP#2 (7)
H_DINV#2 (7)

H_D#[63:0]

H_DSTBN#3 (7)
H_DSTBP#3 (7)
H_DINV#3 (7)H_DINV#1(7)

R169
R17054.9/F
R4927.4/F
R5054.9/F

ICH_DPRSTP# (16,41)
H_DPSLP# (16)
H_DPWR# (7)
H_PWRGD (16)CPU_BSEL0(4)
H_CPUSLP# (7,16)
PSI# (41)CPU_BSEL2(4)

+3V +3V

1

Resistor placed within 0.5" of
processor pin for all compensation
resistor and routing as 27.4 and 55
ohm impedance.

+3V

R199

2

SYS_RST#

Populate when ITP700FLEX debug port not used.

+1.05V

XDP_TDI
XDP_TMS
XDP_TDO
H_CPURST#
XDP_BPM#5

XDP_TCK
XDP_TRST#

A A

R42 150/F
R44 39.2/F
R45 *54.9/F
R54 54.9/F
R46 56

R47 27.4/F
R43 680

H_PROCHOT#

If PROCHOT# is not used, then it must be
terminated with a 56 pull-up resistor to
VCCP.

R138 *54.9/F

+1.05V

R142
*330

2

1 3

Q8
*MMBT3904

+1.05V

VR_TT# (41)

SYS_SHDN#(38)

+3V

R163
100

C238

0.1U

6657VCC
H_THERMDA

C231
2200P/50V

H_THERMDC

H/W Shutdown

BDATA(30,37)

BCLK(30,37)

H/W MONITOR

1

VCC

2

DXP

3

DXN

4

-OVT

U8

SMCLK

SMDATA

-ALT
GND

MAX6657/GMT-781

8
7
6
5

3

+3V

2

3

THCLK_SMB
THDAT_SMB
THERM_ALERT#

1

Q12
2N7002E

1

Q11
2N7002E

ICH_THRM#
To SB --> System throttling

R190

10K

10K

THDAT_SMB

THCLK_SMB

THERM_ALERT# (18)

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

CPU HOST BUS (1 OF 2 )

542Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

U28C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

D D

VCC_CORE

C151

C148

C137

10U

10U

C176

C136

10U

10U

C204

C C

B B

A A

C199

10U

10U

C183

C198

10U

10U

C207

C185

10U

10U

C200

C177

10U

10U

C150

C147

10U

10U

C158

C153

10U

10U

B stage:
Change to 10UF/X6S material(105C).

10U

C184
10U

C211
10U

C203
10U

C213
10U

C191
10U

C180
10U

C152
10U

C157
10U

C212
10U

C175
10U

C208
10U

C201
10U

C156
10U

C168
10U

C149
10U

A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18

F20
AA7
AA9

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AB9

AC10
AB10
AB12
AB14
AB15
AB17
AB18

B7
B9

C9

D9

E7
E9

F7
F9

+1.05V

VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]

VCCSENSE
VCC[066]
VCC[067]

VSSSENSE

PZ47903-2741-01

C178

C145

0.1U

0.1U

VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]

VCC[100]
VCCP[01]

VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

4

VCC_COREVCC_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26

VID0

AD6

VID1

AF5

VID2

AE5

VID3

AF4

VID4

AE3

VID5

AF2

VID6

AE2

AF7

Connect to PWM , special layout

AE7

C179

C209

0.1U

C146

0.1U

0.1U

C210

0.1U

+1.05V
VCC_CORE
+1.5V

VID0 (41)
VID1 (41)
VID2 (41)
VID3 (41)
VID4 (41)
VID5 (41)
VID6 (41)

C51

0.1U

+1.05V

+1.05V (4,5,7,10,11,16,19,36,39)
VCC_CORE (36,41)
+1.5V (11,17,19,34,36,39)

+

C234
330U/2.5V/ESR-9/POS

C229

0.01U

VCC_CORE

R415
100/F

R413
100/F

recommend by EMI

3

R178 0

C242
10U/X6S

VCCSENSE (41)
VSSSENSE (41)

+1.5V

C237

0.1U

U28D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

A26

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3

VSS[081]

PZ47903-2741-01

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24

2

1

PROJECT : DW1

Quanta Computer Inc.

Size Document Number R ev

5

4

3

2

Date: Sheet

CPU POWER/GND (2 OF 2 )

1

of

642Tuesday, January 03, 2006

1AB

5

www.bufanxiu.com

4

3

2

1

+1.05V

D D

C C

+1.05V

+1.05V

R130

54.9/F

H_XSCOMP
H_XRCOMP

R131

24.9/F

R125

54.9/F

H_YSCOMP
H_YRCOMP

R127

24.9/F

15 mils/10mils

15 mils/10mils

+1.05V

R129
221/F

H_XSWING

R128

C197

100/F

R124
221/F

R123
100/F

0.1U

H_YSWING

C196

0.1U

B B

+1.05V

H_D#[63:0](5)

CLK_MCH_BCLK(4)
CLK_MCH_BCLK#(4)

Short Stub < 100m ils
extract from same point

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

CLK_MCH_BCLK
CLK_MCH_BCLK#

W11

AA10

AB11
AC11

AD10

K11

U11

AB7
AA9

Y10
AB8

AA4
AA7
AA2
AA6

AA1
AB4
AC9

AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5

AD4
AC8

AG2
AG1

G1
G2

G4

T10

T11

W9

W7

W6

W4
W3

W5

W2

W1

F1

J1

H1

J6
H3
K2

K9
K1
K7

J8
H4

J3

T3
U7
U9

T1
T8
T4

U5
T9

T5

Y3
Y7

Y8

E1
E2
E4

Y1
U1

U27A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_XRCOMP
H_XSCOMP
H_XSWING

H_YRCOMP
H_YSCOMP
H_YSWING

H_CLKIN
H_CLKIN#

Calistoga

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_VREF_0

H_BNR#

H_BPRI#

H_BREQ#0

H_CPURST#

H_DBSY#

H_DEFER#

H_DPWR#

H_DRDY#

H_VREF_1

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_HIT#

H_HITM#

H_LOCK#

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

H_SLPCPU#

H_TRDY#

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13

J7
W8
U3
AB10

K4
T7
Y5
AC4

K3
T6
AA5
AC5

D3
D4
B3

D8
G8
B8
F8
A8

B4
E6
D6

E3
E7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_ADS#
H_ADSTB#0
H_ADSTB#1

H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_HIT#
H_HITM#
H_LOCK#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_CPUSLP#
H_TRDY#

H_A#[31:3] (5)

H_ADS# (5)
H_ADSTB#0 (5)
H_ADSTB#1 (5)

H_BNR# (5)
H_BPRI# (5)
H_BREQ#0 (5)
H_CPURST# (5)
H_DBSY# (5)
H_DEFER# (5)
H_DPWR# (5)
H_DRDY# (5)

H_DINV#[3:0] (5)

H_DSTBN#[3:0] (5)

H_DSTBP#[3:0] (5)

H_HIT# (5)
H_HITM# (5)
H_LOCK# (5)

H_REQ#[4:0] (5)

H_RS#[2:0] (5)

H_CPUSLP# (5,16)
H_TRDY# (5)

C142

0.1U

C128

0.1U

+1.05V

R100
100/F

R92
200/F

H_VREF

+1.05V (4,5,6,10,11,16,19,36,39)

< 0.1", Use 1% R
H_VREF :10 mils/20 mils space

A A

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

GMCH HOST(1 OF 6 )

742Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

D D

4

3

2

1

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19

C C

B B

M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AJ35

AJ34
AM31
AM33

AJ36
AK35

AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26

AL27
AM26
AN24
AK28

AL28
AM24
AP26
AP23

AL22
AP21
AN20

AL23
AP24
AP20

AT21
AR12
AR14
AP13
AP12

AT13

AT12

AL14

AL12

AK9
AN7
AK8
AK7
AP9
AN9

AT5
AL5

AY2

AW2

AP1
AN2
AV2

AT3

AN1

AL2

AG7

AF9

AG4

AF6
AG9
AH6

AF4

AF8

U27D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

Calistoga

SA_BS_0
SA_BS_1
SA_BS_2

SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVENIN#

SA_RCVENOUT#

DDR SYSTEM MEMORY A

SA_WE#

AU12
AV14
BA20

AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

AW14
AK23
AK24
AY14

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CAS#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_RAS#
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
M_A_WE#

M_B_DQ[0..63](15)M_A_DQ[0..63](15)

M_A_BS#0 (14,15)
M_A_BS#1 (14,15)
M_A_BS#2 (14,15)
M_A_CAS# (14,15)
M_A_DM[0..7] (15)

M_A_DQS[0..7] (15)

M_A_DQS#[0..7] (15)

M_A_A[0..13] (14,15)

M_A_RAS# (14,15)

T23
T17

M_A_WE# (14,15)

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK39

AJ37
AP39
AR41

AJ38
AK38
AN41
AP41

AT40
AV41
AU38
AV38
AP38
AR40

AW38

AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33

AT31
AU29
AU31

AW31

AV29

AW29

AM19

AL19
AP14
AN14
AN17
AM16
AP15

AL15

AJ11
AH10

AN10
AK13
AH11
AK10

BA10

AW10

AW4
AY10

AW5

AR5

AJ9

AJ8

BA4

AY9
AY5

AV4
AK4

AK3
AT4
AK5
AJ5
AJ3

U27E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

Calistoga

M_B_BS#0

AT24

SB_BS_0
SB_BS_1
SB_BS_2

SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

DDR SYSTEM MEMORY B

SB_WE#

AV23
AY28

AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

AU23
AK16
AK18
AR27

M_B_BS#1
M_B_BS#2

M_B_CAS#
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_RAS#
TP_MB_RCVENIN#
TP_MB_RCVENOUT#
M_B_WE#

M_B_BS#0 (14,15)
M_B_BS#1 (14,15)
M_B_BS#2 (14,15)
M_B_CAS# (14,15)
M_B_DM[7:0] (15)

M_B_DQS[0..7] (15)

M_B_DQS#[0..7] (15)

M_B_A[0..13] (14,15)

M_B_RAS# (14,15)

T31
T26

M_B_WE# (14,15)

A A

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

GMCH DDR(2 OF 6)

842Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

CLK_MCH_OE#

T4

MCH_RSVD_1

T3

MCH_RSVD_2

T2

MCH_RSVD_3

T186

MCH_RSVD_4

T52

MCH_RSVD_5

T41

MCH_RSVD_6

T44

MCH_RSVD_7

T49

MCH_RSVD_8

T25

TV_DCONSEL0

T5

TV_DCONSEL1

T8

MCH_RSVD_11

T161

MCH_RSVD_12

MCH_BSEL0(4)
MCH_BSEL1(4)
MCH_BSEL2(4)

PM_BMBUSY#(18)
PM_EXTTS#0(14,15)
PM_EXTTS#1(14,18)

DELAY_VR_PWRGOOD(18,41)

1.8VSUS

T167

T168

T7

T14

T28

T45

T37

T29

T40
T35

T36

PM_THRMTRIP#(5,16)

R400
100/F

T185
T160
T184

T162
T164
T166
T180
T182
T183
T157
T181
T158

T188

T159
T189

T163
T178
T165
T179

R106

80.6/F

M_RCOMP#
M_RCOMP

R107

80.6/F

MCH_RSVD_13
MCH_RSVD_14
MCH_RSVD_15

MCH_BSEL0
MCH_BSEL1
MCH_BSEL2
MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

PM_BMBUSY#
PM_EXTTS#0
PM_EXTTS#1

RST IN# MCH

SDVO_CtrlClk
SDVO_CtrlData
MCH_ICH_SYNC

TP_MCH_NC0
TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16
TP_MCH_NC17
TP_MCH_NC18

5

D D

C C

PLT_RST-R#(17)

SDVO_CtrlClk(13)

SDVO_CtrlData(13)

MCH_ICH_SYNC(17)

B B

15mils/10mils

A A

AG11
AF11

AH33
AH34

BA41
BA40
BA39

AY41

AW41

AW1

+3V

H32
T32
R32

K30
A41

A35
A34
D28
D27

K16
K18

F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15

K27

G28
F25
H26

H28
H27
K28

C41

BA3
BA2
BA1
B41

AY1

A40
A39

U27B

F3
F7

H7

J19
J29

J18

J25
J26

G6

D1
C1

B2

A4
A3

RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#

SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

Calistoga

R399 10K/F

R397 *10K/F

CFGRSVD

PM

MISC

NC

PM_EXTTS#0

PM_EXTTS#1

SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3

SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_OCDCOMP_0
SM_OCDCOMP_1

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP#

SM_RCOMP

DDR MUXINGCLKDMI

SM_VREF_0
SM_VREF_1

G_CLKIN#

D_REFCLKIN#

D_REFCLKIN

D_REFSSCLKIN#

D_REFSSCLKIN

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

4

SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3

G_CLKIN

4

3

M_CLK_DDR0

AY35

M_CLK_DDR1

AR1

M_CLK_DDR2

AW7

M_CLK_DDR3

AW40

M_CLK_DDR#0

AW35

M_CLK_DDR#1

AT1

M_CLK_DDR#2

AY7

M_CLK_DDR#3

AY40

M_CKE0

AU20

M_CKE1

AT20

M_CKE2

BA29

M_CKE3

AY29

M_CS#0

AW13

M_CS#1

AW12

M_CS#2

AY21

M_CS#3

AW21

M_OCDCOMP_0

AL20

M_OCDCOMP_1

AF10

M_ODT0

BA13

M_ODT1

BA12

M_ODT2

AY20

M_ODT3

AU21

M_RCOMP#

AV9

M_RCOMP

AT9
AK1

AK41

CLK_PCIE_3GPLL#

AF33

CLK_PCIE_3GPLL

AG33

DREFCLK#

A27

DREFCLK

A26

DREFSSCLK#

C40

DREFSSCLK

D41

DMI_TXN0

AE35

DMI_TXN1

AF39

DMI_TXN2

AG35

DMI_TXN3

AH39

DMI_TXP0

AC35

DMI_TXP1

AE39

DMI_TXP2

AF35

DMI_TXP3

AG39

DMI_RXN0

AE37

DMI_RXN1

AF41

DMI_RXN2

AG37

DMI_RXN3 CRT_B

AH41

DMI_RXP0

AC37

DMI_RXP1

AE41

DMI_RXP2

AF37

DMI_RXP3

AG41

M_ODT0 (14,15)
M_ODT1 (14,15)
M_ODT2 (14,15)
M_ODT3 (14,15)

SMDDR_VREF

M_CLK_DDR0 (15)
M_CLK_DDR1 (15)
M_CLK_DDR2 (15)
M_CLK_DDR3 (15)

M_CLK_DDR#0 (15)
M_CLK_DDR#1 (15)
M_CLK_DDR#2 (15)
M_CLK_DDR#3 (15)

M_CKE0 (14,15)
M_CKE1 (14,15)
M_CKE2 (14,15)
M_CKE3 (14,15)

M_CS#0 (14,15)
M_CS#1 (14,15)
M_CS#2 (14,15)
M_CS#3 (14,15)

15mils/15mils

R104
*40.2/F

Layout as short as passable

NC from WW45

CLK_PCIE_3GPLL# (4)
CLK_PCIE_3GPLL (4)
DREFCLK# (4)
DREFCLK (4)
DREFSSCLK# (4)
DREFSSCLK (4)
DMI_TXN[3:0] (17)

S-CVBS
S-YD(35)
S-CD(35)

R411 150/F
R412 150/F

DMI_TXP[3:0] (17)
DMI_RXN[3:0] (17)

DMI_RXP[3:0] (17)

R414 75/F

CRT_B(32)
CRT_G(32)
CRT_R(32)

HSYNC(32)

VSYNC(32)

R71
*40.2/F

R398

1.5K/F

DDCCLK(32)
DDCDAT(32)

GMCH Strap pin need to check

MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_19
MCH_CFG_18
MCH_CFG_20

R82 *2.2K
R103 *2.2K
R17 *2.2K
R77 *2.2K
R108 *2.2K
R109 *2.2K
R105 *2.2K
R95 *2.2K
R75 *2.2K
R396 *1K/F
R59 *1K
R41 *1K/F

+3V
+3V
+3V

1.MCH_CFG_5 Low = DMI X2, High=DMIX4

2.MCH_CFG_ 6 DDR : Low =Moby Dic k, High= Calis toga (Def ault)

3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU

4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility

5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility

6.MCH_CFG_11: Low=Calistoga, High=Reserved

00 = Parti a l C L K g a t ing disable 01 = XOR mode enabled
10 = All Z mode enabled 11 = Normal operation ( Defaul t)

7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
High=Dynamic ODT Enabl ed.

8.MCH_CFG_19 DMI LANE Reversal:Low=Normal,
High=LANES Reversed.

9.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V

10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only
SDVO or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1
are operation simultaneously via the PEG port.

3

+V1.5_PCIE
+3V
SMDDR_VREF

1.8VSUS

DPST_PWM(20)
LCD_BLON(20)

DISP_ON(20)

TXLCLKOUT-(20)
TXLCLKOUT+(20)

EDIDCLK(20)
EDIDDATA(20)

TXLOUT0-(20)
TXLOUT1-(20)
TXLOUT2-(20)

TXLOUT0+(20)
TXLOUT1+(20)
TXLOUT2+(20)

T1

LCD_BLON

DPST_PWM
LCD_BLON
L_CLKCTLA
L_CLKCTLB
EDIDCLK
EDIDDATA
L_IBG
L_VBG
DISP_ON
L_VREFH
L_VREFL

TXLCLKOUT­TXLCLKOUT+

TXLOUT0­TXLOUT1­TXLOUT2-

TXLOUT0+
TXLOUT1+
TXLOUT2+

R25
100K

S-CVBS
S-YD
S-CD

TVIREF

R68 4.99K/F

< 0.1" . 15mils/15mils space

CRT_G

CRT_R

R409 150/F
R406 150/F
R408 150/F

R33 39/F
R64 255/F
R34 39/F

< 0.1" . 15mils/15mils space
use 1% R

HSYNC1
CRTIREF
VSYNC1

D32
H30

H29
G26
G25

C35
C33

C32

C37

G30
D30

D29

C18

D23
C22

C26
C25
G23

H23

J30

B38
F32

A33
A32
E27
E26

B35
A37

B37
B34
A36

F29

F30
F28

A16
A19
J20

B16
B18
B19

E23

B22
A21
B21

J22

2

+V1.5_PCIE (11)
+3V (4,5,11,13,14,15,16,17,18,19,20,24,29,30,31,32,33,34,35,36,38)
SMDDR_ VREF (15,40)

1.8VSUS (10,15, 36,40)

U27C

L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL

LA_CLK#
LA_CLK
LB_CLK#
LB_CLK

LA_DATA#_0
LA_DATA#_1
LA_DATA#_2

LA_DATA_0
LA_DATA_1
LA_DATA_2

LB_DATA#_0
LB_DATA#_1
LB_DATA#_2

LB_DATA_0
LB_DATA_1
LB_DATA_2

TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC

Calistoga

TV

L_CLKCTLA
L_CLKCTLB

2

LVDS

VGA

R26 10K/F
R27 10K/F

EXP_A_COMPO

EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15

EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15

EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12

PCI-EXPRESS GRAPHICS

EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15

Place within 500 mils of GMCH

EXP_A_COMPI

EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9

EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9

EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9

EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8

EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15

Size Document Number R ev

Date: Sheet

+3V

D40
D38

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

1

EXP_A_COMPX

EXP_RXN2

EXP_RXP2

EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3

C34 0.1U
C25 0.1U
C32 0.1U
C27 0.1U

C35 0.1U
C26 0.1U
C33 0.1U
C28 0.1U

SMDDR_VREF

C190

0.1U

R15 24.9/F

C38

2.2U

Place close ball AK1/AK41

PROJECT : DW1

Quanta Computer Inc.

GMCH DMI VEDIO(3 OF 6)

1

+V1.5_PCIE

EXP_RXN2 (13)

EXP_RXP2 (13)

SDVOB_RED- (13)
SDVOB_GREEN- (13)
SDVOB_BLUE- (13)
SDVOB_CLK- (13)

SDVOB_RED+ (13)
SDVOB_GREEN+ (13)
SDVOB_BLUE+ (13)
SDVOB_CLK+ (13)

942Tuesday, J anuary 03, 2006

of

1ACustom

5

www.bufanxiu.com

C478

330U/2.5V/ESR-9/POS

+

D D

C C

B B

A A

5

AA33

W33

AA32

W32

M32

AA31

W31

M31

AA30

W30

M30

AA29

W29

M29

AB28
AA28

M28

M27

M25

M24
AB23
AA23

M23
AC22

AB22

W22

M22
AC21

AA21

W21

M21
AC20

AB20

W20

M20
AB19

AA19

M19

M18

M17

M16

U27G

VCC_0
VCC_1

P33

VCC_2

N33

VCC_3

L33

VCC_4

J33

VCC_5
VCC_6

Y32

VCC_7
VCC_8

V32

VCC_9

P32

VCC_10

N32

VCC_11
VCC_12

L32

VCC_13

J32

VCC_14
VCC_15
VCC_16

V31

VCC_17

T31

VCC_18

R31

VCC_19

P31

VCC_20

N31

VCC_21
VCC_22
VCC_23

Y30

VCC_24
VCC_25

V30

VCC_26

U30

VCC_27

T30

VCC_28

R30

VCC_29

P30

VCC_30

N30

VCC_31
VCC_32

L30

VCC_33
VCC_34

Y29

VCC_35
VCC_36

V29

VCC_37

U29

VCC_38

R29

VCC_39

P29

VCC_40
VCC_41

L29

VCC_42
VCC_43
VCC_44

Y28

VCC_45

V28

VCC_46

U28

VCC_47

T28

VCC_48

R28

VCC_49

P28

VCC_50

N28

VCC_51
VCC_52

L28

VCC_53

P27

VCC_54

N27

VCC_55
VCC_56

L27

VCC_57

P26

VCC_58

N26

VCC_59

L26

VCC_60

N25

VCC_61
VCC_62

L25

VCC_63

P24

VCC_64

N24

VCC_65
VCC_66
VCC_67
VCC_68

Y23

VCC_69

P23

VCC_70

N23

VCC_71
VCC_72

L23

VCC_73
VCC_74
VCC_75

Y22

VCC_76
VCC_77

P22

VCC_78

N22

VCC_79
VCC_80

L22

VCC_81
VCC_82
VCC_83
VCC_84

N21

VCC_85
VCC_86

L21

VCC_87
VCC_88
VCC_89

Y20

VCC_90
VCC_91

P20

VCC_92

N20

VCC_93
VCC_94

L20

VCC_95
VCC_96
VCC_97

Y19

VCC_98

N19

VCC_99
VCC_100

L19

VCC_101

N18

VCC_102
VCC_103

L18

VCC_104

P17

VCC_105

N17

VCC_106
VCC_107

N16

VCC_108
VCC_109

L16

VCC_110

Calistoga

VCC

VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8

VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99

VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

4

VCC_SM1
VCC_SM2

VCC_SM106
VCC_SM107

4

C463 0.47U
C464 0.47U

+

330U/2.5V/ESR-9/POS

PC152

C89

0.47U

place Cap on BA23 Ball

C120

0.47U

place Cap on BA15 Ball

C483 0.47U
C484 0.47U

C469
10U/X6S

C193
10U/X6S

C73

0.1U

3

C194
10U/X6S

C124

0.1U

C143
1U

C79

0.1U

C45

0.1U

C82

0.1U

C105

0.1U

C486

C465
10U/X6S

330U/2.5V/ESR-9/POS

+

1.8VSUS

C154

0.47U

+1.05V+1.05V

AD27
AC27
AB27
AA27

W27

AD26
AC26
AB26
AA26

W26

AD25
AC25
AB25
AA25

W25

AD24
AC24
AB24
AA24

W24

AD23

AD22

AD21

AD20

AD19

AD18
AC18
AB18
AA18

W18

Y27
V27

U27
T27
R27

Y26
V26

U26
T26
R26

Y25
V25

U25
T25
R25

Y24
V24

U24
T24
R24

V23
U23
T23
R23

V22
U22
T22
R22

V21
U21
T21
R21

V20
U20
T20
R20

V19
U19
T19

Y18
V18

U18
T18

2

U27F

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72

Calistoga

NCTF

+1.5V_AUX(11)

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

+1.05V(4,5,6,7,11 , 1 6,19,36,39)

1.8VSUS(9,15,36,40)

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

+1.5V_AUX

+1.05V

1.8VSUS

1

+1.5V_AUX

PROJECT : DW1

Size Document Number Rev

3

2

Date: Sheet

Quanta Computer Inc.

GMCH POWER(4 OF 6)

10 42Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

+1.5V +V1.5_DPLLA

L10 10uH/0805

+

C103

C80

0.1U

470U_2.5V_12mOhm

L7 10uH/0805

D D

+

C22

C41

0.1U

470U_2.5V_12mOhm

L13 FCM2012C-121

C205

C192

22U

0.1U

L12 FCM2012C-121

C202

C171

22U

0.1U

R78

C C

+V1.5_PCIE

B B

A A

+1.05V
+1.5V
+V1.5_PCIE
+2.5V
+3V

10

L29
FCM2012C-121

C461

C457

10U/X6S

10U/X6S

R392

0.5/F

+1.5V_AUX

+V3.3_TVDAC +3V

R122
0

C94

0.1U

V1_5SFOLLOW

R405
10

+1.05V (4,5,6,7,10,16,19,36,39)
+1.5V (6,17,19,34,36,39)
+V1.5_PCIE (9)
+2.5V (13,35,36,39)
+3V (4,5,9,13,14,15 ,1 6,1 7, 18,19,20,24,29,30,31,32,33,34,35,36,38)

5

+V1.5_DPLLB

+V1.5_HPLL

+V1.5_MPLL

25mils

VCCGFOLLOW

L27
100nH

+

C458
220U/4V/ESR=15

L28
1uH

+1.5V

30mils

R407 0

+V3.3_TVDAC

L11
FCM2012C-121

C112

10U/X6S

B stage:
Change C103/C22 heigh to 1.9mm

D4
PDZ5.6B

21

PCIE_L

3GPLL_FB_L3GPLL_FB_R

+1.5V

D1

21

PDZ5.6B

+1.05V+2.5V

+V2.5_CRTDAC

R389
0

R393
0

+V3.3_ATVBG

+1.5V

RC0805

+V3.3_ATVBG

C109

0.1U

+V3.3_ATVBG

C110

0.1U

+V3.3_ATVBG

+1.5V+V1.5_3GPLL

4

+V3.3_ATVBG

C78
10U/X6S

+2.5V

+2.5V

+V1.5_HPLL

+1.5V

+3V

40mils

+1.5V_AUX

R410 0

+V3.3_ATVBG

C472

0.1U

C473

0.1U

C83

0.1U

+V1.5_3GPLL

C50

0.1U

+V2.5_CRTDAC

C90

0.1U

+2.5V

C44

0.01U

+V3.3_ATVBG

C101

0.1U

C215

0.1U

L32

FCM2012C-121

L33

FCM2012C-121

C462
10U/X6S

C91

0.022U

C42

0.1U

C85

0.022U

V15_TVDAC_R

C87

0.022U

+V3.3_ATVBG

C99

0.022U

+V3.3_ATVBG

+3V +1.5V

C468
10U/X6S

+V1.5_TVDAC +1.5V

C88

0.022U

+V1.5_QTVDAC

C475

0.022U

4

3

+2.5V

C61

0.1U

+V1.5_PCIE

C39

0.1U

+V1.5_DPLLB

+V3.3_ATVBG

+V3.3_ATVBG

+V1.5_TVDAC

+V1.5_QTVDAC

3

C36
10U/X6S

+V1.5_DPLLA

+V1.5_MPLL

+V3.3_ATVBG

H22
C30

B30
A30

AJ41

AB41

Y41
V41
R41
N41
L41

AC33

G41
H41

F21
E21
G21

B26
C39
AF1

A38
B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
A23

B23
B25

H19

AK31
AF31
AE31
AC31

AL30

AK30

AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22

AJ21
AH21

AJ20
AH20
AH19

P19
P16

AH15

P15
AH14
AG14
AF14
AE14

Y14
AF13
AE13
AF12
AE12
AD12

U27H

VCCSYNC
VCC_TXLVDS0

VCC_TXLVDS1
VCC_TXLVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

VCCA_LVDS
VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC
VCC_HV0

VCC_HV1
VCC_HV2

VCCD_QTVDAC
VCCAUX0

VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

Calistoga

POWER

2

+1.05V

C164 0.47U

C172 0.22U
C195 0.47U

C485

330U/2.5V/ESR-9/POS

+

C173

0.22U

VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

C135

4.7U

C122

0.22U

1

C155

2.2U

C58

0.1U

+2.5V

C93

0.47U

C59

0.1U

C64

4.7U

+1.05V

+1.05V

C57
10U/X6S

C86

0.47U

Need to check.

HF: Two 0402 @ 0.22 F (one ca　 p placed at
the Edge pin location D2, one cap placed at
power corridor); Two 0603 @ 0.47 F (placed　
at Edge pin locations AB1 and A6)

PROJECT : DW1

Size Document Number Rev

2

Date: Sheet

Quanta Computer Inc.

GMCH POWER (5 OF 6)

1

of

11 42Tuesday, January 03, 2006

1ACustom

5

www.bufanxiu.com

4

3

2

1

U27I

AC41

VSS_0

AA41

VSS_1

W41

VSS_2

T41

VSS_3

P41

VSS_4

M41

VSS_5

J41

VSS_6

F41

VSS_7

AV40

VSS_8

D D

C C

B B

A A

5

AP40

AN40

AK40

AJ40
AH40
AG40

AF40

AE40

B40

AY39
AW39

AV39
AR39
AN39

AJ39
AC39

AB39

AA39

Y39

W39

V39
T39

R39

P39
N39
M39

L39
H39

G39

F39
D39

AT38
AM38
AH38
AG38

AF38

AE38

C38

AK37
AH37

AB37

AA37

Y37

W37

V37
T37

R37

P37
N37
M37

L37
H37

G37

F37
D37

AY36
AW36
AN36
AH36
AG36

AF36

AE36
AC36

C36

B36
BA35
AV35

AR35
AH35

AB35
AA35

Y35

W35

V35

T35

R35

P35

N35
M35

L35

H35
G35

F35

D35

AN34

J39

J37

J35

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

Calistoga

VSS

VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179

4

AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23

3

AT23
AN23
AM23
AH23
AC23

W23

K23

C23

AA22

K22
G22

E22
D22

A22
BA21
AV21
AR21
AN21

AL21

AB21

Y21

P21

K21

H21

C21

AW20

AR20

AM20

AA20

K20

B20

A20
AN19
AC19

W19

K19

G19

C19
AH18

P18

H18

D18

A18
AY17
AR17
AP17

AM17

AK17
AV16
AN16

AL16

C16
AN15

AM15

AK15

N15

M15

B15

A15
BA14
AT14
AK14
AD14
AA14

U14

K14

H14

E14
AV13
AR13
AN13

AM13

AL13

AG13

P13

D13

B13
AY12
AC12

K12

H12

E12
AD11
AA11

Y11

F23

F22

J21

J16
F16

L15

F13

J23

U27J

VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272

Calistoga

VSS

VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360

J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

PROJECT : DW1

Quanta Computer Inc.

Size Document Number R ev

2

Date: Sheet

GMCH GND(6 OF 6)

12 42Tuesday, January 03, 2006

1

of

1ACustom

1

www.bufanxiu.com

2

3

4

5

6

7

8

GMCH SDVO Signal to DVI Signal Bridge

SDVOB_RED+(9)
SDVOB_RED-(9)

SDVOB_GREEN+(9)
SDVOB_GREEN-(9)

SDVOB_BLUE+(9)

A A

Intel has r ele ase d the sighting to change R13,R14 value
(2.2K~5.6K as appropriate) for SDVO I2C bus.

R13 6.8K

+2.5V

R14 6.8K

+2.5V

L5
BLM11A601S

1 2

+3V +2.5V

B B

+3V

C C

C9
*0.1U

1
2
3

8
4

+2.5V

U1

A0
A1
A2

VCC
GND

*AT24C08AN-10SI-2.7

L8
BLM11A601S

1 2

SCL

SDA

WP

SDVO_CtrlClk

SDVO_CtrlData

DVI_AVDD_PLL

C12

C18

0.1U

10U/10V

DVI_DVDD

C37

C40

0.1U

SD2_CLK
SD2_DAT

C43
10U/10V

0.1U

R6

R7

4.7K

4.7K

6
5

7

SDVOB_BLUE-(9)
SDVOB_CLK+(9)

SDVOB_CLK-(9)

AS (Address Select)
Default is PH, PD fo r differnt application
such as dual transmitter.

R12 10K

+2.5V

PLTRST#(17,18,27,33,34,35)

SDVO_CtrlClk(9)

SDVO_CtrlData(9)

DVI_DAT(35)
DVI_CLK(35)

CH_TMDS_CLK-(35)
CH_TMDS_CLK+(35)

CH_TMDS_TX0-(35)
CH_TMDS_TX0+(35)

CH_TMDS_TX1-(35)
CH_TMDS_TX1+(35)

CH_TMDS_TX2-(35)
CH_TMDS_TX2+(35)

SDVOB_RED+
SDVOB_RED-

SDVOB_GREEN+
SDVOB_GREEN-

SDVOB_BLUE+
SDVOB_BLUE-

SDVOB_CLK+
SDVOB_CLK-

R11 *100K

PLTRST#
SDVO_CtrlClk

SDVO_CtrlData

SD2_DAT
SD2_CLK
DVI_DAT
DVI_CLK

CH_TMDS_CLK­CH_TMDS_CLK+

CH_TMDS_TX0­CH_TMDS_TX0+

CH_TMDS_TX1­CH_TMDS_TX1+

CH_TMDS_TX2­CH_TMDS_TX2+

1
2
3
4
5
6
7
8

9
10
11
12

48

47

U2

AVDD3

SDVOB_CLK-

AVDD_PLL
RESET*
AS
SPC
SPD
AGND_PLL
DGND1
SD_PROM
SC_PROM
SD_DDC
SC_DDC
DVDD1

TLC*13TLC14TVDD115TDC0*16TDC017TGND118TDC1*19TDC120TVDD221TDC2*22TDC223TGND2

45

44

43

46

AGND3

SDVOB_B-

SDVOB_B+

SDVOB_CLK+

42

AVDD2

41

40

SDVOB_G-

SDVOB_G+

39

38

37

AGND2

SDVOB_R-

SDVOB_R+

AVDD1

SDVOB_STALL-

SDVOB_STALL+

SDVOB_INT-

SDVOB_INT+

AGND1
DGND2
HPDET
DVDD2

ATPG
SCEN

VSWING

24

CH7307

36
35
34

INT-

33

INT+

32
31
30
29
28
27
26
25

R19

1.2K

CH_TMDS_TX0­CH_TMDS_TX1­CH_TMDS_TX2­CH_TMDS_CLK-

R22 *330
R23 *330
R24 *330
R21 *330

C14

C21

0.1U

0.1U

CH_DVI_DETECT (35)

PROM2

R16 10K

PROM1

R18 10K

C46

0.1U

CH_TMDS_TX0+
CH_TMDS_TX1+
CH_TMDS_TX2+
CH_TMDS_CLK+

C15

0.1U

C47

0.1U

DVI_AVDD

C13
10U/10V

DVI_TVDD

C49
10U/10V

INT-

C29 0.1U

INT+

C31 0.1U

L6
BLM11A601S

1 2

L9
BLM11A601S

1 2

EXP_RXN2 (9)
EXP_RXP2 (9)

+3V

D D

PROJECT : DW1

Size Document Number Rev

1

2

3

4

5

6

Date: Sheet

Quanta Computer Inc.

GMCH SDVO Signal to DVI Signal Bridge

7

13 42Tuesday, January 03, 2006

8

1ACustom

of

1

www.bufanxiu.com

2

3

4

5

6

7

8

DDRII DUAL CHANNEL A,B

A A

SMDDR_VTERM SMDDR_VTERM

DDRII A CHANNEL

M_A_A[0..13]

SMDDR_VTERM

SMDDR_VTERM

C144

C71

0.1U

0.1U

C133

0.1U

C140

0.1U

C98

0.1U

C56

0.1U

C63

0.1U

M_A_A[0..13] (8,15)
SMDDR_VTERM (36,40)

C102

C126

0.1U

0.1U

C119

0.1U

C77

0.1U

C75

0.1U

C81

0.1U

C60

0.1U

C139

0.1U

DDRII B CHANNEL

C129

0.1U

M_B_A[0..13]

1.8VSUS
+3V

C97

0.1U

C62

0.1U

M_B_A[0..13] (8,15)

1.8VSUS (9,10,15,36,40)
+3V (4,5,9,11,13,15,16,17,18,19,20,24,29,30,31,32,33,34,35,36,38)

C117

C65

0.1U

0.1U

C138

0.1U

C131

0.1U

C68

0.1U

C127

0.1U

C104

0.1U

C130

0.1U

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

M_A_A13

M_ODT0(9,15)

B B

M_CKE1(9,15)

M_A_BS#0(8,15)

M_A_BS#1(8,15)

M_ODT1(9,15)

M_CS#1(9,15)

C C

CGCLK_SMB( 4 ,15,34)
CGDAT_SMB(4,15,34)

PM_EXTTS#0(9,15)

PM_EXTTS#1(9,18)

D D

M_ODT0
M_A_A8
M_A_A5
M_A_A3
M_A_A1

M_A_A6
M_CKE1
M_A_A10
M_A_BS#0
M_A_A7
M_A_A11
M_A_A2
M_A_A0

M_A_BS#1
M_A_A4
M_A_A12
M_A_A9
M_ODT1
M_CS#1

CGCLK_SMB
CGDAT_SMB
PM_EXTTS#0

R424 *0

RP31 56X2

1
3

RP17 56X2

1
3

RP21 56X2

1
3

RP11 56X2

1
3

RP24 56X2

1
3

RP14 56X2

1
3

RP18 56X2

1
3

RP22 56X2

1
3

RP13 56X2

1
3

RP33 56X2

1
3

SMB Address?

U29

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

*MAX6657/GMT781

VCC
DXP
DXN
GND

1
2
3
5

2
4
2
4
2
4

2
4
2
4
2
4
2
4

2
4
2
4
2
4

LM86_3V

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

+3V

R422
*200/F

C490
*2200P/50V

C487
*0.1U

DDR_THERMDA

DDR_THERMDCPM_EXTTS#1PM_EXTTS#1

13

Q21

2

*MMBT3904

M_B_BS#1(8,15)

M_CKE2(9,15)

M_B_BS#2(8,15)

M_B_A13(8,15)

M_CS#2(9,15)

M_B_WE#(8,15)

M_B_CAS#(8,15)
M_B_BS#0(8,15)

M_CS#0(9,15)

M_A_RAS#(8,15)
M_ODT3(9,15)

M_CS#3(9,15)

M_ODT2(9,15)
M_B_RAS#(8,15)
M_A_WE#(8,15)

M_A_CAS#(8,15)

M_CKE3(9,15)

M_A_BS#2(8,15)

M_CKE0(9,15)

M_B_BS#1
M_B_A0
M_B_A5
M_B_A3
M_B_A12
M_B_A8

M_B_A2
M_B_A4
M_B_A9
M_B_A1
M_B_A6
M_B_A7
M_CKE2
M_B_BS#2

M_B_A13
M_CS#2
M_B_WE#
M_B_CAS#
M_B_A10
M_B_BS#0

M_CS#0
M_A_RAS#
M_ODT3
M_CS#3
M_ODT2
M_B_RAS#
M_A_WE#
M_A_CAS#
M_B_A11
M_CKE3
M_A_BS#2
M_CKE0

RP23 56X2

1
3

RP19 56X2

1
3

RP12 56X2

1
3

RP20 56X2

1
3

RP15 56X2

1
3

RP16 56X2

1
3

RP8 56X2

1
3

RP30 56X2

1
3

RP29 56X2

1
3

RP25 56X2

1
3

RP27 56X2

1
3

RP32 56X2

1
3

RP26 56X2

1
3

RP28 56X2

1
3

RP9 56X2

1
3

RP10 56X2

1
3

2
4
2
4
2
4

2
4
2
4
2
4
2
4

2
4
2
4
2
4

2
4
2
4
2
4
2
4
2
4
2
4

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

SMDDR_VTERM

PROJECT : CT6

Quanta Computer Inc.

Size Document Number R ev

1

2

3

4

5

6

Date: Sheet

7

DDR RES. ARRAY

of

14 42Tuesday, January 03, 2006

8

1AB

1

www.bufanxiu.com

+3V

1.8VSUS

A A

B B

C C

D D

FSC required for
easily accessible.

+3V (4,5,9,11,13,14,16,17,18,19,20,24,29,30,31,32,33,34,35,36,38)

1.8VSUS (9,10,36,40)

T169

M_CKE0(9,14) M_CKE1 (9,14)

M_A_BS#2(8,14)

T174

M_A_BS#0(8,14)

M_A_WE#(8,14)

M_A_CAS#(8,14)

M_CS#1(9,14)
M_ODT1(9,14)

T190
T191

M_A_DQ1
M_A_DQ5

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3

M_A_DQ12
M_A_DQ8 M_A_DM1

M_A_DQS#1
M_A_DQS1

M_A_DQ9
M_A_DQ15

M_A_DQ21

M_A_DQ17
M_A_DQS#2

M_A_DQS2
M_A_DQ23

M_A_DQ19
M_A_DQ24

M_A_DQ25
M_A_DM3

M_A_DQ26
M_A_DQ27

M_A_BS#2
M_A_A12

M_A_A9
M_A_A8

M_A_A5
M_A_A3
M_A_A1

M_A_A10
M_A_BS#0
M_A_WE#

M_A_CAS#
M_CS#1

M_ODT1
M_A_DQ37

M_A_DQS#4
M_A_DQS4

M_A_DQ38
M_A_DQ39

M_A_DQ40
M_A_DQ41

M_A_DM5
M_A_DQ42

M_A_DQ46
M_A_DQ48

M_A_DQ49

M_A_DQS#6
M_A_DQS6

M_A_DQ50

M_A_DQ56
M_A_DQ60

M_A_DM7
M_A_DQ62

CGDAT_SMB
CGCLK_SMB

+3V

1

SMDDR_VREF

1.8VSUS 1.8VSUS
1

3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75

M_CKE0

77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

CN20

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

DDR2_SODIMM

CLOCK 0,1

CKE 0,1

2

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

H 6.75

2

M_A_DQ4
M_A_DQ0

M_A_DM0
M_A_DQ7

M_A_DQ6
M_A_DQ13

M_A_DQ14

M_CLK_DDR0
M_CLK_DDR#0

M_A_DQ10
M_A_DQ11

M_A_DQ20
M_A_DQ16

PM_EXTTS#0
M_A_DM2

M_A_DQ18
M_A_DQ22

M_A_DQ29
M_A_DQ28

M_A_DQS#3
M_A_DQS3

M_A_DQ30
M_A_DQ31

M_CKE1

M_A_A11
M_A_A7
M_A_A6

M_A_A4
M_A_A2
M_A_A0

M_A_BS#1
M_A_RAS#
M_CS#0

M_ODT0
M_A_A13

M_A_DQ32
M_A_DQ36M_A_DQ35

M_A_DM4
M_A_DQ33

M_A_DQ34
M_A_DQ44

M_A_DQ45
M_A_DQS#5

M_A_DQS5
M_A_DQ43

M_A_DQ47
M_A_DQ52

M_A_DQ53
M_CLK_DDR1

M_CLK_DDR#1
M_A_DM6
M_A_DQ54

M_A_DQ55M_A_DQ51
M_A_DQ61

M_A_DQ57
M_A_DQS#7

M_A_DQS7
M_A_DQ59M_A_DQ58

M_A_DQ63

R144 10K
R145 10K

SMbus address A0

3

M_A_DM[0..7] (8)
M_A_DQ[0..63] (8)
M_A_DQS[0..7] (8)
M_A_DQS#[0..7] (8)
M_A_A[0..13] (8,14)

M_CLK_DDR0 (9)
M_CLK_DDR#0 (9)

M_A_BS#1 (8,14)
M_A_RAS# (8,14)
M_CS#0 (9,14)

M_ODT0 (9,14)

M_CLK_DDR1 (9)
M_CLK_DDR#1 (9)

3

4

SMDDR_VREF

T156

1.8VSUS

M_B_DQ0
M_B_DQ5

M_B_DQS#0
M_B_DQS0

M_B_DQ7
M_B_DQ3

M_B_DQ9
M_B_DQ8 M_B_DM1

M_B_DQS#1
M_B_DQS1

M_B_DQ11
M_B_DQ10

M_B_DQ20
M_B_DQ17

M_B_DQS#2
M_B_DQS2

M_B_DQ19

M_B_DQ23
M_B_DQ29

M_B_DQ28

M_B_DM3

M_B_DQ31
M_B_DQ30

M_CKE2(9,14)

M_B_BS#2(8,14)

M_B_BS#0(8,14)

M_B_WE#(8,14)

M_B_CAS#(8,14)

M_CS#3(9,14)
M_ODT3(9,14)

CGDAT_SMB(4,14,34)
CGCLK_SMB(4,14,34)

M_CKE2

M_B_BS#2
M_B_A12

M_B_A9
M_B_A8

M_B_A5
M_B_A3
M_B_A1

M_B_A10
M_B_BS#0
M_B_WE#

M_B_CAS#
M_CS#3

M_ODT3
M_B_DQ37

M_B_DQ33
M_B_DQS#4

M_B_DQS4
M_B_DQ39

M_B_DQ35
M_B_DQ41

M_B_DQ40
M_B_DM5

M_B_DQ46

M_B_DQ43

M_B_DQS#6
M_B_DQS6

M_B_DQ54
M_B_DQ60

M_B_DQ57
M_B_DM7
M_B_DQ58

M_B_DQ59
CGDAT_SMB

CGCLK_SMB

+3V

CN19

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

2-1734073-2

CLOCK 3,4

CKE 2,3

4

5

SMDDR_VREF (9,40)

1.8VSUS

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

H 11

5

M_B_DQ4
M_B_DQ1

M_B_DM0
M_B_DQ2

M_B_DQ6
M_B_DQ12

M_B_DQ13

M_CLK_DDR3
M_CLK_DDR#3

M_B_DQ14
M_B_DQ15

M_B_DQ16
M_B_DQ21

PM_EXTTS#1
M_B_DM2

M_B_DQ18
M_B_DQ22

M_B_DQ24
M_B_DQ25

M_B_DQS#3
M_B_DQS3

M_B_DQ26
M_B_DQ27

M_CKE3

M_B_A11
M_B_A7
M_B_A6

M_B_A4
M_B_A2
M_B_A0

M_B_BS#1
M_B_RAS#
M_CS#2

M_ODT2
M_B_A13

M_B_DQ32
M_B_DQ36

M_B_DM4
M_B_DQ34

M_B_DQ38
M_B_DQ44

M_B_DQ45
M_B_DQS#5

M_B_DQS5
M_B_DQ47

M_B_DQ42
M_B_DQ52M_B_DQ53

M_B_DQ48M_B_DQ49
M_CLK_DDR2

M_CLK_DDR#2
M_B_DM6
M_B_DQ55M_B_DQ51

M_B_DQ50
M_B_DQ56

M_B_DQ61
M_B_DQS#7

M_B_DQS7
M_B_DQ62

M_B_DQ63

R143 10K
R146 10K

+3V

SMbus address A4

6

M_B_DM[0..7] (8)
M_B_DQ[0..63] (8)
M_B_DQS[0..7] (8)
M_B_DQS#[0..7] (8)
M_B_A[0..13] (8,14)

M_CLK_DDR3 (9)
M_CLK_DDR#3 (9)

PM_EXTTS#0 (9,14)

M_CKE3 (9,14)

M_B_BS#1 (8,14)
M_B_RAS# (8,14)

M_CS#2 (9,14)

M_ODT2 (9,14)

M_CLK_DDR2 (9)
M_CLK_DDR#2 (9)

6

7

1.8VSUS

Place these Caps near So-Dimm1.

C467

2.2U

C470

0.1U

C10

2.2U

C466

2.2U

C95

0.1U

C471

2.2U

1.8VSUS

Place these Caps near So-Dimm1.

C121

0.1U

SMDDR_VREF

C7

0.1U

+3V

C217

2.2U

C92

0.1U

C218

0.1U

8

Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to
CAP.

1.8VSUS

Place these Caps near So-Dimm2.

C118

2.2U

1.8VSUS

Place these Caps near So-Dimm1.

C76

0.1U

SMDDR_VREF

C8

0.1U

C84

2.2U

C72

0.1U

C11

2.2U

C74

2.2U

C125

0.1U

+3V

C216

2.2U

C96

0.1U

C219

0.1U

Place these Caps near So-Dimm2.
No Vias Between the Trace of PIN to
CAP.

PROJECT : DW1

Size Document Number Rev

Date: Sheet

7

Quanta Computer Inc.

DDR SO-DIMM(200P)

of

15 42Tuesday, January 03, 2006

8

1ACustom

5

www.bufanxiu.com

D14
CH500H-40

D13
CH500H-40

R305 *1 K

C383
*10P

VCCRTC

R315
332K/F

R314
*0

VCCRTC

VCCRTC

R310
20K

R304
1M

VCCRTC_3

C381
*10P

ICH_INTVRMEN

C347
1U/16V

G1 Place under Mini-card or Dram door

12

C376

G1

1U/16V

SHORT_ PAD1

Q17

13

*MMBT3904

2

+3V

C507
*10P

SATA_LED#(29)
SATA_RXN0(33)

SATA_RXP0(33)
SATA_TXN0(33)
SATA_TXP0(33)

CLK_PCIE_SATA#(4)
CLK_PCIE_SATA(4)

RTC

3VPCU

VCCRTC_5

D D

5VPCU

R311 *1 .2 K

R312
*4.7K

R306
*15K

C C

BIT_CLK(24)

SYNC(24)

AC_RESET#(24)

SDDATA_IN(24)

SDATA_OUT(24)

B B

ICH7 internal VR
enable strap

STATUS

Enable
(default)

A A

R290
1K

VCCRTC_4

12

BT1
BAT_CONN

VCCRTC_1

VCCRTC_2

C382
*10P

INTVRMEN

1

0Disable

4

Y6

T142
T151

T130
T133
T134
T135

CLK_32KX1

23

4 1

CLK_32KX2
RTCRST#
SM_INTRUDER#

ICH_INTVRMEN
LAN_EEP_CS

LAN_EEP_SK
LAN_EEP_DOUT
LAN_EEP_DIN

LAN_JCLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BCLK
ACZ_SYNC

ACZ_RST#
SDDATA_IN

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT
SATA_LED#
SATA_RXN0_C

SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_RXN2_C
SATA_RXP2_C
SATA_TXN2_C
SATA_TXP2_C

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATA_BIAS

PDIOR#
PDIOW#
PDDACK#
IRQ14
PDIORDY
PDDREQ

LAN_EEP_CS
LAN_EEP_SK
LAN_EEP_DOUT
LAN_EEP_DIN

C367
18P

32.768KHZ

C372
18P

LAN_JCLK(27)

LAN_RSTSYNC(27)

LAN_RXD0(27)
LAN_RXD1(27)
LAN_RXD2(27)

LAN_TXD0(27)
LAN_TXD1(27)
LAN_TXD2(27)

R333 39
R335 39

R334 39
R284 10K

C277 3900P
C278 3900P
C354 3900P
C353 3900P

R292 2 4 . 9 /F

Place within 500 mils of ICH7

PDIOR#(33)
PDIOW#(33)

PDDACK#(33)

IRQ14(33)
PDIORDY(33)
PDDREQ(33)

R338 * 3 .6K

CKL:C1/C2: 18pF -> CL:12.5pF
C1/C: 10pF -> CL Value = 8.5pF

R328

10M

AB1
AB2

AA3

AF18

AF3
AE3
AG2
AH2

AF7
AE7
AG6
AH6

AF1
AE1

AH10
AG10

AF15
AH15
AF16
AH16
AG16
AE15

Y5

W4
W1

Y1
Y2

W3

V3
U3
U5

V4

T5
U7

V6

V7
U1

R6
R5

T2

T3

T1

T4

U30A

RTXC1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN
EE_CS

EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN0

ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT
SATALED#
SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA_CLKN
SATA_CLKP

SATARBIASN
SATARBIASP

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

ICH7-M

Populate for 82562GX/GZ

LANVCC

U31

1

CS

VCC

2

SK
DI
DO4GND

NC
NC

3

93C46-3GR

3

LPCCPU

RTCLAN

AC-97/AZALIA

SATA

IDE

8
7

R346 *0

6
5

LAD0
LAD1
LAD2
LAD3

LDRQ0#

LDRQ1#/GPIO23

LFRAME#
A20GATE

A20M#

CPUSLP#

TP1/DPRSTP#

TP2/DPSLP#

FERR#

GPIO49/CPUPWRGD

IGNNE#

INIT3_3V#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THERMTRIP#

DD10
DD11
DD12
DD13
DD14
DD15

DCS1#
DCS3#

LANVCC

GND

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9

DA0
DA1
DA2

NMI

C389

0.1U

AA6
AB5
AC4
Y6

AC3
AA5

AB3
AE22

AH28
AG27
AF24

AH25
AG26
AG24

AG22
AG21
AF22
AF25

AG23
AH24

AF23
AH22
AF26

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

AH17
AE17
AF17

AE16
AD16

LAD0
LAD1
LAD2
LAD3

LDRQ#0
LDRQ#1

LFRAME#
GATEA20

H_A20M#
TP_H_CPUSLP#
H_DPRSTP#_R

H_DPSLP#_R
H_FERR#
H_PWRGD_R

H_IGNNE#
H_INIT#

H_INTR
RCIN#
H_NMI

H_SMI#_R
H_STPCLK#
H_THERMTRIP_R

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDA0
PDA1
PDA2

PDCS1#
PDCS3#

R235 *0
R252 0

R247 0

R258 0

R253 0

PDA[0..2] (33)

PDCS1# (33)
PDCS3# (33)

PM_THRMTRIP#

2

To confirm what stepping will support?

LAD0 (30,34,35)
LAD1 (30,34,35)
LAD2 (30,34,35)
LAD3 (30,34,35)

LDRQ#0 (30)

T139

LFRAME# (30,34,35)
GATEA20 (30)

H_A20M# (5)

H_CPUSLP# (5,7)

H_PWRGD (5)

H_IGNNE# (5)

T108

H_INIT# (5)
H_INTR (5)

RCIN# (30)
H_NMI (5)

H_SMI# (5)
H_STPCLK# (5)

PDD[0..15] (33)

+1.05V

2

1 3

Q16
*MMBT3904

+1.05V

R241 24.9/F

Should be 2" close ICH7

3V_S5

R236

R238

*1K

10K

THERM_CPUDIE_L#

R251
*56/F

R254
*56/F

+1.05V

R237 0

RCIN#

R260 10K

GATEA20

R259 10K

PDIORDY

R287 4.7K

IRQ14

R289 8.2K

ICH_DPRSTP# (5,41)
H_DPSLP# (5)

R240
56/F

PM_THRMTRIP# (5,9)

1

+3V

+1.05V

R243
56/F

H_FERR# (5)

THERM_CPUDIE# (30)

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

ICH7-M HOST (1 OF 4)

1

of

16 42Tuesday, January 03, 2006

1ACustom

5

www.bufanxiu.com

PCIE_RXN0(34)

For MINI CARD PCI-E

For EXPRESS CARD (NEW CARD)

D D

C C

For 82573 GigaLAN

PCIE_RXP0(34)

PCIE_TXN0(34)
PCIE_TXP0(34)

PCIE_RXN1(34)
PCIE_RXP1(34)

PCIE_TXN1(34)
PCIE_TXP1(34)

PCIE_RXN2(27)
PCIE_RXP2(27)

PCIE_TXN2(27)
PCIE_TXP2(27)

+3V

R342

R337

10K

10K

USBOC0#(23)
USBOC1#(23)

C504 0 . 1U

C505 0 . 1U

C502 0 . 1U

C503 0 . 1U

C500 0 . 1U

C501 0 . 1U

T92
T100
T93
T94

T91
T98
T97
T99

T88
T105
T90

R451

T87

10K

T149
T146

T143
T147
T152
T144
T201
T200

4

U30D

F26

PERn1

F25

M26
M25

N28
N27

R28
R27

E28
E27

H26
H25
G28
G27

K26
K25

L28
L27

P26
P25

T25
T24

J28
J27

R2
P6
P1

P5
P2

D3
C4
D5
D4
E5
C3
A2
B3

PERp1
PETn1
PETp1

PERn2
PERp2
PETn2
PETp2

PERn3
PERp3
PETn3
PETp3

PERn4
PERp4
PETn4
PETp4

PERn5
PERp5
PETn5
PETp5

PERn6
PERp6
PETn6
PETp6

SPI_CLK
SPI_CS#
SPI_ARB

SPI_MOSI
SPI_MISO

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

ICH7-M

PCI-Express

SPI

USB

PCIE_TXN0_C
PCIE_TXP0_C

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5

SPI_SCLK
SPI_CE#
SPI_ARB

SPI_SI
SPI_SO

USBOC0#
USBOC1#
USBOC2#
USBOC3#
USBOC4#
USBOC5#
USBOC6#
USBOC7#

3

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN
DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USBRBIAS#

USBRBIAS

DMI_RXN0

V26

DMI_RXP0

V25

DMI_TXN0

U28

DMI_TXP0

U27

DMI_RXN1

Y26

DMI_RXP1

Y25

DMI_TXN1

W28

DMI_TXP1

W27

DMI_RXN2

AB26

DMI_RXP2

AB25

DMI_TXN2

AA28

DMI_TXP2

AA27

DMI_RXN3

AD25

DMI_RXP3

AD24

DMI_TXN3

AC28

DMI_TXP3

AC27

CLK_PCIE_ICH#

AE28

CLK_PCIE_ICH

AE27
C25

D25

USBP0-

F1

USBP0+

F2

USBP1-

G4

USBP1+

G3

USBP2-

H1

USBP2+

H2

USBP3-

J4

USBP3+

J3

USBP4-

K1

USBP4+

K2

USBP5-

L4

USBP5+

L5

USBP6-

M1

USBP6+

M2

USBP7-

N4

USBP7+

N3
D2

USB_RBIAS_PN

D1

Place within 500
mils of ICH7

DRI_IRCOMP_R

DMI_RXN0 (9)
DMI_RXP0 (9)
DMI_TXN0 (9)
DMI_TXP0 (9)

DMI_RXN1 (9)
DMI_RXP1 (9)
DMI_TXN1 (9)
DMI_TXP1 (9)

DMI_RXN2 (9)
DMI_RXP2 (9)
DMI_TXN2 (9)
DMI_TXP2 (9)

DMI_RXN3 (9)
DMI_RXP3 (9)
DMI_TXN3 (9)
DMI_TXP3 (9)

CLK_PCIE_ICH# (4)
CLK_PCIE_ICH (4)

USBP0- (23)
USBP0+ (23)
USBP1- (23)
USBP1+ (23)
USBP2- (23)
USBP2+ (23)
USBP3- (27)
USBP3+ (27)
USBP4- (20)
USBP4+ (20)
USBP5- (31)
USBP5+ (31)
USBP6- (34)
USBP6+ (34)
USBP7- (34)
USBP7+ (34)

R453

22.6/F

2

+1.5V

R242

24.9/F

Place within 500 mils of ICH7

USB 0~3 : USB PORT

USB 4 : Camera

USB 5 : Bluetooth Module
USB 6 : Mini PCI-E
USB 7 : NEW CARD

3VSUS

1

REQ2#
REQ1#

STOP#

+3V

SERR#
LOCK#
PERR#

+3V

INTH#

IRDY#

INTF#
INTC#

+3V

USBOC2#
USBOC3#
USBOC0#
USBOC4#

RP57

6
7
8
9

10

8.2KX8

RP58

6
7
8
9

10

8.2KX8

RP59

6
7
8
9

10

8.2KX8

RP60

6
7
8
9

10

8.2KX8

+3V

5

REQ4#

4

TRDY#FRAME#

3

DEVSEL#

2

REQ3#

1

+3V

5
4

INTE#

3

REQ5#

2

INTG#

1

+3V

5

REQ0#

4

INTD#

3

INTB#

2

INTA#

1

3VSUS

5

USBOC1#

4

USBOC5#

3

USBOC7#

2

USBOC6#

1

CKL use 10Kohm

AD[0..31](21)

B B

INTA#
INTB#
INTC#
INTD#

A A

TP_ICH_RSVD1

T137

TP_ICH_RSVD2

T138

TP_ICH_RSVD3

T141 T131

TP_ICH_RSVD4

T140

TP_ICH_RSVD5

T127

5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

U30B

E18

AD0

C18

AD1

A16

AD2

F18

AD3

E16

AD4

A18

AD5

E17

AD6

A17

AD7

A15

AD8

C14

AD9

E14

AD10

D14

AD11

B12

AD12

C13

AD13

G15

AD14

G13

AD15

E12

AD16

C11

AD17

D11

AD18

A11

AD19

A10

AD20

F11

AD21

F10

AD22

E9

AD23

D9

AD24

B9

AD25

A8

AD26

A6

AD27

C7

AD28

B6

AD29

E6

AD30

D6

AD31

Interrupt I/F

A3

PIRQA#

B4

PIRQB#

C5

PIRQC#

B5

PIRQD#

AE5

RSVD[1]

AD5

RSVD[2]

AG4

RSVD[3]

AH4

RSVD[4]

AD9

RSVD[5]

ICH7-M

PCI

MISC

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#

GNT3#
REQ4#/GPIO22
GNT4#/GPIO48

GPIO1/REQ5#

GPIO17/GNT5#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#

RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]

MCH_SYNC#

4

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

B15
C12
D12
C15

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

C26
A9
B19

G8
F7
F8
G7

AE9
AG8
AH8
F21
AH20

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#
GNT4#
REQ5#
GNT5#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLT_RST-R#
PCLK_ICH
PCI_PME#

INTE#
INTF#
INTG#
INTH#

TP_ICH_RSVD6
TP_ICH_RSVD7
TP_ICH_RSVD8
RSVD9

REQ0# (21)

GNT0# (21)

T115
T114
T119
T116
T123
T122

C/BE0# (21)

C/BE1# (21)

C/BE2# (21)

C/BE3# (21)

IRDY# (21)

PAR (21)

PCIRST# (21)

DEVSEL# (21)

PERR# (21)

SERR# (21)

STOP# (21)

TRDY# (21)

FRAME# (21)

PCLK_ICH (4)

PCI_PME# (21)

INTE# (21)

INTF# (21)

T126
T132

MCH_ICH_SYNC (9) PLTRST# (13,18,27,33,34,35)

R229
*1K/F

ICH7 Boot BIOS select

R448 10K
R449 * 1K
R302 * 1K
R303 10K

3

PLT_RST-R#

+3V

+3V

2
1

ICH7 Boot BIOS select

STRAP

PLT_RST-R# (9)

+3V

3 5

GNT4#
LPC (default)
SPI

C281

0.1U

4

U14
TC7SH08FU

1
0

Don't connect to PCI device / Express card

GNT5#

1
1

2

PROJECT : DW1

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

ICH7-M PCI E (2 OF 4)

1

of

17 42Tuesday, January 03, 2006

1ACustom

5

www.bufanxiu.com

4

3

2

1

3V_S5

3V_S53V_S5

PCLK_SMB
PDAT_SMB
PCIE_WAKE#

D D

BATLOW#_R

R256 2.2K
R444 2.2K
R239 1K
R273 8.2K

SMB_LINK_ALERT#
SMLINK0
SMLINK1

R439 10K
R440 10K
R441 10K

DNBSWON#
SYS_RST#-1
SMB_ALERT#
RI#
SWI#
LAN_RST#

R248 10K
R445 10K
R443 10K

R280 10K
R526 10K

C Stage modify

+3V

R447
No stuff-->boot
Stuff-->No boot

ACZ_SPKR(24)

+3V

C C

PM_STPPCI#(4)
PM_STPCPU#(4)

+3V

THERM_ALERT#(5)

B B

VR_PWRGD_CK410#(4,41)

DELAY_VR_PWRGOOD(9,41)

A A

PWROK(30)

R447

*1K/F

R276

R270

*10K/F

*10K/F

Remove RF_OFF# from GPIO26

R271
10K/F

PWM require 6.9K
Change to 6.8K

R327 6.8K/F

+3V

C5310.1U

R317 100K

PM_BMBUSY#(9)

CLKRUN#(21,30,35)

PCIE_WAKE#(27,34)

SERIRQ(21,30,35)

SMI#(30)

1
2

SUS_STAT#(35)

SYS_RST#(5)

R274 0
R264 0

SCI#(30)

+3V

U15

5

VR_PWRGD_CK410

43

NL17SZ14DFT2G

3VSUS

2
1

3 5

PCLK_SMB(4,27,34)
PDAT_SMB(4,27,34)

SYS_RST#

SMB_ALERT#(27)

Board_ID2

R285 0
R267 0

C350

0.047U

ICH_PWROK

4

U17
TC7SH08FU

T196
T197
T198

RI#(21)

R446 0

T102

R286 0

T205
T106

T95

T111

VR_PWRGD_CK410

T223

PCLK_SMB
PDAT_SMB

SMB_LINK_ALERT#

SMLINK0
SMLINK1

RI#

SYS_RST#-1

SMB_ALERT#

PM_STPPCI_ICH#
PM_STPCPU_ICH#

CLKRUN#

R504 0

PCIE_WAKE#
SERIRQ

RUNTIME_SCI#_R
SMI#_R

ICH_PWROK (27)

R325
10K

U30C

C22

SMBCLK

B22

SMBDATA

A26

LINKALERT#

B25

SMLINK0

A25

SMLINK1

A28

RI#

A19

SPKR

A27

SUS_STAT#

A22

SYS_RST#

AB18

GPIO0/BM_BUSY#

B23

GPIO11/SMBALERT#

AC20

GPIO18/STPPCI#

AF21

GPIO20/STPCPU#

A21

GPIO26

B21

GPIO27

E23

GPIO28

AG18

GPIO32/CLKRUN#

AC19

GPIO33/AZ_DOCK_EN#

U2

GPIO34/AZ_DOCK_RST#

F20

WAKE#

AH21

SERIRQ

AF20

THRM#

AD22

VRMPWRGD

AC21

GPIO6

AC18

GPIO7

E21

GPIO8

ICH7-M

GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP

GPIO

SATA

SYS

GPIO

GPIO37/SATA3GP

Clocks

GPIO16/DPRSLPVR

TP0/BATLOW#

SMB

Power MGT

GPIO

BOARD ID Selection

+3V +3V +3V +3V +3V +3V

Board_ID0

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

PWRBTN#

LAN_RST#

RSMRST#

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39

R278
10K

R275
*10K

Board_ID3
Board_ID4

14M_ICH
CLKUSB_48

R442 100/F
R249 100/F

ICH_PWROK
PM_DPRSLPVR_RPM_DPRSLPVR_R
BATLOW#_R
DNBSWON#

R268 0
R262 *100/F

SWI#

AMP_BEEP
Board_ID5

Board_ID1

Board_ID0

Board_ID0 and Board_ID1 swap

T204
T112

14M_ICH (4)

T107

T103

CLKUSB_48 (4)

SUSB# (30)
SUSC# (30)

R272 100/F

R332 100/F

SWI# (30)

T199
T118
T113
T136
T101
T229
T206
T231

T110

R502 0

AF19

R503 0

AH18
AH19
AE19

AC1
B2

C20
B24

D23
F22

AA4
AC22
C21
C23

C19
Y4
E20

A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

Remove BT_OFF# from GPIO25

C-stage : Modify to add DVI and CRT
port detail from GPIO38
DVI : Pull down to GND
CRT : Pull high to +3V

R279
*10K

R277
10K

Board_ID1

R283
*10K

R281
10K

Board_ID2

R265 0

R263 *100K

T96

DNBSWON# (30)
LAN_RST# (30)

PLTRST# (13,17,27,33,34,35)

C Stage modify

RSMRST#PM_RSMRST#_R

Board_ID3 Board_ID4

RSMRST# (30)

R492
*10K

R494
10K

CLKRUN#
SERIRQ
RUNTIME_SCI#_R
RSMRST#

For EMI Perofmance

CLKUSB_48 14M_ICH

R452
*10

C508
*10P

PM_EXTTS#1 (9,14)

PM_DPRSLPVR (41)
BATLOW# (30)

R450
*33

C509
*10P

Lan_RST#

1. If use 82573E (PCI-E), Lan_RST# tie to PLTRST#.

2. If use 82562GX/GZ (LCI), Lan_RST# tie to EC.

R493
*10K

R495
10K

C Stage modify

R282 8.2K
R269 8.2K
R288 10K
R347 10KR438 10K

Board_ID5

R523
*10K

R524
10K

+3V

Board_ID0
Board_ID1
Board_ID2

5

4

3

Board_ID0 (30)
Board_ID1 (30)
Board_ID2 (30)

Size Document Number Rev

2

Date: Sheet

PROJECT : DW1

Quanta Computer Inc.

ICH7-M GPIO (3 OF 4)

18 42Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

U30E

A4

VSS[1]

A23

VSS[2]

B1

VSS[3]

B8

VSS[4]

B11

VSS[5]

B14

VSS[6]

C27
D10
D13
D18
D21
D24

E15

F12
F27
F28

G14
G18
G21
G24
G25
G26

H24
H27
H28

K24
K27
K28

M12
M13
M14
M15
M16
M17
M24
M27
M28

N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26

P12
P13
P14
P15
P16
P17
P24
P27

B17

VSS[7]

B20

VSS[8]

B26

VSS[9]

B28

VSS[10]

C2

VSS[11]

C6

VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]

E1

VSS[19]

E2

VSS[20]

E4

VSS[21]

E8

VSS[22]
VSS[23]

F3

VSS[24]

F4

VSS[25]

F5

VSS[26]
VSS[27]
VSS[28]
VSS[29]

G1

VSS[30]

G2

VSS[31]

G5

VSS[32]

G6

VSS[33]

G9

VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]

H3

VSS[41]

H4

VSS[42]

H5

VSS[43]
VSS[44]
VSS[45]
VSS[46]

J1

VSS[47]

J2

VSS[48]

J5

VSS[49]

J24

VSS[50]

J25

VSS[51]

J26

VSS[52]
VSS[53]
VSS[54]
VSS[55]

L13

VSS[56]

L15

VSS[57]

L24

VSS[58]

L25

VSS[59]

L26

VSS[60]

M3

VSS[61]

M4

VSS[62]

M5

VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]

N1

VSS[73]

N2

VSS[74]

N5

VSS[75]

N6

VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]

P3

VSS[88]

P4

VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]

ICH7-M

D D

C C

B B

A A

VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

4

+5V +3V

R291
100/F

C305
1U

PAD1

1

+1.5V

C355

0.1U

21

D12
PDZ5.6B

C328

0.1U

+1.5V +1.5V_PCIE_ICH

L18

+1.5V

BK1608HS800-T

R220
1

+3V

3V_S5

C320

0.1U

C357

0.1U

L44
1uH

+

V5REF(1)

5VPCU 3VPCU

21

R339
10

C377
1U

C284

C294

220U

0.1U

C506

0.01U

+1.5V

C330

0.1U

D15
PDZ5.6B

3

C375

0.1U

C296

0.1U

GPLL_R_LGPLL_R

C499
10U/X6S

T153
T128

+3V

+1.5V

+1.5V

V5REF_SUS

C287

0.1U

C289

0.1U

C343
1U

C323
1U

TPVCCSUSLAN1
TPVCCSUSLAN2

U30F

G10

V5REF[1]

AD17

V5REF[2]

F6

V5REF_Sus

AA22

Vcc1_5_B[1]

AA23

Vcc1_5_B[2]

AB22

Vcc1_5_B[3]

AB23

Vcc1_5_B[4]

AC23

Vcc1_5_B[5]

AC24

Vcc1_5_B[6]

AC25

Vcc1_5_B[7]

AC26

Vcc1_5_B[8]

AD26

Vcc1_5_B[9]

AD27

Vcc1_5_B[10]

AD28

Vcc1_5_B[11]

D26

Vcc1_5_B[12]

D27

Vcc1_5_B[13]

D28

Vcc1_5_B[14]

E24

Vcc1_5_B[15]

E25

Vcc1_5_B[16]

E26

Vcc1_5_B[17]

F23

Vcc1_5_B[18]

F24

Vcc1_5_B[19]

G22

Vcc1_5_B[20]

G23

Vcc1_5_B[21]

H22

Vcc1_5_B[22]

H23

Vcc1_5_B[23]

J22

Vcc1_5_B[24]

J23

Vcc1_5_B[25]

K22

Vcc1_5_B[26]

K23

Vcc1_5_B[27]

L22

Vcc1_5_B[28]

L23

Vcc1_5_B[29]

M22

Vcc1_5_B[30]

M23

Vcc1_5_B[31]

N22

Vcc1_5_B[32]

N23

Vcc1_5_B[33]

P22

Vcc1_5_B[34]

P23

Vcc1_5_B[35]

R22

Vcc1_5_B[36]

R23

Vcc1_5_B[37]

R24

Vcc1_5_B[38]

R25

Vcc1_5_B[39]

R26

Vcc1_5_B[40]

T22

Vcc1_5_B[41]

T23

Vcc1_5_B[42]

T26

Vcc1_5_B[43]

T27

Vcc1_5_B[44]

T28

Vcc1_5_B[45]

U22

Vcc1_5_B[46]

U23

Vcc1_5_B[47]

V22

Vcc1_5_B[48]

V23

Vcc1_5_B[49]

W22

Vcc1_5_B[50]

W23

Vcc1_5_B[51]

Y22

Vcc1_5_B[52]

Y23

Vcc1_5_B[53]

B27

Vcc3_3[1]

AG28

VccDMIPLL

AB7

Vcc1_5_A[1]

AC6

Vcc1_5_A[2]

AC7

Vcc1_5_A[3]

AD6

Vcc1_5_A[4]

AE6

Vcc1_5_A[5]

AF5

Vcc1_5_A[6]

AF6

Vcc1_5_A[7]

AG5

Vcc1_5_A[8]

AH5

Vcc1_5_A[9]

AD2

VccSATAPLL

AH11

Vcc3_3[2]

AB10

Vcc1_5_A[10]

AB9

Vcc1_5_A[11]

AC10

Vcc1_5_A[12]

AD10

Vcc1_5_A[13]

AE10

Vcc1_5_A[14]

AF10

Vcc1_5_A[15]

AF9

Vcc1_5_A[16]

AG9

Vcc1_5_A[17]

AH9

Vcc1_5_A[18]

E3

VccSus3_3[19]

C1

VccUSBPLL

AA2

VccSus1_05/VccLAN1_05[1]

Y7

VccSus1_05/VccLAN1_05[2]

ICH7-M

2

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]

CORE

Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

VCC PAUX

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

Vcc3_3/VccHDA

VccSus3_3/VccSusHDA

V_CPU_IO[1]
V_CPU_IO[2]

VCCA3GP

V_CPU_IO[3]

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]

IDE

Vcc3_3[8]

Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]

PCI

Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

VccRTC
VccSus3_3[1]
VccSus3_3[2]

VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]

VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]

USB

VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

Vcc1_5_A[19]
Vcc1_5_A[20]

Vcc1_5_A[21]

ATXARX

Vcc1_5_A[22]
Vcc1_5_A[23]

Vcc1_5_A[24]
Vcc1_5_A[25]

VccSus1_05[1]
VccSus1_05[2]

VccSus1_05[3]

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

USB CORE

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

V5
V1
W2
W7

U6
R7
AE23

AE26
AH26

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

W5
P7
A24

C24
D19
D22
G19

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

AB17
AC17

T7
F17
G17

AB8
AC8

K7
C28

G20
A1

H6
H7
J6
J7

C316

0.1U

+3V

C318

0.1U

C317

0.1U

C299

0.1U

C345

0.1U

TP_ICHVCCSUS1
TP_ICHVCCSUS2

TP_ICHVCCSUS3

C326

0.1U

C319

0.1U

C309

0.1U

3V_S5

3V_S5

+1.5V

C324

0.1U

C346

0.1U

3V_S5

C302

0.1U

C344

0.1U

T129
T89

T104

C325

0.1U

C308

0.1U

C312

0.1U

C339

0.1U

C313

0.1U

C303

0.1U

C315

0.1U

1

+1.05V

+

C279
330U/2.5V/ESR-9/POS

C314

0.1U

C304

0.1U

+3V

C340

0.1U

+3V

C310

0.1U

VCCRTC

C338

0.1U

+1.5V

C333

0.1U

3V_S5

C292

0.1U

C342

0.1U

C306

0.1U

C356

0.1U

C311

0.1U

+1.5V

+1.05V

C329

0.1U

C301

4.7U/10V

+1.5V

C307

0.1U

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

ICH7-M POWER (4 OF 4)

1

of

19 42Tuesday, January 03, 2006

1ACustom

1

www.bufanxiu.com

2

3

4

5

6

7

8

LCD_CON30

1

CN4

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

34

28

33

29

32

3031

USBP4-(17)

USBP4+(17)

EDIDCLK(9)

EDIDDATA(9)

1

EDIDDATA_1
EDIDCLK_1

R141 3.3K

TXLOUT0+
TXLOUT0-

TXLOUT1+
TXLOUT1-

TXLOUT2+
TXLOUT2-

TXLCLKOUT+
TXLCLKOUT-

R2 *0

1
4 3

R3 *0

A A

B B

C C

D D

VIN_BLIGHT
LCDVCC

+3V

VADJ_R

TXLOUT0+ (9)
TXLOUT0- (9)

TXLOUT1+ (9)
TXLOUT1- (9)

TXLOUT2+ (9)
TXLOUT2- (9)

TXLCLKOUT+ (9)
TXLCLKOUT- (9)

L3

2

*WCM2012-90

COM-CHOKE-WCM2012-4P

Q19 2N7002E

1

R383 10K

R384 10K

1

Q20 2N7002E

2

USBP4-1
USBP4+1

2
2

R140

4.7K

CN1

*CAMERA

B stage:
Change CN1 footprint.

3

+3V

3

1
2
3
4
5

EDIDCLK_1

EDIDDATA_1

+3V

C460

0.1U

LIGHT_SENOR (30)

5VSUS5VSUS

C4
*0.1U

3

VADJ_R
BLON
EDIDDATA_1
EDIDCLK_1

+PWR_SRC

Reserve for EMI.

C441
*0.1U

L26 FBM2125HM330

C451

0.1U/50V

C442
*0.1U

4

C449

0.1U

C447

0.1U/50V

VADJ_R

C440
10U/25V

LCD_BLON(9)

C439

0.1U

DISP_ON(9)

VIN_BLIGHT

C529

0.1U

4

U33
TC7SH08FU

+3V

3 5

+3V

R387
*10K

2

BLON

1

R382 1K

5

C438

0.1U

R379 1K
R380 *0

+3V

R388
10K

C530 0.1U

PANEL VCC CONTROL

U26

AAT4280_OUT

D21

1SS355

1

OUT

2

GND

5

GND

Size Document Number R ev

Date: Sheet

3VPCU

C455
*10P

C452

0.1U

R385
10K

7

6

IN

4

IN

3

ON/OFF

AAT4280-1

6

BRIGHTNESS (30)
DPST_PWM (9)

2 1

C443

0.1U

LCDVCC

C450

4.7U/10V

L25
FBM2125HM330

C456
22U/16V/1206

LID# (29,30)

BLON# (MR)
Default High, Backlight turn on.
When MR off, D28 turn on, Backlight turn off.

C444

0.01U

PROJECT : DW1

Quanta Computer Inc.

LCD CONN

of

20 42Tuesday, January 03, 2006

8

1AB

A

www.bufanxiu.com

B

C

D

E

3VSUS

C362

C420

3VSUS

R353
10K

C400
*0.1U

10U

4 4

3 3

2 2

PowerOnReset for VccCore

When GRESET# is controlled by system,
the pull-up resistor(R353) and
capacitor(C400) do not need to apply.

CBUS_REST#_1

PCI_CLK_5C832

R326
*22

C358
*22P

C385

0.01U

0.1U

CBUS_REST#(30)

Ground guard

C418

0.01U

PCLK_5C832(4)

CLKRUN#(18,30,35)

C417

0.01U

AD[0..31](17)

C/BE3#(17)
C/BE2#(17)
C/BE1#(17)
C/BE0#(17)

REQ0#(17)
GNT0#(17)

FRAME#(17)

IRDY#(17)

TRDY#(17)

DEVSEL#(17)

STOP#(17)
PERR#(17)
SERR#(17)

CBUS_REST#

PCIRST#(17)

RI#(18)

C408

C423
10U

C419

0.01U

PAR(17)

AD25

D18 RB500

C398

0.01U

0.01U

VCC_ROUT_832

C359

C393

0.47U

0.47U

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3# SCL
C/BE2#
C/BE1#
C/BE0#

R343 100

REQ0#
GNT0#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

CBUS_REST#_1

21

PCIRST#
PCI_CLK_5C832
R5C832_PME#
CLKRUN#

R356 *0

10
20
27
32
41

128

61
16

34

64
114
120

125
126
127

1
2
3
5
6

9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
33

7
21
35
45

8

124
123

23
24
25
26
29
30
31

71

119
121

70

117

U19B

VCC_PCI1
VCC_PCI2
VCC_PCI3
VCC_PCI4
VCC_PCI5
VCC_PCI6

VCC_RIN
VCC_ROUT1

VCC_ROUT2
VCC_ROUT3
VCC_ROUT4
VCC_ROUT5

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL

REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

GBRST#
PCIRST#

PCICLK
PME#
CLKRUN#

R5C832T_V00

HWSPND#

PCI / OTHER

UDIO0/SRIRQ#

VCC_3V

VCC_MD

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

GND10

AGND1
AGND2
AGND3
AGND4
AGND5

MSEN
XDEN

UDIO5

UDIO3
UDIO4

UDIO2
UDIO1

INTA#
INTB#

TEST

3VSUS3VSUS

67

C410

C387

0.01U

10U

86

4
13
22
28
54
62
63
68
118
122

99
102
103
107
111

69

58
55

57

65
59

56
60
72

115
116

66

HWSPND#

SDA

SERIRQ

INTE#
INTF#

3VSUS

R362
10K

When HWSPND# is
controlled by system, the
pull-up resistor(R232)
dose not need to apply.

SERIRQ (18,30,35)

INTE# (17)
INTF# (17)

3VSUS

R370
10K

R369
10K

3VSUS3VSUS3VSUS

R367

R475

10K

10K

3VSUS

R474

* NOT Use EEPROM :

*100K

R231 : installed
R233,U15,C316 : NOT installed

* Use EEPROM :

R233,U15,C316 : installed
R231 : NOT installed

R473
100K

3VSUS

Serial EEPROM

C429

0.01U

U24

8

VCC

7

NC

6

SCL

5

SDA

24C02

GND

1

A0

2

A1

3

A3

4

CLKRUN#

CoreLogic CLOCKRUN#

1 1

When CLKRUN# is controlled
by system, the pull-down
resistor(R244) dose not need
to apply.

A

R319
*100K

This part needs to populate?

B

R358

2

R5C832_PME#

10K

1

3

Q18
2N7002E

PCI_PME# (17)

PROJECT : DW1

Size Document Number Rev

C

D

Date: Sheet

Quanta Computer Inc.

R5C832 PCI CONNECTOR

E

1ACustom

of

21 42Tuesday, January 03, 2006

A

www.bufanxiu.com

B

C

3VSUS

D

E

1394_AVCC

4 4

U19A

TPBIAS0

TPBN0
TPBP0

TPAN0
TPAP0

98
106
110
112

113

104
105

108
109

AVCC_PHY1
AVCC_PHY2
AVCC_PHY3
AVCC_PHY4

C379 22P

Y5

24.576MHz
C371 22P

3 3

C366 0.01U

R318 10K/F

C351 0.01U

1394_XIN

1394_XOUT

FIL0_PWR

REXT

VREF_PWR

94

XI

95

XO

96

FIL0

101

REXT

100

VREF

IEEE1394/SD

TPBIAS0

C361
10U

R320

56.2/F

R321

56.2/F

C364

0.1U

C360 0.33uF

C352 0.01U

R322

56.2/F

R323

56.2/F

C365

0.01U

L20 FBM1608

C363

0.001U

TPB0N
TPB0P

TPA0N
TPA0P

C341 270P

R309 5.11K/F

GND Shields

GND Shields

AS CLOSE AS POSS IB LE TO 1394 CONNECTOR.

R63 0

TPB0N
TPB0P

TPA0N
TPA0P

L31

1

2

4 3

*WCM2012-90

COM-CHOKE-WCM2012-4P

R58 0

R53 0

L30

1

2

4 3

*WCM2012-90

COM-CHOKE-WCM2012-4P

R39 0

TPB0N_C
TPB0P_C

TPA0N_C
TPA0P_C

CN18
1394_CONN

1

1

2

2

3

3

4

4

1

556

6

GUARD GND

87

MDIO17

92

MDIO16

89

MDIO15

91

MDIO14
MDIO13

2 2

1 1

97

RSV

R5C832T_V00

A

MDIO12
MDIO11
MDIO10

MDIO05
MDIO08
MDIO19
MDIO18
MDIO02

MDIO03
MDIO00

MDIO01

MDIO09

MDIO04
MDIO06

MDIO07

90
93
81
82

75
88
83
85
78

77
80

79

84

76
74

73

MDIO13
MDIO12
MDIO11
MDIO10

MDIO08

MDIO03
SD_CDZ

MS_CDZ

MDIO09

MC_PWR_CTRL_0

T154

B

MDIO13 (23)
MDIO12 (23)
MDIO11 (23)
MDIO10 (23)

MDIO08 (23)

MDIO03 (23)

MDIO09 (23)

MC_PWR_CTRL_0 (23)

Close to CHIP

D16 RB500

2 1

2 1

D17 RB500

GUARD GND

3VSUS

R478
10K

SD_CDZ
MS_CDZ

SD_CDZ (23)
MS_CDZ (23)

PROJECT : DW1

Size Document Number R ev

C

D

Date: Sheet

Quanta Computer Inc.

IEEE1394

E

of

22 42Tuesday, January 03, 2006

1ACustom

A

www.bufanxiu.com

B

C

VCC_XD

D

VCC_XD

E

U16

IN5OUT
NC

EN4GND

G5240

12

C6
*Clamp-Diode

C336

0.1U

VCC_XD

1

2

C433
470P/50V

12

USBP2-1
USBP2+1USB2PWR

12

C5
*Clamp-Diode

C334

0.1U

C337
10U

C434

B stage:

100U/10V

Change to H=1.9mm.

Suyin_020151MR004S523ZU

CN14

1
2
3
4 GND

GND
GND
GND

C335

0.1U

8
7
6
5

USB 3

R294

C332

150K

SD_CDZ(22)
MS_CDZ(22)
MDIO03(22)
MDIO13(22)
MDIO12(22)
MDIO11(22)

4 4

MDIO10(22)
MDIO08(22)
MDIO09(22)

3 3

2 2

USBP0-(17)

USBP0+(17)

SD_CDZ
MS_CDZ

MDIO13
MDIO12 MS_D2_SD_D2
MDIO11
MDIO10
MDIO08
MDIO09

C498
1U

R295 56/F
R297 56/F
R296 56/F
R300 56/F
R301 56/F
R298 56/F
R299 56/F

5VSUS

U11

2

VCC

3

EN1

4

EN2

1

GND

TI2062

2nd source AL000546005.

R307 0

L19

1

2

4 3

*WCM2012-90

COM-CHOKE-WCM2012-4P

R293 0

OUT1
OUT2

OC1
OC2

SD_WPMDIO03

MS_D3_SD_D3
MS_D1_SD_D1

MS_D0_SD_D0

MS_BS_SD_CMD

MS_SD_CLK

7
6

8
5

USBOC0# (17)
USBOC1# (17)

USB1PWR

12

C348
*Clamp-Diode

VCC_XD

C349
470P/50V

C300
470P/50V

USBP0-1
USBP0+1

12

C322
*Clamp-Diode

MS_D3_SD_D3
MS_BS_SD_CMD

MS_SD_CLK
MS_D0_SD_D0

MS_D1_SD_D1
MS_D2_SD_D2
SD_CDZ

SD_WP

USB1PWR

12

C321

100U/10V

12

C290

100U/10V

CN28

1
2
3
4 GND

Suyin_020173MR004G552ZR

3 IN1 CARD READER

CN9

18

USB1PWR

USB2PWR

GND
GND
GND

SD-1(DAT3)

15

SD-2(CMD)

12

SD-3(VSS)

10

SD-4(VCC)

7

SD-5(CLK)

4

SD-6(VSS)

3

SD-7(DAT0)

2

SD-8(DAT1)

20

SD-9(DAT2)

21

SD-CD1

23

SD-CD2(G)

1

SD-WP1

22

SD-WP-COM

24

NAIL1

25

NAIL2

26

NAIL3

3IN1_DFHD23MS166

8
7
6
5

(VSS)MS-1

(BS)MS-2
(DAT1)MS-3
(DAT0)MS-4
(DAT2)MS-5

(INS)MS-6
(DAT3)MS-7
(SCLK)MS-8

(VCC)MS-9

(VSS)MS-10

B stage:
Change to H=1.9mm.

USB 1

5
6
8
9
11
13
14
16
17
19

MS_BS_SD_CMD
MS_D1_SD_D1
MS_D0_SD_D0
MS_D2_SD_D2
MS_CDZ
MS_D3_SD_D3
MS_SD_CLK

USBP2-(17)
USBP2+(17)

VCC_XD

MC_PWR_CTRL_0(22)

5VSUS

2.2U

U25

IN5OUT

C435
1U

R5 0

2 3

1
COM-CHOKE-ILS0405-01-4P

R4 0

ON#4SET

2

GND

G5240

L4

4

C331
1U

MC_PWR_CTRL_0

1
3

C327

0.1U

3VSUS

3

Memory Card Power Supply

R376

6.8K/F

40 mils Iout=1A

USB3PWR

USB2PWR

R244 0

L16

1 1

USBP1-(17)

USBP1+(17)

4 3
1

2

*WCM2012-90

COM-CHOKE-WCM2012-4P

R250 0

A

12

C293
*Clamp-Diode

12

C297
*Clamp-Diode

B

USBP1-1
USBP1+1

CN26

8

1

GND

7

2

GND

6

3

GND

5

4 GND

Suyin_020173MR004G552ZR

USB 2

PROJECT : DW1

Size Document Number Rev

C

D

Date: Sheet of

Quanta Computer Inc.

CARD READER CONN,USB x 3

23 42Tuesday, January 03, 2006

E

1ACustom

A

www.bufanxiu.com

B

C

D

E

3VSUS

C-stage : Modify for WOR
change from +3V to 3VSUS

BIT_CLK

R455
*22

C510
*22P

Reserve for EMI

For associated Line Side
Device portion of this
design
see Conexant RD02-D450
reference schematic

1 1

R508 0
R465 0
R364 *0
R456 *0
R462 *0
R330 *0
R481 *0

VDDIO is used in determining which HD Audio bus voltage
is present on the system. When VDDIO is +1.5V, the
device will use 1.5v signaling on the HDA interface pins;
when VDDIO is +3.3v, the device will use 3.3v signaling
on the HDA interface pins.

AC_RESET#(16)

BIT_CLK(16)

SYNC(16)

SDDATA_IN(16)

SDATA_OUT(16)

DIBP_HS(26)

DIBN_HS(26)

ACZ_SPKR(18)

SPDIF(25)

AC_RESET#
BIT_CLK INT_MIC_L

SYNC
SDDATA_IN
SDATA_OUT

DIBP_HS

DIBN_HS

ACZ_SPKR

SPDIF

3V_DVDD

L23

1 2

BLM11A601S

R457 33
R348 33

R355 0

R354 0

C392 0.1U

T155

R363 237K/F

BITCLK
SDI

DIBP

DIBN

PCBEEP

EAPD

RCOSC

C391

0.1U

U22

RESET#
BIT_CLK

SYNC
SDI
SDO

DIBP

DIBN

PCBEEP

SPDIF

EAPD

NC_1
NC_2
NC_16

RCOSC

CX20549-12

C388

0.1U

3

42

8

VDDIO

VSSIO_46

VSSIO_42

46

C399
10U/10V

10

5
9
7
4

44

43

11

48

47

1
2

16
41

DIGITAL ANALOG

45

DVDD

6

DVDDM

DVSS

AVDD3V_DVDD

C412

0.1U

20

31

37

AVDDHP

AVDD_20

AVDD_31

MIC_BIAS_L
MIC_BIAS_R

LINEOUT_L

LINEOUT_R

PORT-A_BIAS_L

PORT-A_BIAS_R

PORT-A_L
PORT-A_R

PORT-B_BIAS_L

PORT-B_BIAS_R

PORT-B_L
PORT-B_R

VREF_LO
VC_REFA

AVSS_25

AVSSHP

AVSS_12

AVSS_32

25

40

12

32

AGND

MIC_L

MIC_R

CD_L

CD_GND

CD_R

SENSE

VREF_HI

C513

0.1U

29
30
21
22

35
36

33
34
38
39

14
15
23
24

17
18
19

13

26
27
28

C517

0.1U

AGND

INT_MICBIAS_L
INT_MICBIAS_R

INT_MIC_R
LINEOUT_L

LINEOUT_R

MICBIAS_B
MIC

SENSE

VREF_HI
VREF_LO
VC_REFA

1

C514
10U/10V

R464 5.11K/F
R467 5.11K/F
R461 10K/F

C516 1U

U20
GMT_G910T21U

Vout

GND

2

AGND

LINEOUT_L (25)
LINEOUT_R (25)

MICBIAS_B (25)
MIC (25)

AVDD

AGND

Vin

3

C515 1U

5V_AVDD

C396

0.1U

Internal MIC

Speaker

MIC IN

SENSE_PORT_A (25)
SENSE_PORT_B (25)

C397

0.047U

L22

1 2

BLM11A601S

C394
1U

INT_MICBIAS_R
INT_MICBIAS_L

INT_MIC_R
INT_MIC_L

+5V

C386

C390

0.1U

10U/10V

Internal MIC

R377

2.2K
C436 10U
C437 10U

B stage:
Change CN2 footprint.

R378

2.2K

INT_MIC_R_1

INT_MIC_L_1

AGND

CN2

MIC

1
2
3
4

AGND

PAD2
*EMI spring

1

A

C550

*0.1U

+3V

C543

*0.1U

Modify for EMI
C stahge add

C544

*1U

B

C545
*0.1U

AVDD

AGND

for EMI issue

C

PROJECT : DW1

Quanta Computer Inc.

Size Document Number R ev

D

Date: Sheet

Azalia CTRL_ CONEXANT20549

24 42Tuesday, January 03, 2006

E

of

1AB

1

www.bufanxiu.com

2

3

4

5

6

7

8

L46

12

12

SPDIF(24)

SENSE_PORT_A(24)

R515
*1K_NC

R516
1K

1

BK1608LL121

L47
BK1608LL121

L48
BK1608LL121

L49
BK1608LL121

GAIN1

R349 220

R_SPK-

R_SPK+

A A

L_SPK+

L_SPK-

+5VAMP

B B

AGND

C C

HP_OUT_R
HP_OUT_L

D D

INT. SPEAKER

C518
100P

AGND

C520
100P

GAIN1 HP

R520 0

R521 0

HP_R_1
HP_L_1

SENSE_PORT_A

R_SPK-1

R_SPK+1

C519
100P

L_SPK+1

L_SPK-1

C524
100P

AGND

SPKR

MODE

MODE

10.50
901

SPDIF_1

L51 BLM11A601S

1 2

L52 BLM11A601S

1 2

+5VAMP

1

AHCT1G125DCH

2

CN11

4
3
2
1

SPK

For speaker issue to change R510/R511 from 0 to 5.6k on 060327

R511

R510 5.6k

LINEOUT_L(24)

LINEOUT_R(24)

MUTE#(30)

1 2
1 2

D25

RB500

3

HEADPHONE OUT/SPDIF

+5V

C511

C413
180P

HP_R_2
HP_L_2

AGND

0.1U

C404
180P

SENSE_LINEOUT_A#

C542

5

0.1u/10V

24

U35

AGND

R350
*110

AGND

C395
*100P

3

5.6k

21

LIN-1
RIN-1

+5VAMP

1 2

CN31

9
8
7

1
3
2
4
5

audio/spdif

R514
100K_0402

DRIVE

IC

R51910K

4

+5V

Audio amplifier

+5VAMP

12

C533
1U_10V

7

8

10

HPS

C1P

C1N

HPVDD

HPL

CPVDD

HPR

OUTL+

OUTL-

OUTR-

OUTR+

PVDDL
PGNDL
PVDDR
PGNDR

MAX9755AETI

12

12

C541
1U_10V

AGND

R340 *10K

R341

2.2K

L21 FCM1608K221

R331 *1K

Shall install 1k ?

6

12

C534

0.1U_16V

AGND

HPS

20

HP_OUT_L

14

HP_OUT_R

13

L_SPK+

4

L_SPK-

5

R_SPK-

17

R_SPK+

18
6

3
16
19

AGND

12

C537

0.1U_16V

12

C538

0.1U_16V

HPS

+5VAMP

AGND

+5VAMP

3

Q30

2N7002E

1

12

R517

10K

C539
10U_10V

SENSE_LINEOUT_A#

2

MIC JACK

AVDD

CN29

MIC2

AGND

Size Document Number Rev

Date: Sheet

7

C369
100P

1
2
6
3
4
5

2SJ-S351-001

AGND AGNDAGND

PROJECT : DW1

Quanta Computer Inc.

JACK,AMP_TPA6211

7

8

1ACustom

of

25 42Tuesday, April 04, 2006

8

GAIN1

5

0.1U_16V

RLIN-1
RRIN-1

MICBIAS_B(24)

MIC(24)

C532

SENSE_PORT_B(24)

+5VAMP

12

AGND

12

C540
1U_10V

C384 10U

2

28

1

27

24
23
22
21

U34

INL
INR
NC
NC

GAIN_SEL
GND
/SHDN
VBIAS

MICBIAS_B

15

25

VDD

GND26CPGND9CPVSS11VSS

AGND

MIC1

SENSE_PORT_B

+5V

AGND

11
10
6

AGNDAGND

12

R512
*100K_NC

L50 BLM21PG600SN1D

12

C535 1U_10V

1 2
1 2

12

C536 1U_10V

R513
*100K_NC

SPK_SHUTDOWN#

5

www.bufanxiu.com

D D

C C

4

DIBP_HS(24)
DIBN_HS(24)

3

CN10

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

AMC Connector

2

1

RJ11 CONNECTOR

CN7

MDC

TIP_1

1

RING_1

2

C262

C266

470P

470P

B stage:
Change CN7 footprint.

B B

CN24

1
2
3
4

RJ11

NC
RING
TIP
NC

GND

GND

5

6

A A

PROJECT : DW1

Size Doc ument Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

MODEM (DAA)

26 42Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

4

3

2

1

PCIE_TXP2(17)
PCIE_TXN2(17)

PCIE_RXP2(17)

D D

LANVCC

R93 3.3K
R98 *3.3K

PCIE_RXN2(17)

populate R93 for D3 wake up.

SMB_ALERT#(18)

ICH_PWROK(18)

C C

PCLK_SMB(4,18,34)
PDAT_SMB(4,18,34)

PCIE_TXP2
PCIE_TXN2

PCIE_RXP2
PCIE_RXN2 TX2P

CLK_PCIE_LAN(4)
CLK_PCIE_LAN#(4)

PLTRST#(13,17,18,33,34,35)

PCIE_WAKE#(18,34)

C162 0.1U
C161 0.1U

CLK_PCIE_LAN
CLK_PCIE_LAN#

PLTRST#

T

R101 *3.3K

R89 *0
R96 *3.3K

DOCK_IND
AUX_PRESENT

R31 619
R30 649

E

T

C70 22P

Y1
25MHZ

C69 22P

SMB_ALRT#/ASF_PWRGOOD

2 1

ICH_PWROK
LAN_ADV10

LAN_TEST-TEST_EN
LAN_EXEC_R
LAN_TI_R
LAN_TCK_R

R32 *0

T50
T51

T24
T33
T30
T32

PCIE_RXP2_C
PCIE_RXN2_C

XTAL1
XTAL2

U5A

F2

PE_R0p--NC

F1

PE_R0n--NC

D1

PE_T0p--NC

C1

PE_T0n--NC

G1

PE_CLKp--NC

G2

PE_CLKn--NC

P7

PE_RST#--NC

P10

PE_WAKE#--NC

P5

LAN_PWR_GOOD--NC

L7

DEVICE_OFF#--ADV10/LAN_DIS_N

A13

TEST_EN--TEST_EN

D10

NC--ISOL_TEX

D12

PHY_REF--ISOL_TI

D14

NC--ISOL_TCK

C3

DOCK_IND--NC

C6

AUX_PRESENT--NC

B14

PHY_TSTPT--RBIAS10

B13

PHY_HSDACn-RBIAS100

B12

PHY_HSDACp-TOUT

N10

ALT_CLK125--NC

N11

SMB_ALRT#/ASF_PWRGOOD--NC

P11

SMB_CLK-NC

M11

SMB_DATA-NC

L2

THERMn--NC

L3

THERMp--NC

A8

SDP0--NC

B8

SDP1--NC

C8

SDP2--NC

C7

SDP3--NC

K14

XTAL1--X1

J14

XTAL1--X2

82562GZ/GX

Thermal

Monitoring

SDP Pins

Crystal

PCI Express

Test

Enternet Port

NVM_CS#--NC

NVM_SK--NC
NVM_SO--NC

NVM_REQ--NC

Control

NVM_PROT--NC

NVM/EEPROM

NVM_TYPE--NC

NVM_SHARED--NC_D3

LED0#--SPDLED
LED1#--ACTLED

LED2#--LILED

LEDs

JTAG_TMS--NC

JTAG_TDI--NC

JTAG_TCK--NC

SMBus

JTAG_TDO--NC

JTAG 82570EI

NC--LAN_RXD[2]
NC--LAN_RXD[1]
NC--LAN_RXD[0]

CLK_VIEW--LAN_TXD[2]

NC--LAN_TXD[2]
NC--LAN_TXD[0]

NC--LAN_RSTSYNC

LAN Connect Interface

NC--LAN_CLK

MDI0p--TDP
MDI0n--TDN
MDI1p--RDP
MDI1n--RDN

MDI2p--NC
MDI2n--NC
MDI3p--NC
MDI3n--NC

NVM_SI--NC

C13
C14
E13
E14
F13
F14
H13
H14

B10
C9
A9
B9
B4

A5
A6
D3

B11
C11
A12

N4
P4
N5
P6

M12
N13
P13

L14
L13
M14

M13
N14

TX0P
TX0N
TX1P
TX1N

TX2N
TX3P
TX3N

R70 47
R76 47
R79 47
R97 *0

R90 *0
R81 *3.3K
R102 *3.3K

LINK_100_LED#
LINK_ACT_LED#
LINK_1000--LINK_UP_LED#

JTAG_TMS
JTAG_TDI
JTAG_TCK
JTAG_TDO

R74 0
R65 0
R69 0

R35 0
R38 0
R51 0

R56 0
R60 0

TX0P
TX0N
TX1P
TX1N
TX2P
TX2N
TX3P
TX3N

NVM_CS#
NVM_SK
NVM_SI
NVM_SO

T

Populate R308 to di s abl e S P I NV M p ro t ection.

Populate R309 - Use SPI FLASH

Populate R311 - Sahre SPI with ICH7-M.

T42
T38
T34
T27

LAN_RXD2 (16)
LAN_RXD1 (16)
LAN_RXD0 (16)

LAN_TXD2 (16)
LAN_TXD1 (16)
LAN_TXD0 (16)

LAN_RSTSYNC (16)
LAN_JCLK (16)

R72 *8.2K

LANVCC

E

Place temination resistors and caps as
close to LAN controller as possible

R221 54.9/F

R181 54.9/F

R28 *3.3K

R257 54.9/F

C52
*0.01U

573E populated 49.4
562GZ/GX populated 54.9

NVM_CS#
NVM_SK
NVM_SI
NVM_SO

R261 54.9/F

C53
*0.01U

C100 *0.1U

U4

1

CE#

6

SCK

5

SI

2

SO

3

WP#

*SST25LF080A

R266 *54.9/F

HOLD#

VDD

VSS

R390 *54.9/F

C54
*0.01U

8

7
4

R391 *54.9/F

LANVCC

R73
*3.3K

R394 *54.9/F

C55
*0.01U

T

T : Stuffed for 82573E(10/100/1000)
E : Stuffed for 82856GZ/GX(10/100)

B B

LANVCC

E

R80 *1K

R84 0

5

Stuff for 82562
only, not for
82562
enhanced
mode

LAN_RST#_R

R86
*1K

LANVCC

R88
10K

LAN_DISABLE#(30)

A A

R67
*470

LAN_ISOL

R55 *100

Q2
*RHU002N06

R37 *100
R61 *100
R48 *100

3

2

1

LAN_ADV10

B stage:

1. Populate Q2 (A-test lose)

2. ChangeR52 value to 200 ohm.

Stuff for full
power down
mode,
82562GX/GZ

LANVCC

R40

R66

200/F

200/F

R52
*200/F

Resistor value:
82573E = 3.3K
82562GZ = 200

4

R36

R57

*200/F

*200/F

LAN_TEST-TEST_EN

R62
*4.99K/F

MODE2

LAN_TI_R
LAN_TCK_R
LAN_EXEC_R

T

LAN

USB3

LINK_100_LED#
LINK_1000--LINK_UP_LED#
LINK_100_LED#
LINK_1000--LINK_UP_LED#

TX0P
TX0N

TX1P
TX1N

TX2P
TX2N

TX3P
TX3N

USBP3+(17)

USBP3-(17)

3

USB_P3+
USB_P3-

For 10/100/100 option

LANVCC

LANVCC

R496 150
R497 *0
R498 0
R499 0
R500 *0
R501 *150

CN17

2930
2728
2526
2324
2122
1920
1718
1516
1314
1112

910
78
56
34
12

EIC 3760-30-01

LAN LED

LINK_ACT_LED#
1000_LINK#
100_LINK#

LANVCC

LAN_2.5V

5VSUS

2

1000_LINK#
100_LINK#

Close to CN17

LANVCC LA N_2.5V 5VSUS

C17

0.1U

CAPSLED (30)

C19
*22P

PROJECT : DW1

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

LAN 82573E/82562GZ

1

C16

0.1U

27 42Tuesday, January 03, 2006

C20

0.1U

1ACustom

of

5

www.bufanxiu.com

4

3

2

1

U5B

A1

VSS--NC_A1

B3

VSS--VSS_B3

B7

NC--VSS_B7

C2

D D

LANVCC

C141

C132

*0.1U

*4.7U

C C

B B

CTRL_2.5

CTRL_1.2

*MMJT9435T1

1

Q5

2 3

4

C181

C182

*10U

*10U

LANVCC

C166

C167

*1U

*4.7U

*MMJT9435T1

1

Q4

2 3

4

R132 *2

R119 *2

C159
*0.1U

LAN_2.5V

C187
*4.7U

C160
*0.1U

C186
*10U

C188
*0.1U

LAN_1.2V

C189
*0.1U

VSS--NC_C2

C10

VSS--VSS_C10

C12

VSS--VSS_C12

D2

VSS--NC_D2

D4

VSS--VSS_D4

D5

VSS--VSS_D5

D6

VSS--VSS_D6

D7

VSS--VSS_D7

D8

VSS--VSS_D8

D13

VSS--VSS_D13

E2

VSS--VSS_E2

E4

VSS--VSS_E4

E5

VSS--VSS_E5

E6

VSS--VSS_E6

E7

VSS--VSS_E7

E8

VSS--VSS_E8

E9

VSS--VSS_E9

E10

VSS--VSS_E10

F4

VSS--VSS_F4

F5

VSS--VSS_F5

F6

VSS--VSS_F6

F7

VSS--VSS_F7

F8

VSS--VSS_F8

F9

VSS--VSS_F9

F10

VSS--VSS_F10

F11

VSS--VSS_F11

G4

VSS--NC_G4

G7

VSS--VSS_G7

G8

VSS--VSS_G8

G9

VSS--VSS_G9

G10

VSS--VSS_G10

G11

VSS--VSS_G11

G14

VSS--VSS_G14

H9

VSS--VSS_H9

H10

VSS--VSS_H10

K2

VSS--VSS_K2

K12

NC--VSS_K12

L6

NC--VSS_L6

L11

NC--VSS_L11

M6

NC--VSS_M6

N1

VSS--VSS_N1

N12

VSS--VSS_N12

P8

VSS--VSS_P8

TEST0--NCH1TEST1--NCH2TEST2--NCH3TEST3--NCJ1TEST4--NCJ2TEST5--NCJ3TEST6--NCK1TEST7--NCL1TEST8--NCM1TEST9--NCM3TEST10--NCN2TEST11--NCP1TEST12--NCN3TEST13--NCM8TEST14--NCP9TEST15--NC

VSS Pins

TEST16--NC

E3

A14

D11

NC--NC_D11

NC--NC_J13

J13

LANVCC

VCC Pins

NC--NC_L8L8NC--NC_M5M5NC--NC_M7M7NC--NC_M9M9NC--NC_N9N9NC--NC_P14

R91
*10K

VCC1.2--NC-A10

VCC1.2--NC-F12

VCC1.2--VCC3.3_G6

VCC1.2--NC-G12

VCC1.2--VCC3.3_G13

VCC1.2--VCC3.3_H6
VCC1.2--VCC3.3_H7
VCC1.2--VCC3.3_H8

VCC1.2--VCC3.3_H11

VCC1.2--NC_H12
VCC1.2--VCC3.3_J6
VCC1.2--VCC3.3_J7
VCC1.2--VCC3.3_J8
VCC1.2--VCC3.3_J9

VCC1.2--VCC3.3_J10
VCC1.2--VCC3.3_J11

VCC1.2--VCC_K3

VCC1.2--VCC_K4
VCC1.2--VCC3.3_K5
VCC1.2--VCC3.3_K6
VCC1.2--VCC3.3_K7
VCC1.2--VCC3.3_K8
VCC1.2--VCC3.3_K9

VCC1.2--VCC3.3_K10
VCC1.2--VCC3.3_K11

VCC1.2--VCC3.3_L5
VCC1.2--VCC3.3_L9

VCC1.2--VCC3.3_L10

IREG2.5_IN--NC_A2

VCC3.3--VCC_A7

VCC3.3--NC_D9

VCC3.3--NC_F3

VCC3.3--NC_M10

VCC3.3--VCC_N6

VCC3.3--VCC_N8

VCC3.3--VCC_P2

VCC3.3--VCC_P12
VCC2.5--VCC_A11

VCC2.5--NC_B6
VCC2.5--NC_G3

VCC2.5--VCCR_G5

VCC2.5--NC_H4

VCC2.5--VCCR_H5

VCC2.5--VCC3.3_J5

VCC2.5--NC_J12

VCC2.5--VCC_K13

VCC2.5--NC_L12

VCC2.5--NC_M4

VCC2.5--NC_N7

VCC2.5_OUT--NC_B1
VCC2.5_OUT--NC_B2

EN2.5REG--NC_B5

P14

R1

VCC1.2--NC-C5
VCC1.2--NC-C4

IREG2.5_IN-A3

NC--VCC_E1
NC--VCCT_E11
NC--VCCT_E12

VCC3.3--NC_J4

NC--VCC_L4

CTRL_1.2--NC
CTRL_2.5--NC

FUSEV--NC

82562GZ/GX

A10
C5
C4
F12
G6
G12
G13
H6
H7
H8
H11
H12
J6
J7
J8
J9
J10
J11
K3
K4
K5
K6
K7
K8
K9
K10
K11
L5
L9
L10

A2
A3
A7
D9
E1
E11
E12
F3
J4
L4
M2
M10
N6
N8
P2
P12

A11
B6
G3
G5
H4
H5
J5
J12
K13
L12
M4
N7

B1
B2
P3
A4
B5

CTRL_1.2
CTRL_2.5

C66

0.1U

C170
10U

C114

0.1U

LAN_2.5V

C134
10U

C67

0.1U

C106

0.1U

LANVCC

T47
T46

C163

0.1U

C115

0.1U

LANVCC

C174

0.1U

E

R113 0

R117 *0

T

C169

4.7U

C116

R83
*3.3K

R87
*3.3K

C113

0.1U

C123

4.7U

C108

0.1U

0.1U

E

R94 0

R114 *0

T

C165

4.7U

PD - To disable internal 2.5V regulator.
PH - To enable internal 2.5V regulator.
It's just for 82573E using.

T

LANVCC

LAN_1.2V

LANVCC

LAN_2.5V

R85

R2

*10K

A A

To enable clocks for Tekoa-M,
stuff R1, Unstuff R2

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

LAN Power

28 42Tuesda y, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

4

3

2

1

PowerLED_AMBER#(30)

AC Present (Orange)

D D

System power (Blue)

PowerLED_BLUE#(30)

BATLED_AMBER#(30)

Status:

1. Charge - ON

2. Discharge - OFF

C C

TP_R#(31)

TP_L#(31)

1 3
1 3

Q26

2

DTC144EUA

2

2

Q28
DTC144EUA

Q29
DTC144EUA

1 3

TP_R#

TP_L#

2
4

2
4

R486
150/F

1 2

R485
150/F

1 2

LED4

LED ORANGE/BLUE

LED3

21

LED LTST-S110UBKT-Q BLUE

B stage:
Change color from blue to orange

SW2

TC901-AA1G-A160T

5 6
1
3

SW1

TC901-AA1G-A160T

5 6
1
3

5VPCU

5VPCU

B stage:
Can change to S3 power plane to
save power consumption

R484
150/F

R482
150/F

5VSUS

LED HSMD-C112 BLUE

+3V

2

RF_LED#(34)

SATA_LED#(16)

1 3

Q25
DTC144EUA

+3V

2

1 3

Q27
DTC144EUA

LED1

21

LED LTST-S110UBKT-Q BLUE

LED2

21

LED LTST-S110UBKT-Q BLUE

1 2

1 2

B B

MX4_1
P_LED
AC_PRE
MX3_1
MX2_1
MX1_1
MX0_1
MY0_1
LID#_1
RFLED#
N_LED
SW_ON#

POWER BOARD

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CN3

LFBR32164M241

LFBR32164M241

LFBR32164M241

5VPCU

3VPCU

+5V

C445

C446

0.1U

0.1U

C30

0.1U

HOLE1

H-C236BC197D83P2

1

1

H-C276D83P2

HOLE24

H-R394X413BC276D83D10P2

1

1

HOLE18

H-C276D43P2

1

HOLE21

H-C276D43P2

1

HOLE10

H-C256D142P2

1

CPU Thermal Module lock HOLE.

HOLE12

H-TS393BC315D177P2

HOLE13

H-TS393BC315D177P2

1

1

A A

1

HOLE20

H-BC236D43P2

1

HOLE19

H-BC236D43P2

H-TS393BC276D83P2

1

HOLE8

H-C256D142P2

HOLE3

1

H-C256D142P2

1

HOLE4

H-TS393BC276D83P2

HOLE9

HOLE11

H-C256D142P2

1

1

H1

*PAD-C79

1

H2

*PAD-C79

Add three pad for ME change

HOLE22

H-S236D83P2

HOLE5

H-TS393BC276D83P2

HOLE15

H-TS393BC276D83P2

1

1

1

1

H-C315D83P2

*PAD-C118

1

HOLE17

H3

H-DW1D83P2

H-C315BC236D83P2

1

HOLE25

2

1

AGND AGND

HOLE23

HOLE14

H-C197D197N

1

3VPCU

+5V

7
5
3
1
7
5
3
1
7
5
3
1

MX3_1MX 3

AC_PRE

MX4_1MX 4
P_LEDPowerLED_BLUE#
MY0_1
MX0_1
MX1_1
MX2_1

SW_ON#NBSWON#
RFLED#
LID#_1LID#

RP1

RP2

RP3

8
6
4
2
8
6
4
2
8
6
4
2

MX3(30,31)
MX4(30,31)
MY0(30,31)

MX0(30,31)
MX1(30,31)
MX2(30,31)
NUMLED(30)
NBSWON#(30)

LID#(20,30)

PowerLED_AMBER#

MY0
MX0
MX1
MX2
NUMLED N_LED

RF_LED#

HOLE2

MDC HOLE.

MINI-PCIE Card lock HOLE.

Need to apply Nut part number for T hermal,
MDC and Mini-card module.

5

4

3

2

Size Document Number Rev

Date: Sheet

PROJECT : DW1

Quanta Computer Inc.

LED, Hole, TP SW, SW/B

29 42Tuesday, January 03, 2006

1

of

1ACustom

5

www.bufanxiu.com

KBC-NS87541L

LDRQ#(pin 8) internal is no use

D D

3VPCU

R198 470K

C C

+5V

B B

C282

4.7P

DNBSWON#(18)

A A

3VPCU

SMI#(18)

R197 4.7K
R203 4.7K

RN1

1
3
5
7 8

8P4R-10K

32.768KHZ

41

2 3

Y4

5

LDRQ#0(16)

541RESET#

3VPCU

2
4
6

541_32KX3

C285

4.7P

LDRQ#0 LDRQ#

LFRAME#(16,34,35)

R18210K

PCLK_541(4)

SCI#

SCI#(18)

C250

0.1U

R161 10K

TPCLK
TPDATA

MSCLK1
MSDAT1
KBCLK
KBDAT

R226 20M

R227 120K

D11 RB500

RB500

D9

2 1

2 1

SWI#(18)

R209 *0

SERIRQ(18,21,35)

LAD0(16,34,35)
LAD1(16,34,35)
LAD2(16,34,35)
LAD3(16,34,35)

2 1

D8 RB500

GATEA20(16)

RCIN#(16)

MX0(29,31)
MX1(29,31)
MX2(29,31)
MX3(29,31)
MX4(29,31)
MX5(31)
MX6(31)
MX7(31)

MY0(29,31)
MY1(31)
MY2(31)
MY3(31)
MY4(31)
MY5(31)
MY6(31)
MY7(31)
MY8(31)

MY9(31)
MY10(31)
MY11(31)
MY12(31)
MY13(31)
MY14(31)
MY15(31)

T70
T68
T74
T75

TPCLK(31)

TPDATA(31)
CAPSLED(27)
NUMLED(29)

T187

HWPG(38,39,40,41)

SUSC#(18)

CBUS_REST#(21)

MUTE#(25)

S5_ON(36)

SUSON(36,40)

MAINON(36,39,40)

LAN_POWER(36)

VRON(36,41)

RSMRST#(18)

PWROK(18)

T85
T56

2 1

D6 RB500

SERIRQ

LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_541
541RESET#
SMI#541

T79

GATEA20
RCIN#

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

TINT-

MSCLK1
MSDAT1
KBCLK
KBDAT
TPCLK
TPDATA
CAPSLED
NUMLED

541_32KX1
541_32KX2

FANLESS#
HWPG
SUSC#
SWI#_EC

R149 0

MUTE#

S5_ON
SUSON
MAINON

LAN_POWER

VRON

DNBSWON#591

RSMRST#
PWROK

CS#

4

PWUREQ#

4

+3V

C253

0.1U

U7

7

SERIRQ

8

LDRQ

9

LFRAME

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

LREST

22

SMI

23

PWUREQ

31

IOPD3/ECSCI

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKOUT

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0

174

SEL1

47

CLK

3VPCU

C214

10U/10V

16

VDD

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORT-M

GND117GND235GND346GND4

C222

0.1U

123

136

PORTJ-2

GND5

122

159

167

3VPCU

157

VCC4

VCC5

PORT-E

GND6

GND7

137

166

VCC6

AD Input

DA output

PWM or
PORT-A

PORT-B

PORT-C

PORT-D-1

PORT-H

PORT-I

PORT-J-1

PORT-D-2

PORT-K

PORT-L

96

C220

0.1U

95

AVCC

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD

IOPB1/UTXD

IOPB2/USCLK

IOPB4/SDA1

IOPB7/RING/PFAIL

IOPC1/SCL2

IOPC2/SDA2
IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

AGND

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

C247

1U/16V

3

R222 *0

RESERVE FOR 87541

R223 0

VBAT_951

161

VBAT

81

AD0

82

AD1

83

AD2

84

AD3

87

IOPE0AD4

88

IOPE1/AD5

89

IOPE2/AD6

90

IOPE3/AD7

93

DP/AD8

94

DN/AD9

99

DA0

100

DA1

101

DA2

102

DA3

32
33
36
37
38
39
40
43

153
154
162
163

IOPB3/SCL1

164
165

168

IOPC0

169
170
171

IOPC3/TA1

172
175

IOPC5/TA2

176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132

IOPH6/A6

133

IOPH7/A7

138

IOPI0/D0

139

IOPI1/D1

140

IOPI2/D2

141

IOPI3/D3

144

IOPI4/D4

145

IOPI5/D5

146

IOPI6/D6

147

IOPI7/D7

150

IOPJ0/RD

151

IOPJ1/WR0

152

SELIO

41

IOPD4

42

IOPD5

54

IOPD6

55

IOPD7

143

IOPK0/A8

142

IOPK1/A9

135

IOPK2/A10

134

IOPK3/A11

130

IOPK4/A12

129
121
120

113

IOPL0/A16

112

IOPL1/A17

104

IOPL2/A18

103

IOPL3/A19

48

IOPL4/WR1

PC87541V

98

3

VCCRTC

TEMP_MBAT
MBAT_V
LIGHT_SENOR

SBAT_V

R505 *0
R506 *0
R507 *0

PR_INSERT#

CC_SET

PWM_FAN

R224 0
R225 0

R509 *0

PowerLED_BLUE#

PowerLED_AMBER#

BATLED_AMBER#

BCLK

BDATA

D24 RB500

BATLOW#_1

SCLK

SDATA

FANSIG

BRIGHTNESS

THERM_CP UDIE#

SUSB#

ACIN

LID#

NBSWON#

CLKRUN#

ENV0

ENV1

BADDR0

BADDR1

TRIS

SHBM

A6

A7

D0

D1

D2

D3

D4

D5

D6

D7

RD#

WR#

SELIO#

SCROLED#

CELL_SET

D/C#

BL/C#

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

VCCRTC (16,19)

Board_ID0
Board_ID1
Board_ID2

R525 4 .7K

21

T202
T220

T59

Pin 103 internal is
"A19",Can't use to
GPIO

2

C269

C254

0.1U

0.1U

Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the
supply.

TEMP_MBAT (37)
MBAT_V (37)
LIGHT_SENOR (20)

T224

Board_ID0 (18)
Board_ID1 (18)
Board_ID2 (18)

3VPCU

T209
T210

CC_SET (37)

T222
T211
T212

T64
T213

PWM_FAN (31)

BT_ON# (31)

RF_O N# (34)

D26 RB500

T62

LAN_DISABLE# (27)

PowerLED_BLUE# (29)

PowerLED_AMBER# (29)

BATLED_AMBER# (29)

BCLK (5,37)

BDATA (5,37)

T226

BATLOW# (18)

T227
T228
T217

FANSIG (31)

BRIGHTNESS (20)

T82

THERM_CPUDIE# (16)

SUSB# (18)

ACIN (37)

LID# (20,29)

T218
T219

CLKRUN# (18,21,35)

Pin 24 if no pull-high,
will can't reboot.

CELL_SET (37)

D/C# (37)

BL/C# (37)

C stage Add Res
to 3VPCU.

21

C Stage modify

3VPCU

R218
10K

2

C270

0.1U

LAN_RST# (18)

NBSW ON# (29)

3VPCU

C271

0.1U

BADDR1-0

BCLK
BDATA

8Mbit (1M Byte), TSSOP40

ENV0
ENV1 D1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

CS#
RD#
WR#

U12

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

ST Micro M 2 9 W 008AB/AMD-29LV081B/SST39VF080

1.AMD-29LV081B require MAX 500nS Tready
for it's hardware reset.And MAX6326_UR29
has >100mS reset timing.So we can tie it's
reset# pin to +3VALW directly.

2.SIO has internal 20 mS delay of
VCC1_PWROK

AMD :Pin 10 i s RESET# ; Pin12 is RY/BY#
SST :Pin10,12 are NC

Size Document Number Re v

Date: Sheet

1

3VPCU

ENV1

BADDR0

BADDR1

SHBM

SHBM=1: Enable shared memory with host BIOS

0

0
1

04E

(HCFGBAH, HCFGBAL)

02E1
1

1

5VPCU

U13

8

VCC

7

NC

6

SCL

5

SDA

*24LC08

RESET#/NC

RY/BY#/NC

Index

R233 4.7K
R232 4.7K

R490 4.7K
R491 4.7K

1

A0

2

A1

3

A3

4

GND

25

D0

26

D1

27

D2

28

D3

32

D4

33

D5

34

D6

35

D7

10
12
29

NC1

38

NC2

11

NC3

31

VCC

30

VCC

23

GND

39

GND

R20810K

R21310K

R215*10K

R21710K

I/O Address

Data

(HCFGBAH, HCFGBAL)+1

Reserved

BCLK
BDATA

SCLK
SDATA

5VPCU

2 1

D0
D2

D3
D4
D5
D6
D7

R153 100K

C221
*0.1U

PROJECT : DW1

Quanta Computer Inc.

KBC PCU-87541L; LPC CONN

1

C283
*0.1U

C280

0.1U

2F
4F

3VPCU

3VPCU

1ACustom

of

30 42Tuesday, January 03, 2006

1

www.bufanxiu.com

2

3

4

5

6

7

8

RP35

10KX8
RP34

10KX8

R381
10K

C448
100P

241

MY3

1

MY2

2

MY1

3

MY0

56

MY15

1

MY14

2

MY13

3

MY12

56

FANSIG (30)

KEYBOARD CONNECTOR

KEYBOARD

TOUCH PAD CONNECTOR

A A

TPDATA(30)

TPCLK(30)

B B

25 mils

5VSUS

L42 SBK160808T-221
L43 SBK160808T-221

L41 BK1608HS800-T

C492
*10P

TPDATA-1

C493
*10P

TPCLK-1

5VSUS_TP

TP_L#(29)

TP_R#(29)

C491 0.1U

B Stage:
Change to P-TWO DFFC12FR234

CN6

12
11
10
9
8
7
6
5
4
3
2
1

88241-1201

UP CONTACT

121

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

CN5

P-TWO
DFHS24FR358

BLUETOOTH

3VSUS

USBP5+

BC0EX1 (34)
BC0EX2 (34)

USBP5-

BLUELED

C525
10U/10V

CN30

1
2

C C

Support Wireless 2200
Pin6: Ch_Clk(BC0EX2)
Pin7: Ch_Data(BC0EX1)

Bluetooth 8P

BT_ON#(30)

D D

BT_ON#

USBP5+

3

USBP5-

4

BLUELED

5
6
7
8

3VSUS

R454

4.7K

HW_RADIO_DIS#

2

Q22
DTC144EUA

1 3

C522

0.1U

BC0EX1
BC0EX2

Del Q24, U32, R470, R471,
R459, Q23, R458, D23 For
C-Test

USBP5+ (17)
USBP5- (17)

BLUELED (34)

+5V

C459
10U/10V

MY15 (30)
MY14 (30)
MY13 (30)
MY12 (30)
MY11 (30)
MY10 (30)
MY9 (30)
MY7 (30)
MY6 (30)
MX0 (29,30)
MX1 (29,30)
MX2 (29,30)
MX3 (29,30)
MY8 (30)
MY3 (30)
MY5 (30)
MX4 (29,30)
MX5 (30)
MX6 (30)
MX7 (30)
MY2 (30)
MY4 (30)
MY1 (30)
MY0 (29,30)

CP3 220PX4

MY6
MX0
MX1
MX2

CP4 220PX4

MX3
MY8
MY3
MY5

CP5 220PX4

MX4
MX5
MX6
MX7

1

2

3

4

5

6

78

1

2

3

4

5

6

78

1

2

3

4

5

6

78

FAN CONTROL

R386 0

PWM_FAN(30)

C453

0.1U

Modify for EMI
Close to FAN connector

MY11
MY10
MY9
MY7

MY2
MY4
MY1
MY0

MY15
MY14
MY13
MY12

FAN_PWR1

C454
*100P

UP CONTACT

MY4
MY5
MY6
MY7

MY8
MY9
MY10
MY11

CP2 220PX4

CP6 220PX4

CP1 220PX4

1

2

3

4

5

6

78

1

2

3

4

5

6

78

1

2

3

4

5

6

78

CN16

1
2
3
4

FAN

3VPCU

10

9
8
7 4

10

9
8
7 4

+3V

PROJECT : DW1

Size Document Number Rev

1

2

3

4

5

6

Date: Sheet

Quanta Computer Inc.

BLUETOOTH/TP/KEY/BTB

7

31 42Tuesday, January 03, 2006

8

1ACustom

of

5

www.bufanxiu.com

4

3

2

1

F1

12

R421 0
R416 0
R419 0

CRT_R1
CRT_G1
CRT_B1

C482
18P

+5V

C480
18P

FUSE1A6V_POLY

L39 110nH
L34 110nH
L37 110nH

C488
18P

D D

JVGA_R(35)

Route to DVI-I f i rs t a nd then route to D-SUB15

CRT_R(9)
CRT_G(9)

CRT_B(9)

C C

CRT_R
CRT_G
CRT_B CRT_HSYNC

R420
150/F

R417
150/F

L40 39nH
L35 39nH
L38 39nH

R423
150/F

JVGA_G(35)
JVGA_B(35)

D22

2 1

RB501H

CRT_R2
CRT_G2
CRT_B2

5V_CRT

C489

0.1U

T230

CRT PORT

CN23

1617

*CRT_CONN

6
7

2
8
3
9
4

10

5

111
12
13
14
15

Need to change footprint.

T225

DDCDAT2

CRT_VSYNC
DDCCLK2

C496
*10P

C495
*10P

C497
*10P

C235
*10P

For EMI

C494

0.1U

5V_CRT

C236

0.1U

ESD PROTECTION

U6

1

C224

0.22U

VCC_SYNC

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

7

VCC_DDC

8

BYP

CM2009

SYNC_OUT2
SYNC_OUT1

SYNC_IN2
SYNC_IN1

DDC_OUT2

DDC_IN2
DDC_IN1

DDC_OUT1

HSYNC_R

16

HSYNC

15

VSYNC_R

14

VSYNC

13

DDCCLK1

12

DDCCLK

11

DDCDAT

10

DDCDAT1

9

R430 39
R428 39

R425

2.2K

R426

2.2K

HSYNC (9)
VSYNC (9)

DDCCLK (9)
DDCDAT (9)

R156

2.2K

R429 0

R168 0

R427

2.2K

DDCCLK2

DDCDAT2

CRT_HSYNC (35)
CRT_VSYNC (35)

DDCCLK2 (35)
DDCDAT2 (35)

+3V

B B

+3V

A A

+5V

PROJECT : DW1

Quanta Computer Inc.

Size Document Number R ev

5

4

3

2

Date: Sheet

CRT, DVI-I

of

32 42Tuesday, January 03, 2006

1

1AB

5

www.bufanxiu.com

4

3

2

1

D D

PLTRST# IDERST#

PLTRST#(13, 1 7 , 18,27,34,35)

C C

R403 47

PDA[0..2](16)
PDD[0..15](16)

PDIOW#(16)

PDDREQ(16)

PDIORDY(16)

PDIOR#(16)

IRQ14(16)

PDDACK#(16)

PDCS1#(16)
PDCS3#(16)

PDA[0..2]
PDD[0..15]

PDIOW#
PDDREQ
PDIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#

CDVCC

IDERST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1

PDIOW#
PDIORDY
IRQ14
PDA1
PDA0
PDCS1#

CSEL

R418
470

CD-ROM

CN21
CD-ROM

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

515152

52

B stage:
Change CN21 footprint.

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQPDD0
PDIOR#

PDDACK#
IOCS16#
DIAG#
PDA2
PDCS3#

T39
T43

CDVCC

60 mils

C479

0.1U

C481

0.1U

C477

0.1U

C476

0.1U

CDVCC

C474
10U/10V

L36
PBY201209T-4A

+5V

SATA CONNECTOR

CN27

22

GND1

21

TXP

20

TXN

19

GND2

18

RXN

17

RXP

16

B B

B stage:
Change CN27 net.

GND3

3.3V

3.3V

3.3V
GND
GND
GND

5V
5V
5V

GND

RSVD

GND

12V
12V
12V

C16659-12204-L

15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

T117
T121

T120
T124

SATA_TXP0 (16)
SATA_TXN0 (16)

SATA_RXN0 (16)
SATA_RXP0 (16)

+3VSATA

R234 0

HDD_VDD

+3V

HDD_VDD +5V

+3VSATA

C2910.1U

C2884.7U/10V

C2864.7U/10V

R245 0

C298
22U

HDD_VDD

C295

0.1U

A A

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet of

Quanta Computer Inc.

SATA HDD, CD-ROM

33 42Tuesday, January 03, 2006

1

1ACustom

A

www.bufanxiu.com

B

C

D

E

3VSUS

C273

C272

1U/10V

0.1U

D D

PCIE_WAKE#(18,27)

RF LED control.

A

BLUELED

RF_LED#

Q15

2

DTC144EUA

RF_LED# (29)

1 3

PCLK_SMB(4,18,27)
PDAT_SMB(4,18,27)

CLK_PCIE_NEW#(4)
CLK_PCIE_NEW(4)

B

C C

B B

A A

BLUELED(31)

Q14

RF_LINK BLUELED

2

DTC144EUA

1 3

C268

0.1U

3VSUS

2

Q13
DTC144EUA

PCIE_RXN1(17)
PCIE_RXP1(17)

PCIE_TXN1(17)
PCIE_TXP1(17)

+3V

C276
10U/10V

PCIE_TXP0(17)
PCIE_TXN0(17)

PCIE_RXP0(17)
PCIE_RXN0(17)

PCLK_DBP(4)

CLK_PCIE_MINI(4)
CLK_PCIE_MINI#(4)

13

C274

0.01U/50V

C275

0.1U

R437 0
R436 0

T80

+1.5V

C265
10U/10V

R435 0

PCIE_RXP0_C
PCIE_RXN0_C

CLK_MINI_OE#
CCI_DATA
CCI_CLK

#8,#10,#12,#14,#16,#19 For Debug port use

NEWCARD (PCIEXPRESS*1 + USB*1)

R255 0

USBP7+(17)

USBP7-(17)

PCLK_SMB
PDAT_SMB

T125

R308 0
R313 0

1.5V_NEWCARD

PCIE_WAKE#

3VAUX

CLK_NEW_OE#
CLK_PCIE_NEW_C#

CLK_PCIE_NEW_C

PCIE_RXN1_C
PCIE_RXP1_C

C

L17

1

2

4 3

*WCM2012-90

R246 0

COM-CHOKE-WCM2012-4P

3V_NEWCARD

USBP7-1
USBP7+1
CPUSB#

PERST#

CPPE#

USBP7+1
USBP7-1

CN8

1

GND_1

2

USB-

3

USB+

4

CPUSB#

5

RSV_0

6

RSV_1

7

SMBCLK

8

SMBDATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V_1

15

+3.3V_2

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND_2

21

PERn0

22

PERp0

23

GND_3

24

PETn0

25

PETp0

26

GND_4

Tyco 1759011-1

Mini PCI-E Card

CN25

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

Reserved

41

Reserved

39

Reserved

37

Reserved

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

Reserved

17

Reserved

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

67910-0002

67910-0002

NC228NC1

27

+3.3V

GND

+1.5V
LED_WPAN#
LED_WLAN#

LED_WWAN#

GND

USB_D+

USB_D-

GND

SMB_DATA

SMB_CLK

+1.5V

GND

+3.3Vaux

PERST#

Reserved

GND

Reserved
Reserved
Reserved
Reserved
Reserved

+1.5V

GND

+3.3V

C380

0.1U

D

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

16
14
12
10
8
6
4
2

CCI_CLK

CCI_DATA

C373

0.1U

T145
T148

+3V

LAD0_1
LAD1_1
LAD2_1
LAD3_1

3VSUS

+1.5V

LAD1_1
LAD0_1
LAD3_1
LAD2_1

R219 0

R431 0

R433 0

3VAUX

C370

0.1U

R231 0

R228 10K

RP56 0X2
RP55 0X2

+3V

RF_LINK#

T81

USBP6+ (17)
USBP6- (17)

CGDAT_SMB (4,14,15)
CGCLK_SMB (4,14,15)

T53

D10 RB500

2 1

2

1

4

3

2

1

4

3

R434 *0

R432 *0

BC0EX1 (31)

C368

0.1U

BLUELED

+3V

LAD1
LAD0
LAD3
LAD2
LFRAME#

BC0EX2 (31)

Internal Pull-High to 3VAUX

3V_S5

3VAUX

CPUSB#
CPPE#
2231_SHDN#
2231_STBY#

2231_STBY#

PLTRST#
CPPE#
CPUSB#
PERST#
2231_SHDN#
RCLKEN
OC#

R344 *10K
R345 *10K
R324 *10K
R329 *10K

U18

STBY#13.3VIN

17

AUXIN

15

AUXOUT

6

SYSRST#

10

CPPE#

9

CPUSB#

8

PERST#

20

SHDN#

18

RCLKEN

19

OC#

7

GND

R5538

3.3VIN

1.5VIN

1.5VIN

3.3VOUT

3.3VOUT

1.5VOUT

1.5VOUT

2
4

12
14

3
5

11
13

PROJECT : DW1

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

NEW CARD, MINI CARD

+3V+3V

R522

R230

10K

10K

1

Q31

2

IRLML5103

RF_LINK

3

PLTRST# (13,17,18,27,33,35)
RF_ON# (30)

LAD1 (16,30,35)
LAD0 (16,30,35)
LAD3 (16,30,35)
LAD2 (16,30,35)
LFRAME# (16,30,35)

LPC Debug

1.5V_NEWCARD3V_NEWCARD

C374

0.1U

+3V

+3V

+1.5V

3V_NEWCARD

1.5V_NEWCARD

34 42Tuesday, January 03, 2006

E

of

C378

0.1U

1ACustom

5

www.bufanxiu.com

PCLK_TPM

R204

D D

*33

C251
*10P

FOR EMI

LAD0(16,30,34)
LAD1(16,30,34)
LAD2(16,30,34)
LAD3(16,30,34)

PCLK_TPM(4)

LFRAME#(16,30,34)

PLTRST#(13,17,18,27,33,34)

SUS_STAT#(18)

SERIRQ(18,21,30)

CLKRUN#(18,21,30)

LAD0
LAD1
LAD2
LAD3
PCLK_TPM

LFRAME#
PLTRST#
SUS_STAT#
SERIRQ

CLKRUN#

+3V

R210
*4.7K

26
23
20
17
21

22
16
28
27

15

12

Address

R205

HIGH

*4.7K

LOW

C C

4

TPM (1.2)

U10

LAD0
LAD1
LAD2
LAD3
LCLK

LFRAME#
LRESET#
LPCPD#
SERIRQ

9

TEST/BADD
CLKRUN#

1

NC

3

NC

XTALI/32K IN

NC

*SLB9635

BADD

2EH/2FH

+5V +5V

VDD
VDD
VDD
VSB

GND
GND
GND
GND

GPIO

GPIO2

TESTI

XTALO

10
19
24
5

4
11
18
25

6
2

7

PP

8
13

14

(default)4EH/4F

B stage:
Change U10 footprint.

C249

C255

*0.1U

*0.1U

R195 *0
R201 *0

TPM_XIN
TPM_XOUT

C263
*12P

Y3
*32.768KHZ

3

+3V

+3V

C259

C243

*0.1U

*0.1U

R174

R189

*4.7K

*4.7K

+3V

R193

R180

*4.7K

*4.7K

21

C261
*12P

B stage:
Change to 4 pins connector. wait

for ME to confirm connector.

S-CD(9)

S-CD

R374
150/F

TVGND

TVGND

+2.5V +2.5V

L2

SBK201209T-151Y-S

C430

5.6P

TVGND TVGND

R373 0

1

D3

3

2

*DA204U

S-CD S-YD

2

CN12

TV-CD

4

4

C1

5.6P

2

2

S-VIDEO

TVGND TVGND

1

D5

2

*DA204U

3

1

3

3

L24
SBK201209T-151Y-S

C431

5.6P

TVGND TVGND TVGND

1

S-YDTV-YD

C432

5.6P

R375
150/F

S-YD (9)

R111

R115

8.2K

8.2K

DVI_CLK1

DVI_DAT1

Don't need to PH due to DDCCCLK2 and
DDCDAT2 already pull up to 5V.

JVGA_HS
JVGA_VS

TMDS_TX2-

TMDS_TX2+

TMDS_TX1-

TMDS_TX1+

TMDS_TX0-

TMDS_TX0+

TMDS_CLK-

TMDS_CLK+

B stage:
Change to 39 ohm to match impedance.

4

DVI_DAT1 JVGA_VS
TMDS_TX1-

TMDS_TX0- TMDS_TX0+

TMDS_CLK+

JVGA_G(32) JVGA_R (32)

JVGA_G
JVGA_HS JVGA_B

DVI DETECT

DVI_DET

3

CH_TMDS_TX2-

CH_TMDS_TX2+

CH_TMDS_TX1-

CH_TMDS_TX1+

CH_TMDS_TX0-

CH_TMDS_TX0+

CH_TMDS_CLK-

CH_TMDS_CLK+

R116 *0

R120 *0

R118 0
R112 0

R110 39
R139 39

R152 0

R157 0

R150 0

R151 0

R148 0

R147 0

R133 0

R134 0

DDCCLK2(32)

DDCDAT2(32)

DVI_DAT(13)

B B

CH_TMDS_TX2-(13)

CH_TMDS_TX2+(13)

CH_TMDS_TX1-(13)

CH_TMDS_TX1+(13)

CH_TMDS_TX0-(13)

A A

CH_TMDS_TX0+(13)

CH_TMDS_CLK-(13)

CH_TMDS_CLK+(13)

DVI_CLK(13)

CRT_HSYNC(32)
CRT_VSYNC(32)

5

DVI-I Port

CN22

1

TMDS2-

3

GND2

5

TMDS4+

7

DDC_DAT

9

TMDS1-

11

GND3

13

TMDS3+

15

GND

17

TMDS0-

19

GND5

21

TMDS5+

23

TMDS_CLK+

26

26

28

28

C2

GREEN

C4

HSYNC

C6

C6

DVI_070939FR029SX01PU

R121 10K

+3V +3V

R126
1K

2

Q6
MMBT3904

1 3

TMDS2+

TMDS4-

DDC_CLK

VSYNC

TMDS1+

TMDS3-

VCC5

HP_Detect

TMDS0+

TMDS5-

GNDC

TMDS_CLK-

RED

BLUE

GNDA

2

2

25
27

1 3

2
4
6
8
10
12
14
16
18
20
22
24

25
27
C1
C3
C5

R136
1K

Q7
MMBT3904

TMDS_TX2+TMDS_TX2­DVI_CLK1
TMDS_TX1+

DVI_DET

TMDS_CLK-

JVGA_R

CH_DVI_DETECT (13)

+5V

JVGA_B (32)

+5V

C206

0.1U

PROJECT : DW1

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

TPM

35 42Tuesday, January 03, 2006

1

1ACustom

1

www.bufanxiu.com

2

3

4

5

2

+5V

PR41
22C

3

1

PQ1
2N7002E-G

+3V+1.5V+2.5V

PR46
22C

Z2707Z 2704

3

2

1

PQ2
2N7002E-G

2

15V

PR171
1M

3

1

PQ49
2N7002E-G

MAIND

PC147
2200P

MAIND (38)

+PWR_SRC

PR176

PQ44
DTC144EUA

1M

PR175
1M

A A

MAINON(30,39,40)

MAINON_G

2

1 3

SMDDR_VTERM

PR43
22C

Z2725

3

2

1

PQ45
2N7002E-G

2

PQ40
2N7002E-G

PR168
22C

3

1

PR167
22C

Z2705 Z2706

3

2

1

PQ41
2N7002E-G

3V_S5

65241

PC124

0.01U

72mA

S0-S5

PQ31
SI3456DV

3V_S5

modify from 2N7002E TO 2M7002E-G

2

3V_S5

PR148
22C

Z2712

3

1

PQ29
2N7002E-G

2

PR151
1M

3

1

PQ32
2N7002E-G

S5_OND

PC123
2200P

3VPCU

3

+PWR_SRC 15V

PR146

B B

S5_ON(30)

+PWR_SRC

PR147

SUSON_G

SUSON

SUSON(30,40)

C C

2

PQ30

1 3

DTC144EUA

1M

PR149
1M

2

1.8VSUS

3

1

PQ59
2N7002E-G

PR227
22C

3VSUS 15V5VSUS

PR152
22C

Z2709

3

2

1

PQ34
2N7002E-G

2

PR153
22C

Z2710

3

1

PQ35
2N7002E-G

2

PR150
1M

3

1

PQ33
2N7002E-G

SUSD

PC125
2200P

SUSD (38)

S5_ON

S5_ONG

2

PQ28
DTC144EUA

1 3

1M

PR145
1M

modify from 2N7002E TO 2M7002E-G

modify from 2N7002E TO 2M7002E-G

3VPCU

+PWR_SRC VCC_CORE +1.05V

PR87
1M

Z2720

D D

VRON(30,41)

2

PQ12
DTC144EUA

PR85
1M

1 3

2

PR86
22C

Z2721

3

1

PQ13
2N7002E-G

2

PR84
22C

Z2722

3

1

PQ14
2N7002E-G

LAN_POWER(30)

2

PQ10

DTC144EUA

modify from 2N7002E TO 2M7002E-G modify from 2N7002E TO 2M7002E-G

1

2

+PWR_SRC LANVCC 15V

PR80
1M

LAN_POWER_G LAN_ON

PR81
1M

1 3

3

2

PR79
22C

Z2713

3

1

PQ11
2N7002E-G

2

PR76
1M

3

1

PQ8
2N7002E-G

PC41
2200P

65241

LAN_ON

3

Size Doc ument Number Rev

4

Date: Sheet

50mils

LANVCC

PQ9
SI3456DV

LANVCC

PC43

0.1U

PROJECT : DW1

Quanta Computer Inc.

DISCHARGE

5

1ACustom

of

36 42Tuesday, January 03, 2006

1

www.bufanxiu.com

2

3

4

5

A2 TEST TO B TEST PD14 AND PD15 MODIFY FROM SSM24PT TO SBM1040

Iinput =(V CLS / V REF)*(0.075/ RS1)

3

PC220

PC30

12

PL11
3216-800T40

12

VA1

PC132

12

+

10U/25V

ACOK#

12

PC37

0.01U_50V

TEMP_MBAT (30)

PC151

0.1U_50V

BCLK (5,30)

PR65

RL3720WT-R010-GN(CYNTEC)

12

PC221

0.1U_50V

1

DCIN

10

ACIN

15

VCTL

13

ICTL

12

REFIN

11

ACOK

9

ICHG

28

IINP

8

SHDN

7

CCV

6

CCI

5

CCS

V_CHG

29

GND

R3

2P11P

26

27

CELLS

CSSP

CSSN

DLOV

PGND

GND

14

PU3
MAX8724

2

LDO

BST

DLO

CSIP
CSIN

BATT

REF

CLS

VA2

DHI

LX

300mil

PR173
100K/F

1 2

12

PR174
14K/F

17

8724LDO

2
22

8724BST

24

25
23
21
20
19

18

V_CHG

16
4

3

PR74

13.3K_6

MBAT_V (30)

PC158

0.1U_50V

3

8724_3D3_LDO

PR58
100K

PR61 825_6

12

PC24
1U_10V_0603

8724DLOV

PR62

0

8724DH
8724LX
8724DL

PR69
20K/B_6

R1

R2

PC29
10U/25V

8724_3D3_LDO

PR56

33_6

CSIP

CSIN

12

PC36
1U_10V_0603

+

0.1U_50V

PC27

PR57 100K

PR60

1.33K_6

21

PD5
SW1010C

12

PC31

0.1U_50V

12

12

PC28
1U_10V_0603

PC134

0.1U

VA

PL9

CN13

1
2
3

A A

POWER_JACK

4
5

PR154
0

PC126

0.1U

12

PC133

0.01U

FBJ3216HS480NT_1206

PR1
10K

PL8

FBJ3216HS480NT_1206

VA

PD24

SBM1040

1
2

0.1U_50V

For ESD Proection

PR72
1K_6

PC39

2

PC34
1U_8

1000P/50V

PC26

12

0.01U_50V

3VPCU

2 1

21

1 2

PC38

PR39
330

BCLK

PD9
RB500

0.1U_50V

PR40
10K

PD2
ZD5.6V

VA

PR63
75K_6

PR64
10K

B B

ACOK

PR75
10K

ACIN(30)

PR77
15K_6

3

C C

PQ7

2N7002K

D D

PD6

SW1010C

1

2

PR73
1M_6

2 1

1

PC35

DTA124EU

1 2

1U_8

Q3

8724LDO

13

8724_3D3_LDO

2

ACOK#

5V_AL

PR66

*0

CN15
1827654-1

8

G1

PWR1
PWR2

G2

I2C_CLK

I2C_DATA

TEMP
GND1
GND2

9

G2

BDATA(5,30)

PR59
0

12

PC157

0.01U_50V

CC_SET(30)

PC25

1000P/50V

VA2

PR67
100K

0.1U_50V

PR68
20K/B_6

7
6

G1

5
4
3
2
1

BDATA

PR38
330

PD1
ZD5.6V

2 1

VA2

+PWR_SRC

PL1

FBJ3216HS480NT_1206

PC22
1U_8

1 3

1 2

Q1
DTA124EU

2

PC23

0.1U

12

CELL-SET
0 = 4 CELL

3

1 = 3 CELL

CELL_SET

2

PQ6
2N7002E

1

D1

1

D1 S1/D2

2

G2

3

S2

4

PQ47 SI4914DY-T1-E3

G1

CELL_SET (30)

10uH 30% 4.4A(SIL104R-100PF)L-F

8
7

PL10

6
5

8724LXR

ICHG =(V ICTL / V REFIN)*(0.075/ RS2)

5VPCU(16,19,29,30,38,39,40)

3VPCU

3VPCU(16,19,20,29,30,31,36,38,39,40)

+PWR_SRC

+PWR_SRC(20,36,38,39,40,41)

3VPCU

PD3

SW1010

2 1

MODIFY FROM 2N7002E TO 2M7002E-G

P331

PR50
475K/F

PR51
332K/F

3

2

PQ4
2N7002E-G

1

4

300mil

PR71

0.015

1 2

1P

2P

5VPCU

5

1

+

3

-

2

ACOK

PR45
100K

4

PU2
LMV331

321

5 4

876

3VPCU

PR52

10K/F

PQ48

SI4835BDY-T1-E3

876

12

PC21

0.1U_50V

321

PQ46

SI4835BDY-T1-E3

5 4

V_CHG

PR54
100K

12

PC148

0.1U_50V

P332

21

ACOK-2

3

1

2

PD4
RB500

2

PQ3
2N7002E-G

+

VAD-5

3

1

D/C#

PC145
10U/25V

PQ5
2N7002K

+

MODIFY FROM 2N7002E TO 2M7002E-G

PR47
100K

BL/C# (30)

PROJECT : DW1

Size Doc ument Number Rev

Date: Sheet

Quanta Computer Inc.

CHARGE

5

+PWR_SRC

PR172
200K/F_6

PR44

100K/F

PC146
10U/25V

D/C# (30)

1ACustom

of

37 42Tuesday, January 03, 2006

5

www.bufanxiu.com

DC-DC(MAX8734A)

SYS_SHDN#(5)

D D

PR111

PC83
*0.1U

100K

1 2

HWPG(30,39,40,41)

PR139 *0

5V_AL

12

PR138

PR136

100K
PR144

*0

0

1 2

PR140

33.2K/F

8734ILIM5

PR143
100K/F

+

PC1221U

12

PR137

0

15mil15mil

8734ILIM3

REF2V_8734

8734ILIM5

12

5VPCU 3VPCU

PR130
PR142
*15K

1 2

C C

B B

A A

FB5 FB3

PR141

0

1 2

*6.49K

1 2

PR125

0

1 2

PR133

53.6K/F

PR135
100K/F

REF2V_1999

5V_AL

REF2V_8734

8734ILIM3

R316 *10K

+3V

PR134
100K

1 2

FB3

FB5

10
11
12
13
14

1 2

4

3VPCU

PR110 390K

PU7

1

N.C

2

PGOOD

3

ON3

4

ON5

5

ILIM3

6

SHDN-

7

FB3

8

REF

9

FB5
PRO­ILIM5
SKIP­TON
BST5

MAX8734A

PR131 0

BST5

PC91
1U

PC96

4.7U/10V

+

BST3

LX3

DH3

LDO3

DL3

GND
OUT3
OUT5

V+

DL5

LDO5

VCC
DH5

LX5

12

+

3V_AL

12

PR122 0

28
27
26
25
24
23
22
21
20
19
18
17
16
15

VCC

PR116

47

BST3

DH3

2

PR112 10

12

+

PC89

4.7U/25V

1 2

LX3

DL3

DL5

DH5

LX5

PC109

0.1U_50V

1 2

1

PD19
CHP202U

3

5V_AL

12

+

PC90

4.7U/10V

SUSD

PC104

0.1U_50V

PQ36
RSS090N03

PQ22
RSS090N03

5VPCU

578

1 2

3 6

241

3

578

3 6

241

578

3 6

241

PQ24
RSS090N03

PC106

0.01U

PC63
1000P/50V

12

PQ17
RSS090N03

2.5UH_7.5A/SIL-104R-2R5PF L-F
PR117
*2.7R

578

12

PC58

1000P/50V

PQ18
RSS090N03

3 6

241

578

3 6

241

PD16

3

CHN217

PC116

0.1U/50V

5VSUS

12

PC59
10U/25V

PL5

PC100

*0.01U

PC60
10U/25V

2.5UH_7.5A/SIL-104R-2R5PF L-F

PR123
*2.7R

PC110

*0.01U

2

5VPCU

1

10V

12

+

PC99
1U

1 2

PC66

0.01U

PL2

0805/5A

PC105

0.01U

2

Need create L-F
Part number.

+PWR_SRC

PC57
10U/25V

PD17
EC10QS04

PC97

220U/4V/25m

2 1

PL6

PD8
EC10QS04

2 1

PD18

2

3

1

CHN217

12

+

+

PR120 0

PR132 0

PC120
1U

+

PC98

220U/6.3V/25m

+3V

PC222

0.1U/50V

PC234

0.1U/50V

10V

15V

PC223

0.1U/50V

PC79

0.1U/50V

PC115

0.1U/50V

PC235

0.1U/50V

3VPCU

5A

5VPCU

6A

PC224

0.1U/50V

MAIND

PC225

0.1U/50V

MAIND(36)

PQ25
RSS090N03

0.1U_50V

PC108

0.1U/50V

5VPCU

578

3 6

PC118

241

1

876

123

PC214

0.1U_50V

3VPCU

5

PQ26
SI4804BDY-T1-E3

4

PC111

0.1U/50V

PC215

0.1U_50V

PC114

0.1U/50V

3VSUS

PC119

0.1U/50V

SUSD (36)

+5V

PC117

0.1U/16V

PC121

0.1U/16V

Size Doc ument Number Rev

5

4

3

2

Date: Sheet

PROJECT : DW1

Quanta Computer Inc.

3V/5V

1

of

38 42Tuesday, January 03, 2006

1ACustom

1

www.bufanxiu.com

2

3

4

5

0.01U

PR105
1K/F

Rc

PR102
20K/F

Rd

PC61

+PWR_SRC

1.05V/ 8A

+1.05V

+PWR_SRC

PL15

PC86

PR93

0.1U_50V

10U/25V

PC49

0.1U_50V

A A

1.5V/ 8A

+1.5V

PC226

PC227

0.1U_50V

Ra

10K/F

B B

Rb

PR95
20K/F

FBJ3216HS480NT_1206

PC52

*220U/6.3V_25m H=1.9

*10U/10V

2 1

PD7

330U/2.5V_25m H=1.9

SBM1040-13-F(40V/10A SCHOTTKY)EU

PR94
*0

8743AGND8743AGND

PC87
10U/25V

PC56

3.8UH_SIL104R_6A/13mohm

+

+

PC156

8743FB2

PL7

PR104
*2.7R

EC-A14

PC54

*0.01U

PC88
1000P/50V

12

241

241

MAINON

3 6

3 6

PQ23

578

578

PQ16
AO4422

MAINON

AO4422

PR98

PC73

0.1U_50V

0

PR97

0

Vout=(1+Ra/Rb)*1

PJ2 SHORT

C C

8743AGND

PC77 1U

DAP202UT106

EC-C?

8743BST2
8743DL2
8743LX2
8743DH2 8743LX1

8743PG

8743ILIM2
8743ILIM1

+PWR_SRC

8743AGND

PR99

0

4

19
20
17
18
16
15
14

7
11
12

13

3

8743VCC

PU5

PR90
*10K/F

22

BST2

V+
DL2
LX2

DH2
CS2
OUT2
FB2

PGOOD
ON1
ON2

ILIM2
ILIM1

VCC

MAX8743EEI+

OVP8UVP

9

8743AGND 8743AGND

8743REF

PR100

0

8743ILIM1

8743AGND 8743AGND

8743VCC

BST1

OUT1

VDD

TON

SKIP

GND

DH1

CS1

REF

LX1
DL1

FB1

PD13

21
25
26
27
24
28
1
2
5

10
6

23

PR107

10

PR103
*0

PR96
2K/F

PR88
100K/F

2

8743BST1
8743DH1

8743DL1

8743VCC

8743ILIM2

3

8743VDD

8743REF

1

PR113

0

PC51

0.22U/10V
PR89

0

5VPCU

PC76
10U/10V

PC74

0.1U_50V

3VPCU

578

PQ15
AO4422

3 6

241

1.5UH_SIL104R-1R5_10A/8.1 mohm

578

PQ21
FDS6676AS_NL(30V,14.5A)

3 6

241

PR92
*10K

PR910

1 2

PC78
*0.01U

HWPG8743PG

PC65
1000P/50V

PL12

PR106
*2.7R

PC155

470U/6.3V_25m H=1.9

8743FB1

HWPG (30,38,40,41)

PC55

PC67

10U/25V

10U/25V

PC72

*220U/6.3V_ 25m H=1.9

+

+

2 1

PD11

SBM1040-13-F(40V/10A SCHOTTKY)EU

PR101
*0

8743AGND 8743AGND

FBJ3216HS480NT_1206

PC62
10U/25V

PC68

0.1U_50V

PC71
*10U/10V

Vout=(1+Rc/Rd)*1

PL14

PC42

PR78

MAINON(30,36,40)

D D

*0.1U

3VPCU

0

PC228

0.1U_50V

PC229

EN_4215

0.1U_50V

A2 TEST TO B TEST MODIFY PC47 CH61001KA94

PC47

1

NC0

2

EN

3

VIN

4

NC1

10U/6.3V

PC46

0.1U/16V

PR82
10K/F

ADJ

7

R2

NC2

VO
GND0
GND1

PU4
SC4215 L-F

4215FB

5
6
8
9

R1

PR83
*4.12K/F

PC45

PC48

A2 TEST TO B TEST
MODIFY PC45 ANDPC48
CH61001KA94

PC44

10U/6.3V

10U/6.3V

PC216

PC217

PC236

0.1U/16V

0.1U_50V

0.1U_50V

0.1U_50V

Vo=0.8(R1+R2)/R2

1

2

3

+2.5V (11,13,35,36)

+2.5V

2.5V

1.1A

S0

4

PROJECT : DW1

Size Doc ument Number Rev

Date: Sheet

Quanta Computer Inc.

MAX8743 1.5VS_5/+1.05V/2.5V

5

of

39 42Tuesday, January 03, 2006

1ACustom

5

www.bufanxiu.com

+PWR_SRC

D D

4

3

2

1

4.7U_10V

PR181

1.8V_LX

PR184 *0_ N C

1 2

8632REF

PR187

100K/F_0402

12

PC175

0.22U_25V

5VPCU

0_0603

8632VDD

PC161

1 2

*0_NC

PU8

20

18

19

21

23
16
15

1
3

12

1.8V_LIM

12

PR188
110K/F_0402

PR190 *0_ N C

1 2

PR177 10_0603

PR178

22

VDD

BST

DH

LX

MAX8632ETI+

DL

PGND1
OUT
FB
TON
REF

ILIM

4

12

1 2
2

OVP/UVP

TP0

28

PR179
0_0402

SKIP

25

12

PR191
0_0402

8632VDD

12

26

VIN

AVDD

POK1
POK2

SHDN

STBY

VTTI

REFIN

PGND2

VTT

VTTS

VTTR

GND

24

GND_DDR

SS

8

12

PC162

1 2

1U_10V

+PWR_SRC

17
5
6
27
7
13
14

11

12
9

SMDDR_VREF

10

PC176
1000P_50V

PR1890

PR182

1 2

12

PC169

0.1U_50V

12

PC174
1U_10V

SUSON

3VPCU

20/F_0402

12

PR180
100K_0402

12

PC170

0.1U_50V

HWPG (30,38,39,41)

SUSON (30,36)
MAINON (30,36,39)

12

PC167

0.1U_50V

PC171
10U_6.3V

1 2

1 2

12

PC172
10U_6.3V

1.8VSUS

PC168

10U_6.3V

Design current 1.05A
Peak current 1.5A

12

PC173

*10U_6.3V_NC

SMDDR_VTERM

PC159

10U_25V

A2 TEST TO B TEST
MODIFY PL16 FROM

3.3UH TO 1.5UH

C C

1.8VSUS

B B

IND SMD XFMR 1.5UH+ -30% 10A(SIL104R-1R5PF)

12

PC166

0.1U_50V

8632VDD

+

PC164

220U/2.5V/ESR15

+

PR183

*100K/F_NC

PR185 0_0402

1 2

PC160

10U_25V

PL16

PC165
220U/2.5V/ESR15

12

12

PR186
*63.4KF_NC

1

52

3
52

1

A2 TEST TO B TEST
MODIFY HISIDE MOS
RQW130N03FD5 AND
LOWSIDE MOS FDS7088

PQ50
RQW130N03FD5

4

PQ51
FDS7088SN3

4

3

21

PD21
CH501

PC163

1.8V_BST

1 2

1.8V_DH 1.8V_DH

1.8_DL 1.8_DL

0.1U_50V

Freq=300K

A A

PROJECT : DW1

Size Document Number Rev

5

4

3

2

Date: Sheet

Quanta Computer Inc.

1.8V/0.9V

1

of

40 42Tuesday, January 03, 2006

1ACustom

A

www.bufanxiu.com

3

PQ58

PR226
1K

1 2

12

PC232

0.1U_50V

2N7002E-G

2

PC213

1

0.1U_10V

DELAY_VR_PW R GOOD(9,18)

VR_PWRGD _CK410#(4,18)

PR205 100K/ F

1 2

VRON(30,36)

PR208 0

1 2

HWPG(30,38,39,40)

12

PC233

0.1U_50V

Add layout note on pins 22 and 28 of MAX8771
controller. These nets have large voltage swings.
Need to route them away from the sensitive areas that
are trying to detect small changes in voltage, such as
the voltage sense VccSense VssSense lines.

1 1

2 2

DELAY_VR_PW R GOOD

3 3

PHASEGD

1 2

VID0(6)
VID1(6)
VID2(6)
VID3(6)
VID4(6)
VID5(6)
VID6(6)

12

PC195
100P_50V

PR225

*0

ICH_DPRSTP#(5,16)

PM_DPRSLPVR(18)

8771VCC

VR_TT#(5)
POUT

12

B

5VSUS

12

PR195

PR196

10K

1.91K/F

PSI#(5)

PC196 470P

PC203 0.22U_10V

PR215 10K/F

1 2

PR216

*NTC 10K_6-B4.25K_NC

5VSUS

PR217
56

12

PR197
10K

PR202 0

1 2

PR206 0

1 2

PR210 0

1 2

PR212 71.5K/F

8771REF

12

12

12

1 2

PC178

2.2U_10V

17

2
1

31
32
33
34
35
36
37

3
38
40
39

9

7

11
18

41

6

5

4

PR218
10K

PC211

0.1U_10V

8771VCC

PU9

PHASEGD
PWRGD
CLKEN

D0
D1
D2
D3
D4
D5
D6

PSI
SHDN
DPRSTP
DPRSLPVR

CCV

TIME

REF
GND

EP

THRM

VRHOT
POUT

12

PR192
10

19

VCC

MAX8771

PR221
0_0603

PC177

2.2U_10V

25

12

12

VDD

PGND1

GNDS

CSN12

PGND2

C

5VSUS

12

0.1U_50V

+CPU_PWR_SRC

PR194
200K/F

TON

BST1

LX1
DH1
DL1

FB

CCI

CSP1

CSP2

DH2
DL2

LX2

BST2

PC218

8
30
28
29
26
27

12

10

13
16
15
14

21
24
22
20
23

12

PC219

0.1U_50V

12

8771BST1_R

1 2

21

12

8771LX1
8771DH1
8771DL1

PR199

*3.48K/F_NC

1 2

PR203

3.48K/F

PC194
470P

8771CSP1
8771CSN12
8771CSP2

8771DH2
8771DL2
8771LX2
BST2_R

5VSUS

D

PD22
RB751V

8771BST1

12

PR193

PC179

0_0603

0.22U_25V

RQA130N03FD5

12

RQA180N03FD5

PC190

*1nF_NC

PC191
*4700P_NC

PR204
100

PC193
1000P

PR211

PR213

20K

100_4

PC204
1000P_50V

PR219
0_0603

1 2

2 1

8771BST2

PD23
RB751V

12

PC209

0.22U_25V

1 2

Sense lines are 18 mil wide, Z0=27.4 Ohm.
Use differential routing with 7 mil spacing.
Route external layer with solid GND reference
(no split planes).
Use 25 mil separation from any other signal.

PQ52

PQ53

PC210
*1nF_NC

4

4

PR207
*100_NC

VCC_CORE

8/11 change

PR214
*100_NC

52

3

1

52

3

1

VCCSENSE (6)

8/11 change

VSSSENSE (6)

12

PC180

0.1U_50V

RQA180N03FD5

12

PC181
2200P_50V

PQ54

4

3

RQA130N03FD5

RQA180N03FD5

E

F

G

H

A2 TEST TO B TES T DE L ET E JU MPER

12

PC184
10U_25V

12

3

PR201

NTC 10K_6-B4.25K

PC192

1 2

0.22U_25V

12

52

3

1

12

PC198
2200P_50V

+PWR_SRC

12

12

8771CSP2

8771CSN12

PC185
10U_25V

X6S_1206X6S_1206

+CPU_PWR_SRC

0.1U_50V

12

PC199

PC200
2200P_50V

PL18

0.45_25A_20%_MPC1040LR45

4

PR220

2.1K/F
PR222

4.02K/F

PC212

1 2

0.22U_25V

PR224 0

12

12

PC186

PC187
330UF_2V_7mohm

*330UF_2V_7mohm_NC

12

12

3

PR223

NTC 10K_6-B4.25K

12

PC201
10U_25V

VCC_CORE

12

PC188
330UF_2V_7mohm

12

PC189

0.01U_25V

12

PC202
10U_25V

X6S_1206X6S_1206

12

12

PC205

330UF_2V_7mohm

distribute evenly between N side and S
side, preferably on secondary side.

12

PC207

PC206

330UF_2V_7mohm

*330UF_2V_7mohm_NC

12

PC208

0.01U_25V

VCC_CORE

+CPU_PWR_SRC

12

12

PC183

PC182

2200P_50V

0.1U_50V

PL17

0.45_25A_20%_MPC1040LR45

52

1

8771CSP1

8771CSN12

PQ55

52

4

3

1

52

PQ56

RQA180N03FD 5

4

3

4

PR198

2.1K/F
PR200

1 2

4.02K/F

PR209 0

12

PC197

0.1U_50V

PQ57

4

1

4 4

PROJECT : DW1

Size Docum e n t N u mb er Re v

A

B

C

D

E

F

Date: Sheet

G

Quanta Computer Inc.

max8771

41 42Tuesday, Januar y 0 3, 2006

of

H

1AC

5

www.bufanxiu.com

D D

4

3

2

1

IMVP Spec. Rev. 0.8

(Nom.)

HFM
LFM
Deeper
VBOOT
SLOPE

(Max.)

HFM

C C

LFM
Deeper

Dynamic

Yonah-2M Meron

1.2875 V

0.8375 V

0.7625 V

1.2000 V

-2.1 mV/A

Yonah-2M

36 A

9.5 A

3.5 A

1.1500 V

0.8375 V

0.7625 V

1.2000 V

-2.1 mV/A

Meron
44 A

12.5 A

5.5 A

34.5 A27 A

26 A

32 ATDC

CCM : Continuous Conduction Mode
DCM : Dis-Continuous Mode

Active Mode
PSI# : H

DPRSTP# : H
DPRSLPVR : L
FCCM : H

CCM

VID change
up or down

Active Mode
PSI# : H

DPRSTP# : H
DPRSLPVR : L
FCCM : H

CCM

Mode change

Vo VID6 VID5 VID4 VID3 VID2 VID1 VID0

----------------------------------------------

1.5000 0 0 0 0 0 0 0

----------------------------------------------

1.4375 0 0 0 0 1 0 1

----------------------------------------------

1.4000 0 0 0 1 0 0 0

----------------------------------------------

1.3000 0 0 1 0 0 0 0

----------------------------------------------

B B

A A

1.2875 0 0 1 0 0 0 1

----------------------------------------------

1.2000 0 0 1 1 0 0 0

----------------------------------------------

1.1500 0 0 1 1 1 0 0

----------------------------------------------

1.1000 0 1 0 0 0 0 0

----------------------------------------------

1.0000 0 1 0 1 0 0 0

----------------------------------------------

0.9625 0 1 0 1 0 1 1

----------------------------------------------

0.9000 0 1 1 0 0 0 0

----------------------------------------------

0.8375 0 1 1 0 1 0 1

----------------------------------------------

0.8000 0 1 1 1 0 0 0

----------------------------------------------

0.7625 0 1 1 1 0 1 1

----------------------------------------------

0.7500 0 1 1 1 1 0 0

----------------------------------------------

0.7000 1 0 0 0 0 0 0

----------------------------------------------

0.6000 1 0 0 1 0 0 0

----------------------------------------------

0.5000 1 0 1 0 0 0 0

----------------------------------------------

0.3000 1 1 0 0 0 0 0

----------------------------------------------

Deeper Sleep
Mode

PSI# : L
DPRSTP# : L
DPRSLPVR : H
FCCM : L

DCM

Mode change
without VID change
or
with VID change
down

Active Mode
PSI# : H

DPRSTP# : H
DPRSLPVR : L
FCCM : L

DCM

Mode change
with
VID change
up

Active Mode
PSI# : H

DPRSTP# : H
DPRSLPVR : L
FCCM : H

CCM

PROJECT : DW1

Size Docum e n t N u mb er Re v

5

4

3

2

Date: Sheet

Quanta Computer Inc.

CPU_Operation State

1

42 42Tuesday, Januar y 0 3, 2006

of

1AC