Gigabyte GV-R92S128T REV.1.0 Schematic
8
+12V_BUS
C10 place at the AGP connector
C10
D D
AGP_INTR#(2)
AGP_GNT#(2)
AGP_WBF#(2)
AGP_SB_STB#(2)
AGP_MB_8X_DET#(2)
AGP_DBI_HI(2)
AGP_RESET#(2)
C C
B B
A A
AGP_RESET#
AGP_AD_STB1#(2)
AGP_FRAME#(2)
AGP_TRDY#(2)
AGP_STOP#(2)
AGP_PAR(2)
AGP_AD_STB0#(2)
AGP_MB_8X_DET#
10uF_20V
DNI
R3
100R
U6A
R4
SN74ACT86D
180R
COMMON
AGP_TYPEDET#
AGP_GC_8X_DET#
+3.3V_BUS
UNIVERSAL VREFGC CIRCUIT (2X, 4X, 8X)
8
R83 0R
+5V_BUS
147
3
R19
0R
R81
0R
R90
47K
13
12
7
C11
100nF
X7R
1
2
For retail, 1K ohm
pull-down causes
AMD system detects
AGP2X only
+12V, TYPEDET#
short protection
for OEM (1KR)
U6D
SN74ACT86D
7
6
The following grounds should be routed back to their respective regulators and then tied directly to the ground plane with one
GND_RSET
GND_R2SET
C2
100uF_6.3V
Biggest footprint
AGP_TYPEDET#
AGP_GC_8X_DET#
AGP_ST1
AGP_SBA1
AGP_SBA3
AGP_SBA5
AGP_SBA7
AGP_AD30
AGP_AD28
AGP_AD26
AGP_AD24
AGP_C/BE#3
AGP_AD22
AGP_AD20
AGP_AD18
AGP_AD16
AGP_AD15
AGP_AD13
AGP_AD11
AGP_AD9
AGP_C/BE#0
AGP_AD6
AGP_AD4
AGP_AD2
AGP_AD0
+VDDQ_BUS
32
TEST
11
R91
1K
1
2N7002E
Q10
R92 147R
via: GND_PVSS, GND_MPVSS, GND_TPVSS, and GND_A2VSSN. The other ground pins (GND_AVSSN, GND_A2VSSQ,
GND_RSET, GND_R2SET) should be tied to the ground plane directly through one via as close to the pins as possible
without connecting to anything else. If space is an issue it is possible to use one via for two adjacent pins.
Use 47uF Tant. 16V 20% D size (P/N 4230047600),
800mR Max. ESR and Max. ripple 430mA @ 100kHz
or
100uF, Alum. 6.3V 20% 6.3mm dia (P/N 4261010700),
440mR Max. ESR and Max. ripple 230mA @ 100kHz
or
47uF, Alum. 6.3V 20% 5mm dia (P/N 4262047600),
760mR Max. ESR and Max. ripple 150mA @ 100kHz
MAGP1
A1
12V
A2
TYPEDET#
A3
GC_DET#/RESEVED
A4
USB-
A5
GND
A6
INTA#
A7
RST#
A8
GNT#
A9
VCC3.3
A10
ST1
A11
MB_DET#/RESERVED
A12
DBI_HI/PIPE#
A13
GND#A13
A14
WBF#
A15
SBA1
A16
VCC3.3#A16
A17
SBA3
A18
SB_STB#
A19
GND#A19
A20
SBA5
A21
SBA7
A22
KEY
A23
KEY#A23
A24
KEY#A24
A25
KEY#A25
A26
AD30
A27
AD28
A28
VCC3.3#A28
A29
AD26
A30
AD24
A31
GND#A31
A32
AD_STB1#
A33
C/BE3#
A34
VDDQ
A35
AD22
A36
AD20
A37
GND#A37
A38
AD18
A39
AD16
A40
VDDQ#A40
A41
FRAME#
A42
KEY#A42
A43
KEY#A43
A44
KEY#A44
A45
KEY#A45
A46
TRDY#
A47
STOP#
A48
PME#
A49
GND#A49
A50
PAR
A51
AD15
A52
VDDQ#A52
A53
AD13
A54
AD11
A55
GND#A55
A56
AD9
A57
C/BE0#
A58
VDDQ#A58
A59
AD_STB0#
A60
AD6
A61
GND#A61
A62
AD4
A63
AD2
A64
VDDQ#A64
A65
AD0
A66
VREFGC
UNIVERSAL_AGP_BUS
AGP_VREFGC
R_AGP8X must be 1%
resistor to provide
350mV +/- 5% on Vref
R_AGP8X
R93
332R
C19
R94
10nF
100R
6
OVRCNT#
5.0V#B3
GND#B5
VCC3.3#B9
GND#B13
DBI_LO/RESERVED
VCC3.3#B16
SB_STB
GND#B19
KEY#B22
KEY#B23
KEY#B24
KEY#B25
VCC3.3#B28
GND#B31
AD_STB1
VDDQ#B34
GND#B37
C/BE2#
VDDQ#B40
KEY#B42
KEY#B43
KEY#B44
KEY#B45
DEVSEL#
VDDQ#B47
PERR#
GND#B49
SERR#
C/BE1#
VDDQ#B52
GND#B55
VDDQ#B58
AD_STB0
GND#B61
VDDQ#B64
VREFCG
USB+
INTB#
REQ#
RBF#
SBA0
SBA2
SBA4
SBA6
IRDY#
5
+3.3V_BUS+5V_BUS+VDDQ_BUS
C5
C8
47uF_6.3V
47uF_6.3V
>=6.3V
>=6.3V
DNI
B1
B2
5.0V
B3
B4
B5
B6
B7
CLK
B8
B9
B10
ST0
B11
ST2
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
AD31
B27
AD29
B28
B29
AD27
B30
AD25
B31
B32
B33
AD23
B34
B35
AD21
B36
AD19
B37
B38
AD17
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
AD14
B54
AD12
B55
B56
AD10
B57
AD8
B58
B59
B60
AD7
B61
B62
AD5
B63
AD3
B64
B65
AD1
B66
5
AGP_ST0
AGP_ST2
AGP_SBA0
AGP_SBA2
AGP_SBA4
AGP_SBA6
AGP_AD31
AGP_AD29
AGP_AD27
AGP_AD25
AGP_AD23
AGP_AD21
AGP_AD19
AGP_AD17
AGP_C/BE#2
AGP_C/BE#1
AGP_AD14
AGP_AD12
AGP_AD10
AGP_AD8
AGP_AD7
AGP_AD5
AGP_AD3
AGP_AD1
AGP_AGPREF
4
AGP_SBA[7..0]
AGP_ST[2..0]
AGP_C/BE#[3..0]
AGP_AD[31..0]
R86 0R
4
3
AGP_SBA[7..0] (2)
AGP_ST[2..0] (2)
AGP_C/BE#[3..0] (2)
AGP_AD[31..0] (2)
AGP_AGP/PCICLK (2)
AGP_REQ# (2)
AGP_RBF# (2)
AGP_DBI_LO (2)
AGP_SB_STB (2)
AGP_AD_STB1 (2)
AGP_IRDY# (2)
AGP_DEVSEL# (2)
AGP_AD_STB0 (2)
3
TEST
AGP_AGPREF
AGP_VREFGC
TEST
+VDDQ_BUS
R84 0R
R85 0R
+VDDQ_BUS
1
2
R88 137R
32
1%
Q9
2N7002E1
R89 75.0R
32
2N7002E
Q11
R95 147R
AGP_AGPTEST
1%
R_AGP8X must be 1%
resistor to provide
350mV +/- 5% on Vref
AGP_AGPTEST (2)
Keep stubs short
R_AGP8X
R96
332R
C21
R97
10nF
100R
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7N6
(905) 882-2600
Title
RV280 LP AGP8x 128MB 16Mx16 DDR
Size Document Number Rev
Custom
星期二, 八月
Date: Sheet of
2
12, 2003
105-A165XX-00B
AGP_AGPREFCG (2)
1
1 14
1
1
5
4
3
2
1
Model Name :
GV-R92S128T
Revision 1.0
D D
Component value change history
MODE
Change Item ReasonBOM Rev Date
0.1 06/24 Initial Version
0.2 06/30 Update Design-kit for
PCB Layout
1.0A 07/17 For PVT Pilot-Run
1.0A 07/24 Correct Package
1.0A 07/30 Add second source
1.0A 07/31 Add second source
1.0A 08/01 Add New Game CD
C C
Circuit or PCB layout change for
next version history
PCB Rev
Date Change Item Reason
Update Design-kit for PCB Layout0.2 06/30
07/171.0 Modify PCB silkscreen Rev0.2 => Rev1.0
B B
A A
GIGABYTE
Title
BOM & PCB Modify History
Size Document Number Rev
C
5
4
3
2
Date: Sheet of
星期二, 八月
GV-R92S128T
12, 2003
1
1 1
1.0
8
AGP_AD[31..0]
D D
AGP_C/BE#[3..0](1)
C C
AGP_ST[2..0](1)
AGP_AGPREFCG(1)
AGP_AGPTEST(1)
B B
AGP_C/BE#[3..0]
AGP_AGP/PCICLK(1)
AGP_RESET#(1)
AGP_REQ#(1)
AGP_GNT#(1)
AGP_PAR(1)
AGP_STOP#(1)
AGP_DEVSEL#(1)
AGP_TRDY#(1)
AGP_IRDY#(1)
AGP_FRAME#(1)
AGP_INTR#(1)
AGP_WBF#(1)
AGP_RBF#(1)
AGP_AD_STB0(1)
AGP_AD_STB1(1)
AGP_SB_STB(1)
AGP_SBA[7..0](1)
R36 0R
AGP_SBA[7..0]
AGP_ST[2..0]
AGP_SB_STB#(1)
OSC_IN
AGP_AD_STB0#(1)
AGP_AD_STB1#(1)
AGP_MB_8X_DET#(1)
AGP_DBI_HI(1)
AGP_DBI_LO(1)
TP8
C1205 22pF
R1115
1M
C1206 22pF
C20
100nF
A_R/C_DAC2(11)
A_G/Y_DAC2(11)
A_B/COMP_DAC2(11)
Y2
27_MHZ
2 1
GND_R2SET
+3.3V_BUS
7
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2
R40 715R
R1198 4.7K DNI
R1199 4.7K DNI
6
U1A
K27
AD0
L26
AD1
L25
AD2
L27
AD3
M25
AD4
M26
AD5
N26
AD6
N25
AD7
R26
AD8
R25
AD9
T26
AD10
T25
AD11
U26
AD12
U25
AD13
U27
AD14
V26
AD15
M28
AD16
N29
AD17
N28
AD18
P29
AD19
P28
AD20
R29
AD21
R28
AD22
T28
AD23
V29
AD24
V28
AD25
W29
AD26
W28
AD27
Y29
AD28
Y28
AD29
AA29
AD30
AA28
AD31
P27
C/BEb0
V25
C/BEb1
M29
C/BEb2
T29
C/BEb3
AF29
PCICLK
AG30
RSTb
AE29
REQb
AG28
GNTb
J29
PAR
J28
STOPb
K29
DEVSELb
K28
TRDYb
L29
IRDYb
L28
FRAMEb
AF28
INTAb
AF27
WBFb
AJ26
NC19
AH25
NC18
AC29
RBFb
P25
AD_STBF0
U29
AD_STBF1
AB26
SB_STBF
AE27
SBA0
AD26
SBA1
AC25
SBA2
AC26
SBA3
AA25
SBA4
AA26
SBA5
Y25
SBA6
Y26
SBA7/IDSEL
AD28
ST0
AD29
ST1
AC28
ST2
AB25
SB_STBS
P26
AD_STBS0
U28
AD_STBS1
H29
AGPREF
H28
AGPTEST
AG27
AGP8X_DETb
AB28
DBI_HI
AB29
DBI_LO
AJ21
R2SET
AJ22
C_R
AK22
Y_G
AK21
COMP_B
AG25
H2SYNC
AF25
V2SYNC
AF23
CRT2DDCCLK
AG24
CRT2DDCDAT
AG29
NC34
AH29
NC33
AJ28
XTALIN
AJ29
AH26
AJ27
XTALOUT
TESTEN
STEREOSYNC
RV280
STEREOSYNC
TESTEN
R33
1K
Part 1 of 5
EXT TMDS / GPIO /
PCI/AGPAGP2XCLK
NCSTMDSDAC1
AGP4X/8X
SSC DAC2
STEREOSYNC (7)
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
ROMCSb
DVOMODE
ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ROM
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
DPLUS
DMINUS
DVIDDCCLK
DVIDDCDATA
HSYNC
VSYNC
VGADDCDATA
VGADDCCLK
AUXWIN
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
NC35
NC27
NC36
NC28
NC37
NC29
NC39
NC31
NC38
NC30
NC22
NC13
NC23
NC14
NC24
NC15
NC26
NC17
NC25
NC16
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
RSET
AJ5
AK4
AJ4
AF4
AG4
AH4
AK3
AJ3
AH3
AG3
AF3
AJ2
AH2
AG2
AF2
AH1
AG1
AH5
AE10
AF5
AE6
AF6
AE7
AG6
AF7
AG8
AF8
AE8
AE9
AF9
AG9
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AK10
AJ10
AH11
AJ11
AK6
AJ6
AH6
AH7
AE15
AF15
AE16
AF16
AG15
AH15
AH16
AH17
AF17
AG17
AJ17
AH18
AK18
AJ18
AG19
AH19
AJ16
AK16
AH20
AJ20
AF11
NC7
AE12
NC8
AF10
AE11
AJ13
AH13
AJ14
AH14
AJ15
AK15
AK12
AK13
AF13
AE13
AF12
HPD
AK25
R
AJ25
G
AK24
B
AH28
AH27
R39 499R
AJ23
AG26
AF26
AE25
TP10
VID/DVO12
VID/DVO13
VID/DVO14
VID/DVO15
GND_RSET
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
ROMCS#
DVOMODE
VID/DVO16
VID/DVO17
VID/DVO18
VID/DVO19
VID/DVO20
TP7
5
VSYNC
VGADDCDATA
VGADDCCLK
GPIO[13..0]
R986
10K
24bit-SDR-DVO
DC_Strap1 (7)
DC_Strap2 (7)
DC_Strap3 (7)
DC_Strap4 (7)
GPIO[13..0] (7)AGP_AD[31..0](1)
Mem_Strap1 (7)
Mem_Strap0 (7)
A_R_DAC1 (10)
A_G_DAC1 (10)
A_B_DAC1 (10)
A_HSYNC_DAC1 (10)
A_VSYNC_DAC1 (10)
CRT1DDCDATA (10)
CRT1DDCCLK (10)
4
RSET
R2SET
Mem_Strap2 (7)
3
THE VALUES OF RSET AND R2SET SHOWN IN THE TABLE MAY BE
APPROXIMATE VALUES ONLY (SUITABLE FOR PROTOTYPING)
BEFORE GOING INTO PRODUCTION,CONTACT YOUR ATI
499R
REPRESENTATIVE FOR THE RSET/R2SET VALUES QUALIFIED FOR
715R
MASS PRODUCTION
LCDDATA16 (7)
LCDDATA17 (7)
PAL/NTSC (7)
DC_Strap5 (7)
LCDDATA20 (7)
STEREOSYNC
VGADDCDATA
VGADDCCLK
VSYNC
TESTEN
TDO
TDI
TMS
TCK
TRST
TP1
TP2
TP3
TP4
TP5
OPTION BOUNDARY
SCAN WITH TESTEN
GPIO9
GPIO10
ROMCS#
2
SERIAL EEPROM BIOS
+3.3V_BUS
R21
10K
U11
5
D
6
C
1
S
+3.3V_BUS
7
HOLD
3
W
8
VCC
M25P05-VMN6T
C80
100nF
X7R
1
GPIO8
2
Q
4
VSS
Drop-in without strap change
A A
8
7
6
5
4
3
Pm25LV512-25SC P/N2280002900
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7N6
(905) 882-2600
Title
RV280 LP AGP8x 128MB 16Mx16 DDR
Size Document Number Rev
Custom
星期二, 八月
Date: Sheet of
2
12, 2003
105-A165XX-00B
2 14
1
1
5
D D
4
3
2
1
MEMORY CHANNEL A
QSA[7..0](8)
DQMA#[7..0](8)
MAA[13..0](8)
MDA[63..0](8)
C C
B B
A A
QSA[7..0]
DQMA#[7..0]
MAA[13..0]
MDA[63..0]
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
U1B
RV280
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63
Part 2 of 5
ELPIDA
MEMORY INTERFACE
A
G30
F28
F30
E29
D28
D29
D30
K25
K26
J25
J26
G28
G25
G26
G27
C29
B29
B28
C27
C26
B26
C25
B25
E26
F25
E25
F24
E23
D22
F22
E22
C17
B17
C16
B16
C14
B14
C13
B13
E18
F17
E17
D16
F15
E15
F14
E14
A13
C12
A12
B12
C10
B10
C9
B9
E13
F12
E12
F11
E10
F9
E9
F8
DQMAb0
DQMAb1
DQMAb2
DQMAb3
DQMAb4
DQMAb5
DQMAb6
DQMAb7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASAb
CASAb
WEAb
CSAb0
CSAb1
CKEA
CLKA0
CLKA0b
CLKA1
CLKA1b
CLKAFB
VREF
DIMA0
DIMA1
MAA0
B24G29
AA0DQA0
MAA1
A24
AA1
MAA2
B23
AA2
MAA3
C23
AA3
MAA4
B21
AA4
MAA5
F21
AA5
MAA6
E21
AA6
MAA7
F20
AA7
MAA8
E20
AA8
MAA9
C21
AA9
MAA10
B22
AA10
MAA11
C22
AA11
MAA12
A25
AA12
MAA13
C24
AA13
DQMA#0
E28
DQMA#1
H26
DQMA#2
A27
DQMA#3
E24
DQMA#4
B15
DQMA#5
E16
DQMA#6
C11
DQMA#7
E11
QSA0
F29
QSA1
H25
QSA2
B27
QSA3
F23
QSA4
C15
QSA5
F16
QSA6
B11
QSA7
F10
RASA#
A19
CASA#
C18
WEA#
F18
CSA#0
E19
CSA#1
F19
CKEA
B19
CLKA0
C20
CLKA#0
B20
CLKA1
B18
CLKA#1
A18
C19
TP11
B8
F26
F13
RASA# (8)
CASA# (8)
WEA# (8)
CSA#0 (8)
CSA#1 (8)
CKEA (8)
CLKA0 (8,9)
CLKA#0 (8,9)
CLKA1 (8,9)
CLKA#1 (8,9)
+VREF
Place close to ASIC ball
Use localized Vref on the memory page
Vref Voltage
+MVDDQ
R265
Re6
499R
R268
Re7
499R
+VREF
MEMORY CHANNEL B
U1C
B6
DQB0
RV280
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
Part 3 of 5
ELPIDA
MEMORY INTERFACE
B
MEMVMODE
MEMVMODE1
C6
B5
C5
B2
C3
C2
D2
E8
E7
D4
D3
F6
F3
F5
G6
D1
E2
F2
F1
G2
H3
H2
J3
G4
H6
H5
J6
K5
K4
L6
L5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA3
AB2
AB3
AC2
AD1
AD3
AE1
AE2
U6
U5
U3
V6
W5
W4
Y6
Y5
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
DQMBb0
DQMBb1
DQMBb2
DQMBb3
DQMBb4
DQMBb5
DQMBb6
DQMBb7
RASBb
CASBb
WEBb
CSBb0
CSBb1
CKEB
CLKB0
CLKB0b
CLKB1
CLKB1b
CLKBFB
DIMB0
DIMB1
MEMTEST
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
J2
AB0
K3
AB1
K2
AB2
L3
AB3
L2
AB4
M3
AB5
M2
AB6
N5
AB7
M1
AB8
M5
AB9
N3
AB10
P2
AB11
P6
AB12
P5
AB13
A4
E3
G3
J5
W2
AC3
W6
AC6
B4
E5
G1
K6
W1
AD2
V5
AC5
R2
T5
T6
R5
R6
R3
N1
N2
T2
T3
P3
TP12
DNI
2.5V (DDR)
1.8V (DDR)
3.3V (SDR)
+VDDC_CT
Default
B7
C7
G5
AE3
C8
R55
47R
R51 4.7K
R52 4.7K
R53
R54
4.7K
4.7K
DNI
MEMVMODE[1:0] MEMORY IO VOLTAGE
0 1
1 0
1 1
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7N6
(905) 882-2600
Title
RV280 LP AGP8x 128MB 16Mx16 DDR
Size Document Number Rev
Custom
星期二, 八月
5
4
3
2
Date: Sheet of
12, 2003
105-A165XX-00B
1
3 14
1
5
U1D
P18
VDDC#P18
P19
VDDC#P19
U12
VDDC#U12
U13
VDDC#U13
U14
VDDC#U14
U17
VDDC#U17
U18
+VDDC_CT
W12
W13
W14
W17
W18
W19
AC11
AC20
AK19
AE19
AE20
AF20
AG20
AJ19
AF18
AF19
AE18
AE17
AJ12
AH12
AF14
AE14
AG14
AG13
AG12
AF21
AF22
AH21
AF24
AE23
AE21
AE22
AG22
AH22
U19
V12
V13
V14
V17
V18
V19
H10
H13
H15
H17
H19
H22
J1
J23
J24
J27
J4
J7
J8
L8
M4
N4
N7
N8
R1
R4
T4
T7
T8
E27
F4
G10
G13
G15
G22
G7
L23
H20
H11
P8
Y8
VDDC#U18
VDDC#U19
VDDC#V12
VDDC#V13
VDDC#V14
VDDC#V17
VDDC#V18
VDDC#V19
VDDC#W12
VDDC#W13
VDDC#W14
VDDC#W17
VDDC#W18
VDDC#W19
VDDR1#H10
VDDR1#H13
VDDR1#H15
VDDR1#H17
VDDR1#H19
VDDR1#H22
VDDR1#J1
VDDR1#J23
VDDR1#J24
VDDR1#J27
VDDR1#J4
VDDR1#J7
VDDR1#J8
VDDR1#L8
VDDR1#M4
VDDR1#N4
VDDR1#N7
VDDR1#N8
VDDR1#R1
VDDR1#R4
VDDR1#T4
VDDR1#T7
VDDR1#T8
VDDR1#E27
VDDR1#F4
VDDR1#G10
VDDR1#G13
VDDR1#G15
VDDR1#G22
VDDR1#G7
VDDC18#L23
VDDC18#H20
VDDC18#H11
VDDC18#P8
VDDC18#Y8
VDDC18#AC11
VDDC18#AC20
NC
VDDC18#AE19
VDDC18#AE20
NC#AF20
NC#AG20
NC#AJ19
NC#AF18
NC#AF19
NC#AE18
NC#AE17
TPVDD
TPVSS
TXVDDR
TXVDDR#AE14
TXVSSR
TXVSSR#AG13
TXVSSR#AG12
A2VDD
A2VDD#AF22
A2VDDQ
AVDD
AVDD#AE23
A2VSSN
A2VSSN#AE22
A2VSSDI
A2VSSQ
RV280
D D
+MVDDQ
C C
+3.3V_BUS
D31
2.4V
2 1
C56
100nF
X7R
+TPVDD
C58
C57
100nF
4.7uF
>=6.3V
+VDDC_CT
+A2VDD
C62
100nF
X7R
Ceramic
0R on B16
B16 200R
>=6.3V
Ceramic
B B
+MVDDC
L2
1.8uH
C61
4.7uF
>=6.3V
Ceramic
X7R
DNI
DNI
C59
C77
C60
4.7uF CP8C
100nF
100pF
C64
100nF
X7R
DNI
C67
4.7uF
>=6.3V
Ceramic
X7R
DNI
+AVDD
C68
100nF
X7R
X7R
DNI
>=6.3V
Ceramic
+A2VDDQ
C63
4.7uF
4
Part 4 of 5
Memory I/O Power
(1.8V/2.5V/3.3V)
I/O level shift power
(1.8V)
Ext. TMDS/
GPIO & Ext.
(1.8V)
TMDS PLL TMDS I/O
(1.8V)
Analog Display Power,
see table below
VDDC
VDDC#AC15
VDDC#AC17
VDDC#AD13
VDDC#AD15
VDDC#M12
VDDC#M13
VDDC#M14
VDDC#M17
VDDC#M18
VDDC#M19
VDDC#N12
VDDC#N13
VDDC#N14
VDDC#N17
VDDC#N18
VDDC#N19
VDDC#P12
VDDC#P13
VDDC#P14
VDDC#P17
VDDR1
VDDR1#A21
VDDR1#AA7
VDDR1#AA8
VDDR1#D11
VDDR1#D14
VDDR1#D17
VDDR1#D8
VDDR1#V4
VDDR1#A28
VDDR1#A3
VDDR1#A9
VDDR1#AA1
VDDR1#AA4
VDDR1#AD4
VDDR1#B1
I/O
POWER
VDDR1#B30
VDDR1#D10
VDDR1#D19
VDDR1#D20
VDDR1#D23
VDDR1#D26
VDDR1#D6
VDDR1#V7
VDDR1#V8
VDDRH0
VDDRH1
VSSRH0
VSSRH1
VDDRH1 - CH B Clock PowerAGP Bus I/O Power
VDDRH0 - CH A Clock Power
(VDDR1)
MPVDD
MPVSS
PVDD
PVSSVDDC18
PLL MPLL
VDDR4
VDDR4#AC9
VDDR4#AD10
VDDR4#AD9
VDDR4#AG10
DVO Power
(1.8V/3.3V)
VDDR3
VDDR3#AC22
VDDR3#AC21
VDDR3#AD21
VDDR3#AC19
VDDR3#AD19
VDDR3#AD7
VDDR3#AC8
(3.3V)
TMDS I/O
Power
VDDP
VDDP#AA24
VDDP#AB27
VDDP#AB30
VDDP#AC23
VDDP#AD27
VDDP#AE30
VDDP#AH30
VDDP#J30
VDDP#M23
VDDP#M24
VDDP#N27
VDDP#N30
VDDP#P23
VDDP#T23
VDDP#T24
(1.5V/3.3V) (1.8V) (1.8V)
VDDP#T27
VDDP#T30
VDDP#V23
VDDP#V24
VDDP#W27
VDDP#W30
VDDP#Y27
AVDDDI
A2VDDDI
AVSSQ
AVSSDI
AVSSN#AD24
AVSSN
3
+VDDC
AC13
AC15
AC17
AD13
AD15
M12
M13
M14
M17
M18
M19
N12
N13
N14
N17
N18
N19
P12
P13
P14
P17
+MVDDQ
A15
A21
AA7
AA8
D11
D14
D17
D8
V4
A28
A3
A9
AA1
AA4
AD4
B1
B30
D10
D19
D20
D23
D26
D6
V7
V8
G19
N6
G18
M6
A7
A6
AK27
AK28Y23
+3.3V_BUS
AC10
AC9
AD10
AD9
AG10
AD22
AC22
AC21
AD21
AC19
AD19
AD7
AC8
AA23
AA24
AB27
AB30
AC23
AD27
AE30
AH30
J30
M23
M24
N27
N30
P23
T23
T24
T27
T30
V23
V24
W27
W30
Y27
AH24
AH23
AJ24
AG23
AD24
AE24
+VDDQ_BUS
TP9
C65
100nF
X7R
C51
100nF
X7R
C53
100nF
X7R
+VDDC
CP9A
8 1
10nF
+MPVDD
+PVDD
B17 200R
C66
4.7uF
>=6.3V
Ceramic
CP9B
7 2
10nF
+VDDC_CT
+VDDC_CT
CP9C
6 3
10nF
L6
1.8uH
C52
4.7uF
>=6.3V
Ceramic
L3
1.8uH
C54
4.7uF
>=6.3V
Ceramic
+VDDC_CT
CP9D
CP3A
CP3C
CP3B
5 4
8 1
6 3
7 2
10nF
10nF
10nF
10nF
+VDDC
C26
100nF
X7R X7R X7R X7R X7R
+3.3V_BUS
CP1A
8 1
10nF
+MVDDQ +MVDDQ
CP5A
8 1
10nF
+MVDDQ
C32
100nF
X7R X7R X7R X7R
+VDDC_CT
CP1C
6 3
10nF
C45
100nF
X7R
Distributed around
+VDDQ_BUS plane
CP4B
CP4A
CP3D
7 2
8 1
5 4
10nF
10nF
10nF
C27
C28
100nF
100nF
C44
CP1B
100nF
7 2
10nF
CP5D
CP5C
CP5B
5 4
6 3
7 2
10nF
10nF
10nF
C33
C34
100nF
100nF
C83
100nF
CP1D
5 4
10nF
X7R
C46
C47
100nF
100nF
X7R X7R X7R X7R
C48
100nF
CP4C
6 3
10nF
C29
100nF
CP6A
8 1
10nF
C35
100nF
CP4D
5 4
10nF
CP6B
7 2
10nF
C49
100nF
C30
100nF
CP2A
CP2B
8 1
7 2
10nF
10nF
CP6C
CP6D
6 3
5 4
10nF
10nF
2
+3.3V_BUS
D30
2.4V
2 1
CP2D
CP2C
5 4
6 3
10nF
10nF
C38
C39
10uf
10uf
PLACE DIRECTLY
UNDERNEATH CHANNEL
A & B SECTION OF ASIC.
+VDDQ_BUS+VDDQ_BUS
CP8A
CP8B
8 1
7 2
10nF
10nF
+VDDC
C23
10uf
At the corner of VDDC plane
CP8D
6 3
5 4
10nF
10nF
1
U1E
F27
VSS#F27
VSS#F7
VSS#G12
VSS#G16
VSS#G21
VSS#G24
VSS#G9
VSS#H12
VSS#H14
VSS#H16
VSS#H18
VSS#H21
VSS#H23
VSS#H27
VSS#H4
VSS#H8
VSS#H9
VSS#K1
VSS#K23
VSS#K24
VSS#K30
VSS#K7
VSS#K8
VSS#L4
VSS#M15
VSS#M16
VSS#M27
VSS#M30
VSS#M7
VSS#M8
VSS#N15
VSS#N16
VSS#N23
VSS#N24
VSS#P15
VSS#P16
VSS#P4
VSS#R12
VSS#R13
VSS#R14
VSS#R15
VSS#R16
VSS#R17
VSS#R18
VSS#R19
VSS#R23
VSS#R24
VSS#R27
VSS#R30
VSS#R7
VSS#R8
VSS#T1
VSS#T12
VSS#T13
VSS#T14
VSS#T15
VSS#T16
VSS#T17
VSS#T18
VSS#T19
VSS#W23
VSS#W24
VSS#W25
VSS#W26
VSS#W7
VSS#W8
VSS#Y4
RV280
Part 5 of 5
CORE GND
F7
G12
G16
G21
G24
G9
H12
H14
H16
H18
H21
H23
H27
H4
H8
H9
K1
K23
K24
K30
K7
K8
L4
M15
M16
M27
M30
M7
M8
N15
N16
N23
N24
P15
P16
P4
R12
R13
R14
R15
R16
R17
R18
R19
R23
R24
R27
R30
R7
R8
T1
T12
T13
T14
T15
T16
T17
T18
T19
W23
W24
W25
W26
W7
W8
Y4
VSS#U15
VSS#U16
VSS#U23
VSS#U4
VSS#U8
VSS#V15
VSS#A16
VSS#A2
VSS#A22
VSS#A29
VSS#AA27
VSS#AA30
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB4
VSS#AB7
VSS#AB8
VSS#AC12
VSS#AC14
VSS#AC16
VSS#AC18
VSS#AC27
VSS#AC4
VSS#AD12
VSS#AD16
VSS#AD18
VSS#AD25
VSS#AD30
VSS#AE26
VSS#AE28
VSS#AG11
VSS#AG16
VSS#AG18
VSS#AG21
VSS#AG5
VSS#AG7
VSS#AJ1
VSS#AJ30
VSS#AK2
VSS#AK29
VSS#B3
VSS#C1
VSS#C28
VSS#C30
VSS#C4
VSS#D12
VSS#D13
VSS#D15
VSS#D18
VSS#D21
VSS#D24
VSS#D25
VSS#D27
VSS#D5
VSS#D7
VSS#D9
VSS#E4
VSS#E6
VSS#V16
VSS#V27
VSS#V30
VSS#W15
VSS#W16
U15
U16
U23
U4
U8
V15
A10
VSS
A16
A2
A22
A29
AA27
AA30
AB1
AB23
AB24
AB4
AB7
AB8
AC12
AC14
AC16
AC18
AC27
AC4
AD12
AD16
AD18
AD25
AD30
AE26
AE28
AG11
AG16
AG18
AG21
AG5
AG7
AJ1
AJ30
AK2
AK29
B3
C1
C28
C30
C4
D12
D13
D15
D18
D21
D24
D25
D27
D5
D7
D9
E4
E6
V16
V27
V30
W15
W16
+AVDD
Pin Names
A A
5
Voltage
DAC1 VDD A2VSSQ
Usage
DAC1 Band Gap Ref.
Board power
AVDD sourced from VDDC_CT
and ground
thru bead at least 15 mil trace
option(s)
and not longer than 1.5 inch.
AVSSN and AVSSQ with single
via to GND close to the pin.
(80mA)
Matching
Ground
AVSSN
(Noisy)
AVSSQ
+A2VDD
2.5V1.8V
DAC2 VDD
(120mA)
(1) A2VDD regulated source
and A2VSSN return path routed
with at least 15 mil trace and
not longer than 1.5 inch.
AVSSN with single via to GND
at the regulator.
(2) Sourced from VDD thru bead
instead of the regulator
Matching
Ground
A2VSSN
(Noisy)
4
+A2VDDQ
1.8V
DAC2 Band Gap Ref.
Source from AVDD thru bead.
A2VSSQ with sigle via to GND
close to the pin.
Matching
Ground
(Quiet)
+AVDDDI
+A2VDDDI
1.8V
Digital Power for
DAC1 and DAC2
Source from VDDC_CT
thru bead
Matching
Ground
AVSSDI
A2VSSDI
(Digital)(Quiet)
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7N6
(905) 882-2600
Title
RV280 LP AGP8x 128MB 16Mx16 DDR
Size Document Number Rev
Custom
星期二, 八月
3
2
Date: Sheet of
12, 2003
105-A165XX-00B
1
4 14
1
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