Gigabyte GA-9IVDTH_R21_10B_1017 Schematics

1 頁, 1 Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2005/10/17 下午 01:25:53
Project Code S93007-0 Customer PL
Project Name GA-9IVDTH Revision Old N/A New 2.1
Model Name GA-9IVDTH IT Doc No DR05A125
P/N RD Doc No
PCB Rev. 2.1 Check Sum
R N M
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m
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gfedc gfedcb gfedc
A B C D E F
gfedcb
A B
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M/B GA-9IVDTH 2.1B NTT
P/N Description
FINISHED GOOD
Description GA-9IVDTH R2.1 schematic
Remark Approved By billy1.chen 2005/10/17 下午 04:59:21 Applicant peter.chen
Research Management
yuling.cheng 2005/10/17 下午 07:21:59
R
R
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I
I
Validation Manager 890622(何士弘 ) Project Manager 900456(葉昌慧)
h
h
c
c
r
r
a
a
e
e
e
s
s
e
2
2
0
0
Effected Class
a
a
M
M
/
/
5
5
0
0
1
1
n
n
0
0
a
a
/
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g
g
1
1
7
7
2005/10/17http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
5
4
NOCONA800/LINDENHURST-VS
3
2
1
D D
C C
B B
A A
GA-9IVDTH
1 TITLE 2 SYS BLOCK 3 SYS RESET 4 CLOCK BLOCK 5 SMBUS BLOCK 6 POWER DELIVERY 7 PCI routing & GPIO 8-10 P0 NOCONA 11-13 P1 NOCONA & ITP 14 Level Shift & CPU Detection 15 MCH/DDR CH A 16 MCH/DDR CH B 17 MCH/HI1.5/MISC 18 MCH/SYSBUS 19 MCH/PCIEXPRESS 20-21 MCH/PWR/GND/DECOUPING 22 PCI-E X8/CONNX8 SLOT1 23-25 MCH/DDR A DIMMX3 26 DDR Chanel A TERM/DECOUP 27-29 MCH/DDR B DIMMX3 30 DDR Chanel B TERM/DECOUP 31-32 CK409B 33 DB400 34 ICH-R_PCI&HI1.5&IDE&USB2.0 35 ICH-R_SATA&PCIX&GPIO&MISC 36 ICH-R_POWER&GND 37 IDE CONN/WOL/WOR 38 USB_2.0 CONNECTOR
39 PCI-X RISER SLOT 66MHZ 40 PCI-X 1.0 SLOT3 66MHZ 41 PCI-X 1.0 SLOT2 66MHZ/ZCR 42 SO-DIMM ZCR 43-46 AIC 7901 SCSI 47-49 PCI_32BIT/33MHZ SLOT4,5,6 50 G-LAN 82541GI LAN1 51 G-LAN 82541GI LAN2 52-54 ATI VGA/CONN/SDRAM 55 G-LOGIC/PSON/VIDGOOD 56 IPMI_CONNECTOR 57 FWH 58 SIO-IT8712/FLOPPY 59 PS2/COM/LPT 60 FAN CONTROL 61 LM93/LM75/83791 62 SMBUS SEGMENTS 63 POWER CONN 64 P0 VR 65 P1 VR 66 1.2V CPU VTT/3.3SB/1.5SB 67 1.5V/1.25V REGULATOR @13A 68 2.5V REGULATOR @38A 69 ID SW/HDD LED 70 FRONT-PANEL 71 HOLE
BOARD STACK-UP
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
COMPONENT SIDE
PP 2113
GND
FR4 1/1
INT 1(Layer 3)
PP 2116 PP 7628
(PWR)
FR4 2/2
(PWR)
PP 7628 PP 2116
INT 2(Layer 6) 1 OZ
FR4 1/1
GND
PP 2113
SOLDER SIDE
1.5 OZ
1 OZ
1 OZ
2 OZ
2 OZ
1 OZ
1.5 OZ
2.0 mil
3.7 mil
1.35 mil
3.7 mil
1.35 mil
4.1 mil
7.0 mil
2.7 mil
10.0 mil
2.7 mil
7.0 mil
4.1 mil
1.35 mil
3.7 mil
1.35 mil
3.7 mil
2.0 mil
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
COVER SHEET
GA-9IVDTH
1
173Monday, October 17, 2005
of
2.1
5
SCSI 68Pin
D D
Raptor
ZCR
4
EVRD 10.1
Intel Nocona Processor CPU 2
3
2
1
EVRD 10.1
CK409B CLOCK
Intel Nocona Processor CPU 1
Channel A
DB400 CLOCK
(SO-DIMM)
SCSI 1
PCI-E_1
System Bus(800MT/S)
6.4GB/s
DDR266/333 DIMM Module *3
U320 SCSI (7901)
C C
PCI EXPRESS X8 Slot
Intel
( 4GB/S)
PCI EXPRESS X8
Intel E7320
(Lindenhurst-VS)
MCH
1077 BGA
2.1GB/s up to 2.7GB/s
2.1GB/s up to 2.7GB/s
Channel B
DDR266/333 DIMM Module *3
82541GI
RJ45 LAN1
266MB/s
HUB INTERFACE 1.5
Front Header
USB2.0x1
Intel 82541GI
PCI X 64bit/66MHz Slot
RJ45 LAN2
B B
PCI-X_3 PCI-X_2
PCI X 64bit/66MHz Slot
ZCR
PCI X 64 Bit BUS
PCI 32 Bit BUS
SATAx2
133MB/s
150MB/s
Intel FWE6300ESB
(HANCE RAPIDS)
ICH
689 BGA
USB Bus
IDE Bus
100MB/s
ATA-100
480Mb/s
IDE Connector * 1
CPU0 FAN
Back Panel USB2.0X1
CPU1 FAN
H/M
ATI Rage XL
Intel
FWH
LPC
LPC
LPC
IPMI 1.5 MODULE
VGA
PCI 32bit/33MHz Slot
PCI_6
A A
PCI 32bit/33MHz Slot
PCI_5 PCI_4
PCI 32bit/33MHz Slot
8MB
BGA
Floppy Connector
SDRAM
VGA Connector
5
4
LPC
Interface
COM1
IT8712F
LPC Super I/O
128 PQFP
COM2
3
I2C Bus
H/M 83791D
KB & MS
Printer Port
2
LM93
SYS1
SYS2 FAN
SYS3 FAN
FAN
PWR FAN
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
BLOCK DIAGRAM
GA-9IVDTH
1
273Monday, October 17, 2005
of
2.1
5
SYS RESET & PWR SET
BTN
LEVEL
D D
LOGIC
DB400
FP
PWRDWN#
CK409B
CK409B_PWR_GD#
VID_PWRGD
C C
VIP_PWRGD CPU_PWR_GD
CPU_RST#
CPU0_THRMTRIP#
VIP_PWRGD CPU_PWR_GD
CPU_RST#
CPU1_THRMTRIP#
B B
Lindenhust-VS
CPU_RST#
PCIRST#
PWB+
P0
VTTEN
CPU0_BSEL[0/1] CPU1_BSEL[0/1]
VTTEN
P1
MCH
PWROK
CPU_VRD_PWR_GDPWRDWN#
FET
VTT LEVEL
R R
PWRBTN
IPMI_PWRBT_IN
SB_VTT_PWRGD
VTTEN
P3V3 LEVEL
P1_SKT0CC#
CPU_PWR_GD
75
37
IPMI CONN
1.2V
ISL6520
VTT_PWRGD
H-R
SYS RST#
4
PWRBTN
HR_PWRBNIN#
P0_SKT0CC#
R
R
DDR DIMM DDR DIMM DDR DIMM
CPU 0
75--72--71--76
71
76
SIO
72
36
7
DDR DIMM DDR DIMM
AB
DDR DIMM
H-R
3
SLP_S#3
2.5V
HIP6302CB
SLP_S#4
P5V_STBY
HUF76107
PWRGD_1_5VPWRGD_2_5V
1.5V
ISL6526
IPMI CONN
VTT_ENABLE
BSEL COMPARE LOGIC
CPU_VRD_PWR_GD
PCIRST1#
PCI_RST#
PWROK
DDRA_PCIRST#
CPU_VRD_PWR_GD
DDRB_PCIRST#
100ms
PX_PAPCIRST#
R
PCIRST#
SYS_PWR_GD#
PLD
BUFF
BUFF
BUFF
PLD
LOGIC
IDE_RSTDRV#
PCI_RST_BUFF1#
2
LOGIC
PS_PWR_GD#
CPU1_VRD_PWR_GD
SYS_PWR_GD_BUFF1#
IDE CONN IDE CONN
PS_PWR_GD
VR0_SYS_ENABLE
VR1_SYS_ENABLE
SYS_PWR_GD_BUFF1
PCIX_RST_SODIMM
PCIX_RST_SCSI
PCIX_RST_SLOT2#
PCIX_RST_SLOT3#
R
VGA_HV
P0 VCORE
P1 VCORE
PCI EX X8 CONN
PCI-X 66 CONN2 PCI-X 66 CONN3
IPMI CONN
1
PS_ON#
ATX CONN
ISL6556BCPU0_VRD_PWR_GD
ISL6556B
ZCR SODIMM
7902W
PCIX_RST_EMRL
ITP-XDP
PS_PWR_GD
ITP_RESET#
A A
BTN
FP
RST_SW
R
R
40 35
IPMI CONN
5
IPMI_RST_OUT#RST_IPMI#
4
BUFFER
PCIX_RST_SODIMM PCIX_RST_SCSI PCIX_RST_SLOT2# PCIX_RST_SLOT3# SLOT4_PCIRST# SLOT5_PCIRST# SLOT6_PCIRST# IPMI_PCIRST# MCH_PCIRST# GAL_PCIRST# VGA_PCIRST# LAN1_PCIRST# LAN2_PCIRST#
3
VGA_PCIRST#
LAN1_PCIRST#
LAN2_PCIRST#
SLOT4_PCIRST#
SLOT5_PCIRST#
SLOT6_PCIRST#
ATI
VIDEO
82541 LAN1 82541 LAN2
PCI- 32 CONN PCI- 32 CONN PCI- 32 CONN
2
Title
Size Document Number Rev
Date: Sheet
SIO
FWH
GIGA-BYTE TECHNOLOGY CO., LTD.
SYS RESET
GA-9IVDTH
1
373Monday, October 17, 2005
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2.1
5
4
3
2
1
CLOCK BLOCK DIAGRAM
D D
CK 409B CLOCK SYNTHESIZER DRIVER
C C
B B
14.318 CRYSTAL
P0_BCLK/#(200MHZ)
CPU0
P1_BCLK/#(200MHZ)
CPU1
MCH_BCLK/# (200MHZ)
CPU2
MCH_66MHZ_CLK 2
3V66_1
ITP_BCLK_P/N (200MHZ)
CPU3
ICH_PX66MHZ_CLK
3V66_0
ICH_HI66MHZ_CLK
3V66_2
ICH_USB_48MHZ_CLK
USB_48
ICH_33MHZ_CLK
PCIF0
ICH_14MHZ_CLK
REF0
SIO_48MHZ_CLK
DOT_48
SIO_33MHZ_CLK
PCI_F1
DB400_SRC_100MHZ_CLK_P/N
SRC
PCI_GAL_33MHZ_CLK
PCI 6
PCI 0
IPMI33_LPC_CLK
PCI 2
VIDEO_33MHZ_CLK
PCI 1
VIDEO_14MHZ_CLK
REF 1
FWH_33MHZ_CLK FWH
PCI 3
LAN1_33MHZ_CLK
PCI 4
LAN2_33MHZ_CLK
PCI 5
2
2
2
2
PCI_FB_33MHZ_CLK
SUS_CLK
BCLK(P/N-1/0)
CPU0
CPU1BCLK(P/N-1/0)
ITP_XDP
32.768KHZ CRYSTAL
ICH HANCE RAPIDS
SUS_CLK
SIO
PCI 32/33 (PCI 1)
GAL
SYS MGMT CONNECTOR
VIDEO (RAGE XL) 29.49MHZ
Intel 82541 LAN1
Intel 82541 LAN2
PLD
PCI 32/33 (PCI 2)
PCI 32/33 (PCI 3)
CRYSTAL
25MHZ CRYSTAL
25MHZ CRYSTAL
ICH_SRC_100MHZ_CLK_P/N
PX_PAPCLKO0
PCI_X SLOT #1(PXI-X_1)
PCI_X SLOT #2(PCI-X_2)
ZCR SO-DIMM
SCSI AIC7901
80MHZ OSC
PX_PAPCLKO3
PX_PAPCLKO1
PX_PAPCLKO2
DDRA_CMDCLK_A0_P/N DDRA_CMDCLK_A1_P/N DDRA_CMDCLK_A2_P/N 2
DDRB_CMDCLK_B0_P/N DDRB_CMDCLK_B1_P/N DDRB_CMDCLK_B2_P/N
LINDENHURST-VS
MCH_SRC_100MHZ_CLK_P/N
2
DIFF_OUT0
CLK_IN
DB400 (DIFFCLK SUFFER)
DIFF_OUT1
2
EXP_SLOT_100MHZ_CLK_P/N
PCI EXPRESS X8 SLOT(PCI-E_1)
2
DIFF_OUT2
2
2
2 2 2
DDR266/333 DIMM #A1
DDR266/333 DIMM #B1
DDR266/333 DIMM #A2
DDR266/333 DIMM #B2
DDR266/333 DIMM #A3
DDR266/333 DIMM #B3
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
CLOCK BLOCK
GA-9IVDTH
1
473Monday, October 17, 2005
of
2.1
5
Hance
D D
Rapids
SMB Address = 44h
ICH_SDA ICH_SCL
SE-LINK
P3V3_STBY
4
P3V3_STBY
ICH_SDA ICH_SCL
82541GI LAN1
R76, R140
82541GI LAN2
LAN_EMP_SDA LAN_EMP_SCL
IMPI GSMI 70P
R129, R135
IPMB_SDA IPMB_SCL
I2C_BUS0_SDA2 I2C_BUS0_SCL2
3
R470/X, R475/X
R1089/X, R1090/X
IPMB_SDA2 IPMB_SCL2
P3V3_STBY
R458, R459
R479/X,
R466, R473
R480/X
2
R428/X, R429/X
PCA9515
R488, R490
PCA9515
R469, R474
PCA9515
R457, R460
R1221, R1222
R1219/X, R1220/X
IPMB_FFC_SCL IPMB_FFC_SDA
FFC_SDA FFC_SCL
IPMB2_SDA IPMB2_SCL
IPMB1_SDA IPMB1_SCL
PWRDET
IPMB2
IPMB1
1
FFC1
P5V_STBY
P3V3_STBY
P3V3_STBY
IDEEPROM
PCA9545 Mutiplexer
SMB = E0h
C C
I2C_BUS0_SDA I2C_BUS0_SCL
I2C_BUS1_SDA I2C_BUS1_SCL
B B
I2C_BUS2_SDA I2C_BUS2_SCL
P3V3
P3V3
P3V3
R501, R521
R529, R536
SMB = A8h
I2C_BUS0_SDA I2C_BUS0_SCL
I2C_BUS1_SDA I2C_BUS1_SCL
MCH LINDENHURST-VS
SMB Address = 60h
I2C_BUS2_SDA I2C_BUS2_SCL
R531, R590
PCI-X Slot#3
R326/X, R334/X
DIMM B-1
SMB Address = A8h
DIMM A-1
SMB Address = A0h
PCI/32BIT#5
PCI-X Riser Slot#1
PCI-X Slot#2
R321/X, R327/X
DIMM B-2
SMB Address = AAh SMB Address = D2h
DIMM A-2
SMB Address = A2h
R1169/X, R1170/X
R607/X, R615/X
DIMM B-3
SMB Address = ACh
DIMM A-3
SMB Address = A4h SMB Address = DCh
LM93
SMB = 58h
CK-409B
DB400
W83791
SMB Address = 5Eh
R172/X, R178/X
PCI-E Slot#1
LM75 CPU
R1014 R167 R281 R862
LM75 DDR
SMB = 92hSMB = 9Ah SMB = 98h
P3V3_STBY
LM75 PCI
LM75 SCSI
SMB = 96h
I2C_BUS0_SDA2 I2C_BUS0_SCL2
PCI/32BIT#4PCI/32BIT#6
A A
P3V3
I2C_BUS3_SDA I2C_BUS3_SCL
5
R1132/X, R1133/X
R332/X, R346/X
I2C_BUS3_SDA I2C_BUS3_SCL
4
R323/X, R330/X
R324/X, R329/X
Title
Size Document Number Rev
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
SMBUS
GA-9IVDTH
1
573Monday, October 17, 2005
of
2.1
5
4
3
2
1
D D
ERP12V
P12V_CPU_0
P12V_CPU_1
ISL6556B
120A
HIP6601B X4
ISL6556B HIP6601B
120A
X4
P_VCCP0
P_VCCP1
CPU0
CORE/1.2
CPU1
CORE/1.2
MCH
1.2V
2.5V
1.5V
DDR
2.5V
1.25V
ATX CONN
HIP6602
P12V
HIP6302
39A
LM358+
C C
ISL9N306
6A
ISL6520A
P2V5
P_VTT P1V25_VTT
ICH
1.2V
1.5V
831mA
2.5mA
3.3V
1.5VSBY
75mA
528mA
142mA
3.3VSBY
6.2A
ISL6525
P1V5
13A
P5V
B B
P3V3
APL1084
3A
P2V5_VIDEO
RC1117
800mA
VIDEO
P1V5_STBY
P5VSB
N12V
HUF76107
P5V_STBY
APL1084
3A
P3V3_STBY
SC1565IS
1.5A
SC1565IS
1.5A
P1V8 P1V2
P1V8 P1V2
320mA 400mA
320mA 400mA
82541GI GIGA LAN
82541GI GIGA LAN
46mA
46mA
PCI CONN
A A
LT1963EQ
1.5A
GD75232
APL1084
P3V3 P1V8_SCSI P2V5_SCSIA
3A
PCI-X CONN
5
4
3
360mA 780mA 350mA
SCSI
3.3/2.5/1.8
2
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
PWR DELIVERY
GA-9IVDTH
1
673Monday, October 17, 2005
of
2.1
5
Hance Rapids
GPIO
GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5
D D
GPIO 6 GPIO 7 GPIO 8 GPIO 9 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23
C C
GPIO 24 GPIO 25 GPIO 26 GPIO 27 GPIO 28 GPIO 29 GPIO 30 GPIO 31 GPIO 32 GPIO 33 GPIO 34 GPIO 35 GPIO 36 GPIO 37 GPIO 38 GPIO 39 GPIO 40 GPIO 41 GPIO 42
B B
GPIO 43 GPIO 44 GPIO 55 GPIO 56 GPIO 57
1. GIPO[0:7], GPIO[16:21, 23], and GPIO[32:55] are in the core well.
2. GPIO[8:15] and GPIO[24:31] are in the suspend well.
3. Core-well GPIO are 5V tolerant, except for GPIO[32:43].
4. Resume-well GPIO are not 5V tolerant.
5. GPIO[56:57] pads are in the suspend well, the register bits are in the RTC well.
A A
I I I I I I I I I
I I I
O O O O O O
O I/O I/O
I/ I/
I/O
I
I PU
I PU
I/O
I/O I/O I/O I/O
I/O
OD OD
O O
OI/
R
PWR WELL
PU
8.2K
P3V3 P3V3
8.2K
PU PX_REQ3-
8.2K
PU PU PU PU
PU PU
PU PU PU
N/A N/A N/A N/A PU PU
PU 8.2K N/A N/A
PU PU
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
4.7K
4.7K
P3V3 P3V3 P3V3 P3V3 P3V38.2KPU P3V3
P3V3_STBY
P3V3_STBY P3V3_STBY P3V3_STBY
P3V3 P3V3
P3V3 P3V3
P3V3
P3V3_STBY P3V3_STBY
P3V3_STBY4.7K P3V3_STBY
PX_REQ2-
P_ IRQE­P_ IRQF­P_ IRQG­P_ IRQH­IPMI_FP_SMI# MCH_PME# WAKE# FROM PCI-E CONN
RESERVED
PCI_PERR_SMI# SLP_BTN# SIO_PME#
RESERVED
PX_GNT2­PX_GNT3-
ICH_SCSIDIS# FWH_WP#
R E S E R V E D
I2C_MUX_RST#
R E S E R V E D
LAN_DISABLE1# DISABLE LAN 1
PCI-X CONN PCI-X CONN PCI32 CONN PCI32 CONN PCI32 CONN8.2K PCI32 CONN
SMI EVENT FROM IPMI or NMI EVENT from FP.
PME EVENT FROM MCH PCI-E PORT
FROM FRONT PANEL Power Management Event from SIO
DISABLE SCSI PORT BIOS WRITE PROTECT
RST 9545 I2C BUS
DISABLE LAN 2LAN_DISABLE2# EnableNormal
RESERVED
N/A PU PU
N/A PD 33K
PU/D 8.2K
N/A
PU 10K
P3V3 P3V3I
8.2K
8.2K
P3V3
8.2K
P3V3
8.2K
P3V3 P3V3 P3V3 P3V3
33KPD
P3V3 P3V3 P3V3 P3V3
P3V3_STBY/RTC P3V3_STBY/RTC
10KPU Table2
PX_IRQ0­PX_IRQ1­PX_IRQ2­PX_IRQ3-
S66DET P66DET
DPMB_SET1PU/D 8.2K
PERR_SMI_RST#
RESERVED
MEM FREQ_SEL0 MEM FREQ_SEL1
PCI-X CONN PCI-X CONN PCI-X CONN PCI-X CONN
DETECT SECANDERY IDE CABLE DETECT PRIMERY IDE CABLE DP MB ID SETTINGDPMB_SET0 DP MB ID SETTING DP MB ID SETTING8.2KPU/D DPMB_SET2 Table1 Table1
ISSUE RESET WHEN PERR SMI EVENT OCCURS.
AUTO MEM DET 266/333 AUTO MEM DET 266/333
4
FUNCTION
SMI EVENT FROM EXT-LOGIC PERR DECTION
PIN DEFINE
Hi(1)
Normal Normal
Normal Normal H/L Normal
Disable Disable
Normal
Normal
33 33 Table1 Table1 Table1 Table1
Table2 Table2
Table1
HTC/270GA GBT/CH1 GBT/CH2
HTC/50DP HTC/110DP
HTC/70/130DP
GBT/CH3
Table2
GPO[57:56] 167/667 200/800
Lo(0)
Enable Enable
Enable Enable Enable
Enable Enable
Enable
Enable
66/100 66/100
Table2
GPI40M/B model
0 0 0 0 1 1 1 1
DDR266 00
3
Normal/ACT (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
H/L H/L H/LNormal Enable
H/L
H/L
(DEFAULT) (DEFAULT)
H/L H/L
H/L
H/L H/L
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
By cable By cable
GPI41
GPI42
01 1 11 0 0 1 1
DDR333 01 1100
2
SIO
GPIO
GPIO 10 GPIO 35 MAIN SIO_BEEP GPIO 40 GPIO 42 GPIO 43 GPIO 44 GPIO 45
GPIO 52 MSEN0 H/L GPIO 53 GPIO 54 STBY
NOTE:
PWR FUNCTION NOMAL/ACT
STBY H/L
STBY STBY STBY STBY STBY
MAIN
STBY
N/A
O O O
PWRLED
O
SIO_PSON# PWR ON FROM SIO
I H/L
PWRBTN
O PWR BTOUT TO ICH
HR_PWRBNIN# SLP_S#3
I
N/A
O O H/L
SIO_PME#
SIO SPEAKER ACT PWR ON H/L
PWR BTIN FROM FP & IPMI
INDECATE S3 MODE FROM ICHI
Power Management Event to ICH
GPIO(10/40/41/42/43/44/45/46/53/54/55) POWER BY STBY
1
H/L
H/L
H/L H/L H/LGPIO 46 STBY SIO_BMC_RST# RST IPMI FROM SIOO
H/L
LM93
GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5 GPIO 6
Memory Mapping Table
STBY STBY STBY STBY STBY STBY STBY STBY
Location CMDCLK Mapping
DDR-A1
CH.A
CH.B
DDR-A2 DDR-A3
DDR-B2 DDR-B3
CPU0_FAN_TACH
I
CPU1_FAN_TACH
I O
HW_CPU0_SMI#
O
HW_CPU1_SMI#
I
CPU0_THERMTRIP#
I
CPU1_THERMTRIP#
I
CPU0_IERR#
IGPIO 7
CPU1_IERR#
SMB Addr.
0XA0 0XA2 0XA4
0XA8 0XAA 0XAC
DETECT CPU0 FAN SPEED NON DETECT CPU1 FAN SPEED SMI EVENT FROM LM93HW SMI EVENT FROM LM93HW MONITOR CPU0_THERMTRIP# MONITOR CPU1_THERMTRIP# DETECT CPU0_IERR# DETECT CPU1_IERR#
DDRA_CMDCLK_A0 DDRA_CMDCLK_A2 DDRA_CMDCLK_A1
DDRA_CMDCLK_B2 DDRA_CMDCLK_B1
CS# Mapping
CS#0,CS#1 CS#2,CS#3 CS#4,CS#5
CS#0,CS#1DDR-B1 CS#2,CS#3 CS#4,CS#5
CKE
(Non SHARE)
MEM_CKE0 MEM_CKE2 MEM_CKE4
MEM_CKE1 MEM_CKE3 MEM_CKE5DDRA_CMDCLK_B0
NON H/L H/L H/L H/L H/L H/L
NOMAL/ACTGPIO PWR FUNCTION
PCI ROUTING LIST
PCI ROUNTING
PCIX SLOT2
PCIX SLOT3
ZCR SO-DIMM SCSI
00
7901
0
PCI SLOT4 PCI_SLOT3_33MHZ_CLK
0
PCI SLOT5
1 0
PCI SLOT6
1
KEINEAI32 82541EI LAN1
KEINEAI32 82541EI LAN2
VGA
PIRQ-
PX_PAIRQ#0/1/2/3
PX_PAIRQ#1/0/2/3 PX_PAAD18 PX_PAPCLKO0PX_PAREQ#1/PX_PAGNT#1
PX_PAIRQ#2
PX_PAIRQ#2/3
PCI_PIRQ#E/F/G/H
PCI_PIRQ#H/E/F/G
PCI_PIRQ#G/H/E/F
PCI_PIRQ#A
PCI_PIRQ#B PCI_REQ#2/PCI_GNT#2
PCI_PIRQ#C
REQ-/GNT-
PX_PAREQ#0/PX_PAGNT#0
PX_PAREQ#3/PX_PAGNT#3 PX_PAAD20 PX_PAPCLKO3
PCI_REQ#0_1/PCI_GNT#0_1
PCI_REQ#0_2/PCI_GNT#0_2
PCI_REQ#0_3/PCI_GNT#0_3
PCI_REQ#1/PCI_GNT#1
PCI_REQ#3/PCI_GNT#3
IDSEL-
PX_PAAD17
CLOCK
PX_PAPCLKO1
PX_PAAD19PX_PAREQ#2/PX_PAGNT#2 PX_PAPCLKO2
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_SLOT2_33MHZ_CLK
PCI_SLOT1_33MHZ_CLK
LAN2_33MHZ_CLK
LAN1_33MHZ_CLK
VIDEO_33MHZ_CLK
(DEFAULT) (DEFAULT) (DEFAULT)
(DEFAULT)
(DEFAULT) (DEFAULT)
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
PCI ROUTING
GA-9IVDTH
1
773Monday, October 17, 2005
2.1
of
5
4
3
2
1
END PROCESSOR 0
SB_BPRI#(11,18)
SB_CPU0_BREQ#23(9)
SB_BREQ#1(9,11,18) SB_BREQ#0(9,11,18)
SB_CPURST#(9,11,13,14,18)
D D
C C
P_VCCP_A_CPU0
AGND_CPU0
P_VTT
B B
775mV
P_VTT
775mV
A A
SB_RS#[0..2](11,18)
SB_RSP#(11,18)
SB_CPU_A20M#(9,11,35)
SB_CPU_IGNNE#(9,11,35)
SB_CPU_INIT#(9,11,35,57)
SB_CPU_NMI(9,11,14) SB_CPU_INTR(9,11,35) CPU_PWR_GD(9,11,13,35) SB_CPU0_SMI#(9,14) SB_CPU_SLP#(9,11,35)
SB_CPU_STPCLK#(9,11)
P0_BCLK#(31) P0_BCLK(31)
ITP_TCK0(11,13) ITP_TDI_MAIN(13) ITP_TMS_MAIN(11,13)
ITP_TRST#(11,13,17) SB_CPU0_BSEL1(9,55)
SB_CPU0_BSEL0(9,55)
STP74 STP76 STP77 STP93 STP72 STP71 STP86 STP85 STP91 STP89 STP87 STP73 STP88 STP79
VID_CPU0_R[0..5](61,64)
VR0_VCCSENSE(64)
VTTEN(9,11,55)
VR0_VSSSENSE(64)
SR52
49.9/6/1
1 2
VREF_P_VTT_CPU0_3_R VREF_P_VTT_CPU0_3
12
SC446
SR48
1U/6/X5R/16V
90.9/6/1
1 2
R737
49.9/6/1
VREF_P_VTT_CPU0_0_R
1 2
12
C555
R736
1U/6/X5R/16V
90.9/6/1
1 2
5
SB_BPRI#
SB_CPU0_BREQ#23
SB_BREQ#1 SB_BREQ#0 SB_CPURST#
SB_RS#2 SB_RS#1 SB_RS#0
SB_RSP#
SB_CPU_A20M# SB_CPU_IGNNE# SB_CPU_INIT# SB_CPU_NMI SB_CPU_INTR
CPU_PWR_GD
SB_CPU0_SMI# SB_CPU_SLP#
SB_CPU_STPCLK#
P0_BCLK# P0_BCLK ITP_TCK0 ITP_TDI_MAIN ITP_TMS_MAIN ITP_TRST#
SB_CPU0_BSEL1 SB_CPU0_BSEL0
VID_CPU0_R5 VID_CPU0_R4 VID_CPU0_R3 VID_CPU0_R2 VID_CPU0_R1 VID_CPU0_R0
VR0_VCCSENSE
VTTEN
VR0_VSSSENSE
SR47
12
0/6
SC404
220P/6/X7R/50V
R776
12
0/6
SC356
220P/6/X7R/50V
12
12
U65A
D23
BPRI#
D10
NOCONA 800
BR3#
E11
BR2#
F12
BR1#
D20
BR0#
Y8
RESET#
F21
RS2#
D22
RS1#
E21
RS0#
C6
RSP#
F27
A20M#
C26
IGNNE#
D6
INIT#
G23
LINT1_NMI
B24
LINT0_INTR
AB7
PWRGOOD
C27
SMI#
AE6
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
E24
TCK
C24
TDI
A25
TMS
F24
TRST#
AB3
BSEL1
AA3
BSEL0
AE29
RESERVED1
AE28
RESERVED0
AE30
RSVD16
Y3
RSVD15
AD29
RSVD14
AD28
RSVD13
AC29
RSVD12
AB29
RSVD10
AB28
RSVD9
AA29
RSVD8
AA28
RSVD7
AE15
RSVD3
AC1
RSVD2
AE16
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
AD4
VCCIOPLL
B27
VCC_SENSE
E1
VTTEN
AB4
VCCA
AA5
VSSA
D26 C1
VSS_SENSE OPTIMIZED_COMPAT#
NOCONA_800-mPGA604
THERMTRIP#
PROCHOT#
THERMDC THERMDA
BOOT_SELECT
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
WIDE 10-12 MILS
12
SC405 220P/6/X7R/50V
WIDE 10-12 MILS
VREF_P_VTT_CPU0_0
12
SC350 220P/6/X7R/50V
ADS#
BINIT#
BNR# BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM# TRDY# LOCK#
MCERR#
IERR# FERR#
TDO
GTLREF3 GTLREF2 GTLREF1 GTLREF0
ODTEN
SKTOCC#
COMP3 COMP2 COMP1 COMP0
TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
SMB_PRT
VCCPLL
RSVD
P_VTT
4
P1V5
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU0_BPM#5
E4
CPU0_BPM#4
E8
CPU0_BPM#3
F5
CPU0_BPM#2
E7
CPU0_BPM#1
F8
CPU0_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU0_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU0_THERMTRIP#
F26
SB_CPU0_PROCHOT#
B25
ITP_TDO_P0
E25 F9
F23 W9 W23
PD_ODTEN_CPU0
B5
SMC_CPU0_SKTOCC#
A3
PD_COMP3_CPU0
AC28
PD_COMP2_CPU0
D25
PD_COMP1_CPU0
E16
PD_COMP0_CPU0
AD16
PU_CPU0_8
Y29
PU_CPU0_0
A26
PU_CPU0_5
AE5
PU_CPU0_6
AD5
PU_CPU0_1
AA7
PU_CPU0_7
Y6
PU_CPU0_3
W8
PU_CPU0_2
W7
PU_CPU0_4
W6 AE4
AD1
CPU0_THERMDC
Y28
CPU0_THERMDA
Y27
PU_BOOT_SELECT_CPU0
G7 W3
VID_PWRGD
B1
SB_CPU0_CPU1_TESTBUS
A16
SB_CPU0_FORCEPR#
A15
SLEW_CTRL_CPU0
AC30
CPU0_OPTIM_COMPAT_CTRL
COMP3 =SB_CPU0_ADDR_ERC COMP2 =SB_CPU0_DATA_ERC PU_CPU0_8=SB_CPU0_EDRDY PU_CPU0_0=SB_CPU0_SNPD#
100mA
L15
10UH/100mA/1206 L14
10UH/100mA/1206
SR36
12
0/6/X
SEC2
+
470U/4V/7343/X
STP80
STP97
SB_ADS# (11,18) SB_BINIT# (9,11,18) SB_BNR# (9,11,18)
CPU0_BPM#[0..5] (13) SB_DBSY# (11,18)
SB_DEFER# (11,18)
SB_DRDY# (11,18) SB_HIT# (9,11,18) SB_HITM# (9,11,18)
SB_TRDY# (11,18)
SB_LOCK# (11,18) SB_MCERR# (9,11,18)
SB_CPU0_IERR# (9,14) SB_CPU_FERR# (9,11,35) SB_CPU0_THERMTRIP# (9,14) SB_CPU0_PROCHOT# (9,14) ITP_TDO_P0 (13)
PD_ODTEN_CPU0 (9) SMC_CPU0_SKTOCC# (9,56,63)
PD_COMP3_CPU0 (9) PD_COMP2_CPU0 (9) PD_COMP1_CPU0 (9) PD_COMP0_CPU0 (9)
PU_CPU0_8 (9) PU_CPU0_0 (9) PU_CPU0_5 (9) PU_CPU0_6 (9) PU_CPU0_1 (9) PU_CPU0_7 (9) PU_CPU0_3 (9) PU_CPU0_2 (9) PU_CPU0_4 (9)
CPU0_THERMDC (10) CPU0_THERMDA (10) PU_BOOT_SELECT_CPU0 (9)
VID_PWRGD (11,55) SB_CPU0_CPU1_TESTBUS (9,11) SB_CPU0_FORCEPR# (9,14)
SLEW_CTRL_CPU0 (9) CPU0_OPTIM_COMPAT_CTRL (9)
WIDE 10-12 MILS
P_VCCP_A_CPU0
12
C566
22U/1206/X5R/6.3V
AGND_CPU0
WIDE 10-12 MILS
PU_VCCPLL_CPU0
12
12
SC342
0.1U/6/X7R/25V/X
SC339
4.7u/1206/X/16V/X
Change on V0.3
SC332
22U/1206/X5R/6.3V
NO USE
12
SC345
0.1U/6/X7R/25V/X
3
SB_D#[0..63](11,18)
VREF_P_VTT_CPU0_3 VREF_P_VTT_CPU0_0
PU_VCCPLL_CPU0
12
SC431
22U/1206/X5R/6.3V
P_VTT
12
SB_D#63 SB_D#62 SB_D#61 SB_D#60 SB_D#59 SB_D#58 SB_D#57 SB_D#56 SB_D#55 SB_D#54 SB_D#53 SB_D#52 SB_D#51 SB_D#50 SB_D#49 SB_D#48 SB_D#47 SB_D#46 SB_D#45 SB_D#44 SB_D#43 SB_D#42 SB_D#41 SB_D#40 SB_D#39 SB_D#38 SB_D#37 SB_D#36 SB_D#35 SB_D#34 SB_D#33 SB_D#32 SB_D#31 SB_D#30 SB_D#29 SB_D#28 SB_D#27 SB_D#26 SB_D#25 SB_D#24 SB_D#23 SB_D#22 SB_D#21 SB_D#20 SB_D#19 SB_D#18 SB_D#17 SB_D#16 SB_D#15 SB_D#14 SB_D#13 SB_D#12 SB_D#11 SB_D#10 SB_D#9 SB_D#8 SB_D#7 SB_D#6 SB_D#5 SB_D#4 SB_D#3 SB_D#2 SB_D#1 SB_D#0
SC340 1U/6/X5R/16V
12
0.1U/6/X7R/16V
12
SC427
U65B
AB6
D63
Y9
NOCONA 800
D62
AA8
D61
AC5
D60
AC6
D59
AE7
D58
AD7
D57
AC8
D56
AB10
D55
AA10
D54
AA11
D53
AB13
D52
AB12
D51
AC14
D50
AA14
D49
AA13
D48
AC9
D47
AD8
D46
AD10
D45
AE9
D44
AC11
D43
AE10
D42
AC12
D41
AD11
D40
AD14
D39
AD13
D38
AB15
D37
AD18
D36
AE13
D35
AC17
D34
AA16
D33
AB16
D32
AB17
D31
AD19
D30
AD21
D29
AE20
D28
AE22
D27
AC21
D26
AC20
D25
AA18
D24
AC23
D23
AE23
D22
AD24
D21
AC24
D20
AE25
D19
AD25
D18
AC26
D17
AE26
D16
AA19
D15
AB19
D14
AB22
D13
AB20
D12
AA21
D11
AA22
D10
AB23
D9
AB25
D8
AB26
D7
AA24
D6
Y23
D5
AD27
D4
AA25
D3
Y24
D2
AA27
D1
Y26
D0
NOCONA_800-mPGA604
EC37
+
PSA2.5VB820MH11/8X11.5
SB_HA#35
C8
BREQ4# BREQ3# BREQ2# BREQ1# BREQ0#
DBI3# DBI2# DBI1# DBI0#
DP3# DP2# DP1# DP0#
AP1# AP0#
ADSTB1# ADSTB0#
DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A9 A8 A7 A6 A5 A4 A3
C9 A7 A6 B7 C11 D12 E13 B8 A9 D13 E14 C12 B11 B10 A10 F15 D15 D16 C14 C15 A12 B13 B14 B16 A13 D17 C17 A19 C18 B18 A20 A22
B22 C20 C21 B21 B19
AB9 AE12 AD22 AC27
AE17 AC15 AE19 AC18
D9 E10
F14 F17
Y11 Y14 Y17 Y20 Y12 Y15 Y18 Y21
SB_HA#34 SB_HA#33 SB_HA#32 SB_HA#31 SB_HA#30 SB_HA#29 SB_HA#28 SB_HA#27 SB_HA#26 SB_HA#25 SB_HA#24 SB_HA#23 SB_HA#22 SB_HA#21 SB_HA#20 SB_HA#19 SB_HA#18 SB_HA#17 SB_HA#16 SB_HA#15 SB_HA#14 SB_HA#13 SB_HA#12 SB_HA#11 SB_HA#10 SB_HA#9 SB_HA#8 SB_HA#7 SB_HA#6 SB_HA#5 SB_HA#4 SB_HA#3
SB_REQ#4 SB_REQ#3 SB_REQ#2 SB_REQ#1 SB_REQ#0
SB_DBI#3 SB_DBI#2 SB_DBI#1 SB_DBI#0
SB_DP#3 SB_DP#2 SB_DP#1 SB_DP#0
SB_AP#1 SB_AP#0
SB_ADSTB#1 SB_ADSTB#0
SB_DSTBP#3 SB_DSTBP#2 SB_DSTBP#1 SB_DSTBP#0 SB_DSTBN#3 SB_DSTBN#2 SB_DSTBN#1 SB_DSTBN#0
Trace Width:12 Mils
VREF_P_VTT_CPU0_0 VREF_P_VTT_CPU0_3 VCCIOPLL_CPU0 AGND_CPU0 PU_VCCPLL_CPU0
Title
Size Document Number Rev
2
Date: Sheet
SB_HA#[3..35] (11,18)
SB_REQ#[0..4] (11,18)
SB_DBI#[0..3] (11,18)
SB_DP#[0..3] (11,18)
SB_AP#[0..1] (11,18)
SB_ADSTB#[0..1] (11,18)
SB_DSTBP#[0..3] (11,18)
SB_DSTBN#[0..3] (11,18)
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA P0
GA-9IVDTH
1
873Monday, October 17, 2005
of
2.1
5
4
3
2
1
P_VTT
R939 220/6
R940 220/6
R948 220/6
D D
R944 220/6
R780 220/6
R953 220/6
R957 220/6
R943 220/6
R721 51/6
R949 51/6
R719 51/6
C C
R717 51/6
R922 51/6
R921 51/6
SR40 39/6
SR49 39/6
SR51 39/6
SR50 39/6
B B
SR39 39/6
SB_CPU_A20M#
12
SB_CPU_IGNNE#
12
SB_CPU_INIT#
12
SB_CPU_INTR
12
SB_CPU_SLP#
12
SB_CPU_STPCLK#
12
SB_CPU_NMI
12
SB_CPU0_SMI#
12
SB_CPU0_FORCEPR#
12
SB_CPU0_IERR#
12
SB_CPU0_PROCHOT#
12
SB_CPU0_THERMTRIP#
12
SB_CPU1_THERMTRIP#
12
SB_CPU_FERR#
12
SB_BININ#_R SB_BINIT#
12
SB_BNR#_R
12
SB_HIT#_R
12
SB_HITM#_R
12
SB_MCERR#_R SB_MCERR#
12
SB_CPU0_SMI# (8,14)
SB_CPU0_FORCEPR# (8,14)
SB_CPU0_IERR# (8,14)
SB_CPU0_PROCHOT# (8,14)
SC410
1 2
47P/6/N/50V
SC425
1 2
47P/6/N/50V
SC426
1 2
47P/6/N/50V
SC423
1 2
47P/6/N/50V
SC407
1 2
47P/6/N/50V
SB_BNR#
SB_HIT#
SB_HITM#
SB_CPU_A20M# (8,11,35)
SB_CPU_IGNNE# (8,11,35)
SB_CPU_INIT# (8,11,35,57)
SB_CPU_INTR (8,11,35)
SB_CPU_SLP# (8,11,35)
SB_CPU_STPCLK# (8,11)
SB_CPU_NMI (8,11,14)
SB_CPU0_THERMTRIP# (8,14)
SB_CPU1_THERMTRIP# (11,14)
SB_CPU_FERR# (8,11,35)
SB_BINIT# (8,11,18)
SB_BNR# (8,11,18)
SB_HIT# (8,11,18)
SB_HITM# (8,11,18)
SB_MCERR# (8,11,18)
P3V3
R955
4.7K/6
VTTEN
12
VTTEN (8,11,55)
P_VTT
P_VTT
P_VTT
SB_CPU_STPCLK#(8,11)
R947 51/6/X
R954 51/6/X
SR46 51/6
SR44 51/6
PU_BOOT_SELECT_CPU0
12
CPU0_OPTIM_COMPAT_CTRL
12
12
12
12
SR43 51/6 R738 510/6
R772 510/6
12
12
R959 100/6/1
R733 100/6/1
SR45 49.9/6/1
R771 49.9/6/1
R950 51/6
R929 51/6
R946
12
12
12
12
12
51/6
SB_BREQ#0
SB_BREQ#1
SB_CPU0_BREQ#23
SB_CPU0_BSEL1
SB_CPU0_BSEL0
PD_COMP2_CPU0
12
PD_COMP3_CPU0
12
PD_COMP1_CPU0
PD_COMP0_CPU0
PD_ODTEN_CPU0
PD_ODTEN_CPU1
SB_CPU0_CPU1_TESTBUS
R945 0/6/X
12
R952
0/6
PU_BOOT_SELECT_CPU0 (8)
CPU0_OPTIM_COMPAT_CTRL (8)
SB_BREQ#0 (8,11,18)
SB_BREQ#1 (8,11,18)
SB_CPU0_BREQ#23 (8)
SB_CPU0_BSEL1 (8,55)
SB_CPU0_BSEL0 (8,55)
PD_COMP2_CPU0 (8)
PD_COMP3_CPU0 (8)
PD_COMP1_CPU0 (8)
PD_COMP0_CPU0 (8)
PD_ODTEN_CPU0 (8)
PD_ODTEN_CPU1 (11)
SB_CPU0_CPU1_TESTBUS (8,11)
12
ICH_CPU_STPCLK# (35)
together
P_VTT
R779 300/6
R778 51/6
1 2
R762 51/6/X
R732 51/6/X
R767 51/6/X
R763 0/6
P3V3_STBY
P_VTT
R731 51/6/X R700 51/6/X
R690 51/6
R683 51/6 R724 51/6 R713 51/6 R710 51/6 R696 51/6 R704 51/6
CPU_PWR_GD
12
CLOSE TO CPU0
SB_CPURST#
12
12
12
12
R951
12
SMC_CPU0_SKTOCC#
4.7K/6
END CPU NOT USE
PU_CPU0_8
12
PU_CPU0_7
12
PU_CPU0_6
12
PU_CPU0_5
12
PU_CPU0_4
12
PU_CPU0_3
12
PU_CPU0_2
12
PU_CPU0_1
12
PU_CPU0_0
12
CPU_PWR_GD
CPU_PWR_GD (8,11,13,35)
SB_CPURST# (8,11,13,14,18)
SLEW_CTRL_CPU0
SLEW_CTRL_CPU1
12
C554 100P/6/N/50V/X
SLEW_CTRL_CPU0 (8)
SLEW_CTRL_CPU1 (11)
SMC_CPU0_SKTOCC# (8,56,63)
PU_CPU0_8 (8) PU_CPU0_0 (8) PU_CPU0_6 (8) PU_CPU0_5 (8) PU_CPU0_4 (8) PU_CPU0_3 (8) PU_CPU0_2 (8) PU_CPU0_1 (8) PU_CPU0_7 (8)
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P0 TERMINATION
GA-9IVDTH
1
of
973Monday, October 17, 2005
2.1
5
U65C
L31
VSS9
L29
NOCONA 800
VSS10
L27
VSS11
L25
VSS12
L23
VSS13
L9
VSS14
L7
VSS15
L5
VSS16
L3
VSS17
L1
VSS18
D D
C C
B B
K30
VSS19
K28
VSS20
K26
VSS21
K24
VSS22
K8
VSS23
K6
VSS24
K4
VSS25
K2
VSS26
J31
VSS27
J29
VSS28
J27
VSS29
J25
VSS30
J23
VSS31
J9
VSS32
J7
VSS33
J5
VSS34
J3
VSS35
J1
VSS36
H30
VSS37
H28
VSS38
H26
VSS39
H24
VSS40
H8
VSS41
H6
VSS42
H4
VSS43
H2
VSS44
G31
VSS45
G29
VSS46
G27
VSS47
G25
VSS48
G9
VSS49
G5
VSS51
G3
VSS52
G1
VSS53
F30
VSS54
F28
VSS55
F25
VSS56
F19
VSS57
F13
VSS58
F7
VSS59
F2
VSS60
E31
VSS61
E29
VSS62
E23
VSS63
E17
VSS64
E15
VSS65
E9
VSS66
D30
VSS68
D28
VSS69
D27
VSS70
D21
VSS71
D11
VSS72
D5
VSS73
D2
VSS74
C31
VSS75
C29
VSS76
C25
VSS77
C19
VSS78
C13
VSS79
C7
VSS80
B30
VSS82
B28
VSS83
B23
VSS84
B17
VSS85
B15
VSS86
B9
VSS87
B2
VSS88
A31
VSS89
A29
VSS90
A27
VSS91
A21
VSS92
A11
VSS93
A5
VSS94
NOCONA_800-mPGA604
VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189
VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
AA30 AA23 AA17 AA15 AA9 AA2 Y31 Y25 Y19 Y13 Y7 Y5 Y1 W30 W28 W26 W24 W4 W2 V31 V29 V27 V25 V23 V9 V7 V5 V3 V1 U30 U28 U26 U24 U8 U6 U4 U2 T31 T29 T27 T25 T23 T9 T7 T5 T3 T1 R30 R28 R26 R24 R8 R6 R4 R2 P31 P29 P27 P25 P23 P9 P7 P5 P3 P1 N30 N28 N26 N24 N8 N6 N4 N2 M2 M4 M6 M8 M24 M26 M28 M30
4
U65D
L30
VCC_CORE1
L26
VCC_CORE2
L24
VCC_CORE3
L8
VCC_CORE4
L6
VCC_CORE5
L4
VCC_CORE6
L2
VCC_CORE7
K31
VCC_CORE8
K29
VCC_CORE9
K27
VCC_CORE10
K25
VCC_CORE11
K23
VCC_CORE12
K9
VCC_CORE13
K7
VCC_CORE14
K5
VCC_CORE15
K3
VCC_CORE16
K1
VCC_CORE17
J30
VCC_CORE18
J28
VCC_CORE19
J26
VCC_CORE20
J24
VCC_CORE21
J8
VCC_CORE22
J6
VCC_CORE23
J4
VCC_CORE24
J2
VCC_CORE25
H31
VCC_CORE26
H29
VCC_CORE27
H27
VCC_CORE28
H25
VCC_CORE29
H23
VCC_CORE30
H9
VCC_CORE31
H7
VCC_CORE32
H5
VCC_CORE33
H3
VCC_CORE34
H1
VCC_CORE35
G30
VCC_CORE36
G28
VCC_CORE37
G26
VCC_CORE38
G24
VCC_CORE39
G8
VCC_CORE40
G6
VCC_CORE41
G4
VCC_CORE42
G2
VCC_CORE43
F31
VCC_CORE44
F29
VCC_CORE45
F22
VCC_CORE46
F16
VCC_CORE47
F4
VCC_CORE48
F1
VCC_CORE49
E30
VCC_CORE50
E28
VCC_CORE51
E26
VCC_CORE52
E20
VCC_CORE53
E6
VCC_CORE54
E2
VCC_CORE55
D31
VCC_CORE56
D29
VCC_CORE57
D24
VCC_CORE58
D18
VCC_CORE59
D14
VCC_CORE60
D8
VCC_CORE61
D1
VCC_CORE62
C30
VCC_CORE63
C28
VCC_CORE64
C22
VCC_CORE65
C16
VCC_CORE66
C4
VCC_CORE67
C2
VCC_CORE68
B31
VCC_CORE69
B29
VCC_CORE70
B26
VCC_CORE71
B20
VCC_CORE72
B6
VCC_CORE73
A30
VCC_CORE74
A28
VCC_CORE75
A24
VCC_CORE76
A18
VCC_CORE77
A14
VCC_CORE78
A8
VCC_CORE79
A2
VCC_CORE80
NOCONA_800-mPGA604
NOCONA 800
VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98
VCC_CORE99 VCC_CORE100 VCC_CORE101 VCC_CORE102 VCC_CORE103 VCC_CORE104 VCC_CORE105 VCC_CORE106 VCC_CORE107 VCC_CORE108 VCC_CORE109 VCC_CORE110 VCC_CORE111 VCC_CORE112 VCC_CORE113 VCC_CORE114 VCC_CORE115 VCC_CORE116 VCC_CORE117 VCC_CORE118 VCC_CORE119 VCC_CORE120 VCC_CORE121 VCC_CORE122 VCC_CORE123 VCC_CORE124 VCC_CORE125 VCC_CORE126 VCC_CORE127 VCC_CORE128 VCC_CORE129 VCC_CORE130 VCC_CORE131 VCC_CORE132 VCC_CORE133 VCC_CORE134 VCC_CORE135 VCC_CORE136 VCC_CORE137 VCC_CORE138 VCC_CORE139 VCC_CORE140 VCC_CORE141 VCC_CORE142 VCC_CORE143 VCC_CORE144 VCC_CORE145 VCC_CORE146 VCC_CORE147 VCC_CORE148 VCC_CORE149 VCC_CORE150 VCC_CORE151 VCC_CORE152 VCC_CORE153 VCC_CORE154 VCC_CORE155 VCC_CORE156 VCC_CORE157 VCC_CORE158 VCC_CORE159
AA31 AA26 AA20 AA6 AA4 AA1 Y30 Y22 Y16 Y2 W31 W29 W27 W25 W1 V30 V28 V26 V24 V8 V6 V4 V2 U31 U29 U27 U25 U23 U9 U7 U5 U3 U1 T30 T28 T26 T24 T8 T6 T4 T2 R31 R29 R27 R25 R23 R9 R7 R5 R3 R1 P30 P28 P26 P24 P8 P6 P4 P2 N31 N29 N27 N25 N23 N9 N7 N5 N3 N1 M31 M29 M27 M25 M23 M9 M7 M5 M3 M1
3
P_VCCP0P_VCCP0
P_VTT
U65E
AD12
VCC_VTT1
AC10
VCC_VTT2
AA12
VCC_VTT3
Y10
VCC_VTT4
F10
VCC_VTT5
E12
VCC_VTT6
C10
VCC_VTT7
B12
VCC_VTT8
B4
VCC_VTT9
C5
VCC_VTT10
A4
P_VCCP0
CPU0_THERMDA(8)
CPU0_THERMDC(8)
CPU0_THERMDA
CPU0_THERMDC
VCC_VTT11
AE24
VCC_CORE160
AE18
VCC_CORE161
AE14
VCC_CORE162
AE8
VCC_CORE163
AE3
VCC_CORE164
AD30
VCC_CORE165
AD26
VCC_CORE166
AD20
VCC_CORE167
AD6
VCC_CORE168
AD2
VCC_CORE169
AC31
VCC_CORE170
AC22
VCC_CORE171
AC16
VCC_CORE172
AC4
VCC_CORE173
AC3
VCC_CORE174
AB30
VCC_CORE175
AB24
VCC_CORE176
AB18
VCC_CORE177
AB14
VCC_CORE178
AB8
VCC_CORE179
AB2
VCC_CORE180
L28
VCC_CORE181
NOCONA_800-mPGA604
R769
1 2
0/6
R768
1 2
0/6
2
NOCONA 800
VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116
AE2 AD3 AE27 AE21 AE11 AD31 AD23 AD17 AD15 AD9 AC25 AC19 AC13 AC7 AC2 AB31 AB27 AB21 AB11 AB5 AB1
TD1P
TD1N
1
TD1P (61)
TD1N (61)
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P0 PWR/GND
GA-9IVDTH
10 73Monday, October 17, 2005
1
of
2.1
5
4
3
2
1
PROCESSOR 1
SB_BPRI#(8,18)
SB_CPU1_BREQ#23(13)
SB_BREQ#0(8,9,18) SB_BREQ#1(8,9,18)
SB_CPURST#(8,9,13,14,18)
SB_RS#[0..2](8,18)
D D
C C
VID_CPU1_R[0..5](61,65)
P_VTT
B B
754mV
P_VTT
754mV
A A
P1 VREF
SB_RSP#(8,18)
SB_CPU_A20M#(8,9,35) SB_CPU_IGNNE#(8,9,35)
SB_CPU_INIT#(8,9,35,57) SB_CPU_NMI(8,9,14) SB_CPU_INTR(8,9,35)
CPU_PWR_GD(8,9,13,35)
SB_CPU1_SMI#(13,14) SB_CPU_SLP#(8,9,35)
SB_CPU_STPCLK#(8,9)
P1_BCLK#(31) P1_BCLK(31) ITP_TCK0(8,13) ITP_TDI_P1(13)
ITP_TMS_MAIN(8,13)
ITP_TRST#(8,13,17)
SB_CPU1_BSEL1(13,55) SB_CPU1_BSEL0(13,55)
P_VCCP_A_CPU1
VR1_VCCSENSE(65)
VTTEN(8,9,55)
AGND_CPU1
VR1_VSSSENSE(65)
R773
49.9/6/1
1 2
VREF_P_VCCP_CPU1_0_R
12
R775
C569
84.5/6/1
1 2
1U/6/X5R/16V
SR31
49.9/6/1
VREF_P_VCCP_CPU1_3_R
1 2
12
SR30
84.5/6/1
1 2
MCH A0 CPU B0 800 64.9ohm 0.678V MCH B0 CPU C1 800 49.9ohm 0.756V
5
SB_BPRI# SB_CPU1_BREQ#23
SB_BREQ#0 SB_BREQ#1 SB_CPURST# SB_RS#2 SB_RS#1 SB_RS#0 SB_RSP#
SB_CPU_A20M# SB_CPU_IGNNE# SB_CPU_INIT# SB_CPU_NMI SB_CPU_INTR CPU_PWR_GD SB_CPU1_SMI# SB_CPU_SLP# SB_CPU_STPCLK# P1_BCLK# P1_BCLK ITP_TCK0 ITP_TDI_P1 ITP_TMS_MAIN ITP_TRST#
SB_CPU1_BSEL1 VREF_P_VTT_CPU1_0 SB_CPU1_BSEL0
STP112 STP75 STP78 STP95 STP113 STP83 STP84 STP92 STP90 STP96 STP94 STP82 STP81 STP70
SC317 1U/6/X5R/16V
VR1_VCCSENSE
VTTEN
VR1_VSSSENSE
R774
0/6
220P/6/X7R/50V
SR34
0/6
VID_CPU1_R5 VID_CPU1_R4 VID_CPU1_R3 VID_CPU1_R2 VID_CPU1_R1 VID_CPU1_R0
12
12
SC354
12
12
SC401
220P/6/X7R/50V
U64A
D23
BPRI#
D10 E11 F12 D20
F21 D22 E21
F27 C26
G23 B24 AB7 C27 AE6
E24 C24 A25 F24
AB3 AA3
AE29 AE28 AE30
AD29 AD28 AC29 AB29 AB28 AA29 AA28 AE15
AC1
AE16
AD4 B27
AB4 AA5
D26 C1
NOCONA 800
BR3# BR2# BR1# BR0#
Y8
RESET# RS2# RS1# RS0#
C6
RSP#
A20M# IGNNE#
D6
INIT# LINT1_NMI LINT0_INTR PWRGOOD SMI# SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0 TCK TDI TMS TRST#
BSEL1 BSEL0
RESERVED1 RESERVED0 RSVD16
Y3
RSVD15 RSVD14 RSVD13 RSVD12 RSVD10 RSVD9 RSVD8 RSVD7 RSVD3 RSVD2 RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0 VCCIOPLL
VCC_SENSE
E1
VTTEN VCCA
VSSA VSS_SENSE OPTIMIZED_COMPAT#
NOCONA_800-mPGA604
THERMTRIP#
PROCHOT#
BOOT_SELECT
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
WIDE 10-12 MILS
VREF_P_VTT_CPU1_0
12
SC351 220P/6/X7R/50V
WIDE 10-12 MILS
VREF_P_VTT_CPU1_3
12
SC398 220P/6/X7R/50V
ADS#
BINIT#
BNR# BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM# TRDY# LOCK#
MCERR#
IERR# FERR#
TDO
GTLREF3 GTLREF2 GTLREF1 GTLREF0
ODTEN
SKTOCC#
COMP3 COMP2 COMP1 COMP0
TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
SMB_PRT
VCCPLL THERMDC THERMDA
RSVD
4
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU1_BPM#5
E4
CPU1_BPM#4
E8
CPU1_BPM#3
F5
CPU1_BPM#2
E7
CPU1_BPM#1
F8
CPU1_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU1_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU1_THERMTRIP#
F26
SB_CPU1_PROCHOT#
B25
ITP_TDO_MAIN
E25 F9
F23 W9 W23
PD_ODTEN_CPU1
B5
SMC_CPU1_SKTOCC#
A3
PD_COMP3_CPU1
AC28
PD_COMP2_CPU1
D25
PD_COMP1_CPU1
E16
PD_COMP0_CPU1
AD16
PU_CPU1_8
Y29
PU_CPU1_0
A26
PU_CPU0_5
AE5
PU_CPU1_6
AD5
PU_CPU1_1
AA7
PU_CPU1_7
Y6
PU_CPU1_3
W8
PU_CPU1_2
W7
PU_CPU1_4
W6 AE4
AD1
CPU1_THERMDC
Y28
CPU1_THERMDA
Y27
PU_BOOT_SELECT_CPU1
G7 W3
VID_PWRGD
B1
SB_CPU0_CPU1_TESTBUS
A16
SB_CPU1_FORCEPR#
A15
SLEW_CTRL_CPU1
AC30
CPU1_OPTIM_COMPAT_CTRL
COMP3 =SB_CPU1_ADDR_ERC COMP2 =SB_CPU1_DATA_ERC PU_CPU1_8=SB_CPU1_EDRDY PU_CPU1_0=SB_CPU1_SNPD#
P_VTT
SL1
10UH/100mA/1206 SL2
10UH/100mA/1206
P1V5
R1197
0/6/X
SB_ADS# (8,18) SB_BINIT# (8,9,18) SB_BNR# (8,9,18)
CPU1_BPM#[0..5] (13) SB_DBSY# (8,18)
SB_DEFER# (8,18)
SB_DRDY# (8,18) SB_HIT# (8,9,18) SB_HITM# (8,9,18)
SB_TRDY# (8,18)
SB_LOCK# (8,18) SB_MCERR# (8,9,18)
SB_CPU1_IERR# (13,14) SB_CPU_FERR# (8,9,35) SB_CPU1_THERMTRIP# (9,14) SB_CPU1_PROCHOT# (13,14) ITP_TDO_P1 (13)
PD_ODTEN_CPU1 (9) SMC_CPU1_SKTOCC# (13,55,56)
PD_COMP3_CPU1 (13) PD_COMP2_CPU1 (13) PD_COMP1_CPU1 (13) PD_COMP0_CPU1 (13)
PU_CPU1_8 (13) PU_CPU1_0 (13) PU_CPU1_5 (13) PU_CPU1_6 (13) PU_CPU1_1 (13) PU_CPU1_7 (13) PU_CPU1_3 (13) PU_CPU1_2 (13) PU_CPU1_4 (13)
STP69
CPU1_THERMDC (12) CPU1_THERMDA (12) PU_BOOT_SELECT_CPU1 (13)
STP98
VID_PWRGD (8,55) SB_CPU0_CPU1_TESTBUS (8,9) SB_CPU1_FORCEPR# (13,14)
SLEW_CTRL_CPU1 (9) CPU1_OPTIM_COMPAT_CTRL (13)
WIDE 10-12 MILS
12
SC343
22U/1206/X5R/6.3V
WIDE 10-12 MILS
12
SEC1
+
470U/4V/7343/X
4.7u/1206/X/16V/X
Change on V0.3
P_VCCP_A_CPU1
AGND_CPU1
PU_VCCPLL_CPU1
12
SC323
SC324
0.1U/6/X7R/25V/X
3
SB_D#[0..63](8,18)
VREF_P_VTT_CPU1_3
PU_VCCPLL_CPU1
12
12
NO USE
C803
0.1U/6/X7R/25V/X
SB_D#63 SB_D#62 SB_D#61 SB_D#60 SB_D#59 SB_D#58 SB_D#57 SB_D#56 SB_D#55 SB_D#54 SB_D#53 SB_D#52 SB_D#51 SB_D#50 SB_D#49 SB_D#48 SB_D#47 SB_D#46 SB_D#45 SB_D#44 SB_D#43 SB_D#42 SB_D#41 SB_D#40 SB_D#39 SB_D#38 SB_D#37 SB_D#36 SB_D#35 SB_D#34 SB_D#33 SB_D#32 SB_D#31 SB_D#30 SB_D#29 SB_D#28 SB_D#27 SB_D#26 SB_D#25 SB_D#24 SB_D#23 SB_D#22 SB_D#21 SB_D#20 SB_D#19 SB_D#18 SB_D#17 SB_D#16 SB_D#15 SB_D#14 SB_D#13 SB_D#12 SB_D#11 SB_D#10 SB_D#9 SB_D#8 SB_D#7 SB_D#6 SB_D#5 SB_D#4 SB_D#3 SB_D#2 SB_D#1 SB_D#0
SC327
22U/1206/X5R/6.3V
AB6
Y9 AA8 AC5 AC6 AE7 AD7 AC8
AB10 AA10 AA11 AB13 AB12 AC14 AA14 AA13
AC9 AD8
AD10
AE9
AC11 AE10 AC12 AD11 AD14 AD13 AB15 AD18 AE13 AC17 AA16 AB16 AB17 AD19 AD21 AE20 AE22 AC21 AC20 AA18 AC23 AE23 AD24 AC24 AE25 AD25 AC26 AE26 AA19 AB19 AB22 AB20 AA21 AA22 AB23 AB25 AB26 AA24
Y23
AD27 AA25
Y24
AA27
Y26
12
SC442 22U/1206/X5R/6.3V
U64B
D63
NOCONA 800
D62 D61 D60 D59 D58 D57 D56 D55 D54 D53 D52 D51 D50 D49 D48 D47 D46 D45 D44 D43 D42 D41 D40 D39 D38 D37 D36 D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NOCONA_800-mPGA604
P_VTT
SC424 1U/6/X5R/16V
12
12
2
A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A9 A8 A7 A6 A5 A4 A3
BREQ4# BREQ3# BREQ2# BREQ1# BREQ0#
DBI3# DBI2# DBI1# DBI0#
DP3# DP2# DP1# DP0#
AP1# AP0#
ADSTB1# ADSTB0#
DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
12
SC338
0.1U/6/X7R/16V
SB_HA#35
C8
SB_HA#34
C9
SB_HA#33
A7
SB_HA#32
A6
SB_HA#31
B7
SB_HA#30
C11
SB_HA#29
D12
SB_HA#28
E13
SB_HA#27
B8
SB_HA#26
A9
SB_HA#25
D13
SB_HA#24
E14
SB_HA#23
C12
SB_HA#22
B11
SB_HA#21
B10
SB_HA#20
A10
SB_HA#19
F15
SB_HA#18
D15
SB_HA#17
D16
SB_HA#16
C14
SB_HA#15
C15
SB_HA#14
A12
SB_HA#13
B13
SB_HA#12
B14
SB_HA#11
B16
SB_HA#10
A13
SB_HA#9
D17
SB_HA#8
C17
SB_HA#7
A19
SB_HA#6
C18
SB_HA#5
B18
SB_HA#4
A20
SB_HA#3
A22
SB_REQ#4
B22
SB_REQ#3
C20
SB_REQ#2
C21
SB_REQ#1
B21
SB_REQ#0
B19
SB_DBI#3
AB9
SB_DBI#2
AE12
SB_DBI#1
AD22
SB_DBI#0
AC27
SB_DP#3
AE17
SB_DP#2
AC15
SB_DP#1
AE19
SB_DP#0
AC18
SB_AP#1
D9
SB_AP#0
E10
SB_ADSTB#1
F14
SB_ADSTB#0
F17
SB_DSTBP#3
Y11
SB_DSTBP#2
Y14
SB_DSTBP#1
Y17
SB_DSTBP#0
Y20
SB_DSTBN#3
Y12
SB_DSTBN#2
Y15
SB_DSTBN#1
Y18
SB_DSTBN#0
Y21
EC64
+
PSA2.5VB820MH11/8X11.5
Trace Width:12 Mils
VREF_P_VTT_CPU1_0 VREF_P_VTT_CPU1_3 VCCIOPLL_CPU1 AGND_CPU1 PU_VCCPLL_CPU1
Title
Size Document Number Rev
Date: Sheet
SB_HA#[3..35] (8,18)
SB_REQ#[0..4] (8,18)
SB_DBI#[0..3] (8,18)
SB_DP#[0..3] (8,18)
SB_AP#[0..1] (8,18)
SB_ADSTB#[0..1] (8,18)
SB_DSTBP#[0..3] (8,18)
SB_DSTBN#[0..3] (8,18)
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 MICS P1
GA-9IVDTH
1
11 73Monday, October 17, 2005
of
2.1
5
U64C
L31
VSS9
L29
NOCONA 800
VSS10
L27
VSS11
L25
VSS12
L23
VSS13
L9
VSS14
L7
VSS15
L5
VSS16
L3
VSS17
L1
VSS18
D D
C C
B B
K30
VSS19
K28
VSS20
K26
VSS21
K24
VSS22
K8
VSS23
K6
VSS24
K4
VSS25
K2
VSS26
J31
VSS27
J29
VSS28
J27
VSS29
J25
VSS30
J23
VSS31
J9
VSS32
J7
VSS33
J5
VSS34
J3
VSS35
J1
VSS36
H30
VSS37
H28
VSS38
H26
VSS39
H24
VSS40
H8
VSS41
H6
VSS42
H4
VSS43
H2
VSS44
G31
VSS45
G29
VSS46
G27
VSS47
G25
VSS48
G9
VSS49
G5
VSS51
G3
VSS52
G1
VSS53
F30
VSS54
F28
VSS55
F25
VSS56
F19
VSS57
F13
VSS58
F7
VSS59
F2
VSS60
E31
VSS61
E29
VSS62
E23
VSS63
E17
VSS64
E15
VSS65
E9
VSS66
D30
VSS68
D28
VSS69
D27
VSS70
D21
VSS71
D11
VSS72
D5
VSS73
D2
VSS74
C31
VSS75
C29
VSS76
C25
VSS77
C19
VSS78
C13
VSS79
C7
VSS80
B30
VSS82
B28
VSS83
B23
VSS84
B17
VSS85
B15
VSS86
B9
VSS87
B2
VSS88
A31
VSS89
A29
VSS90
A27
VSS91
A21
VSS92
A11
VSS93
A5
VSS94
NOCONA_800-mPGA604
VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189
VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
AA30 AA23 AA17 AA15 AA9 AA2 Y31 Y25 Y19 Y13 Y7 Y5 Y1 W30 W28 W26 W24 W4 W2 V31 V29 V27 V25 V23 V9 V7 V5 V3 V1 U30 U28 U26 U24 U8 U6 U4 U2 T31 T29 T27 T25 T23 T9 T7 T5 T3 T1 R30 R28 R26 R24 R8 R6 R4 R2 P31 P29 P27 P25 P23 P9 P7 P5 P3 P1 N30 N28 N26 N24 N8 N6 N4 N2 M2 M4 M6 M8 M24 M26 M28 M30
4
P_VCCP1
U64D
L30
VCC_CORE1
L26
VCC_CORE2
L24
VCC_CORE3
L8
VCC_CORE4
L6
VCC_CORE5
L4
VCC_CORE6
L2
VCC_CORE7
K31
VCC_CORE8
K29
VCC_CORE9
K27
VCC_CORE10
K25
VCC_CORE11
K23
VCC_CORE12
K9
VCC_CORE13
K7
VCC_CORE14
K5
VCC_CORE15
K3
VCC_CORE16
K1
VCC_CORE17
J30
VCC_CORE18
J28
VCC_CORE19
J26
VCC_CORE20
J24
VCC_CORE21
J8
VCC_CORE22
J6
VCC_CORE23
J4
VCC_CORE24
J2
VCC_CORE25
H31
VCC_CORE26
H29
VCC_CORE27
H27
VCC_CORE28
H25
VCC_CORE29
H23
VCC_CORE30
H9
VCC_CORE31
H7
VCC_CORE32
H5
VCC_CORE33
H3
VCC_CORE34
H1
VCC_CORE35
G30
VCC_CORE36
G28
VCC_CORE37
G26
VCC_CORE38
G24
VCC_CORE39
G8
VCC_CORE40
G6
VCC_CORE41
G4
VCC_CORE42
G2
VCC_CORE43
F31
VCC_CORE44
F29
VCC_CORE45
F22
VCC_CORE46
F16
VCC_CORE47
F4
VCC_CORE48
F1
VCC_CORE49
E30
VCC_CORE50
E28
VCC_CORE51
E26
VCC_CORE52
E20
VCC_CORE53
E6
VCC_CORE54
E2
VCC_CORE55
D31
VCC_CORE56
D29
VCC_CORE57
D24
VCC_CORE58
D18
VCC_CORE59
D14
VCC_CORE60
D8
VCC_CORE61
D1
VCC_CORE62
C30
VCC_CORE63
C28
VCC_CORE64
C22
VCC_CORE65
C16
VCC_CORE66
C4
VCC_CORE67
C2
VCC_CORE68
B31
VCC_CORE69
B29
VCC_CORE70
B26
VCC_CORE71
B20
VCC_CORE72
B6
VCC_CORE73
A30
VCC_CORE74
A28
VCC_CORE75
A24
VCC_CORE76
A18
VCC_CORE77
A14
VCC_CORE78
A8
VCC_CORE79
A2
VCC_CORE80
NOCONA_800-mPGA604
NOCONA 800
VCC_CORE81 VCC_CORE82 VCC_CORE83 VCC_CORE84 VCC_CORE85 VCC_CORE86 VCC_CORE87 VCC_CORE88 VCC_CORE89 VCC_CORE90 VCC_CORE91 VCC_CORE92 VCC_CORE93 VCC_CORE94 VCC_CORE95 VCC_CORE96 VCC_CORE97 VCC_CORE98
VCC_CORE99 VCC_CORE100 VCC_CORE101 VCC_CORE102 VCC_CORE103 VCC_CORE104 VCC_CORE105 VCC_CORE106 VCC_CORE107 VCC_CORE108 VCC_CORE109 VCC_CORE110 VCC_CORE111 VCC_CORE112 VCC_CORE113 VCC_CORE114 VCC_CORE115 VCC_CORE116 VCC_CORE117 VCC_CORE118 VCC_CORE119 VCC_CORE120 VCC_CORE121 VCC_CORE122 VCC_CORE123 VCC_CORE124 VCC_CORE125 VCC_CORE126 VCC_CORE127 VCC_CORE128 VCC_CORE129 VCC_CORE130 VCC_CORE131 VCC_CORE132 VCC_CORE133 VCC_CORE134 VCC_CORE135 VCC_CORE136 VCC_CORE137 VCC_CORE138 VCC_CORE139 VCC_CORE140 VCC_CORE141 VCC_CORE142 VCC_CORE143 VCC_CORE144 VCC_CORE145 VCC_CORE146 VCC_CORE147 VCC_CORE148 VCC_CORE149 VCC_CORE150 VCC_CORE151 VCC_CORE152 VCC_CORE153 VCC_CORE154 VCC_CORE155 VCC_CORE156 VCC_CORE157 VCC_CORE158 VCC_CORE159
AA31 AA26 AA20 AA6 AA4 AA1 Y30 Y22 Y16 Y2 W31 W29 W27 W25 W1 V30 V28 V26 V24 V8 V6 V4 V2 U31 U29 U27 U25 U23 U9 U7 U5 U3 U1 T30 T28 T26 T24 T8 T6 T4 T2 R31 R29 R27 R25 R23 R9 R7 R5 R3 R1 P30 P28 P26 P24 P8 P6 P4 P2 N31 N29 N27 N25 N23 N9 N7 N5 N3 N1 M31 M29 M27 M25 M23 M9 M7 M5 M3 M1
3
P_VCCP1
2
P_VTT
U64E
AD12
VCC_VTT1
AC10 AA12
Y10 F10 E12
C10
B12
B4
C5
P_VCCP1
CPU1_THERMDA(11)
CPU1_THERMDA
CPU1_THERMDC TD2N
A4
AE24 AE18 AE14
AE8
AE3 AD30 AD26 AD20
AD6
AD2 AC31 AC22 AC16
AC4
AC3 AB30 AB24 AB18 AB14
AB8
AB2
L28
R766
1 2
0/6
R765
1 2
0/6
NOCONA 800
VCC_VTT2 VCC_VTT3 VCC_VTT4 VCC_VTT5 VCC_VTT6 VCC_VTT7 VCC_VTT8 VCC_VTT9 VCC_VTT10 VCC_VTT11
VCC_CORE160 VCC_CORE161 VCC_CORE162 VCC_CORE163 VCC_CORE164 VCC_CORE165 VCC_CORE166 VCC_CORE167 VCC_CORE168 VCC_CORE169 VCC_CORE170 VCC_CORE171 VCC_CORE172 VCC_CORE173 VCC_CORE174 VCC_CORE175 VCC_CORE176 VCC_CORE177 VCC_CORE178 VCC_CORE179 VCC_CORE180 VCC_CORE181
NOCONA_800-mPGA604
VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116
AE2 AD3 AE27 AE21 AE11 AD31 AD23 AD17 AD15 AD9 AC25 AC19 AC13 AC7 AC2 AB31 AB27 AB21 AB11 AB5 AB1
TD2P
TD2P (61)
TD2N (61)CPU1_THERMDC(11)
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P1 PWR/GND
GA-9IVDTH
1
12 73Monday, October 17, 2005
of
2.1
5
P_VTTP_VTT
4
3
2
1
SB_CPU1_SMI#
12
12
R785 49.9/6/1
CPU_PWR_GD(8,9,11,35)
I2C_BUS1_SDA I2C_BUS1_SCL
12
SB_CPU1_FORCEPR#
12
SB_CPU1_IERR#
12
SB_CPU1_PROCHOT#
12
PU_BOOT_SELECT_CPU1
12
CPU1_OPTIM_COMPAT_CTRL
12
R931
51/6/X
1 2
SB_CPU1_BREQ#23
12
SB_CPU1_BSEL1
12
SB_CPU1_BSEL0
12
PD_COMP3_CPU1
12
PD_COMP2_CPU1
12
PD_COMP1_CPU1
PD_COMP0_CPU1
CPU_PWR_GD
I2C_BUS1_SDA I2C_BUS1_SCL
ITP_TCK1(17) ITP_TCK0(8,11)
R935 220/6 R1212 51/6
D D
C C
B B
,24,25,27,28,29,31,33,62) ,24,25,27,28,29,31,33,62)
R934 51/6
R938 51/6
R933 51/6/X
R932 51/6/X
SR42 51/6
SR37 510/6
SR38 510/6
SR35 100/6/1
R937 100/6/1
SR41 49.9/6/1
SB_CPU1_SMI# (11,14)
SB_CPU1_FORCEPR# (11,14)
SB_CPU1_IERR# (11,14)
SB_CPU1_PROCHOT# (11,14)
PU_BOOT_SELECT_CPU1 (11)
CPU1_OPTIM_COMPAT_CTRL (11)
SB_CPU1_BREQ#23 (11)
SB_CPU1_BSEL1 (11,55)
SB_CPU1_BSEL0 (11,55)
PD_COMP3_CPU1 (11)
PD_COMP2_CPU1 (11)
PD_COMP1_CPU1 (11)
PD_COMP0_CPU1 (11)
R942 0/6/X
MCH_PME#(18,34)
R958
R962 0/6/X R966 51/6
R965 51/6
R764 51/6
R758 51/6 R761 51/6 R760 51/6 R759 51/6 R755 51/6 R757 51/6 R756 51/6
R936 51/6
P3V3_STBY
R930
4.7K/6
CPU_PWR_GD
12
C556 100P/6/N/50V/X
CPU0_BPM#5 CPU0_BPM#4
CPU0_BPM#3 CPU0_BPM#2
CPU0_BPM#1 CPU0_BPM#0
CPU1_BPM#5 CPU1_BPM#4
CPU1_BPM#3 CPU1_BPM#2
CPU1_BPM#1
P_VTT
CPU1_BPM#0
ITP_CPU_PWRGOOD
12
MCH_PME# SB_CPURST#_R
ITP_SMBDAT_R
0/6/X
12
ITP_SMBCLK_R
12
ITP_TCK1 ITP_TCK0
12 12
12
12 12 12
12 12 12 12
12
SMC_CPU1_SKTOCC#
12
CPU_PWR_GD (8,9,11,35)
ITP1
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
ITP/X
PU_CPU1_8
PU_CPU1_7 PU_CPU1_6 PU_CPU1_5 PU_CPU1_4 PU_CPU1_3 PU_CPU1_2 PU_CPU1_1
PU_CPU1_0
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
P1V5
PU_CPU1_8 (11)
PU_CPU1_7 (11) PU_CPU1_6 (11) PU_CPU1_5 (11) PU_CPU1_4 (11) PU_CPU1_3 (11) PU_CPU1_2 (11) PU_CPU1_1 (11)
PU_CPU1_0 (11)
SMC_CPU1_SKTOCC# (11,55,56)
MODE TEST PROCESSOR CONFIGURATION UP 2-3 P0 INSTALLED;P1 REMOVED DP 1-2 & 3-4 P0 & P1 INSTALLED
ITP_MCH_DEBUG0
ITP_MCH_DEBUG1 ITP_MCH_DEBUG2
ITP_MCH_DEBUG3
ITP_MCH_DEBUG4 ITP_MCH_DEBUG5
ITP_MCH_DEBUG6 ITP_MCH_DEBUG7
ITP_BCLK ITP_BCLK#
DBR_RESET# ITP_TDO_MAIN
ITP_TRST#
ITP_TDI_MAIN
ITP_TMS_MAIN
12
R1003
51/6
ITP_MCH_DEBUG[0..7]
PLACE WITHIN 1" OF CPU
R1004 51/6/X
ITP_BCLK (31) ITP_BCLK# (31)
ITP_TRST# (8,11,17) ITP_TMS_MAIN (8,11)
STP104 STP102 TP13 STP103
ITP_MCH_DEBUG[0..7] (17)
P_VTT
12
R989 51/6
ITP_TDO_P0 ITP_TDO_P1
12
R1005 0/6
12
ITP_TDI_P1
SB_CPURST#_R
ITP_TMS_MAIN(8,11) ITP_TMS_MCH (17)
ITP_TDI_MAIN(8)
R914
51/6
ITP_TDI_MAIN (8)
ITP_TDI_P1 (11) ITP_TDO_P0 (8)
ITP_TDO_P1 (11)
ITP_TMS_MAIN
DBR_RESET#
ITP_TDI_MAIN
P_VTT
P_VTT
R609
51/6
12
R777 1K/6/X
R974 0/6
R1006 0/6/X
R983
12
R986 0/6
RN92 51/8P4R
1 3 5 7
RN91 51/8P4R
1 3 5 7
1 3 5
7
RN94 R971 51/6 R978 51/6
12
51/8P4R
2 4 6 8
2 4 6 8
2 4 6 8
CPU1_BPM#5 CPU1_BPM#4 CPU1_BPM#3 CPU1_BPM#2
CPU1_BPM#1 CPU1_BPM#0 CPU0_BPM#5 CPU0_BPM#4
CPU0_BPM#0 CPU0_BPM#1 CPU0_BPM#2 CPU0_BPM#3
12 12
PLACE WITHIN 1" OF MCH
ITP_TDO_MCH
SB_CPURST#
12
ITP_TMS_MCH
12
ITP_RESET#
12
P_VTT
12
PLACE WITHIN 1" OF MCH
51/6
ITP_TDI_MCH
CPU1_BPM#[0..5] CPU0_BPM#[0..5]
ITP_TMS_MCH ITP_TMS_MAIN
ITP_TDO_MCH (17)
SB_CPURST# (8,9,11,14,18)
ITP_RESET# (69)
ITP_TDI_MCH (17)
CPU1_BPM#[0..5] (11) CPU0_BPM#[0..5] (8)
ITP_TMS_MCH (17) ITP_TMS_MAIN (8,11)
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P1 TERMINATION/ITP
GA-9IVDTH
1
13 73Monday, October 17, 2005
of
2.1
5
P_VTT
12
C533
1 2
C532 1U/6/Y5V/16V
D D
0.01U/6/X7R/50V
1 2
SB_CPU1_IERR#(11,13) SB_CPU0_IERR#(8,9) SB_CPU0_THERMTRIP#(8,9) SB_CPU1_THERMTRIP#(9,11)
SB_CPU0_PROCHOT#(8,9) SB_CPU1_PROCHOT#(11,13)
ICH_CPU_SMI#(35) HW_CPU0_SMI#(61) HW_CPU1_SMI#(61) SB_ICH_NMI(35)
R718 51/6
12
R720 51/6
4
P_VTT
12
R674 200/6
12
12
R723 51/6
12
R676 51/6
R722 51/6
GTL2006_VREF
12
R680 100/6/1
1 27 26 19 18
21 25 20 24
23
9 12 13
7
U51
VREF 1BI 2BI 3BI 4BI
5BI 7BO1 6BI 7BO2
8BO 9BI 10AI1 10AI2 11BI
3
R668
1 2
49.9/6/1
C534
1U/6/Y5V/16V
1 2
VCC 1AO 2AO 3AO
4AO 5A(OD) 6A(OD)
8AI
9AO
10BO1 10BO2
11BO
11A(OD)GND
GTL2006/TSSOP28
P_VTT
28 2 3 10 11
4 5
6 15 17 16 22 814
P3V3
1 2
CPU0_THERMTRIP# CPU1_THERMTRIP#
C546
1U/6/Y5V/16V
P3V3 P3V3
12
R675
220/6
GTL_SMI# SB_CPU0_SMI# SB_CPU1_SMI#
2
P3V3
V0.2 Add
12
12
R1059
R678
1K/6
1K/6
CPU1_IERR# (56,61) CPU0_IERR# (56,61)
CPU0_PROCHOT# (61) CPU1_PROCHOT# (61)
SB_CPU0_SMI# (8,9) SB_CPU1_SMI# (11,13) SB_CPU_NMI (8,9,11)
P3V3
12
V0.4 Add
R1223
10K/6
1
VCC
1Y 2B
P3V3_STBY 8 7 6
P3V3
12
12
R1186
10K/6
10K/6
D28 RB751V-40/SMD
D27 RB751V-40/SMD
Title
Size Document Number Rev
Date: Sheet
12
12
R1187
12
12
R1189
R1188
10K/6/X
10K/6/X
SB_CPU_THERMTRIP# (35)
V0.3 change
LM93_CPU1_THRMTRIP# (61)
LM93_CPU0_THRMTRIP# (61)
IPMI_CPU1_THRMTRIP# (56)
IPMI_CPU0_THRMTRIP# (56)
GIGA-BYTE TECHNOLOGY CO., LTD.
LEVEL/THERMAL/BREQ
GA-9IVDTH
1
14 73Monday, October 17, 2005
2.1
of
P3V3 P3V3
SR1215
10K/6
SR1213 470/6
12
SQ146 MMBT2222A/SOT23
ECB
SQ148 MMBT2222A/SOT23
ECB
C C
CPU0_FORCEPR#(61,64)
1 2
SB_CPU0_FORCEPR# (8,9)
CPU1_FORCEPR#(61,65)
1 2
R1216
10K/6
R1214 470/6
12
Q149 MMBT2222A/SOT23
ECB
Q147
MMBT2222A/SOT23
ECB
SB_CPU1_FORCEPR# (11,13)
CPU1_THERMTRIP#
CPU0_THERMTRIP#
D53 RB751V-40/SMD
12
D54 RB751V-40/SMD
12
V0.4 change
PS_PWR_GD#(55,63)
CPU0_THERMTRIP#
C543
0.1U/6/X7R/25V
0.1U/6/X7R/25V
3
P3V3 P_VTT
53
2 4
C540
53
2 4
12
12
R709
51/6/1
SB_CPU0_SMI#
U52 74LVC1G07/SOT23-5
P_VTTP3V3
12
12
R703
51/6/1
SB_CPU1_SMI#
U47 74LVC1G07/SOT23-5
CPU1_THERMTRIP#
0.2 Change
B B
CPU Reduction Circuit
P3V3
A A
Q82
MMBT2222A/SOT23
R664 10K/6
SB_CPURST#(8,9,11,13,18)
5
1 2
BMC_BSP_TRI#(56)
BMC_AP_TRI#(56)
GTL_SMI#
P3V3
12
R684
12
4
GS
G
C530
0.1U/6/X7R/25V
1K/6
ECB
12
D
D
R699 1K/6
R685
1K/6
Q87
2N7002/SOT23
S
P3V3
12
12
R698
1K/6
P3V3
U46
168
2
1A
1Y
3
1B
VCCGND
5
2A
2Y
6
2B
11
3A
3Y
10
3B
14
4A
4Y
13
4B
1
A/B
15
G
74LCX157/TSSOP16
12
C517
0.1U/6/X7R/25V
4 7 9 12
1
1A
2
1B
3
2Y
4 5
GND 2A
U107
SN74LVC2G32DCTR/SSOP8
V0.3 add
CPU1_THERMTRIP#
CPU0_THERMTRIP#
2
5
DDRA_MA[0..13](23,24,25,26)
D D
DDRA_CB[0..7](23,24,25,26)
MEM_CKE0(23,26) MEM_CKE1(26,27) MEM_CKE2(24,26)
DDRA_CMDCLK_A0_P(23,26) DDRA_CMDCLK_A0_N(23,26) DDRA_CMDCLK_A2_P(25,26) DDRA_CMDCLK_A2_N(25,26) DDRA_CMDCLK_A1_P(24,26)
PLACE DDR VREF VOLTAGE
C C
DIVIDER NEAR CHANNEL A DIMMS
P2V5
R380 75/6/1
1 2
R376 75/6/1
1 2
B B
12
C328 1U/6/X5R/16V
PLACE CLOSE TO DIMM < 0.5
PLACE CLOSE TO MCH < 0.5
12
DDRA_DQS[0..8](23,24,25,26)
DDRA_CMDCLK_A1_N(24,26)
DDRA_CS#[0..5](23,24,25,26)
DDRA_MCH_VREF_R
C335
0.1U/6/X7R/16V
Under NB
P2V5 P2V5 P2V5 P2V5
MEM_CKE3(26,28)
STP41 STP37
STP55 STP61
DDRA_CAS#(23,24,25,26) DDRA_RAS#(23,24,25,26) DDRA_WE#(23,24,25,26)
DDRA_BA[0..1](23,24,25,26)
STP19 STP26 STP29 STP28 STP33 STP46 STP52 STP64 STP32
4
DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13
DDRA_CB0 DDRA_CB1 DDRA_CB2 DDRA_CB3 DDRA_CB4 DDRA_CB5 DDRA_CB6 DDRA_CB7
MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3
DDRA_CMDCLK_A0_P DDRA_CMDCLK_A0_N DDRA_CMDCLK_A2_P DDRA_CMDCLK_A2_N DDRA_CMDCLK_A1_P DDRA_CMDCLK_A1_N
TP_DDRA_CMDCLK_A3_N
DDRA_CS#0 DDRA_CS#1 DDRA_CS#2 DDRA_CS#3 DDRA_CS#4 DDRA_CS#5 TP_DDRA_CS#6 TP_DDRA_CS#7
DDRA_CAS# DDRA_RAS# DDRA_WE#
DDRA_BA0 DDRA_BA1
TP_DDRA_BA2
STP38
DDRA_DQS0 DDRA_DQS1 DDRA_DQS2 DDRA_DQS3 DDRA_DQS4 DDRA_DQS5 DDRA_DQS6 DDRA_DQS7 DDRA_DQS8
U31A
AH5
DDR_A_MA0
AD14
DDR_A_MA1
AL14
DDR_A_MA2
AK15
DDR_A_MA3
AJ16
DDR_A_MA4
AH17
DDR_A_MA5
AF18
DDR_A_MA6
AN20
DDR_A_MA7
AK20
DDR_A_MA8
AJ22
DDR_A_MA9
AE4
DDR_A_MA10
AF22
DDR_A_MA11
AG23
DDR_A_MA12
U6
DDR_A_MA13
AJ9
DDR_A_CB0
AG11
DDR_A_CB1
AE11
DDR_A_CB2
AD11
DDR_A_CB3
AJ10
DDR_A_CB4
AH10
DDR_A_CB5
AF10
DDR_A_CB6
AE10
DDR_A_CB7
AE26
DDR_CKE0
AN26
DDR_CKE1
AL26
DDR_CKE2
AK26
DDR_CKE3
AF13
DDR_A_CMDCLK_P0
AF12
DDR_A_CMDCLK_N0
AH11
DDR_A_CMDCLK_P1
AJ12
DDR_A_CMDCLK_N1
AH13
DDR_A_CMDCLK_P2
AG12
DDR_A_CMDCLK_N2
AC10
DDR_A_CMDCLK_P3
AD9
DDR_A_CMDCLK_N3
W2
DDR_A_#CS0
V3
DDR_A_#CS1
T8
DDR_A_#CS2
T10
DDR_A_#CS3
N5
DDR_A_#CS4
M5
DDR_A_#CS5
M3
DDR_A_#CS6
L4
DDR_A_#CS7
AM3
DDR_A_VREF
W8
DDR_A_CAS#
AA6
DDR_A_RAS#
Y10
DDE_A_WE#
AB5
DDR_A_BA0
AF6
DDR_A_BA1
AE25
DDR_A_BA2
AJ30
DDR_A_DQS_P0
AJ31
DDR_A_DQS_N0
AJ24
DDR_A_DQS_P1
AJ25
DDR_A_DQS_N1
AH19
DDR_A_DQS_P2
AH20
DDR_A_DQS_N2
AG14
DDR_A_DQS_P3
AG15
DDR_A_DQS_N3
AC6
DDR_A_DQS_P4
AD6
DDR_A_DQS_N4
W7
DDR_A_DQS_P5
V8
DDR_A_DQS_N5
N7
DDR_A_DQS_P6
P7
DDR_A_DQS_N6
G4
DDR_A_DQS_P7
H4
DDR_A_DQS_N7
AF9
DDR_A_DQS_P8
AG9
DDR_A_DQS_N8
3
DDR_A_DQ0 DDR_A_DQ1 DDR_A_DQ2 DDR_A_DQ3 DDR_A_DQ4 DDR_A_DQ5 DDR_A_DQ6 DDR_A_DQ7 DDR_A_DQ8
DDR_A_DQ9 DDR_A_DQ10 DDR_A_DQ11 DDR_A_DQ12 DDR_A_DQ13 DDR_A_DQ14 DDR_A_DQ15 DDR_A_DQ16 DDR_A_DQ17 DDR_A_DQ18 DDR_A_DQ19 DDR_A_DQ20 DDR_A_DQ21 DDR_A_DQ22 DDR_A_DQ23 DDR_A_DQ24 DDR_A_DQ25 DDR_A_DQ26 DDR_A_DQ27
DDR GROUP A
Lindenhurst-VS/BGA1077(C4)
DDR_A_DQ28 DDR_A_DQ29 DDR_A_DQ30 DDR_A_DQ31 DDR_A_DQ32 DDR_A_DQ33 DDR_A_DQ34 DDR_A_DQ35 DDR_A_DQ36 DDR_A_DQ37 DDR_A_DQ38 DDR_A_DQ39 DDR_A_DQ40 DDR_A_DQ41 DDR_A_DQ42 DDR_A_DQ43 DDR_A_DQ44 DDR_A_DQ45 DDR_A_DQ46 DDR_A_DQ47 DDR_A_DQ48 DDR_A_DQ49 DDR_A_DQ50 DDR_A_DQ51 DDR_A_DQ52 DDR_A_DQ53 DDR_A_DQ54 DDR_A_DQ55 DDR_A_DQ56 DDR_A_DQ57 DDR_A_DQ58 DDR_A_DQ59 DDR_A_DQ60 DDR_A_DQ61 DDR_A_DQ62 DDR_A_DQ63
DDR_A_DQS_P9
DDR_A_DQS_N9 DDR_A_DQS_P10 DDR_A_DQS_N10 DDR_A_DQS_P11 DDR_A_DQS_N11 DDR_A_DQS_P12 DDR_A_DQS_N12 DDR_A_DQS_P13 DDR_A_DQS_N13 DDR_A_DQS_P14 DDR_A_DQS_N14 DDR_A_DQS_P15 DDR_A_DQS_N15 DDR_A_DQS_P16 DDR_A_DQS_N16 DDR_A_DQS_P17 DDR_A_DQS_N17
AK32 AH31 AH29 AF28 AJ33 AK33 AG30 AG29 AG27 AG26 AD24 AD23 AE28 AF27 AH25 AG24 AF21 AG21 AF19 AG18 AE22 AD21 AJ18 AG20 AF16 AF15 AE13 AD12 AE17 AJ15 AE16 AD17 AH4 AG5 AB8 AB7 AB10 AA9 AE5 AD5 U9 AA5 V6 U7 W10 U10 W5 V5 R6 R5 L7 L6 P9 T5 N8 M9 K5 J5 K8 K10 L9 L10 K7 H7
AL32 AL31 AF25 AF24 AE20 AE19 AH14 AJ13 AD8 AC7 Y7 Y6 P10 N10 J6 H6 AH8 AJ7
DDRA_DQ0 DDRA_DQ1 DDRA_DQ2 DDRA_DQ3 DDRA_DQ4 DDRA_DQ5 DDRA_DQ6 DDRA_DQ7 DDRA_DQ8 DDRA_DQ9 DDRA_DQ10 DDRA_DQ11 DDRA_DQ12 DDRA_DQ13 DDRA_DQ14 DDRA_DQ15 DDRA_DQ16 DDRA_DQ17 DDRA_DQ18 DDRA_DQ19 DDRA_DQ20 DDRA_DQ21 DDRA_DQ22 DDRA_DQ23 DDRA_DQ24 DDRA_DQ25 DDRA_DQ26 DDRA_DQ27 DDRA_DQ28 DDRA_DQ29 DDRA_DQ30 DDRA_DQ31 DDRA_DQ32 DDRA_DQ33 DDRA_DQ34 DDRA_DQ35 DDRA_DQ36 DDRA_DQ37 DDRA_DQ38 DDRA_DQ39 DDRA_DQ40 DDRA_DQ41 DDRA_DQ42 DDRA_DQ43 DDRA_DQ44 DDRA_DQ45 DDRA_DQ46 DDRA_DQ47 DDRA_DQ48 DDRA_DQ49 DDRA_DQ50 DDRA_DQ51 DDRA_DQ52 DDRA_DQ53 DDRA_DQ54 DDRA_DQ55 DDRA_DQ56 DDRA_DQ57 DDRA_DQ58 DDRA_DQ59 DDRA_DQ60 DDRA_DQ61 DDRA_DQ62 DDRA_DQ63
DDRA_DQS9 DDRA_DQS10 DDRA_DQS11 DDRA_DQS12 DDRA_DQS13 DDRA_DQS14 DDRA_DQS15 DDRA_DQS16 DDRA_DQS17
STP11 STP31 STP40 STP27 STP39 STP45 STP54 STP65 STP20
2
DDRA_DQ[0..63] (23,24,25,26)
DDRA_DQS[9..17] (23,24,25,26)
1
12
12
SC159
0.1U/6/X7R/16V
A A
SC166
0.1U/6/X7R/16V
SC170
0.1U/6/X7R/16V
P2V5 P2V5 P2V5
12
C418
0.1U/6/X7R/16V/X
12
12
12
5
12
SC194
0.1U/6/X7R/16V
C201
0.1U/6/X7R/16V/X
SC169
0.1U/6/X7R/16V
Title
Size Document Number Rev
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDR CHA
GA-9IVDTH
1
15 73Monday, October 17, 2005
of
2.1
5
DDRB_MA[0..13](27,28,29,30)
D D
DDRB_CB[0..7](27,28,29,30)
MEM_CKE4(25,26) MEM_CKE5(26,29)
DDRB_CMDCLK_B2_P(29,30) DDRB_CMDCLK_B2_N(29,30) DDRB_CMDCLK_B1_P(28,30) DDRB_CMDCLK_B1_N(28,30) DDRB_CMDCLK_B0_P(27,30)
PLACE DDR VREF VOLTAGE DIVIDER NEAR CHANNEL B
C C
DIMMS
P2V5
R375 75/6/1
1 2
R379 75/6/1
1 2
B B
12
C327 1U/6/X5R/16V
PLACE CLOSE TO DIMM< 0.5
DDRB_MCH_VREF_R
C334
12
0.1U/6/X7R/16V
DDRB_DQS[0..8](27,28,29,30)
DDRB_CMDCLK_B0_N(27,30)
STP16
DDRB_CS#[0..5](27,28,29,30)
STP12
STP56 STP59
DDRB_CAS#(27,28,29,30) DDRB_RAS#(27,28,29,30) DDRB_WE#(27,28,29,30)
DDRB_BA[0..1](27,28,29,30)
STP9 STP6 STP23 STP17 STP24 STP43 STP48 STP62 STP14
STP18 STP30
DDRB_CMDCLK_B2_P DDRB_CMDCLK_B2_N DDRB_CMDCLK_B1_P DDRB_CMDCLK_B1_N DDRB_CMDCLK_B0_P DDRB_CMDCLK_B0_N
TP_DDRB_CMDCLK_B3_N
STP10
DDRB_DQS0 DDRB_DQS1 DDRB_DQS2 DDRB_DQS3 DDRB_DQS4 DDRB_DQS5 DDRB_DQS6 DDRB_DQS7 DDRB_DQS8
4
DDRB_MA0 DDRB_MA1 DDRB_MA2 DDRB_MA3 DDRB_MA4 DDRB_MA5 DDRB_MA6 DDRB_MA7 DDRB_MA8 DDRB_MA9 DDRB_MA10 DDRB_MA11 DDRB_MA12 DDRB_MA13
DDRB_CB0 DDRB_CB1 DDRB_CB2 DDRB_CB3 DDRB_CB4 DDRB_CB5 DDRB_CB6 DDRB_CB7
MEM_CKE4 MEM_CKE5 TP_MEM_CKE6 TP_MEM_CKE7
DDRB_CS#0 DDRB_CS#1 DDRB_CS#2 DDRB_CS#3 DDRB_CS#4 DDRB_CS#5 TP_DDRB_CS#6 TP_DDRB_CS#7
DDRB_CAS# DDRB_RAS# DDRB_WE#
DDRB_BA0 DDRB_BA1
TP_DDRB_BA2
U31B
AF7
DDR_B_MA0
AE14
DDR_B_MA1
AN14
DDR_B_MA2
AK14
DDR_B_MA3
AD15
DDR_B_MA4
AH16
DDR_B_MA5
AG17
DDR_B_MA6
AD18
DDR_B_MA7
AL20
DDR_B_MA8
AJ21
DDR_B_MA9
AC4
DDR_B_MA10
AH22
DDR_B_MA11
AH23
DDR_B_MA12
U4
DDR_B_MA13
AM7
DDR_B_CB0
AL7
DDR_B_CB1
AM4
DDR_B_CB2
AL4
DDR_B_CB3
AN8
DDR_B_CB4
AK8
DDR_B_CB5
AN5
DDR_B_CB6
AL5
DDR_B_CB7
AH26
DDR_CKE4
AJ27
DDR_CKE5
AJ28
DDR_CKE6
AH28
DDR_CKE7
AH7
DDR_B_CMDCLK_P0
AJ6
DDR_B_CMDCLK_N0
AH6
DDR_B_CMDCLK_P1
AG6
DDR_B_CMDCLK_N1
AG8
DDR_B_CMDCLK_P2
AE8
DDR_B_CMDCLK_N2
AK9
DDR_B_CMDCLK_P3
AL8
DDR_B_CMDCLK_N3
V9
DDR_B_#CS0
V2
DDR_B_#CS1
T7
DDR_B_#CS2
P6
DDR_B_#CS3
N4
DDR_B_#CS4
M2
DDR_B_#CS5
M6
DDR_B_#CS6
L3
DDR_B_#CS7
AN4
DDR_B_VREF
W1
DDR_B_CAS#
Y9
DDR_B_RAS#
W4
DDE_B_WE#
AA8
DDR_B_BA0
AE7
DDR_B_BA1
AM25
DDR_B_BA2
AM28
DDR_B_DQS_P0
AN29
DDR_B_DQS_N0
AM22
DDR_B_DQS_P1
AN23
DDR_B_DQS_N1
AK17
DDR_B_DQS_P2
AL17
DDR_B_DQS_N2
AK11
DDR_B_DQS_P3
AL11
DDR_B_DQS_N3
AG2
DDR_B_DQS_P4
AH2
DDR_B_DQS_N4
AA3
DDR_B_DQS_P5
AB4
DDR_B_DQS_N5
P1
DDR_B_DQS_P6
R2
DDR_B_DQS_N6
H3
DDR_B_DQS_P7
H1
DDR_B_DQS_N7
AK5
DDR_B_DQS_P8
AK6
DDR_B_DQS_N8
Lindenhurst-VS/BGA1077(C4)
3
DDR_B_DQ0 DDR_B_DQ1 DDR_B_DQ2 DDR_B_DQ3 DDR_B_DQ4 DDR_B_DQ5 DDR_B_DQ6 DDR_B_DQ7 DDR_B_DQ8
DDR_B_DQ9 DDR_B_DQ10 DDR_B_DQ11 DDR_B_DQ12 DDR_B_DQ13 DDR_B_DQ14 DDR_B_DQ15 DDR_B_DQ16 DDR_B_DQ17 DDR_B_DQ18 DDR_B_DQ19 DDR_B_DQ20 DDR_B_DQ21 DDR_B_DQ22 DDR_B_DQ23
DDR GROUP B
DDR_B_DQ24 DDR_B_DQ25 DDR_B_DQ26 DDR_B_DQ27 DDR_B_DQ28 DDR_B_DQ29 DDR_B_DQ30 DDR_B_DQ31 DDR_B_DQ32 DDR_B_DQ33 DDR_B_DQ34 DDR_B_DQ35 DDR_B_DQ36 DDR_B_DQ37 DDR_B_DQ38 DDR_B_DQ39 DDR_B_DQ40 DDR_B_DQ41 DDR_B_DQ42 DDR_B_DQ43 DDR_B_DQ44 DDR_B_DQ45 DDR_B_DQ46 DDR_B_DQ47 DDR_B_DQ48 DDR_B_DQ49 DDR_B_DQ50 DDR_B_DQ51 DDR_B_DQ52 DDR_B_DQ53 DDR_B_DQ54 DDR_B_DQ55 DDR_B_DQ56 DDR_B_DQ57 DDR_B_DQ58 DDR_B_DQ59 DDR_B_DQ60 DDR_B_DQ61 DDR_B_DQ62 DDR_B_DQ63
DDR_B_DQS_P9
DDR_B_DQS_N9 DDR_B_DQS_P10 DDR_B_DQS_N10 DDR_B_DQS_P11 DDR_B_DQS_N11 DDR_B_DQS_P12 DDR_B_DQS_N12 DDR_B_DQS_P13 DDR_B_DQS_N13 DDR_B_DQS_P14 DDR_B_DQS_N14 DDR_B_DQS_P15 DDR_B_DQS_N15 DDR_B_DQS_P16 DDR_B_DQS_N16 DDR_B_DQS_P17 DDR_B_DQS_N17
AM30 AN30 AN27 AM27 AK30 AM31 AL28 AK27 AM24 AN24 AN21 AM21 AL25 AK24 AL22 AK21 AK18 AM18 AN15 AM15 AL19 AM19 AM16 AL16 AK12 AM12 AN9 AM9 AL13 AM13 AM10 AL10 AJ3 AJ4 AF1 AF4 AK3 AK2 AG3 AF3 AC3 AC1 Y3 Y4 AD2 AD3 AA2 Y1 T4 T1 N1 N2 U3 U1 P3 P4 K2 K1 F2 E1 L1 K4 G1 G2
AK29 AL29 AK23 AL23 AN18 AN17 AN12 AN11 AJ1 AH1 AB2 AB1 T2 R3 J3 J2 AM6 AN6
DDRB_DQ0 DDRB_DQ1 DDRB_DQ2 DDRB_DQ3 DDRB_DQ4 DDRB_DQ5 DDRB_DQ6 DDRB_DQ7 DDRB_DQ8 DDRB_DQ9 DDRB_DQ10 DDRB_DQ11 DDRB_DQ12 DDRB_DQ13 DDRB_DQ14 DDRB_DQ15 DDRB_DQ16 DDRB_DQ17 DDRB_DQ18 DDRB_DQ19 DDRB_DQ20 DDRB_DQ21 DDRB_DQ22 DDRB_DQ23 DDRB_DQ24 DDRB_DQ25 DDRB_DQ26 DDRB_DQ27 DDRB_DQ28 DDRB_DQ29 DDRB_DQ30 DDRB_DQ31 DDRB_DQ32 DDRB_DQ33 DDRB_DQ34 DDRB_DQ35 DDRB_DQ36 DDRB_DQ37 DDRB_DQ38 DDRB_DQ39 DDRB_DQ40 DDRB_DQ41 DDRB_DQ42 DDRB_DQ43 DDRB_DQ44 DDRB_DQ45 DDRB_DQ46 DDRB_DQ47 DDRB_DQ48 DDRB_DQ49 DDRB_DQ50 DDRB_DQ51 DDRB_DQ52 DDRB_DQ53 DDRB_DQ54 DDRB_DQ55 DDRB_DQ56 DDRB_DQ57 DDRB_DQ58 DDRB_DQ59 DDRB_DQ60 DDRB_DQ61 DDRB_DQ62 DDRB_DQ63
DDRB_DQS9 DDRB_DQS10 DDRB_DQS11 DDRB_DQS12 DDRB_DQS13 DDRB_DQS14 DDRB_DQS15 DDRB_DQS16 DDRB_DQS17
STP13 STP15 STP8 STP5 STP25 STP42 STP49 STP63 STP7
2
DDRB_DQ[0..63] (27,28,29,30)
DDRB_DQS[9..17] (27,28,29,30)
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDR CHB
GA-9IVDTH
1
16 73Monday, October 17, 2005
of
2.1
5
MCH_66MHZ_CLK
P1V5
D D
MCH_HI_VSWING
MCH_HI_VREF
12
C457 100P/6/N/50V/X
C C
B B
P2V5
12
SR110
R464
40.2/6/1 R453
40.2/6/1
43.2/6/1
12
12
C369
0.1U/6/X7R/16V
SYS_PWR_GD_3_3V(32,35,55)
12
0.1U/6/X7R/16V
1 2
SC549 10P/6/N/50V/X
HIA_STRBS(34)
HIA_STRBF(34)
MCH_66MHZ_CLK(32)
I2C_BUS2_SCL(62) I2C_BUS2_SDA(62)
ITP_TMS_MCH(13) ITP_TDI_MCH(13) ITP_TDO_MCH(13)
ITP_TCK1(13)
ITP_TRST#(8,11,13)
12
STP36 STP35 STP34 STP21 STP47 STP51 STP53 STP57
C376
STP44 STP50 STP58
HIA_STRBS HIA_STRBF
MCH_66MHZ_CLK MCH_HI_RCOMP
SYS_PWR_GD_3_3V
I2C_BUS2_SCL I2C_BUS2_SDA
ITP_TMS_MCH ITP_TDI_MCH ITP_TDO_MCH ITP_TCK1 ITP_TRST#
PD_DDRRES1 PD_DDRRES2
TP_RESERVED2 TP_RESERVED3 TP_RESERVED4 TP_RESERVED5 TP_RESERVED6 TP_RESERVED7 TP_RESERVED8 TP_RESERVED9 TP_RESERVED10 TP_RESERVED11 TP_RESERVED12
4
U31E
E31
HI_STBS
D32
HI_STBF
H31
HISWING
L24
HICLK
K25
HIRCOMP
F32
HIVREF
E3
PWRGOOD
C3
SMBCLK
D4
SMBDATA
F3
TMS
G5
TDI
G6
TDO
D2
TCK
J9
TRST#
AE2
DDR_RES1
AE1
DDR_RES2
AF30
RESERVED2
AE23
RESERVED3
AD20
RESERVED4
AJ19
RESERVED5
R10
RESERVED6
R9
RESERVED7
R8
RESERVED8
M8
RESERVED9
AA24
RESERVED10
R32
RESERVED11
L33
RESERVED12
Lindenhurst-VS/BGA1077(C4)
P3V3
12
C461
0.1U/6/X7R/16V
H33
V3REF
MCH_DDRSLWCRES
PLLSEL1# PLLSEL0#
DEBUG0 DEBUG1 DEBUG2 DEBUG3 DEBUG4 DEBUG5 DEBUG6 DEBUG7
HI10 HI11
HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9
AK1
MCH_DDRCRES0
AC9
MCH_DDRIMPCRES
AL2
MCH_PLLSEL1#
A29
MCH_PLLSEL0#
C31 J30
H30 C32 G31 G29 H28 K26 J27 F30 E33 J29 G32
ITP_MCH_DEBUG0
J8
ITP_MCH_DEBUG1
G7
ITP_MCH_DEBUG2
G8
ITP_MCH_DEBUG3
H9
ITP_MCH_DEBUG4
B2
ITP_MCH_DEBUG5
D3
ITP_MCH_DEBUG6
L11
ITP_MCH_DEBUG7
D1
F33 D33
HI_A0 HI_A1 HI_A2 HI_A3 HI_A4 HI_A5 HI_A6 HI_A7 HI_A8 HI_A9 HI_A10 HI_A11
MCH_TDC MCH_TDA
DDRSLWCRES
DDR_CRES0
DDR_IMPCRES
TDIOCATHODE
TDIOANODE
HI 1.5 & Miscellaneous
P1V5
12
R515
80.6/6/1
12
R534 51/6/1
12
R535
40.2/6/1
3
R419 1.13K/6/1
R412 374/6/1
TP7 TP8
20MILS
MCH_HI_VSWING
C429
12
0.1U/6/X7R/16V
MCH_HI_VREF
12
12
D19 1N5820/SMD
12 12
HI_A[0..11] (34)
0.2 Add
ITP_MCH_DEBUG[0..7] (13)
NO USE
SC543
12
NEAR PIN
0.01U/6/X7R/50V
20MILS
C430
0.01U/6/X7R/50V
NEAR PIN
2
P1V5
12
MCH_PLLSEL1# (35) MCH_PLLSEL0# (35)
JP_PLL2
H1X2/X
TIMING RELATIONSHIP BETWEEN DRAM AND FSB INTERNAL P H
JP_PLL1
12
H1X2/X
R604 1K/6/X
1 2
12
R603 1K/6/X
1 2
DDR266 DDR333PLLSEL[1:0]
166(667)
11 10
200(800)
800mV
20MILS
350mV
20MILS
R584 1K/6/X
12
R602 1K/6/X
1 2
0011
P1V5
P1V5
CPU FSB/DDR
JPL_PLL1
166(667)/DDR266
166(667)/DDR333
200(800)/DDR266 OPEN
200(800)/DDR333
OPEN
CLOSE
CLOSE
1
JP_PLL2
OPEN
OPEN
OPEN
CLOSE
C432
0.1U/6/X7R/16V
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH HI 1.5/MISC
GA-9IVDTH
1
17 73Monday, October 17, 2005
of
2.1
5
SB_ADS#(8,11) SB_AP#0(8,11) SB_AP#1(8,11)
SB_MCERR#(8,9,11)
SB_BNR#(8,9,11)
SB_BPRI#(8,11)
SB_BREQ#0(8,9,11)
SB_BREQ#1(8,9,11)
D D
C C
B B
SB_CPURST#(8,9,11,13,14)
SB_DBSY#(8,11)
SB_DEFER#(8,11)
SB_DRDY#(8,11)
SB_DP#[0..3](8,11)
SB_DBI#[0..3](8,11)
SB_D#[0..63](8,11)
SB_ADS# SB_AP#0 SB_AP#1
SB_MCERR# SB_BNR# SB_BPRI# SB_BREQ#0 SB_BREQ#1
SB_CPURST# SB_DBSY# SB_DEFER# SB_DRDY#
SB_DP#0 SB_DP#1 SB_DP#2 SB_DP#3
SB_DBI#0 SB_DBI#1 SB_DBI#2 SB_DBI#3
SB_D#0 SB_D#1 SB_D#2 SB_D#3 SB_D#4 SB_D#5 SB_D#6 SB_D#7 SB_D#8 SB_D#9 SB_D#10 SB_D#11 SB_D#12 SB_D#13 SB_D#14 SB_D#15 SB_D#16 SB_D#17 SB_D#18 SB_D#19 SB_D#20 SB_D#21 SB_D#22 SB_D#23 SB_D#24 SB_D#25 SB_D#26 SB_D#27 SB_D#28 SB_D#29 SB_D#30 SB_D#31 SB_D#32 SB_D#33 SB_D#34 SB_D#35 SB_D#36 SB_D#37 SB_D#38 SB_D#39 SB_D#40 SB_D#41 SB_D#42 SB_D#43 SB_D#44 SB_D#45 SB_D#46 SB_D#47 SB_D#48 SB_D#49 SB_D#50 SB_D#51 SB_D#52 SB_D#53 SB_D#54 SB_D#55 SB_D#56 SB_D#57 SB_D#58 SB_D#59 SB_D#60 SB_D#61 SB_D#62 SB_D#63 GPE#
U31C
B27
ADS#
G25
AP#0
H25
AP#1
H24
MCERR#
B31
BNR#
A28
BPRI#
F24
BREQ#0
D29
BREQ#1
J24
CPURST#
H27
DBSY#
B28
DEFER#
B30
DRDY#
C29
DP#0
E28
DP#1
E25
DP#2
F27
DP#3
D16
DBI#0
E15
DBI#1
F9
DBI#2
A5
DBI#3
C18
HD#0
B19
HD#1
C14
HD#2
A17
HD#3
A19
HD#4
B16
HD#5
C17
HD#6
B18
HD#7
D17
HD#8
A16
HD#9
B13
HD#10
A14
HD#11
A13
HD#12
D14
HD#13
C12
HD#14
B12
HD#15
E18
HD#16
J18
HD#17
H18
HD#18
F17
HD#19
G17
HD#20
K17
HD#21
E16
HD#22
J17
HD#23
J14
HD#24
F14
HD#25
F15
HD#26
G16
HD#27
K16
HD#28
H16
HD#29
G14
HD#30
K14
HD#31
E12
HD#32
C11
HD#33
H13
HD#34
F11
HD#35
G13
HD#36
D11
HD#37
E9
HD#38
F12
HD#39
G10
HD#40
D8
HD#41
H10
HD#42
F8
HD#43
J12
HD#44
G11
HD#45
K13
HD#46
H12
HD#47
B10
HD#48
A10
HD#49
A11
HD#50
C9
HD#51
B9
HD#52
C8
HD#53
B6
HD#54
B7
HD#55
E7
HD#56
B4
HD#57
A4
HD#58
B3
HD#59
D5
HD#60
C6
HD#61
D7
HD#62
C5
HD#63
Lindenhurst-VS/BGA1077(C4)
System Bus Interface
HDSTBP#0 HDSTBN#0 HDSTBP#1 HDSTBN#1 HDSTBP#2 HDSTBN#2 HDSTBP#3 HDSTBN#3
HIT#
HITM# HLOCK# HTRDY#
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
TESTIN#
RSTIN#
HCRES0 HODTCRES HSLWCRES
HDVREF0 HDVREF1
HACVREF
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8
HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HA#32 HA#33 HA#34 HA#35
HCLKINN HCLKINP
HADSTB#0 HADSTB#1
RS#0
RS#1
RS#2
RSP#
BINIT#
PME# GPE#
4
SB_DSTBP#0
C15 B15 J15 H15 E10 D10 A7 A8
E30 D28 C30 A30
K20 J21 J23 H22 K23
L12 C2
C27 E27 F26
D13 E13
F23
K22 J20 G23 G22 H21 K19 H19 G19 E22 E21 F18 E19 F21 F20 D26 C26 A26 D22 B22 A25 B25 D25 C24 A22 B21 D23 A23 B24 A20 D19 C20 C21 D20
J11 K11
G20 C23
F29 D31 G28 J26
G26
M24 L25
SB_DSTBN#0 SB_DSTBP#1 SB_DSTBN#1 SB_DSTBP#2 SB_DSTBN#2 SB_DSTBP#3 SB_DSTBN#3
SB_HIT# SB_HITM# SB_LOCK# SB_TRDY#
SB_REQ#0 SB_REQ#1 SB_REQ#2 SB_REQ#3 SB_REQ#4
MCH_TESTIN#
SB_ODTCRES_MCH SB_SLWCRES_MCH
SB_HA#3 SB_HA#4 SB_HA#5 SB_HA#6 SB_HA#7 SB_HA#8 SB_HA#9 SB_HA#10 SB_HA#11 SB_HA#12 SB_HA#13 SB_HA#14 SB_HA#15 SB_HA#16 SB_HA#17 SB_HA#18 SB_HA#19 SB_HA#20 SB_HA#21 SB_HA#22 SB_HA#23 SB_HA#24 SB_HA#25 SB_HA#26 SB_HA#27 SB_HA#28 SB_HA#29 SB_HA#30 SB_HA#31 SB_HA#32 SB_HA#33 SB_HA#34 SB_HA#35
MCH_BCLK# MCH_BCLK
SB_ADSTB#0 SB_ADSTB#1
SB_RS#0 SB_RS#1 SB_RS#2 SB_RSP#
SB_BINIT#
MCH_PME#
SB_HIT# (8,9,11)
SB_HITM# (8,9,11) SB_LOCK# (8,11) SB_TRDY# (8,11)
STP60
MCH_PCIRST# (34)
MCH_BCLK# (31) MCH_BCLK (31)
SB_RS#[0..2] (8,11)
SB_RSP# (8,11)
SB_BINIT# (8,9,11)
MCH_PME# (13,34)
SB_DSTBP#[0..3] (8,11) SB_DSTBN#[0..3] (8,11)
SB_REQ#[0..4] (8,11)
SB_HA#[3..35] (8,11)
SB_ADSTB#[0..1] (8,11)
SR109 8.2K/6
1 2
SB_BREQ#0
SB_BREQ#1
3
R581
48.7/6/1
1 2
R583
51/6/X R579
51/6/X
Pull up on Page9
P3V3
R582 442/6/1
or 374/6/1
1 2
MCH_SB_VREF
12
12
C472
220P/6/X7R/50V
P_VTT
2
P_VTT
R605
12
49.9/6/1
1 2
R618
90.9/6/1
1 2
MCH_HSINK1
775mV
2
R588
12
0/6
12
C492
1U/6/X5R/16V
1
MCH_HSINK
12SP2-040004-81
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH SYS BUS
GA-9IVDTH
1
18 73Monday, October 17, 2005
of
2.1
5
4
3
2
1
EXP_A_RXP[0..7](22)
D D
EXP_A_RXN[0..7](22)
C C
DIFFERENTIAL PAIRS
MCH_SRC_100MHZ_CLK_N(33) MCH_SRC_100MHZ_CLK_P(33)
B B
EXP_A_RXP0 EXP_A_RXP1 EXP_A_RXP2 EXP_A_RXP3 EXP_A_RXP4 EXP_A_RXP5 EXP_A_RXP6 EXP_A_RXP7
EXP_A_RXN0 EXP_A_RXN1 EXP_A_RXN2 EXP_A_RXN3 EXP_A_RXN4 EXP_A_RXN5 EXP_A_RXN6 EXP_A_RXN7
MCH_SRC_100MHZ_CLK_N MCH_SRC_100MHZ_CLK_P
U31D
R33
EXP_A_RXP0
N28
EXP_A_RXP1
L31
EXP_A_RXP2
J33
EXP_A_RXP3
R26
EXP_A_RXP4
N25
EXP_A_RXP5
M27
EXP_A_RXP6
K29
EXP_A_RXP7
P33
EXP_A_RXN0
N29
EXP_A_RXN1
L30
EXP_A_RXN2
J32
EXP_A_RXN3
R27
EXP_A_RXN4
N26
EXP_A_RXN5
M26
EXP_A_RXN6
K28
EXP_A_RXN7
AG33
EXP_B_RXP0
AE32
EXP_B_RXP1
AC30
EXP_B_RXP2
AC31
EXP_B_RXP3
AD29
EXP_B_RXP4
AC25
EXP_B_RXP5
AB26
EXP_B_RXP6
Y25
EXP_B_RXP7
AF33
EXP_B_RXN0
AD32
EXP_B_RXN1
AD30
EXP_B_RXN2
AB31
EXP_B_RXN3
AE29
EXP_B_RXN4
AC24
EXP_B_RXN5
AB25
EXP_B_RXN6
Y24
EXP_B_RXN7
Y28
EXP_C_RXP0
Y30
EXP_C_RXP1
AA30
EXP_C_RXP2
V33
EXP_C_RXP3
T32
EXP_C_RXP4
R30
EXP_C_RXP5
V27
EXP_C_RXP6
V24
EXP_C_RXP7
Y27
EXP_C_RXN0
Y31
EXP_C_RXN1
AA29
EXP_C_RXN2
V32
EXP_C_RXN3
T31
EXP_C_RXN4
R29
EXP_C_RXN5
V26
EXP_C_RXN6
U24
EXP_C_RXN7
R24
EXP_CLKN
T23
EXP_CLKP
Lindenhurst-VS/BGA1077(C4)
VCCBGEXP VSSBGEXP
P30 N31 M33 K32 P24 P27 M30 L28
P31 N32 M32 K31 P25 P28 M29 L27
AG32 AF31 AC33 AB32 AD27 AC27 AB29 AA27
AH32 AE31 AD33 AA32 AD26 AC28 AB28 AA26
W26 W28 Y33 W32 U31 V30 T29 T26
W25 W29 AA33 W31 U30 V29 T28 T25
U33 U25 E6 U27 U28
EXP_A_TXP0 EXP_A_TXP1 EXP_A_TXP2 EXP_A_TXP3 EXP_A_TXP4 EXP_A_TXP5 EXP_A_TXP6 EXP_A_TXP7
EXP_A_TXN0 EXP_A_TXN1 EXP_A_TXN2 EXP_A_TXN3 EXP_A_TXN4 EXP_A_TXN5 EXP_A_TXN6 EXP_A_TXN7
EXP_B_TXP0 EXP_B_TXP1 EXP_B_TXP2 EXP_B_TXP3
PCI Express
EXP_B_TXP4 EXP_B_TXP5 EXP_B_TXP6 EXP_B_TXP7
EXP_B_TXN0 EXP_B_TXN1 EXP_B_TXN2 EXP_B_TXN3 EXP_B_TXN4 EXP_B_TXN5 EXP_B_TXN6 EXP_B_TXN7
EXP_C_TXP0 EXP_C_TXP1 EXP_C_TXP2 EXP_C_TXP3 EXP_C_TXP4 EXP_C_TXP5 EXP_C_TXP6 EXP_C_TXP7
EXP_C_TXN0 EXP_C_TXN1 EXP_C_TXN2 EXP_C_TXN3 EXP_C_TXN4 EXP_C_TXN5 EXP_C_TXN6 EXP_C_TXN7
EXP_COMP0 EXP_COMP1
EXPHPINTR#
EXP_A_TXP_C0 EXP_A_TXP_C1 EXP_A_TXP_C2 EXP_A_TXP_C3 EXP_A_TXP_C4 EXP_A_TXP_C5 EXP_A_TXP_C6 EXP_A_TXP_C7
EXP_A_TXN_C0 EXP_A_TXN_C1 EXP_A_TXN_C2 EXP_A_TXN_C3 EXP_A_TXN_C4 EXP_A_TXN_C5 EXP_A_TXN_C6 EXP_A_TXN_C7
MCH_EXPCOMP PU_EXPHPINTR#
V0.3 add
22U/1206/Y5V/10V
P1V5
CLOSE TO MCH
R493
24.9/6/1
1 2
C805
P3V3
R518 100/6
1 2
U33
R504
R
R498 0/6
0/6
1 2
12
SC431/SOT23
A C
P3V3
L9
4.7uH/60mA/8
C406
10U/8/X5R/6.3V
12
2.5V 3% 600uA
12
12
Close U31 pin U27,U28
MCH_VCCBGEXP
12
SC546
0.1U/6/X7R/16V
MCH_VSSBGEXP
NO USE
R575 1K/6/X
1 2
DIFFERENTIAL PAIRS
MCH_VCCBGEXP MCH_VSSBGEXP
CLOSE TO MCH
EXP_A_TXP_C0 EXP_A_TXP_C1 EXP_A_TXP_C2 EXP_A_TXP_C3 EXP_A_TXP_C4 EXP_A_TXP_C5 EXP_A_TXP_C6 EXP_A_TXP_C7
EXP_A_TXN_C0 EXP_A_TXN_C1
A A
EXP_A_TXN_C2 EXP_A_TXN_C3
EXP_A_TXN_C5 EXP_A_TXN_C6 EXP_A_TXN_C7
1 2
SC192 0.1U/4/X5R/10V
1 2
SC204 0.1U/4/X5R/10V
1 2
SC214 0.1U/4/X5R/10V
1 2
SC216 0.1U/4/X5R/10V
1 2
SC178 0.1U/4/X5R/10V
1 2
SC205 0.1U/4/X5R/10V
1 2
SC219 0.1U/4/X5R/10V
1 2
SC225 0.1U/4/X5R/10V
1 2
SC193 0.1U/4/X5R/10V
1 2
SC203 0.1U/4/X5R/10V
1 2
SC215 0.1U/4/X5R/10V
1 2
SC217 0.1U/4/X5R/10V
1 2
SC179 0.1U/4/X5R/10V
1 2
SC206 0.1U/4/X5R/10V
1 2
SC224 0.1U/4/X5R/10V
1 2
SC229 0.1U/4/X5R/10V
EXP_A_TXP0 EXP_A_TXP1 EXP_A_TXP2 EXP_A_TXP3 EXP_A_TXP4 EXP_A_TXP5 EXP_A_TXP6 EXP_A_TXP7
EXP_A_TXN0 EXP_A_TXN1 EXP_A_TXN2 EXP_A_TXN3 EXP_A_TXN4EXP_A_TXN_C4 EXP_A_TXN5 EXP_A_TXN6 EXP_A_TXN7
DIFFERENTIAL PAIRS
5
EXP_A_TXP[0..7] (22)
EXP_A_TXN[0..7] (22)
4
Title
Size Document Number Rev
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PCI EXPRESS
GA-9IVDTH
1
19 73Monday, October 17, 2005
of
2.1
P2V5
D D
C C
P1V5
B B
5
U31F
AN28
VCC_DDR0
AN22
VCC_DDR1
AN16
VCC_DDR2
AN10
VCC_DDR3
AN3
VCC_DDR4
AL30
VCC_DDR5
AL24
VCC_DDR6
AL18
VCC_DDR7
AL12
VCC_DDR8
AL6
VCC_DDR9
AJ26
VCC_DDR10
AJ20
VCC_DDR11
AJ14
VCC_DDR12
AJ8
VCC_DDR13
AH3
VCC_DDR14
AG28
VCC_DDR15
AG22
VCC_DDR16
AG16
VCC_DDR17
AG10
VCC_DDR18
AF5
VCC_DDR19
AE24
VCC_DDR20
AE18
VCC_DDR21
AE12
VCC_DDR22
AD7
VCC_DDR23
AD1
VCC_DDR24
AC23
VCC_DDR25
AC21
VCC_DDR26
AC19
VCC_DDR27
AC17
VCC_DDR28
AC15
VCC_DDR29
AC13
VCC_DDR30
AC11
VCC_DDR31
AB22
VCC_DDR32
AB20
VCC_DDR33
AB18
VCC_DDR34
AB16
VCC_DDR35
AB14
VCC_DDR36
AB12
VCC_DDR37
AB9
VCC_DDR38
AB3
VCC_DDR39
AA11
VCC_DDR40
Y12
VCC_DDR41
Y5
VCC_DDR42
W11
VCC_DDR43
V12
VCC_DDR44
V7
VCC_DDR45
V1
VCC_DDR46
U11
VCC_DDR47
T12
VCC_DDR48
T9
VCC_DDR49
T3
VCC_DDR50
R11
VCC_DDR51
P12
VCC_DDR52
P5
VCC_DDR53
N11
VCC_DDR54
M1
VCC_DDR55
K3
VCC_DDR56
H5
VCC_DDR57
F1
VCC_DDR58
M7
VCC_DDR59
AL1
VCC_DDR60
AH33
VCC_EXP0
AE33
VCC_EXP1
AE30
VCC_EXP2
AC29
VCC_EXP3
AB33
VCC_EXP4
AB27
VCC_EXP5
AB24
VCC_EXP6
AA23
VCC_EXP7
Y29
VCC_EXP8
Y22
VCC_EXP9
W33
VCC_EXP10
W27
VCC_EXP11
W23
VCC_EXP12
V22
VCC_EXP13
U29
VCC_EXP14
T33
VCC_EXP15
T27
VCC_EXP16
T24
VCC_EXP17
T22
VCC_EXP18
R23
VCC_EXP19
P29
VCC_EXP20
N33
VCC_EXP21
M28
VCC_EXP22
K33
VCC_EXP23
K30
VCC_EXP24
Lindenhurst-VS/BGA1077(C4)
VCC_CORE0 VCC_CORE1 VCC_CORE2 VCC_CORE3 VCC_CORE4 VCC_CORE5 VCC_CORE6 VCC_CORE7 VCC_CORE8
VCC_CORE9 VCC_CORE10 VCC_CORE11 VCC_CORE12 VCC_CORE13 VCC_CORE14 VCC_CORE15 VCC_CORE16 VCC_CORE17 VCC_CORE18 VCC_CORE19 VCC_CORE20 VCC_CORE21 VCC_CORE22 VCC_CORE23
POWER
VCC_CORE24 VCC_CORE25 VCC_CORE26 VCC_CORE27 VCC_CORE28 VCC_CORE29 VCC_CORE30 VCC_CORE31 VCC_CORE32 VCC_CORE33 VCC_CORE34 VCC_CORE35 VCC_CORE36 VCC_CORE37 VCC_CORE38 VCC_CORE39 VCC_CORE40 VCC_CORE41 VCC_CORE42 VCC_CORE43 VCC_CORE44 VCC_CORE45 VCC_CORE46 VCC_CORE47 VCC_CORE48 VCC_CORE49
VCC_VTT0 VCC_VTT1 VCC_VTT2 VCC_VTT3 VCC_VTT4 VCC_VTT5 VCC_VTT6 VCC_VTT7 VCC_VTT8
VCC_VTT9 VCC_VTT10 VCC_VTT11 VCC_VTT12 VCC_VTT13 VCC_VTT14 VCC_VTT15 VCC_VTT16 VCC_VTT17 VCC_VTT18 VCC_VTT19 VCC_VTT20 VCC_VTT21 VCC_VTT22 VCC_VTT23 VCC_VTT24 VCC_VTT25 VCC_VTT26 VCC_VTT27 VCC_VTT28
VCCA_CORE0 VSSA_CORE1
VCCA_EXP0
VSSA_EXP1
VCCA_HI0 VSSA_HI1
VCCA_DDR
AA21 AA19 AA17 AA15 AA13 Y20 Y18 Y16 Y14 W21 W19 W17 W15 W13 V20 V18 V16 V14 U21 U19 U17 U15 T20 T18 T16 T14 R21 R19 R17 R15 R13 P18 P16 P14 N21 N19 N17 N15 N13 U13 C33 K9 M12 G33 H29 K27 L23 N23 P22 M22
A31 M20 M18 M16 M14 L21 L19 L17 L15 L13 J19 J16 J13 H26 H23 E23 E20 E17 E14 E11 E8 D30 D27 A18 A15 A12 A9 A6 A3
F6 F5 U23 V23 P20 P21 E4
P1V5
VCCA_SB VSSA_SB VCCA_EXP VSSA_EXP VCCA_HI VSSA_HI VCCA_DDR
P_VTT
4
VCCA_SB (21) VSSA_SB (21) VCCA_EXP (21) VSSA_EXP (21) VCCA_HI (21) VSSA_HI (21) VCCA_DDR (21)
U31G
Y13
VSS0
Y11
VSS1
Y8
VSS2
Y2
VSS3
W30
VSS4
W24
VSS5
W22
VSS6
W20
VSS7
W18
VSS8
W16
VSS9
W14
VSS10
W12
VSS11
W9
VSS12
W6
VSS13
W3
VSS14
V31
VSS15
V28
VSS16
V25
VSS17
V21
VSS18
V19
VSS19
V17
VSS20
V15
VSS21
V13
VSS22
V11
VSS23
V10
VSS24
V4
VSS25
U32
VSS26
AB6
VSS27
AA31
VSS28
AA28
VSS29
AA25
VSS30
AA22
VSS31
AA20
VSS32
AA18
VSS33
AA16
VSS34
AA14
VSS35
AA12
VSS36
AA10
VSS37
AA7
VSS38
AB23
VSS39
AB21
VSS40
AB19
VSS41
AB17
VSS42
AB15
VSS43
AB13
VSS44
AN31
VSS45
AN25
VSS46
AN19
VSS47
AN13
VSS48
AN7
VSS49
AM32
VSS50
AM29
VSS51
AM26
VSS52
AM23
VSS53
AM20
VSS54
AM17
VSS55
AM14
VSS56
AM11
VSS57
AM8
VSS58
AM5
VSS59
AM2
VSS60
AL33
VSS61
AL27
VSS62
AL21
VSS63
AL15
VSS64
AL9
VSS65
AL3
VSS66
AK31
VSS67
AK28
VSS68
AK25
VSS69
AK22
VSS70
AK19
VSS71
AK16
VSS72
AG13
VSS73
E24
VSS74
Lindenhurst-VS/BGA1077(C4)
GND
VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147
VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99
AF29 AF26 AF23 AF20 AF17 AF14 AF11 AF8 AF2 AE27 AE21 AE15 AE9 AE6 AE3 AD31 AD28 AD25 AD22 AD19 AD16 AD13 AD10 AD4 AC32 AC26 AC22 AC20 AC18 AC16 AC14 AC12 AC8 AC5 AC2 AB30 AK7 AK4 AJ32 AJ29 AJ17 AJ11 AJ5 AJ23 AJ2 AH30 AH27 AH24 AH21 AH18 AH15 AH12 AH9 AG31 AG25 AG19 AG1 AF32 AA4 AA1 Y32 Y26 Y23 Y21 Y19 Y17 Y15 AB11 AK10 AK13 U26 U22 U20
3
U31H
M13
VSS148
M11
VSS149
M10
VSS150
M4
VSS151
L32
VSS152
L29
VSS153
L26
VSS154
L22
VSS155
L20
VSS156
L18
VSS157
L16
VSS158
L14
VSS159
L8
VSS160
L5
VSS161
L2
VSS162
K24
VSS163
K21
VSS164
K18
VSS165
K15
VSS166
K12
VSS167
K6
VSS168
J31
VSS169
J28
VSS170
J25
VSS171
J22
VSS172
J10
VSS173
J7
VSS174
J4
VSS175
J1
VSS176
H32
VSS177
H20
VSS178
H17
VSS179
H14
VSS180
H11
VSS181
AG4
VSS182
AG7
VSS183
U18
VSS184
U16
VSS185
U14
VSS186
U12
VSS187
U8
VSS188
U5
VSS189
U2
VSS190
T30
VSS191
T21
VSS192
T19
VSS193
T17
VSS194
T15
VSS195
T11
VSS196
T13
VSS197
T6
VSS198
R31
VSS199
R28
VSS200
R25
VSS201
R22
VSS202
R20
VSS203
R18
VSS204
R16
VSS205
R14
VSS206
R12
VSS207
R7
VSS208
R4
VSS209
R1
VSS210
P32
VSS211
P26
VSS212
P23
VSS213
P19
VSS214
P17
VSS215
P15
VSS216
N22
VSS217
N20
VSS218
N18
VSS219
N16
VSS220
N14
VSS221
Lindenhurst-VS/BGA1077(C4)
VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243
GND
VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295
2
F16 F13 F10 F7 F4 H8 H2 G30 G27 G21 G18 G15 G12 G9 G3 F31 F28 G24 F25 F22 F19 N3 M31 M25 M23 M21 M19 M17 M15 N6 E32 E29 E26 E5 E2 D24 D21 D18 D15 D12 D9 D6 B32 C28 C25 C22 C19 C16 C13 C10 C7 C4 C1 B29 B26 B23 B20 B14 B11 B8 B5 A27 A24 A21 P13 P11 P8 P2 N30 N27 N24 N12 N9 B17
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PWR/GND
GA-9IVDTH
1
20 73Monday, October 17, 2005
of
2.1
12
12
0.1U/6/X7R/16V/X
12
C440
5
12
SC196
0.1U/6/X7R/16V
12
SC185
0.1U/6/X7R/16V
12
SC288
0.1U/6/X7R/16V
12
SC156
12
C355
0.1U/6/X7R/16V
12
SC195
0.1U/6/X7R/16V
12
SC184
0.1U/6/X7R/16V
12
12
C460
0.01U/6/X7R/50V C452
0.01U/6/X7R/50V
12
SC168
0.1U/6/X7R/16V
12
SC165
0.1U/6/X7R/16V
12
SC249
0.01U/6/X7R/50V
0.01U/6/X7R/50V
SC189
0.1U/6/X7R/16V/X
C468
0.1U/6/X7R/16V
12
12
12
C435
0.01U/6/X7R/50V
12
SC197
0.1U/6/X7R/16V
12
SC177
0.1U/6/X7R/16V
12
C360
12
SC235
0.01U/6/X7R/50V/X
C447
12
0.1U/6/X7R/16V
12
SC175
0.1U/6/X7R/16V
12
SC191
0.1U/6/X7R/16V SC190
0.1U/6/X7R/16V
SC218
0.01U/6/X7R/50V/X
12
C462
0.01U/6/X7R/50V
12
12
P1V5
SC167
0.1U/6/X7R/16V
D D
C C
12
SC188
0.1U/6/X7R/16V
12
SC248
0.01U/6/X7R/50V
P1V5
0.1U/6/X7R/16V
12
SC186
0.1U/6/X7R/16V
SC550
0.1U/6/X7R/16V
SC202
0.1U/6/X7R/16V
12
SC155
0.1U/6/X7R/16V/X
4
12
12
SC290
0.1U/6/X7R/16V
12
SC176
0.1U/6/X7R/16V
12
SC187
0.1U/6/X7R/16V/X
12
SC213
0.01U/6/X7R/50V/X
3
VCCA_HI VCCA_EXP VCCA_DDR VCCA_SB PLACE COMPONENTS: GROUP ASSOCIATE COMPONENTS TOGHTER AND AS PHYSICALLY PIN AS POSSIBLE
MIN TRACE WIDTH: AS WIDE AS POSSIBLE >= 25 MILS
MIN TRACE SPACING: >= 10 MILS
MAX LENGTH >=1.2(BOARD+BREAKOUT)
ROUTE DIFFERENTIAL PAIRS
MCH VCCA
P1V5
P1V5
P1V5
P1V5
R485
1 2
1/6/1
3% 31.8mA
R484
VCCA_EXP_R_N
1 2
1/6/1
3% 30.9mA
R617
VCCA_DDR_R_N
1 2
1/6/1
3% 28.9mA
R616
VCCA_SB_R_N
1 2
1/6/1
3% 28.9mA
VCCA_HI_R_N
2
4.7uH/60mA/8
L6
4.7uH/60mA/8
L13
4.7uH/60mA/8
L12
4.7uH/60mA/8
L7
SC545
10U/8/Y/10V
12
12
12
12
12
12
SC547 10U/8/Y/10V
12
C384 10U/8/Y/10V
12
C475 10U/8/Y/10V
12
C474 10U/8/Y/10V
VCCA_HI
12
SC548
0.1U/6/X7R/16V
VCCA_EXP
12
SC544
0.1U/6/X7R/16V
VCCA_DDR
12
C488
0.1U/6/X7R/16V
VCCA_SB
12
C487
0.1U/6/X7R/16V
VSSA_HI
VSSA_EXP
VSSA_SB
VSSA_SB
1
VCCA_HI (20)
VSSA_HI (20)
VCCA_EXP (20)
VSSA_EXP (20)
VCCA_DDR (20)
VSSA_SB (20)
VCCA_SB (20)
VSSA_SB (20)
P2V5
C349
12
SC141
0.1U/6/X7R/16V
12
C356
0.1U/6/X7R/16V C380
0.1U/6/X7R/16V
5
12
SC142
0.1U/6/X7R/16V
12
12
12
SC143
B B
A A
0.1U/6/X7R/16V
0.1U/6/X7R/16V
12
C350
0.1U/6/X7R/16V
0.1U/6/X7R/16V
SC140
12
C351
12
C344
0.1U/6/X7R/16V
0.1U/6/X7R/16V
12
C387
0.1U/6/X7R/16V
0.1U/6/X7R/16V
12
C345
12
C393
12
C346
0.1U/6/X7R/16V
0.1U/6/X7R/16V
12
C397
0.1U/6/X7R/16V C401
0.1U/6/X7R/16V
12
C347
12
0.1U/6/X7R/16V
12
C348
0.1U/6/X7R/16V
0.1U/6/X7R/16V
12
C407
0.1U/6/X7R/16V
C413
12
12
C340
100U/1210/Y5U/6.3V
12
12
4
C436 100U/1210/Y5U/6.3V
12
C339 100U/1210/Y5U/6.3V
12
C364 100U/1210/Y5U/6.3V
3
P_VTT
12
22U/1206/Y5V/10V
C491
22U/1206/Y5V/10V
C485
0.1U/6/X7R/16V
12
C469
12
12
C470 1U/6/Y5V/16V
2
12
C377
0.1U/6/X7R/16V
0.1U/6/X7R/16V
P_VTT
SC207
12
12
SC208
0.1U/6/X7R/16V
Place under MCH.
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH DECOUPING
GA-9IVDTH
1
21 73Monday, October 17, 2005
of
2.1
5
4
3
2
1
P3V3_STBY
R186 4.7K/6
1 2
R201 4.7K/6
1 2
D D
I2C_BUS1_SCL(13,23,24,25,27,28,29,31,33,62) I2C_BUS1_SDA(13,23,24,25,27,28,29,31,33,62)
EXP_A_TXP[0..3](19)
PCIE_TCK
PCIE_TRST#
WAKE#(35,51)
EXP_A_TXP[0..3]
R165
5.1K/6/X
R178 0/6/X R172 0/6/X
1 2 1 2
WAKE#
1 2
PCI_S_SMBCLK_R PCI_S_SMBDAT_R
PCIE_TRST#
DIFFERENTIAL PAIRS
C C
EXP_A_TXN[0..3](19)
EXP_A_TXP[4..7](19)
EXP_A_TXN[0..3]
V0.3 add
EXP_A_TXP[4..7]
DIFFERENTIAL PAIRS
EXP_A_TXN[4..7](19)
B B
EXP_A_TXN[4..7]
P3V3_STBY
R181
5.1K/6/X
1 2
V0.3 add
EXP_A_TXP0 EXP_A_TXN0
EXP_A_TXP1 EXP_A_TXN1
EXP_A_TXP2 EXP_A_TXN2
EXP_A_TXP3 EXP_A_TXN3
EXP_A_TXP4 EXP_A_TXN4
EXP_A_TXP5 EXP_A_TXN5
EXP_A_TXP6 EXP_A_TXN6
EXP_A_TXP7 EXP_A_TXN7
P3V3
P5V
V0.2 modify
P12V
B10 B11
B12 B13 B14 B15 B16 B17 B18
B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32
B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
PCI-E_1
PCI_EXP_8PORT
B1
12V_2
B2
12V_3
B3
RSVD3
B4
GND18
B5
SMCLK
B6
SMDATA
B7
GND19
B8
3.3V_2
B9
JTAG1
3.3VAUX WAKE_N
RSVD4 GND20 HOSP0+ HOSP0­GND21 PRSNT2_N GND22
HOSP1+ HOSP1­GND23 GND24 HOSP2+ HOSP2­GND25 GND26 HOSP3+ HOSP3­GND27 RSVD5 PRSNE2_N GND28
HOSP4+ HOSP4­GND29 GND30 HOSP5+ HOSP5­GND31 GND32 HOSP6+ HOSP6­GND33 GND34 HOSP7+ HOSP7­GND35 PRSNT2_N GND36
PCI_EXPRESS_98PIN
PRSNT1_N
12V_0 12V_1
GND0 JTAG2 JTAG3 JTAG4 JTAG5
3.3V_0
3.3V_1
PWRGD
GND1
REFCLK+
REFCLK-
GND2
HSIP0+
HSIP0-
GND3
RSVD0
GND4
HSIP1+
HSIP1-
GND5
GND6
HSIP2+
HSIP2-
GND7
GND8
HSIP3+
HSIP3-
GND9
RSVD1
RSVD2 GND10
HISP4+
HISP4­GND11 GND12
HISP5+
HISP5­GND13 GND14
HISP6+
HISP6­GND15 GND16
HISP7+
HISP7­GND17
P12V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
PCIE_TCK PCIE_TDI
PCIE_TMS
PCIE_TDI
PCIE_TMS
P3V3
EXP_SLOT_100MHZ_CLK_P EXP_SLOT_100MHZ_CLK_N
R185 4.7K/6
1 2
R196 4.7K/6
1 2
R214 0/6/X
1 2
R224 0/6
1 2
EXP_SLOT_100MHZ_CLK_P (33) EXP_SLOT_100MHZ_CLK_N (33)
EXP_A_RXP0 EXP_A_RXN0
EXP_A_RXP1 EXP_A_RXN1
EXP_A_RXP2 EXP_A_RXN2
EXP_A_RXP3 EXP_A_RXN3
EXP_A_RXP4 EXP_A_RXN4
EXP_A_RXP5 EXP_A_RXN5
EXP_A_RXP6 EXP_A_RXN6
EXP_A_RXP7 EXP_A_RXN7
EXP_A_RXP[0..7] EXP_A_RXN[0..7]
P3V3
PCI EXPRESS SLOT
PCIRST_BUFF#1 (55,57,58,70)
SYS_PWR_GD_BUFF (55)
DIFFERENTIAL PAIRS
EXP_A_RXP[0..3] (19)
DIFFERENTIAL PAIRS
EXP_A_RXN[0..3] (19)
EXP_A_RXP[4..7] (19)
0.1U/6/X7R/25V
DIFFERENTIAL PAIRS
EXP_A_RXN[4..7] (19)
EXP_A_RXP[0..7] (19) EXP_A_RXN[0..7] (19)
C192
1n/6/X7R/50V
C153
12
12
C146
0.1U/6/X7R/25V
12
0.1U/6/X7R/16V
12
C183
0.1U/6/X7R/16V
12
C154
0.1U/6/X7R/25V
C574
12
C151
0.1U/6/X7R/25V
12
12
C203
0.1U/6/X7R/16V
P12V
+
P3V3
+
EC9 22U/50V/5X11
EC10 22U/50V/5X11/X
P3V3_STBY
12
C196 1U/6/Y5V/16V
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
PCI EXPRESS CONN X8
GA-9IVDTH
1
22 73Monday, October 17, 2005
of
2.1
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