Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2004/12/17 下午 09:01:10
Project Code S93029-0 Customer GOOGLE-N
Project Name GA-9IVDP-GG Revision Old NA New 1.1
Model Name GA-9IVDPP-GG IT Doc No DR04C263
P/N 9M9IVDPP0-GG-11A RD Doc No
PCB Rev. 1.1 Check Sum
M/B GA-9IVDPP-GG 1.1A
P/N Description
FINISHED GOOD GOOGLE
Description GA-9IVDPP-GG schematic release
Remark
Approved By daniel.hou 2004/12/20 下午 12:26:04 Applicant Cloud.Chen
Research
Management
emily.chin
2004/12/20 下午
02:31:14
R
R
IT
IT
Validation Manager Project Manager
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2
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Effected Class
a
a
M
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/1
/1
4
4
n
n
2/
2/
g
g
a
a
20
20
e
e
R N M
A B C D E F
A B
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2004/12/20http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
emily.chin
5
4
3
2
1
LV-NOCONA800/ LINDENHURST-VS
GA-9IVDPP-GG
D D
V1.1A
C C
BOARD STACK-UP
3.70 mil
B B
3.70 mil
11.1 mil
10.0 mil
11.1 mil
3.70 mil
3.70 mil
PP 2116
CORE
PP 2116+7628
CORE
PP 2116+7628
CORE
PP 2116
COMPONENT SIDE
GND
INT 1
(PWR)
INT 2
SOLDER SIDE
1.5 OZ
1 OZ
1 OZ
1 OZ
1 OZ(PWR)
1 OZ
1 OZGND
1.5 OZ
2.0 mil
1.35 mil
1.35 mil
1.35 mil
1.35 mil
1.35 mil
1.35 mil
2.0 mil
A A
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Docum e n t N u mb er Re v
5
4
3
2
Date: Sheet
COVER SHEET
GA-9IVDPP-GG
170Friday, De ce mb er 17, 2004
1
1.1
of
5
4
3
2
1
6.4GB/s
EVRD 10.1
Intel
LV-Xeon 2.8G
Processor
CPU 1
2.1GB/s up to 2.7GB/s
2.1GB/s up to 2.7GB/s
150MB/s
USB
IDE Bus ATA-100
Channel A
DDR266(X4)/333(X3)DIMMModuleX4
Channel B
DDR266(X4)/333(X3)DIMMModuleX4
SATAx2
IDE Connector * 2
Back Panel USB 2.0X4
EVRD 10.1
Intel
LV-Xeon 2.8G
D D
RJ45
LAN
Processor
CPU 0
BROADCOM
RJ45
LAN
PCI-E SLOT(X4)
X4
PCI EXPRESS X8 ( 16GB/S)
BCM5751
GbE MAC/PHY
X1
System Bus(800MT/S)
Intel
Lindenhurst
VS
C C
82541 GB LAN
(32/66)
PCI-X 66MHZ SLOT
SATAx4
IDE Connector *4
SII3114
(32/66)
PDC20618
(32/66) or
ATP867 (64/66)
PCI-X (64/66)
HUB INTERFACE 1.5
266MB/s
Hance
Rapids
ESB6300
B B
8MB
SDRAM
PCI 32 Bit BUS 133MB/s
ATI Rage XL
VGA
Intel
FWH
LPC
SST49LF004B
SensorV/T
IT8712IX
LPC Super I/O
128 PQFP
A A
LPT/GPIO
VGA Connector
5
4
COM1
3
CPU0
FAN
SYS1
FAN
CPU1
FAN
SYS2
FAN
2
SYS3
FAN
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
BLOCK DIAGRAM
Size Document Number Rev
Date: Sheet
GA-9IVDPP-GG
1
270Friday, December 17, 2004
of
1.1
5
4
3
2
1
SYS RESET & PWR SET
BTN
LEVEL
D D
LOGIC
DB400
CK409B
C C
B B
PWB+
FP
PWRDWN#
PWRDWN#
CK409B_PWR_GD#
VID_PWRGD
CPU0_THRMTRIP#
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
CPU0_BSEL[0/1]
CPU1_BSEL[0/1]
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
CPU1_THRMTRIP#
R
CPU_VRD_PWR_GD
P0
VTTEN
VTTEN
P1
LINDENHUST
CPU_RST#
A A
BTN
MCH
PWROK
PCI_RST#
FP
5
FET
VTT
LEVEL
P1_SKT0CC#
RST_SW
PWRBTN
SB_VTT_PWRGD
VTTEN
P3V3
LEVEL
CPU_PWR_GD
PS_PWR_GD
75
PWRBTN
R
71
76
72
SIO
ATX_PG
DDR DIMM DDR DIMM
DDR DIMM
DDR DIMM
AB
DDR DIMM
1.2V
ISL6227
VTT_PWRGD
BSEL
COMPARE
LOGIC
VTT_ENABLE
CPU_VRD_PWR_GD
DDRA_PCIRST#
DDR DIMM
DDR DIMM
DDR DIMM
DDRB_PCIRST#
2.5V
ISL6563
1.25V
6420A
PWRGD_1_5VPWRGD_2_5V
PLD
LOGIC
100ms
CPU_VRD_PWR_GD
SYS_PWR_GD#
H-R
SYS_PWR_GD_3_3V
PWROK
SYS RST#
PCI_RST#
4
PCI_RST#
RESET buffer
PLD
BUFF
PCI_RST_BUFF1#
ATI VGA
SII3114
PCI-64/66 CONN
ATP867
PCI- 32/33 CONN
3
IDE_RSTDRV#
RESET buffer
IDE_RSTDRV#
1.5V
ISL6539
PCI-E 5751
PCI-X 82541PI
IDE CONN
2
SLP_S#3
PS_PWR_GD#
VR0_SYS_ENABLE
VR1_SYS_ENABLE
CPU1_VRD_PWR_GD
SYS_PWR_GD_BUFF
IDE CONN
IDE CONN
SIO
SE-LINK
FWH
ATX CONN
H-R
SLP_S#3
PS_PWR_GD
ATX_PG
VGA_HV
P0 VCORE
ISL6563CPU0_VRD_PWR_GD
P1 VCORE
ISL6563
PCI-E X4 SLOT1
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
SYS RESET
Size Document Number Rev
Date: Sheet
GA-9IVDPP-GG
1
5VSB
3VSB
ISL6227
5V
ISL6227
3V
ISL6227
1.1
370Friday, December 17, 2004
of
5
4
3
2
1
14.318
CRYSTAL
D D
3V66_1
CK 409B
CLOCK SYNTHESIZER
C C
DRIVER
3V66_2
USB_48
PCIF0
DOT_48
PCI_4
B B
SMA CONNECTOR
ITP_BCLK_P/N (167MHZ)
CPU3
MCH_BCLK_P/N (167MHZ)
CPU2
MCH_66MHZ_CLK
P1_BCLK_P/N(167MHZ)
CPU1
P0_BCLK_P/N(167MHZ)
CPU0
ICH_HI66MHZ_CLK
ICH_USB_48MHZ_CLK
ICH_33MHZ_CLK
ICH_14MHZ_CLK
REF0
SIO_48MHZ_CLK
SIO_33MHZ_CLK
DB400_SRC_100MHZ_CLK_P/N
SRC
2
2
2
2
PCIF1
PCI 0
PCI 1
PCI 2
REF 1
PCI 3
A A
5
PCI_SLOT3_33MHZ_CLK
VIDEO_33MHZ_CLK
PLD_33MHZ_CLK
VIDEO_14MHZ_CLK
FWH_33MHZ_CLK
4
CLOCK BLOCK DIAGRAM
ITP_XDP
BCLK(P/N-1/0)
BCLK(P/N-1/0)
32.768KHZ
CRYSTAL
Hance
Rapids
SUS_CLK
SIO
2
PCI 32/33 (SLOT )
PLD
VIDEO
(RAGE XL)
FWH
CUP1
CUP0
25MHZ
CRYSTAL
MCH_SRC_100MHZ_CLK_P/N
ICH_SRC_100MHZ_CLK_P/N
SUS_CLK
DDRA_CMDCLK_A0_P/N
DDRA_CMDCLK_A1_P/N
DDRA_CMDCLK_A2_P/N
DDRA_CMDCLK_A3_P/N
DDRB_CMDCLK_B0_P/N
DDRB_CMDCLK_B1_P/N
LINDENHURST
DDRB_CMDCLK_B2_P/N
DDRB_CMDCLK_B3_P/N
3
2
DDR266 DIMM #A1
2
DDR266 DIMM #B1
2
2
2
2
2
2
PCI EXPRESS SLOT1
EXP_SLOT1_100MHZ_CLK_P/N
2
DIFF0 DIFF1
DB400 (SRC -DIFFERENTIAL BUFFER)
SRC
PCIXSLOT
2
BCM5751
82541PI
ATP867B
SIL3114
25MHZ
CRYSTAL
Title
Size Document Number Re v
Date: Sheet
2
DDR266 DIMM #A2
DDR266 DIMM #B2
DDR266 DIMM #A3
DDR266 DIMM #B3
DDR266 DIMM #B4
DDR266 DIMM #A4
2
DIFF3
DIFF2
2
25MHZ
CRYSTAL
GIGA-BYTE TECHNOLOGY CO., LTD.
CLOCK BLOCK
GA-9IVDPP-GG
of
470Friday, December 17, 2004
1
1.1
5
4
3
2
1
Hance
D D
Rapids
SMB Address = 44h
HR SMB PU 3.3VSB
HR/ LAN1/LAN2/SMBUS_HEADER
P3V3_DUAL
R1755
R1756
BCM575182541PI
C C
ICH_SDA
ICH_SCL
PCA9515/SO8
I2C_SDA
I2C_SCL
Co-Layout MOSFET/SW
Q214/Q217
B B
A A
5
P3V3
R1331
R1332
4
ITE-8712F-IX
R718/X,
R719/X
31
DIMM B-1
SMB Address = A8h
DIMM A-1
SMB Address = A0h
R1628,
R1629
PCI-X Slot1
66MHZ
R716/X,
R717/X
32
DIMM B-2
SMB Address = AAh
DIMM A-2
SMB Address = A2h
MCH
LINDENHURST-VS
SMB Address = 60h
3
PCI-E Slot#1 ITP
R714/X,
R715/X
33
DIMM B-3
SMB Address = ACh
30
DIMM A-3
SMB Address = A4h SMB Address = DCh
R712/X,
R713/X
DIMM B-4
SMB Address = AEh
R1673,
R1674
DIMM A-3
SMB Address = A6h
R1675,
R1676
2
33
CK-409B
SMB Address = D2h
R1677,
R1678
DB400
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Docum e n t N u mb er Re v
Date: Sheet
SMBUS
GA-9IVDPP-GG
1
570Friday, De ce mb er 17, 2004
1.1
of
5
4
3
2
1
ERP12V
ISL6563
P12V_CPU_0
60A
ISL6563
P12V_CPU_1
D D
60A
ATX CONN
P12V
P12V
ISL6563
39A/8A
ISL6539
8A/15A
P_VCCP0
P_VCCP1
CPU0
1.0/CORE
CPU1
1.0/CORE
38.8A
P2V5
P1V25_VTT
P_VTT
P1V5
6.5A
6.5A
13A
P5V 15A
4.8A
MCH
1.2/1.5/2.5
3.2A
5.5A
8.8A
DDR266
1.25/2.5
6.5A
30.0A
Hance
Rapid
1.2/1.5
3.3/P3V3_STBY/P5V_STBY
732 mA
2.5 mA
528 mA
142 mA
IT8712F
300mW max
P5V
P5V_STBY VBAT
30 mA
60 mA
MAX3243
C C
P5V
15A
MIC37102BM
ISL6227
6A
P3V3_STBY
B B
P3V3_STBY
6420
SW
P3V3
P5V_STBY
1A
APL1084
P5V
P3V3
P2V5_VIDEO
90mA
350mA
<600mA
P3V3 300 mA
P1V8
P3V3
430mA
40mA
ATP867
5V/ 3.3V
Rage XL
2.5V/ 3.3V
SII3114
3.3V/ 1.8V
VDDC=2.5V <1.5W
10mA min to 1A max
/LM431
SW
40 mA
2000mA
P3V3_DUAL
P5V
P3V3
A A
P3V3_DUAL
P3V3
PCI-X CONN
PCI-E CONN
RC1117
320 mA
FAN1112
400 mA
26mA(3.3V) + 206mA(2.5V)
MMJT9435
563mA
320mA
400mA
563mA
P12V
P5V
HDD PWR
P12V
5
4
3
3.3V
1.8V
1.2V
3.3V
1.2V
Intel 82541PI
GIGA LAN
BCM5751 1.5W
206mA
2
2.5V3.3V
Title
Size Document Number Rev
Date: Sheet
SW
8A/15A8/10A
HDD PWR
GIGA-BYTE TECHNOLOGY CO., LTD.
PWR DELIVERY
GA-9IVDPP-GG
670Friday, December 17, 2004
1
of
1.1
5
GPIO R PWR WELL FUNCTION
GPIO 0
I
GPIO 1
GPIO 2
GPIO 3
GPIO 4
D D
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
C C
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
B B
GPIO 43
GPIO 44
GPIO 55
GPIO 56
GPIO 57
GPIO 58
GPIO 63
NOTE
PUPU8.2K
I
8.2K
I
8.2K
I
PU
8.2K
I
PU
8.2K
I
PU
8.2K
I
4.7K IPMI_SMI#
I
PU 4.7K P3V3 NO USE
I
PU IN P3V3_STBY
I
8.2KPU ICH_SMBALERT# ALERT EVENT FROM SMBUS CONNECTOR OR 82541
PU
I
8.2K
I
PU
8.2K
PU IN
O
PU IN
O
O
O
O
O
OD
O
PU 8.2K
I/O
I/O
PU 8.2K
PU 8.2K
I/O
PU 8.2K
I/O
N/A
N/A
N/A
I/O
/O
I
PU 8.2K P3V3
PU
I
8.2K
/O
PU
/O
I
8.2K
PU
/O
I
8.2K
I/O
I/O
I/O
I/O
I/O
10K
I/O
10K DETECT SECANDERY IDE CABLEP3V3
PD
I/O
10K
PU
OD
10K
PU
OD
ONLY GPIO[0:15] ALLOW AN INPUT TO BE ROUTED TO SMI# OR SCI
Hance Rapids
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3PU
P3V3_STBY
P3V3_STBY
P3V3_STBY
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V38.2K
P3V3
P3V3_STBY
P3V3_STBY
P3V3_STBY
P3V3_STBY
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3_STBY
P3V3_STBY
PX_REQ2PX_REQ3-
P_ IRQE-PU
P_ IRQFP_ IRQGP_ IRQH-
MCH_PME#
PX_GNT2PX_GNT3-
HDD_ON_2
SATALED# SATALED#
HDD_ON_3
B5751 GPIO0
WDT_TOUT-
PX_IRQ0PX_IRQ1PX_IRQ2PX_IRQ3HDD_ON_4
HDD_ON_5
HDD_ON_6
S66DETPD
P66DET
PLL0
PLL1
4
PX_REQ2PX_REQ3-
NO USE
NO USE
CPU0_PROCHOT#
CPU1_PROCHOT#
NO USE
NO USE
SIO_SMI#
NO USE
NO USE
NO USE
PME EVENT FROM MCH
NO USE
NO USE
PX_GNT2PX_GNT3-
NO USE
NO USE
NO USE
HDD_2 POWER ON
HDD_3 POWER ON
NO USE
B5751 GPIO0
NO USE
NO USE
NO USE
NO USE
NO USE
NO USE
NO USE
PCI-X CONN
PCI-X CONN
PCI-X CONN
PCI-X CONN
HDD_4 POWER ON
HDD_5 POWER ON
HDD_6 POWER ON
NO USE
NO USE
DETECT PRIMERY IDE CABLEP3V3
NO USE
NO USE
PLLSEL0
PLLSEL1
NO USE
NO USE
NOMAL/ACT
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/H
L/H
H/L
L/H
H/L
L/H
L/H
L/H
3
GPIO PWR
GPIO 17
P5V
GPIO 22
P5V
GPIO 23
STBY
GPIO 42
GPIO 43 STBY
GPIO 44
GPIO 45 STBY
GPIO 46
GPIO 47
GPIO 53
GPIO 54
NOTE
PCI-X 66 SLOT
PCI-X 32\66 ATP867 PX_AD20
PCI-X 32\66 SIL3114
PCI-X 32\66 LAN 82541
PCI-33 ATI
TIMING RE LATIONSHIP BET WEEN DRAM AND FSB
PLLSEL[1:0]
167/667
200/800
I
STBY
I
STBY O SIO_SMI#
STBY
O
STBY
OD
STBY
I/OD
GPIO(10/40/41/42/43/44/45/46/53/54/55) POWER BY STBY
PCI DEVICE
DDR266
11
11
PU_8.2K
PU_8.2K
DDR333
10
00
2
SB_CPU_FORCEPR#
strap to 0.P5V
strap to 0.
SIO_PSON# PWR ON FROM SIO(NO USE)O
PWBTIN
HR_PWRBNIN#
SLP_S#3
ICH_PME#
DIS_LAN82541#
DIS_LAN5751#
IDSEL
PX_AD18
PX_AD21
PX_AD22
A_D30
SIO
FUNCTION NOMAL/ACT
PWR BTIN FROM FP(NO USE)
HR_PWRBNIN#(NO USE)
INDECATE S3 MODE FROM H-R
SMI FROM SIO
WAKE UP FROM HR
REQ / GNT
PX_REQ0 / PX_GNT0
PX_REQ1 / PX_GNT1
PX_REQ2 / PX_GNT2
PX_REQ3 / PX_GNT3
REQ1 / GNT1
IRQ ROUTING
3 0 1 2
0
1
2
C
1
H/L(PWR ON)
H/L
H/L
H/L
H/L
H/L
H/LO
H/L
H/L
A A
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
PCI ROUTING
Size Document Number Rev
5
4
3
2
Date: Sheet
GA-9IVDPP-GG
1
1.1
770Friday, December 17, 2004
of
5
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1
END PROCESSOR 0
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
SC393
1U/6/Y/10V
AB6
Y9
AA8
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
Y23
AD27
AA25
Y24
AA27
Y26
SC470
0.1U/6/X/16V
2
U36B
D63
NOCONA 667
D62
D61
D60
D59
D58
D57
D56
D55
D54
D53
D52
D51
D50
D49
D48
D47
D46
D45
D44
D43
D42
D41
D40
D39
D38
D37
D36
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOCONA 667_7
SB_HA#35
C8
A35
SB_HA#34
C9
A34
SB_HA#33
A7
A33
SB_HA#32
A6
A32
SB_HA#31
B7
A31
SB_HA#30
C11
A30
SB_HA#29
D12
A29
SB_HA#28
E13
A28
SB_HA#27
B8
A27
SB_HA#26
A9
A26
SB_HA#25
D13
A25
SB_HA#24
E14
A24
SB_HA#23
C12
A23
SB_HA#22
B11
A22
SB_HA#21
B10
A21
SB_HA#20
A10
A20
SB_HA#19
F15
A19
SB_HA#18
D15
A18
SB_HA#17
D16
A17
SB_HA#16
C14
A16
SB_HA#15
C15
A15
SB_HA#14
A12
A14
SB_HA#13
B13
A13
SB_HA#12
B14
A12
SB_HA#11
B16
A11
SB_HA#10
A13
A10
SB_HA#9
D17
A9
SB_HA#8
C17
A8
SB_HA#7
A19
A7
SB_HA#6
C18
A6
SB_HA#5
B18
A5
SB_HA#4
A20
A4
SB_HA#3
A22
A3
SB_REQ#4
B22
BREQ4#
SB_REQ#3
C20
BREQ3#
SB_REQ#2
C21
BREQ2#
SB_REQ#1
B21
BREQ1#
SB_REQ#0
B19
BREQ0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
SB_DBI#3
AB9
DBI3#
SB_DBI#2
AE12
DBI2#
SB_DBI#1
AD22
DBI1#
SB_DBI#0
AC27
DBI0#
SB_DP#3
AE17
DP3#
SB_DP#2
AC15
DP2#
SB_DP#1
AE19
DP1#
SB_DP#0
AC18
DP0#
SB_AP#1
D9
AP1#
SB_AP#0
E10
AP0#
SB_ADSTB#1
F14
SB_ADSTB#0
F17
SB_DSTBP#3
Y11
SB_DSTBP#2
Y14
SB_DSTBP#1
Y17
SB_DSTBP#0
Y20
SB_DSTBN#3
Y12
SB_DSTBN#2
Y15
SB_DSTBN#1
Y18
SB_DSTBN#0
Y21
Trace Width:12 Mils
VREF_P_VTT_CPU0_0
VREF_P_VTT_CPU0_3
VCCIOPLL_CPU0
AGND_CPU0
PU_VCCPLL_CPU0
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
NOCONA 800 MICS P0
Size Document Number R ev
Date: Sheet
NO USE
SB_D#[63..0]11,18
VREF_P_VTT_CPU0_3
VREF_P_VTT_CPU0_0
PU_VCCPLL_CPU0
12
SC369
22U/12/Y/10V
P_VTT
12
SC473
22U/12/Y/10V
SB_BPRI#
SB_BPRI#11,18
SB_CPU0_BREQ#239
SB_CPURST#9,11,13,18
P_VTT
SR86
49.9/6/1
VREF_P_VTT_CPU0_3_R
SR87
90.9/6/1
P_VTT
R637
49.9/6/1
VREF_P_VTT_CPU0_0_R
R636
90.9/6/1
SB_RS#[2..0]11,18
SB_CPU_A20M#9,11,37
SB_CPU_IGNNE#9,11,37
SB_CPU_INIT#9,11,37,51
SB_CPU_NMI9,11,37
SB_CPU_INTR9,11,37
CPU_PWR_GD9,11,13,52
ICH_CPU_SMI#9,11,37
SB_CPU_SLP#9,11,37
SB_CPU_STPCLK#9,11
ITP_TDI_MAIN13
ITP_TMS_MAIN11,13
SB_CPU0_BSEL19,10
SB_CPU0_BSEL09,10
VR0_VCCSENSE62
VR0_VSSSENSE
SC493
1U/6/Y/10V
C395
1U/6/Y/10V
5
D D
C C
P_VCCP_A_CPU0
AGND_CPU0
B B
754mV
A A
754mV
SB_CPU0_BREQ#23
SB_BREQ#19,11,14
SB_BREQ#09,11,14
SB_RSP#11,18
P0_BCLK#32
P0_BCLK32
ITP_TCK011,13
ITP_TRST#11,13,17
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
VID_CPU0_R553,62
VID_CPU0_R453,62
VID_CPU0_R353,62
VID_CPU0_R253,62
VID_CPU0_R153,62
VID_CPU0_R053,62
VTTEN9,11,52
SB_BREQ#1
SB_BREQ#0
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
ICH_CPU_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P0_BCLK#
P0_BCLK
ITP_TCK0
ITP_TDI_MAIN
ITP_TMS_MAIN
ITP_TRST#
SB_CPU0_BSEL1
SB_CPU0_BSEL0
VID_CPU0_R5
VID_CPU0_R4
VID_CPU0_R3
VID_CPU0_R2
VID_CPU0_R1
VID_CPU0_R0
VR0_VCCSENSE
VTTEN
VR0_VSSSENSE
SR82
0/6
R673
0/6
SC472
220P/6
C413
220P/6
U36A
D23
BPRI#
D10
BR3#
E11
BR2#
F12
BR1#
D20
BR0#
Y8
RESET#
F21
RS2#
D22
RS1#
E21
RS0#
C6
RSP#
F27
A20M#
C26
IGNNE#
D6
INIT#
G23
LINT1_NMI
B24
LINT0_INTR
AB7
PWRGOOD
C27
SMI#
AE6
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
E24
TCK
C24
TDI
A25
TMS
F24
TRST#
AB3
BSEL1
AA3
BSEL0
AE29
RESERVED1
AE28
RESERVED0
AE30
RSVD16
Y3
RSVD15
AD29
RSVD14
AD28
RSVD13
AC29
RSVD12
AB29
RSVD10
AB28
RSVD9
AA29
RSVD8
AA28
RSVD7
AE15
RSVD3
AC1
RSVD2
AE16
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
AD4
VCCIOPLL
B27
VCC_SENSE
E1
VTTEN
AB4
VCCA
AA5
VSSA
D26
VSS_SENSE
NOCONA 667_7
WIDE 10-12 MILS
VREF_P_VTT_CPU0_3
SC464
220P/6
WIDE 10-12 MILS
VREF_P_VTT_CPU0_0
C414
220P/6
NOCONA 667
BOOT_SELECT
OPTIMIZED_COMPAT#
4
ADS#
BINIT#
BNR#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
THERMTRIP#
PROCHOT#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
THERMDC
THERMDA
RSVD
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
P_VTT
D19
F11
F20
E4
E8
F5
E7
F8
F6
F18
C23
E18
E22
HIT#
A23
E19
A17
D7
E5
E27
F26
B25
E25
TDO
F9
F23
W9
W23
B5
A3
AC28
D25
E16
AD16
Y29
A26
AE5
AD5
AA7
Y6
W8
W7
W6
AE4
AD1
Y28
Y27
G7
W3
B1
A16
A15
AC30
C1
P1V5
SB_ADS#
SB_BINIT#
SB_BNR#
CPU0_BPM#5
CPU0_BPM#4
CPU0_BPM#3
CPU0_BPM#2
CPU0_BPM#1
CPU0_BPM#0
SB_DBSY#
SB_DEFER#
SB_DRDY#
SB_HIT#
SB_HITM#
SB_TRDY#
SB_LOCK#
SB_MCERR#
SB_CPU0_IERR#
SB_CPU_FERR#
SB_CPU_THERMTRIP#
SB_CPU0_PROCHOT#
ITP_TDO_P0
PD_ODTEN_CPU0
SMC_CPU0_SKTOCC#
PD_COMP3_CPU0
PD_COMP2_CPU0
PD_COMP1_CPU0
PD_COMP0_CPU0
PU_CPU0_8
PU_CPU0_7
PU_CPU0_6
PU_CPU0_5
PU_CPU0_4
PU_CPU0_3
PU_CPU0_2
PU_CPU0_1
PU_CPU0_0
CPU0_THERMDC
CPU0_THERMDA
PU_BOOT_SELECT_CPU0
VID_PWRGD
SB_CPU0_CPU1_TESTBUS
CPU_FORCEPR#
SLEW_CTRL_CPU0
CPU0_OPTIM_COMPAT_CTRL
COMP3 =SB_CPU0_ADDR_ERC
COMP2 =SB_CPU0_DATA_ERC
PU_CPU0_8=SB_CPU0_EDRDY
PU_CPU0_0=SB_CPU0_SNPD#
100mA
L14
10UH/1206
L13
10UH/1206
SR59
0/6/X
SB_DEFER# 11,18
SB_TRDY# 11,18
SB_CPU0_IERR# 9,14
SB_CPU_FERR# 9,11,37
SB_CPU_THERMTRIP# 9, 11,37
SB_CPU0_PROCHOT# 9,14
ITP_TDO_P0 13
PD_ODTEN_CPU0 9
SMC_CPU0_SKTOCC# 9
PD_COMP3_CPU0 9
PD_COMP2_CPU0 9
PD_COMP1_CPU0 9
PD_COMP0_CPU0 9
PU_CPU0_8 9
PU_CPU0_7 9
PU_CPU0_6 9
PU_CPU0_5 9
PU_CPU0_4 9
PU_CPU0_3 9
PU_CPU0_2 9
PU_CPU0_1 9
PU_CPU0_0 9
TP15
CPU0_THERMDC 10
CPU0_THERMDA 10
PU_BOOT_SELECT_CPU0 9
TP16
VID_PWRGD 11,52
SB_CPU0_CPU1_TESTBUS 9 ,11
CPU_FORCEPR# 9,11,14
SLEW_CTRL_CPU0 9
CPU0_OPTIM_COMPAT_CTRL 9
12
C406
22U/12/Y/10V
12
+
SEC2
470U/4V/7343/X
SB_ADS# 11,18
SB_BINIT# 9,11,18
SB_BNR# 9,11,18
CPU0_BPM#[5..0] 13
SB_DBSY# 11,18
SB_DRDY# 11,18
SB_HIT# 9,11,18
SB_HITM# 9,11,18
SB_LOCK# 11 ,18
SB_MCERR# 9,11,18
WIDE 10-12 MILS
P_VCCP_A_CPU0
AGND_CPU0
WIDE 10-12 MILS
PU_VCCPLL_CPU0
12
SC392
SC396
4.7U/1206/X
0.1U/6/X
SC398
0.1U/6/X
3
SB_HA#[35..3] 11,18
SB_REQ#[4. .0] 11, 18
SB_DBI#[3..0] 11, 18
SB_DP#[3..0] 11,18
SB_AP#[1..0] 11,18
SB_ADSTB#[1..0] 11,18
SB_DSTBP#[3..0] 1 1 ,18
SB_DSTBN#[3..0] 11,18
GA-9IVDPP-GG
1
870Friday, December 17, 2004
1.1
of
5
P_VTT
R788 2 20/6
R789 2 20/6 R804 51/6/X
D D
R799 2 20/6
R814 2 20/6
R677 2 20/6
R803 2 20/6
R808 2 20/6
R797 51/6
R793 2 20/6
C C
R800 51/6 R802 4.7K/6
R817 51/6
Close to CPU0
R777 51/6
Routing topology PU_RHRPU_R CPU0 CPU1
R776 51/6
B B
SR74 39/6
SR85 39/6
SR83 39/6
SR84 39/6
SR73 39/6
P3V3
A A
R805 4.7K/6
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_INTR
SB_CPU_SLP#
SB_CPU_STPCLK#
R554 0/6
SB_CPU_NMI
CPU_FORCEPR#
CPU1HRRouting topology CPU0 PU_R
ICH_CPU_SMI#
SB_CPU0_IERR#
SB_CPU0_PROCHOT#
CPU0 HRRouting topology PU_RCPU1PU_R
SB_CPU_THERMTRIP#
SB_CPU_FERR#
SB_BININ#_R SB_BINIT#
SB_BNR#_R
SB_HIT#_R
SB_HITM#_R
SB_MCERR#_R SB_MCERR#
VTTEN
5
SC457
47P/6/N/50V
SC465
47P/6/N/50V
SC467
47P/6/N/50V
SC466
47P/6/N/50V
SC452
47P/6/N/50V
SB_BNR#
SB_HIT#
SB_HITM#
SB_CPU_A20M# 8,11,37
SB_CPU_I GNN E# 8,11, 37
SB_CPU_INIT# 8,11, 37,51
SB_CPU_INTR 8, 11,37
SB_CPU_SLP# 8,11,37
SB_CPU_STPCLK# 8,11
ICH_CPU_STPCLK# 37
SB_CPU_NMI 8, 11,37
CPU_FORCEPR# 8,11,14
ICH_CPU_SMI# 8,11,37
SB_CPU0_I ER R# 8,14
SB_CPU0_PROCHOT# 8,14
SB_CPU_THERMTRIP# 8,11,37
SB_CPU_ FE RR # 8,11, 37
O.D.
VTTEN 8,11, 52
4
SB_BINIT# 8, 11,18
SB_BNR# 8,11,18
SB_HIT# 8,11,18
SB_HITM# 8,11,18
SB_MCERR# 8,11,18
4
together
To CPU
From HR
P_VTT
R798 51/6/X
SR81 51/6
SR79 51/6
SR80 51/6
R638 510/6
R678 510/6
R813 100/6/1
R635 100/6/1
SR78 49.9/6/1
R672 49.9/6/1
P_VTT
R801 51/6
R778 51/6
P_VTT
R796
PU_BOOT_SELECT_CPU0
CPU0_OPTIM_COMPAT_CTRL
SB_BREQ#0
SB_BREQ#1
SB_CPU0_BREQ#23
SB_CPU0_BSEL1
SB_CPU0_BSEL0
PD_COMP2_CPU0
PD_COMP3_CPU0
PD_COMP1_CPU0
PD_COMP0_CPU0
PD_ODTEN_CPU0
PD_ODTEN_CPU1
SB_CPU0_CPU1_TESTBUS
51/6
R795 0/6/X
3
X
X
End-CPU ENABLE ODT
PD_ODTEN_CPU0 8
PD_ODTEN_CPU1 11
Mid-CPU DISABLE ODT
SB_CPU0_CPU1_TESTBUS 8,11
3
PU_BOOT_SELECT_CPU0 8
CPU0_OPTIM_COMPAT_CTRL 8
SB_BREQ#0 8,11,14
SB_BREQ#1 8,11,14
SB_CPU0_BREQ#23 8
SB_CPU0_BSEL1 8,10
SB_CPU0_BSEL0 8,10
PD_COMP2_CPU0 8
PD_COMP3_CPU0 8
PD_COMP1_CPU0 8
PD_COMP0_CPU0 8
together
2
P_VTT
P3V3_STBY
P_VTT
2
1
CPU_PWR_GD
R676 300/6
R675 51/6
R659 51/6/X
R634 51/6/X
R665 51/6/X
R660 0/6
SB_CPURST#
END CPU NOT USE
R666 51/6/X
R794 51/6/X
R606 51/6
R603 51/6
R625 51/6
R622 51/6
R619 51/6
R610 51/6
R615 51/6
PU_CPU0_8
PU_CPU0_7
PU_CPU0_6
PU_CPU0_5
PU_CPU0_4
PU_CPU0_3
PU_CPU0_2
PU_CPU0_1
PU_CPU0_0
Title
Size Docum e n t N u mb er Re v
Date: Sheet of
CPU_PW R _ G D 8, 11,13, 52
CLOSE TO CPU0
SB_CPURST# 8,11,13,18
SLEW_CTRL_CP U0
SLEW_CTRL_CP U1
SMC_CPU0_SKTOCC#
X
SMC_CPU0_SKTOCC# 8
X
PU_CPU0_8 8
X
PU_CPU0_7 8
PU_CPU0_6 8
PU_CPU0_5 8
PU_CPU0_4 8
PU_CPU0_3 8
PU_CPU0_2 8
PU_CPU0_1 8
PU_CPU0_0 8
SLEW_CTRL_CPU0 8
SLEW_CTRL_CPU1 11
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P0 TERMINATION
GA-9IVDPP-GG
1
C397
100P/6/X
970Friday, De ce mb er 17, 2004
1.1
5
U36C
L31
D D
C C
B B
A A
L29
L27
L25
L23
L9
L7
L5
L3
L1
K30
K28
K26
K24
K8
K6
K4
K2
J31
J29
J27
J25
J23
J9
J7
J5
J3
J1
H30
H28
H26
H24
H8
H6
H4
H2
G31
G29
G27
G25
G9
G5
G3
G1
F30
F28
F25
F19
F13
F7
F2
E31
E29
E23
E17
E15
E9
D30
D28
D27
D21
D11
D5
D2
C31
C29
C25
C19
C13
C7
B30
B28
B23
B17
B15
B9
B2
A31
A29
A27
A21
A11
A5
VSS9
NOCONA 667
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
NOCONA 667_7
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
U36D
L30
L26
L24
L8
L6
L4
L2
K31
K29
K27
K25
K23
K9
K7
K5
K3
K1
J30
J28
J26
J24
J8
J6
J4
J2
H31
H29
H27
H25
H23
H9
H7
H5
H3
H1
G30
G28
G26
G24
G8
G6
G4
G2
F31
F29
F22
F16
F4
F1
E30
E28
E26
E20
E6
E2
D31
D29
D24
D18
D14
D8
D1
C30
C28
C22
C16
C4
C2
B31
B29
B26
B20
B6
A30
A28
A24
A18
A14
A8
A2
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
NOCONA 667_7
NOCONA 667
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
3
P_VCCP0P_VCCP0
CPU0_THERMDA8
CPU0_THERMDC8
MMBT3904
SB_CPU0_BSEL18,9
2
P_VTT
U36E
AD12
VCC_VTT1
Y10
F10
B4
C5
A4
R668
0/6
R667
0/6
ECB
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_CORE160
VCC_CORE161
VCC_CORE162
VCC_CORE163
VCC_CORE164
VCC_CORE165
VCC_CORE166
VCC_CORE167
VCC_CORE168
VCC_CORE169
VCC_CORE170
VCC_CORE171
VCC_CORE172
VCC_CORE173
VCC_CORE174
VCC_CORE175
VCC_CORE176
VCC_CORE177
VCC_CORE178
VCC_CORE179
VCC_CORE180
VCC_CORE181
NOCONA 667
NOCONA 667_7
GNDSIOA
CPU0_BSEL1 32,52
Q78
MMBT3904
SOT23
SB_CPU0_BSEL08,9
AC10
AA12
E12
C10
B12
P_VCCP0
AE24
AE18
AE14
AE8
AE3
AD30
AD26
AD20
AD6
AD2
AC31
AC22
AC16
AC4
AC3
AB30
AB24
AB18
AB14
AB8
AB2
L28
CPU0_THERMDA CPU0_THERMDA_H7
P3V3
R640
470/6
R680
470/6
Q82
SOT23
ECB
MMBT3904
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
R679
470/6
C410
100P/6
GNDSIOACPU0_THERMDC
R639
470/6
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
TD1P
TD1P 53
GNDSIOA 12,53
P3V3
ECB
Q81
SOT23
1
Q77
MMBT3904
SOT23
ECB
CPU0_BSEL0 32,52
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
NOCONA 800 P0 PWR/GND
Size Do cum ent Number Rev
5
4
3
2
Date: Sheet
GA-9IVDPP-GG
1
10 70Friday, December 17, 2004
1.1
of
5
PROCESSOR 1
SB_BPRI#
SB_BPRI#8,18
SB_CPU1_BREQ#2313
SB_CPURST#8,9,13,18
SB_CPU_STPCLK#8,9
SB_CPU1_BSEL112,13
SB_CPU1_BSEL012,13
VID_CPU1_R563
VID_CPU1_R463
VID_CPU1_R363
VID_CPU1_R263
VID_CPU1_R163
VID_CPU1_R063
VR1_VCCSENSE63
AGND_CPU1
VR1_VSSSENSE
P_VTT
R669
49.9/6/1
VREF_P_VCC P_CPU1_0_R
R671
84.5/6/1
P_VTT
SR48
49.9/6/1
VREF_P_VCC P_CPU1_3_R
SR49
84.5/6/1
5
SB_RS#[2..0]8,18
SB_CPU_A20M#8,9,37
SB_CPU_IGNNE#8,9,37
SB_CPU_INIT#8,9,37,51
SB_CPU_NMI8,9,37
SB_CPU_INTR8,9,37
CPU_PWR_GD8,9,13,52
ICH_CPU_SMI#8,9,37
SB_CPU_SLP#8,9,37
P1_BCLK#32
P1_BCLK32
ITP_TCK08,13
ITP_TDI_P113
ITP_TMS_MAIN8,13
ITP_TRST#8,13,17
P1 VREF
C415
1U/6/Y/10V
D D
C C
B B
754mV
A A
754mV
SB_CPU1_BREQ#23
SB_BREQ#08,9,14
SB_BREQ#18,9,14
SB_RSP#8,18
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
VTTEN8,9,52
SC368
1U/6/Y/10V
SB_BREQ#0
SB_BREQ#1
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
ICH_CPU_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P1_BCLK#
P1_BCLK
ITP_TCK0
ITP_TDI_P1
ITP_TMS_MAIN
ITP_TRST#
SB_CPU1_BSEL1
SB_CPU1_BSEL0
P_VCCP_A_CPU1
VR1_VCCSENSE
VTTEN
P_VCCP_A_CPU1
VR1_VSSSENSE
MCH A0 CPU B0 800 64.9ohm 0.678V
MCH B0 CPU C1 800 49.9ohm 0.756V
R670
0/6
SR50
0/6
D23
D10
E11
F12
D20
F21
D22
E21
F27
C26
G23
B24
AB7
C27
AE6
W5
E24
C24
A25
F24
AB3
AA3
AE29
AE28
AE30
AD29
AD28
AC29
AB29
AB28
AA29
AA28
AE15
AC1
AE16
VID_CPU1_R5
VID_CPU1_R4
VID_CPU1_R3
VID_CPU1_R2
VID_CPU1_R1
VID_CPU1_R0
AD4
B27
AB4
AA5
D26
WIDE 10-12 MILS
C411
220P/6
WIDE 10-12 MILS
SC371
220P/6
U35A
BPRI#
BR3#
BR2#
BR1#
BR0#
Y8
RESET#
RS2#
RS1#
RS0#
C6
RSP#
A20M#
IGNNE#
D6
INIT#
LINT1_NMI
LINT0_INTR
PWRGOOD
SMI#
SLP#
D4
STPCLK#
BCLK1
Y4
BCLK0
TCK
TDI
TMS
TRST#
BSEL1
BSEL0
RESERVED1
RESERVED0
RSVD16
Y3
RSVD15
RSVD14
RSVD13
RSVD12
RSVD10
RSVD9
RSVD8
RSVD7
RSVD3
RSVD2
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
VCCIOPLL
VCC_SENSE
E1
VTTEN
VCCA
VSSA
VSS_SENSE
NOCONA 667_7
VREF_P_VTT_CPU1_0
C412
220P/6
VREF_P_VTT_CPU1_3
SC370
220P/6
4
NOCONA 667
THERMTRIP#
BOOT_SELECT
OPTIMIZED_COMPAT#
4
BINIT#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
PROCHOT#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
THERMDC
THERMDA
RSVD
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
D19
ADS#
F11
F20
BNR#
CPU1_BPM#5
E4
CPU1_BPM#4
E8
CPU1_BPM#3
F5
CPU1_BPM#2
E7
CPU1_BPM#1
F8
CPU1_BPM#0
F6
F18
C23
E18
E22
HIT#
A23
E19
A17
D7
SB_CPU1_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU_THERMTRIP#
F26
SB_CPU1_PROCHOT#
B25
ITP_TDO_MAIN
E25
TDO
F9
F23
W9
W23
PD_ODTEN_CPU1
B5
SMC_CPU1_SKTOCC#
A3
PD_COMP3_CPU1
AC28
PD_COMP2_CPU1
D25
PD_COMP1_CPU1
E16
PD_COMP0_CPU1
AD16
PU_CPU1_8
Y29
PU_CPU1_7
A26
PU_CPU0_6
AE5
PU_CPU1_5
AD5
PU_CPU1_4
AA7
PU_CPU1_3
Y6
PU_CPU1_2
W8
PU_CPU1_1
W7
PU_CPU1_0
W6
AE4
AD1
CPU1_THERMDC
Y28
CPU1_THERMDA
Y27
PU_BOOT_SELECT_CPU1
G7
W3
VID_PWRGD
B1
SB_CPU0_CPU1_TESTBUS
A16
CPU_FORCEPR#
A15
SLEW_CTRL_CPU1
AC30
CPU1_OPTIM_COMPAT_CTRL
C1
COMP3 =SB_CPU1_ADDR_ERC
COMP2 =SB_CPU1_DATA_ERC
PU_CPU1_8=SB_CPU1_EDRDY
PU_CPU1_0=SB_CPU1_SNPD#
SB_ADS#
SB_BINIT#
SB_BNR#
SB_DBSY#
SB_DEFER#
SB_DRDY#
SB_HIT#
SB_HITM#
SB_TRDY#
SB_LOCK#
SB_MCERR#
P_VTT
P1V5
SB_DEFER# 8,18
SB_TRDY# 8,18
SB_CPU1_IERR# 13,14
SB_CPU_FERR# 8,9,37
SB_CPU_THERMTRIP# 8, 9,37
SB_CPU1_PROCHOT# 13,14
ITP_TDO_P1 13
PD_ODTEN_CPU1 9
SMC_CPU1_SKTOCC# 13 , 52
PD_COMP3_CPU1 13
PD_COMP2_CPU1 13
PD_COMP1_CPU1 13
PD_COMP0_CPU1 13
PU_CPU1_8 13
PU_CPU1_7 13
PU_CPU1_6 13
PU_CPU1_5 13
PU_CPU1_4 13
PU_CPU1_3 13
PU_CPU1_2 13
PU_CPU1_1 13
PU_CPU1_0 13
TP31
TP32
SL1
10UH/1206
SL2
10UH/1206
SR60
0/6/X
3
SB_ADS# 8,18
SB_BINIT# 8,9,18
SB_BNR# 8,9,18
CPU1_BPM#[5..0] 13
SB_DBSY# 8,18
SB_DRDY# 8,18
SB_HIT# 8,9,18
SB_HITM# 8,9,18
SB_LOCK# 8 ,18
SB_MCERR# 8,9,18
VREF_P_VTT_CPU1_3
VREF_P_VTT_CPU1_0
PU_VCCPLL_CPU1
CPU1_THERMDC 12
CPU1_THERMDA 12
PU_BOOT_SELECT_CPU1 13
VID_PWRGD 8,52
SB_CPU0_CPU1_TESTBUS 8 ,9
CPU_FORCEPR# 8,9,14
SLEW_CTRL_CPU1 9
CPU1_OPTIM_COMPAT_CTRL 13
WIDE 10-12 MILS
P_VCCP_A_CPU1
12
SC399
22U/12/Y/10V
WIDE 10-12 MILS
12
+
SEC1
470U/4V/7343/X
3
AGND_CPU1
12
SC394
4.7U/1206/X
SB_D#[63..0]8,18
PU_VCCPLL_CPU1
SC379
0.1U/6/X
NO USE
SC378
0.1U/6/X
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
AB6
Y9
AA8
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
Y23
AD27
AA25
Y24
AA27
Y26
12
SC383
22U/12/Y/10V
2
U35B
D63
D62
D61
D60
D59
D58
D57
D56
D55
D54
D53
D52
D51
D50
D49
D48
D47
D46
D45
D44
D43
D42
D41
D40
D39
D38
D37
D36
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOCONA 667_7
P_VTT
2
NOCONA 667
12
SC480
22U/12/Y/10V
1
SB_HA#35
C8
A35
SB_HA#34
C9
A34
SB_HA#33
A7
A33
SB_HA#32
A6
A32
SB_HA#31
B7
A31
SB_HA#30
C11
A30
SB_HA#29
D12
A29
SB_HA#28
E13
A28
SB_HA#27
B8
A27
SB_HA#26
A9
A26
SB_HA#25
D13
A25
SB_HA#24
E14
A24
SB_HA#23
C12
A23
SB_HA#22
B11
A22
SB_HA#21
B10
A21
SB_HA#20
A10
A20
SB_HA#19
F15
A19
SB_HA#18
D15
A18
SB_HA#17
D16
A17
SB_HA#16
C14
A16
SB_HA#15
C15
A15
SB_HA#14
A12
A14
SB_HA#13
B13
A13
SB_HA#12
B14
A12
SB_HA#11
B16
A11
SB_HA#10
A13
A10
SB_HA#9
D17
A9
SB_HA#8
C17
A8
SB_HA#7
A19
A7
SB_HA#6
C18
A6
SB_HA#5
B18
A5
SB_HA#4
A20
A4
SB_HA#3
A22
A3
SB_REQ#4
B22
BREQ4#
SB_REQ#3
C20
BREQ3#
SB_REQ#2
C21
BREQ2#
SB_REQ#1
B21
BREQ1#
SB_REQ#0
B19
BREQ0#
SB_DBI#3
AB9
DBI3#
SB_DBI#2
AE12
DBI2#
SB_DBI#1
AD22
DBI1#
SB_DBI#0
AC27
DBI0#
SB_DP#3
AE17
DP3#
SB_DP#2
AC15
DP2#
SB_DP#1
AE19
DP1#
SB_DP#0
AC18
DP0#
SB_AP#1
D9
AP1#
SB_AP#0
E10
AP0#
SB_ADSTB#1
F14
ADSTB1#
SB_ADSTB#0
F17
ADSTB0#
SB_DSTBP#3
Y11
DSTBP3#
SB_DSTBP#2
Y14
DSTBP2#
SB_DSTBP#1
Y17
DSTBP1#
SB_DSTBP#0
Y20
DSTBP0#
SB_DSTBN#3
Y12
DSTBN3#
SB_DSTBN#2
Y15
DSTBN2#
SB_DSTBN#1
Y18
DSTBN1#
SB_DSTBN#0
Y21
DSTBN0#
SC391
SC469
1U/6/Y/10V
EC27
PSA2.5VB680MH11/8X11.5/X
0.1U/6/X/16V
Trace Width:12 Mils
VREF_P_VTT_CPU1_0
VREF_P_VTT_CPU1_3
VCCIOPLL_CPU1
AGND_CPU1
PU_VCCPLL_CPU1
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
NOCONA 800 MICS P1
Size Document Number R ev
Date: Sheet
SB_HA#[35..3] 8,18
SB_REQ#[4..0] 8,18
SB_DBI#[3..0] 8,18
SB_DP#[3..0] 8,18
SB_AP#[1..0] 8,18
SB_ADSTB#[1..0] 8,18
SB_DSTBP#[3..0] 8,18
SB_DSTBN#[3..0] 8,18
GA-9IVDPP-GG
1
11 70Friday, December 17, 2004
1.1
of
5
D D
C C
B B
A A
L31
L29
L27
L25
L23
L9
L7
L5
L3
L1
K30
K28
K26
K24
K8
K6
K4
K2
J31
J29
J27
J25
J23
J9
J7
J5
J3
J1
H30
H28
H26
H24
H8
H6
H4
H2
G31
G29
G27
G25
G9
G5
G3
G1
F30
F28
F25
F19
F13
F7
F2
E31
E29
E23
E17
E15
E9
D30
D28
D27
D21
D11
D5
D2
C31
C29
C25
C19
C13
C7
B30
B28
B23
B17
B15
B9
B2
A31
A29
A27
A21
A11
A5
U35C
VSS9
NOCONA 667
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
NOCONA 667_7
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
P_VCCP1
L30
L26
L24
L8
L6
L4
L2
K31
K29
K27
K25
K23
K9
K7
K5
K3
K1
J30
J28
J26
J24
J8
J6
J4
J2
H31
H29
H27
H25
H23
H9
H7
H5
H3
H1
G30
G28
G26
G24
G8
G6
G4
G2
F31
F29
F22
F16
F4
F1
E30
E28
E26
E20
E6
E2
D31
D29
D24
D18
D14
D8
D1
C30
C28
C22
C16
C4
C2
B31
B29
B26
B20
B6
A30
A28
A24
A18
A14
A8
A2
U35D
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
NOCONA 667_7
NOCONA 667
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
3
P_VCCP1
2
P_VTT
U35E
AD12
VCC_VTT1
AC10
AA12
Y10
F10
E12
C10
B12
P_VCCP1
AE24
AE18
AE14
AE8
AE3
AD30
AD26
AD20
AD6
AD2
AC31
AC22
AC16
AC4
AC3
AB30
AB24
AB18
AB14
AB8
AB2
L28
CPU1_THERMDA11
SB_CPU1_BSEL111,13
CPU1_THERMDA
CPU1_THERMDC GNDSIOA
SR51
470/6
MMBT3904
SR66
470/6
R663
0/6
R662
0/6
ECB
SQ1
SOT23
ECB
NOCONA 667
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
B4
VCC_VTT9
C5
VCC_VTT10
A4
VCC_VTT11
VCC_CORE160
VCC_CORE161
VCC_CORE162
VCC_CORE163
VCC_CORE164
VCC_CORE165
VCC_CORE166
VCC_CORE167
VCC_CORE168
VCC_CORE169
VCC_CORE170
VCC_CORE171
VCC_CORE172
VCC_CORE173
VCC_CORE174
VCC_CORE175
VCC_CORE176
VCC_CORE177
VCC_CORE178
VCC_CORE179
VCC_CORE180
VCC_CORE181
NOCONA 667_7
CPU1_THERMDA_H7 TD2P
GNDSIOA
CPU1_BSEL1 52 CPU1_BSEL0 52
SQ2
MMBT3904
SOT23
SB_CPU1_BSEL011,13
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
MMBT3904
SR68
470/6
C409
100P/6
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
SR52
470/6
P3V3P3V3
1
TD2P 53
GNDSIO A 10,53CPU1_THERMDC11
SQ3
SOT23
ECB
ECB
SQ4
MMBT3904
SOT23
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
NOCONA 800 P1 PWR/GND
Size Do cum ent Number Rev
5
4
3
2
Date: Sheet
GA-9IVDPP-GG
1
12 70Friday, December 17, 2004
1.1
of
5
P_VTT
R787 51/6
D D
R811 51/6
R786 51/6/X
R784 51/6/X
R785 51/6
C C
SR65 510/6
SR67 510/6
R664 100/6/1
R810 100/6/1
SR77 49.9/6/1
B B
R681 49.9/6/1
A A
SB_CPU1_IERR#
SB_CPU1_PROCHOT#
PU_BOOT_SELECT_CPU1
CPU1_OPTIM_COMPAT_CTRL
R783 51/6/X
SB_CPU1_BREQ#23
SB_CPU1_BSEL1
SB_CPU1_BSEL0
PD_COMP3_CPU1
PD_COMP2_CPU1
PD_COMP1_CPU1
PD_COMP0_CPU1
CPU_PWR_GD8,9,11,52
CPU_PWR_GD
ITP_TCK117
ITP_TCK08,11
5
SB_CPU1_IERR# 11,14
SB_CPU1_PROCHOT# 11,14
X
PU_BOOT_SELECT_CPU1 11
X
CPU1_OPTIM_COMPAT_CTRL 11
SB_CPU1_BREQ#23 11
SB_CPU1_BSEL1 11,12
SB_CPU1_BSEL0 11,12
PD_COMP3_CPU1 11
PD_COMP2_CPU1 11
PD_COMP1_CPU1 11
PD_COMP0_CPU1 11
P_VTT
R792 0/6
MCH_PME#18,37
ITP_SMBDAT65
ITP_SMBCLK65
R835 51/6
R828 51/6
4
P_VTT
CPU_PWR _ G D 8,9 ,11,52
ITP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
ITP/X
PU_CPU1_8
PU_CPU1_7
PU_CPU1_6
PU_CPU1_5
PU_CPU1_4
PU_CPU1_3
PU_CPU1_2
PU_CPU1_1
PU_CPU1_0
SMC_CPU1_SKTOCC#
P1V5
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
R661 51/6
R780 51/6
R657 51/6
R658 51/6
R653 51/6
R655 51/6
R652 51/6
R654 51/6
R656 51/6
P3V3_STBY
R779 4.7K/6
CPU_PWR_GD
C396
100P/6/X
CPU0_BPM#5
CPU0_BPM#4
CPU0_BPM#3
CPU0_BPM#2
CPU0_BPM#1
CPU0_BPM#0
CPU1_BPM#5
CPU1_BPM#4
CPU1_BPM#3
CPU1_BPM#2
CPU1_BPM#1
CPU1_BPM#0
ITP_CPU_PWRGOOD
MCH_PME# S B_CP UR ST #_R
ITP_SMBDAT
ITP_SMBCLK
ITP_TCK1
ITP_TCK0
4
PU_CPU1_8 11
PU_CPU1_7 11
PU_CPU1_6 11
PU_CPU1_5 11
PU_CPU1_4 11
PU_CPU1_3 11
PU_CPU1_2 11
PU_CPU1_1 11
PU_CPU1_0 11
SMC_CPU1_SKTOCC# 11,52
ITP_MCH_DEBUG0
ITP_MCH_DEBUG1
ITP_MCH_DEBUG2
ITP_MCH_DEBUG3
ITP_MCH_DEBUG4
ITP_MCH_DEBUG5
ITP_MCH_DEBUG6
ITP_MCH_DEBUG7
ITP_BCLK
ITP_BCLK#
DBR_RESET#
ITP_TDO_MAIN
ITP_TRST#
ITP_TDI_MAIN
ITP_TMS_MAIN
R895
1K/6
3
ITP_TMS_MAIN8,11 ITP_TMS_MCH 1 7
ITP_TDI_MAIN8
MODE TEST PROCESSOR CONFIGURATION
UP 2-3 P0 INSTALLED;P1 REMOVED
DP 1-2 & 3-4 P0 & P1 INSTALLED
ITP_MCH_DEBUG[7..0]
ITP_BCLK 32
ITP_BCLK# 32
ITP_TRST# 8,11,17
ITP_TMS_MAIN 8, 11
3
ITP_MCH_DEBUG[7..0] 17
PLACE WITHIN 1" OF CPU
P_VTT
R882
R896
51/6
51/6/X
ITP_TDI_P1
TP133
ITP_TDO_P0
TP250
TP251
ITP_TDO_P1
TP296
R762
51/6
R897 0/6
ITP_TDI_MAIN 8
ITP_TDI_P1 11
ITP_TDO_P0 8
ITP_TDO_P1 11
2
SB_CPURST#_R
ITP_TMS_MAIN
DBR_RESET#
ITP_TDI_MAIN
P_VTT
RN93 51/8P4R
1 2
3 4
5 6
7 8
RN94 51/8P4R
1 2
3 4
5 6
7 8
RN95 5 1/8P4R
1 2
3 4
5 6
7 8
R841 51/6
R850 51/6
P_VTT
R903
51/6
PLACE WITHIN 1" OF MCH
ITP_TDO_MCH
2
1
R674 0/6
R847 0/6
R898 0/6
R870
0/6
Title
Size Docum e n t N u mb er Re v
Date: Sheet
SB_CPURST#
ITP_TMS_MCH
ITP_RESET#
P_VTT
R861
PLACE WITHIN 1" OF MCH
51/6
CPU1_BPM#5
CPU1_BPM#4
CPU1_BPM#3
CPU1_BPM#2
CPU1_BPM#1
CPU1_BPM#0
CPU0_BPM#5
CPU0_BPM#4
CPU0_BPM#0
CPU0_BPM#1
CPU0_BPM#2
CPU0_BPM#3
ITP_TMS_MCH
ITP_TMS_MAIN
ITP_TDO_MCH 17
ITP_TDI_MCH
SB_CPURST# 8,9,11,18
SYS_RESET# 37,53,56
ITP_TDI_MCH 17
CPU1_BPM#[5..0] 11
CPU0_BPM#[5..0] 8
ITP_TMS_MCH 17
ITP_TMS_MAIN 8 ,11
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P1 TERMINATION/ITP
GA-9IVDPP-GG
13 70Friday, De ce mb er 17, 2004
1
of
1.1
5
D D
P5V
R824
4.7K/6
SB_CPU_FORCEPR#53
C C
B B
SB_CPU0_PROCHOT#8,9
SB_CPU1_PROCHOT#11,13
A A
SB_CPU_FORCEPR#
SB_CPU0_PROCHOT#
SB_CPU1_PROCHOT#
5
R831
4.7K/6
P_VTT
R825
51/6
R833 470/6
P_VTT
R867
51/6
R866 470/6
Q91
MMBT3904
Q93
MMBT3904
Q95
MMBT3904
4
P5V
R854
470/6
ECB
R856
470/6
ECB
R868
470/6
ECB
P3V3
P3V3
SOT23
SOT23
SOT23
P_VTT
4
R886
51/6/X
CPU_FORCEPR#
Q97
MMBT3904
SOT23
ECB
R887
300/6/X
CPU0_PROCHOT#
Q99
MMBT3904
SOT23
ECB
R869
300/6/X
CPU1_PROCHOT#
Q96
MMBT3904
SOT23
ECB
CPU_FORCEPR# 8,9,11
CPU0_PROCHOT# 36
CPU1_PROCHOT# 36
3
Trace Length Limitation
SB_CPU0_IERR#8,9
SB_CPU0_IERR#
Trace Length Limitation
SB_CPU1_IERR#11,13
3
SB_CPU1_IERR#
MCH_BREQ#018 SB_BREQ#0 8,9,11
MCH CPU0/1
MCH_BREQ#118
P_VTT
P_VTT
2
Q92
MMBT3904/X
R826
51/6
R832 470/6/X
Q101
MMBT3904/X
R881
51/6
R880 470/6/X
MCH_BREQ#0
MCH_BREQ#1
2
P3V3
R846
300/6/X
CPU0_IERR
R855
470/6/X
ECB
R879
470/6/X
ECB
R528 0/6
R530 0/6
Title
Size Docum e n t N u mb er Re v
Date: Sheet
LED/RED/1206/X
-PROC_IERR0
Q98
MMBT3904/X
SOT23
P3V3
SOT23
SB_BREQ#0
SB_BREQ#1
SOT23
ECB
R860
300/6/X
CPU1_IERR
LED/RED/1206/X
-PROC_IERR1
Q100
MMBT3904/X
SOT23
ECB
SB_BREQ#1 8,9,11
GIGA-BYTE TECHNOLOGY CO., LTD.
LEVEL/THERMAL/BREQ
1
11-21SDRC/S530 EVERLIG
SMD 1206 2V 25mA SD RED
GA-9IVDPP-GG
1
14 70Friday, De ce mb er 17, 2004
1.1
of
5
D D
DDRA_CB[7..0]22,23,24,25,26
C C
PLACE DDR VREF VOLTAGE
DIVIDER NEAR CHANNEL A
DIMMS
P2V5
R372
75/6/1
B B
R365
75/6/1
PLACE CLOSE TO DIMM < 0.5
A A
MOW 40
4 DIMM 2/4 CHANGE
PLACE CLOSE TO MCH < 0.5
C248
1U/6/Y/10V
5
DDRA_MCH_VREF_R
C258
0.1U/6/X/16V
DDRA_DQS[8..0]22,23,24,25,26
DDRA_CMDCLK_A0_P22,26
DDRA_CMDCLK_A0_N22,26
DDRA_CMDCLK_A3_P25,26
DDRA_CMDCLK_A3_N25,26
DDRA_CMDCLK_A2_P24,26
DDRA_CMDCLK_A2_N24,26
DDRA_CMDCLK_A1_P23,26
DDRA_CMDCLK_A1_N23,26
DDRA_CS#[7..0]22,23,24,25, 26
4
DDRA_MA[13..0]22,23,24,25,26
MEM_CKE022,26
MEM_CKE126,27
MEM_CKE223,26
MEM_CKE326,28
DDRA_CAS#22, 23,24, 25,26
DDRA_RAS#22, 23,24, 25,26
DDRA_WE#22,23,24,25,26
DDRA_BA022,23,24,25,26
DDRA_BA122,23,24,25,26
4
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_CB0
DDRA_CB1
DDRA_CB2
DDRA_CB3
DDRA_CB4
DDRA_CB5
DDRA_CB6
DDRA_CB7
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
DDRA_CMDCLK_A0_P
DDRA_CMDCLK_A0_N
DDRA_CMDCLK_A3_P
DDRA_CMDCLK_A3_N
DDRA_CMDCLK_A2_P
DDRA_CMDCLK_A2_N
DDRA_CMDCLK_A1_P
DDRA_CMDCLK_A1_N
DDRA_CS#0
DDRA_CS#1
DDRA_CS#2
DDRA_CS#3
DDRA_CS#4
DDRA_CS#5
DDRA_CS#6
DDRA_CS#7
DDRA_CAS#
DDRA_RAS#
DDRA_WE#
DDRA_BA0
DDRA_BA1
DDRA_DQS0
DDRA_DQS1
DDRA_DQS2
DDRA_DQS3
DDRA_DQS4
DDRA_DQS5
DDRA_DQS6
DDRA_DQS7
DDRA_DQS8
AH5
DDR_A_MA0
AD14
DDR_A_MA1
AL14
DDR_A_MA2
AK15
DDR_A_MA3
AJ16
DDR_A_MA4
AH17
DDR_A_MA5
AF18
DDR_A_MA6
AN20
DDR_A_MA7
AK20
DDR_A_MA8
AJ22
DDR_A_MA9
AE4
DDR_A_MA10
AF22
DDR_A_MA11
AG23
DDR_A_MA12
U6
DDR_A_MA13
AJ9
DDR_A_CB0
AG11
DDR_A_CB1
AE11
DDR_A_CB2
AD11
DDR_A_CB3
AJ10
DDR_A_CB4
AH10
DDR_A_CB5
AF10
DDR_A_CB6
AE10
DDR_A_CB7
AE26
DDR_CKE0
AN26
DDR_CKE1
AL26
DDR_CKE2
AK26
DDR_CKE3
AF13
DDR_A_CMDCLK_P0
AF12
DDR_A_CMDCLK_N0
AH11
DDR_A_CMDCLK_P1
AJ12
DDR_A_CMDCLK_N1
AH13
DDR_A_CMDCLK_P2
AG12
DDR_A_CMDCLK_N2
AC10
DDR_A_CMDCLK_P3
AD9
DDR_A_CMDCLK_N3
W2
DDR_A_#CS0
V3
DDR_A_#CS1
T8
DDR_A_#CS2
T10
DDR_A_#CS3
N5
DDR_A_#CS4
M5
DDR_A_#CS5
M3
DDR_A_#CS6
L4
DDR_A_#CS7
AM3
DDR_A_VREF
W8
DDR_A_CAS#
AA6
DDR_A_RAS#
Y10
DDE_A_WE#
AB5
DDR_A_BA0
AF6
DDR_A_BA1
AE25
DDR_A_BA2
AJ30
DDR_A_DQS_P0
AJ31
DDR_A_DQS_N0
AJ24
DDR_A_DQS_P1
AJ25
DDR_A_DQS_N1
AH19
DDR_A_DQS_P2
AH20
DDR_A_DQS_N2
AG14
DDR_A_DQS_P3
AG15
DDR_A_DQS_N3
AC6
DDR_A_DQS_P4
AD6
DDR_A_DQS_N4
W7
DDR_A_DQS_P5
V8
DDR_A_DQS_N5
N7
DDR_A_DQS_P6
P7
DDR_A_DQS_N6
G4
DDR_A_DQS_P7
H4
DDR_A_DQS_N7
AF9
DDR_A_DQS_P8
AG9
DDR_A_DQS_N8
U23A
3
DDR GROUP A
Lindenhurst-VS
3
DDR_A_DQ0
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63
DDR_A_DQS_P9
DDR_A_DQS_N9
DDR_A_DQS_P10
DDR_A_DQS_N10
DDR_A_DQS_P11
DDR_A_DQS_N11
DDR_A_DQS_P12
DDR_A_DQS_N12
DDR_A_DQS_P13
DDR_A_DQS_N13
DDR_A_DQS_P14
DDR_A_DQS_N14
DDR_A_DQS_P15
DDR_A_DQS_N15
DDR_A_DQS_P16
DDR_A_DQS_N16
DDR_A_DQS_P17
DDR_A_DQS_N17
AK32
AH31
AH29
AF28
AJ33
AK33
AG30
AG29
AG27
AG26
AD24
AD23
AE28
AF27
AH25
AG24
AF21
AG21
AF19
AG18
AE22
AD21
AJ18
AG20
AF16
AF15
AE13
AD12
AE17
AJ15
AE16
AD17
AH4
AG5
AB8
AB7
AB10
AA9
AE5
AD5
U9
AA5
V6
U7
W10
U10
W5
V5
R6
R5
L7
L6
P9
T5
N8
M9
K5
J5
K8
K10
L9
L10
K7
H7
AL32
AL31
AF25
AF24
AE20
AE19
AH14
AJ13
AD8
AC7
Y7
Y6
P10
N10
J6
H6
AH8
AJ7
DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63
DDRA_DQS9
DDRA_DQS10
DDRA_DQS11
DDRA_DQS12
DDRA_DQS13
DDRA_DQS14
DDRA_DQS15
DDRA_DQS16
DDRA_DQS17
2
DDRA_DQ[63..0] 22,23,24,25,26
A1
1
A2 A3 A4
MCH
B2 B3
B1
A1
A2
A3
A4
Title
Size Docum e n t N u mb er Re v
2
Date: Sheet
A2A1A0 A2A1A0
0XA0(000)
0XA2(001)
0XA4(010)
0XA6(011)
DDRA_DQS[17..9] 22,23,24,25,26
B1
B2
B3
B4
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDR 266 CHA
GA-9IVDPP-GG
B4
0XA8(100)
0XAA(101)
0XAC(110)
0XAE(111)
15 70Friday, De ce mb er 17, 2004
1
1.1
of
5
D D
DDRB_CB[7..0]27,28,29,30,31
C C
PLACE DDR VREF VOLTAGE
DIVIDER NEAR CHANNEL B
DIMMS
P2V5
R364
75/6/1
B B
R371
75/6/1
PLACE CLOSE TO DIMM< 0.5
A A
MOW 40
4 DIMM 1/4 CHANGE
C247
1U/6/Y/10V
5
DDRB_CS#[7..0]27,28,29,30,31
DDRB_MCH_VREF_R
C257
0.1U/6/X/16V
DDRB_DQS[8..0]27,28,29,30,31
4
DDRB_MA[13..0]27,28,29,30,31
MEM_CKE424,26
MEM_CKE526,29
MEM_CKE625,26
MEM_CKE726,30
DDRB_CMDCLK_B3_P30,31
DDRB_CMDCLK_B3_N30,31
DDRB_CMDCLK_B1_P28,31
DDRB_CMDCLK_B1_N28,31
DDRB_CMDCLK_B2_P29,31
DDRB_CMDCLK_B2_N29,31
DDRB_CMDCLK_B0_P27,31
DDRB_CMDCLK_B0_N27,31
DDRB_CAS#27 ,28, 29,30, 31
DDRB_RAS#27 ,28, 29,30, 31
DDRB_WE#27,28,29,30,31
DDRB_BA027,28,29,30,31
DDRB_BA127,28,29,30,31
4
DDRB_CB0
DDRB_CB1
DDRB_CB2
DDRB_CB3
DDRB_CB4
DDRB_CB5
DDRB_CB6
DDRB_CB7
MEM_CKE4
MEM_CKE5
MEM_CKE6
MEM_CKE7
DDRB_CMDCLK_B3_P
DDRB_CMDCLK_B3_N
DDRB_CMDCLK_B1_P
DDRB_CMDCLK_B1_N
DDRB_CMDCLK_B2_P
DDRB_CMDCLK_B2_N
DDRB_CMDCLK_B0_P
DDRB_CMDCLK_B0_N
DDRB_CS#0
DDRB_CS#1
DDRB_CS#2
DDRB_CS#3
DDRB_CS#4
DDRB_CS#5
DDRB_CS#6
DDRB_CS#7
DDRB_CAS#
DDRB_RAS#
DDRB_WE#
DDRB_DQS0
DDRB_DQS1
DDRB_DQS2
DDRB_DQS3
DDRB_DQS4
DDRB_DQS5
DDRB_DQS6
DDRB_DQS7
DDRB_DQS8
DDRB_MA0
DDRB_MA1
DDRB_MA2
DDRB_MA3
DDRB_MA4
DDRB_MA5
DDRB_MA6
DDRB_MA7
DDRB_MA8
DDRB_MA9
DDRB_MA10
DDRB_MA11
DDRB_MA12
DDRB_MA13
DDRB_BA0DDRB_BA0
DDRB_BA1DDRB_BA1
AE14
AN14
AK14
AD15
AH16
AG17
AD18
AL20
AJ21
AH22
AH23
AH26
AJ27
AJ28
AH28
AM25
AM28
AN29
AM22
AN23
AK17
AL17
AK11
AL11
AF7
AC4
U4
AM7
AL7
AM4
AL4
AN8
AK8
AN5
AL5
AH7
AJ6
AH6
AG6
AG8
AE8
AK9
AL8
V9
V2
T7
P6
N4
M2
M6
L3
AN4
W1
Y9
W4
AA8
AE7
AG2
AH2
AA3
AB4
P1
R2
H3
H1
AK5
AK6
U23B
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_CB0
DDR_B_CB1
DDR_B_CB2
DDR_B_CB3
DDR_B_CB4
DDR_B_CB5
DDR_B_CB6
DDR_B_CB7
DDR_CKE4
DDR_CKE5
DDR_CKE6
DDR_CKE7
DDR_B_CMDCLK_P0
DDR_B_CMDCLK_N0
DDR_B_CMDCLK_P1
DDR_B_CMDCLK_N1
DDR_B_CMDCLK_P2
DDR_B_CMDCLK_N2
DDR_B_CMDCLK_P3
DDR_B_CMDCLK_N3
DDR_B_#CS0
DDR_B_#CS1
DDR_B_#CS2
DDR_B_#CS3
DDR_B_#CS4
DDR_B_#CS5
DDR_B_#CS6
DDR_B_#CS7
DDR_B_VREF
DDR_B_CAS#
DDR_B_RAS#
DDE_B_WE#
DDR_B_BA0
DDR_B_BA1
DDR_B_BA2
DDR_B_DQS_P0
DDR_B_DQS_N0
DDR_B_DQS_P1
DDR_B_DQS_N1
DDR_B_DQS_P2
DDR_B_DQS_N2
DDR_B_DQS_P3
DDR_B_DQS_N3
DDR_B_DQS_P4
DDR_B_DQS_N4
DDR_B_DQS_P5
DDR_B_DQS_N5
DDR_B_DQS_P6
DDR_B_DQS_N6
DDR_B_DQS_P7
DDR_B_DQS_N7
DDR_B_DQS_P8
DDR_B_DQS_N8
Lindenhurst-VS
3
AM30
DDR_B_DQ0
AN30
DDR_B_DQ1
AN27
DDR_B_DQ2
AM27
DDR_B_DQ3
AK30
DDR_B_DQ4
AM31
DDR_B_DQ5
AL28
DDR_B_DQ6
AK27
DDR_B_DQ7
AM24
DDR_B_DQ8
AN24
DDR_B_DQ9
AN21
DDR_B_DQ10
AM21
DDR_B_DQ11
AL25
DDR_B_DQ12
AK24
DDR_B_DQ13
AL22
DDR_B_DQ14
AK21
DDR_B_DQ15
AK18
DDR_B_DQ16
AM18
DDR_B_DQ17
AN15
DDR_B_DQ18
AM15
DDR_B_DQ19
AL19
DDR_B_DQ20
AM19
DDR_B_DQ21
AM16
DDR_B_DQ22
AL16
DDR_B_DQ23
AK12
DDR GROUP B
3
DDR_B_DQ24
DDR_B_DQ25
DDR_B_DQ26
DDR_B_DQ27
DDR_B_DQ28
DDR_B_DQ29
DDR_B_DQ30
DDR_B_DQ31
DDR_B_DQ32
DDR_B_DQ33
DDR_B_DQ34
DDR_B_DQ35
DDR_B_DQ36
DDR_B_DQ37
DDR_B_DQ38
DDR_B_DQ39
DDR_B_DQ40
DDR_B_DQ41
DDR_B_DQ42
DDR_B_DQ43
DDR_B_DQ44
DDR_B_DQ45
DDR_B_DQ46
DDR_B_DQ47
DDR_B_DQ48
DDR_B_DQ49
DDR_B_DQ50
DDR_B_DQ51
DDR_B_DQ52
DDR_B_DQ53
DDR_B_DQ54
DDR_B_DQ55
DDR_B_DQ56
DDR_B_DQ57
DDR_B_DQ58
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
DDR_B_DQ62
DDR_B_DQ63
DDR_B_DQS_P9
DDR_B_DQS_N9
DDR_B_DQS_P10
DDR_B_DQS_N10
DDR_B_DQS_P11
DDR_B_DQS_N11
DDR_B_DQS_P12
DDR_B_DQS_N12
DDR_B_DQS_P13
DDR_B_DQS_N13
DDR_B_DQS_P14
DDR_B_DQS_N14
DDR_B_DQS_P15
DDR_B_DQS_N15
DDR_B_DQS_P16
DDR_B_DQS_N16
DDR_B_DQS_P17
DDR_B_DQS_N17
AM12
AN9
AM9
AL13
AM13
AM10
AL10
AJ3
AJ4
AF1
AF4
AK3
AK2
AG3
AF3
AC3
AC1
Y3
Y4
AD2
AD3
AA2
Y1
T4
T1
N1
N2
U3
U1
P3
P4
K2
K1
F2
E1
L1
K4
G1
G2
AK29
AL29
AK23
AL23
AN18
AN17
AN12
AN11
AJ1
AH1
AB2
AB1
T2
R3
J3
J2
AM6
AN6
DDRB_DQ0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ3
DDRB_DQ4
DDRB_DQ5
DDRB_DQ6
DDRB_DQ7
DDRB_DQ8
DDRB_DQ9
DDRB_DQ10
DDRB_DQ11
DDRB_DQ12
DDRB_DQ13
DDRB_DQ14
DDRB_DQ15
DDRB_DQ16
DDRB_DQ17
DDRB_DQ18
DDRB_DQ19
DDRB_DQ20
DDRB_DQ21
DDRB_DQ22
DDRB_DQ23
DDRB_DQ24
DDRB_DQ25
DDRB_DQ26
DDRB_DQ27
DDRB_DQ28
DDRB_DQ29
DDRB_DQ30
DDRB_DQ31
DDRB_DQ32
DDRB_DQ33
DDRB_DQ34
DDRB_DQ35
DDRB_DQ36
DDRB_DQ37
DDRB_DQ38
DDRB_DQ39
DDRB_DQ40
DDRB_DQ41
DDRB_DQ42
DDRB_DQ43
DDRB_DQ44
DDRB_DQ45
DDRB_DQ46
DDRB_DQ47
DDRB_DQ48
DDRB_DQ49
DDRB_DQ50
DDRB_DQ51
DDRB_DQ52
DDRB_DQ53
DDRB_DQ54
DDRB_DQ55
DDRB_DQ56
DDRB_DQ57
DDRB_DQ58
DDRB_DQ59
DDRB_DQ60
DDRB_DQ61
DDRB_DQ62
DDRB_DQ63
DDRB_DQS9
DDRB_DQS10
DDRB_DQS11
DDRB_DQS12
DDRB_DQS13
DDRB_DQS14
DDRB_DQS15
DDRB_DQS16
DDRB_DQS17
2
DDRB_DQ[63..0] 27,28,29,30,31
DDRB_DQS[17..9] 27,28,29,30,31
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Docum e n t N u mb er Re v
2
Date: Sheet
MCH_MR DDR 266 CHB
1
GA-9IVDPP-GG
1
16 70Friday, De ce mb er 17, 2004
1.1
of
5
4
3
2
1
P3V3
D12
D D
MCH_HI_VSWING
MCH_HI_VREF
C C
B B
P1V5
R542
43.2/6/1
C339
100P/6/X
R427 40.2/6/1
P2V5
R428 40.2/6/1
0.1U/6/X/16V
P1V5 P1V5
R481
78.7/6/1
354mV 804mV
HIA_STRBS36
HIA_STRBF36
MCH_66MHZ_CLK33
SYS_PWR_GD_3_3V3 3,37,52
I2C_SCL22,23,24,25,27,28,29,30,32, 34,65
I2C_SDA22,23,24,25,27,28,29,30,32,34,65
ITP_TMS_MCH13
ITP_TDI_MCH13
ITP_TDO_MCH13
ITP_TCK113
ITP_TRST#8,11,13
W>12mil/ L<500mil
TP81
TP82
C269
C276
TP83
TP84
TP85
TP86
0.1U/6/X/16V
TP87
TP88
TP89
TP90
TP91
W>20mil W>20mil
MCH_HI_VREF MCH_HI_VSWING
HIA_STRBS
HIA_STRBF
MCH_66MHZ_CLK
MCH_HI_RCOMP
SYS_PWR_GD_3_3V
I2C_BUS2_SCL
I2C_BUS2_SDA
ITP_TMS_MCH
ITP_TDI_MCH
ITP_TDO_MCH
ITP_TCK1
ITP_TRST#
PD_DDRRES1
PD_DDRRES2
TP_RESERVED2
TP_RESERVED3
TP_RESERVED4
TP_RESERVED5
TP_RESERVED6
TP_RESERVED7
TP_RESERVED8
TP_RESERVED9
TP_RESERVED10
TP_RESERVED11
TP_RESERVED12
AF30
AE23
AD20
AJ19
AA24
E31
D32
H31
L24
K25
F32
E3
C3
D4
F3
G5
G6
D2
J9
AE2
AE1
R10
R9
R8
M8
R32
L33
U23E
HI_STBS
HI_STBF
HISWING
HICLK
HIRCOMP
HIVREF
PWRGOOD
SMBCLK
SMBDATA
TMS
TDI
TDO
TCK
TRST#
DDR_RES1
DDR_RES2
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
Lindenhurst-VS
R469
43.2/6/1
C319
0.1U/6/X/16V
H33
V3REF
MCH_DDRSLWCRES
DDR_CRES0
PLLSEL1#
PLLSEL0#
DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7
TDIOANODE
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11
AK1
MCH_DDRCRES0
AC9
MCH_DDRIMPCRES
AL2
MCH_PLLS E L1#
A29
MCH_PLLS E L0#
C31
J30
H30
C32
G31
G29
H28
K26
J27
F30
E33
J29
G32
ITP_MCH_DEBUG0
J8
ITP_MCH_DEBUG1
G7
ITP_MCH_DEBUG2
G8
ITP_MCH_DEBUG3
H9
ITP_MCH_DEBUG4
B2
ITP_MCH_DEBUG5
D3
ITP_MCH_DEBUG6
L11
ITP_MCH_DEBUG7
D1
F33
D33
HI_A0
HI_A1
HI_A2
HI_A3
HI_A4
HI_A5
HI_A6
HI_A7
HI_A8
HI_A9
HI_A10
HI_A11
MCH_TDC
MCH_TDA
DDRSLWCRES
DDR_IMPCRES
TDIOCATHODE
HI 1.5 & Miscellaneous
1N5820/SMD
12
R392 1.13K/6/1
R388 374/6/1
P1V5
TP220
TP222
HI_A[11..0] 36
ITP_MCH_DEBUG[7..0] 13
NO USE
Internal PU
ICH_PLLSEL1 3 7
ICH_PLLSEL0 3 7
TIMING RE L AT I O NS HI P B ET W E E N DRAM AND FSB
PLLSEL[1:0]
167/667
200/800
DDR266 DDR333
11
11
10
00
A A
R489
24.3/6/1
5
C328
0.01U/6/X/50V
R472
49.9/6/1
4
C321
0.01U/6/X/50V
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Docum e n t N u mb er Re v
3
2
Date: Sheet
MCH HI 1.5/MISC
GA-9IVDPP-GG
17 70Friday, De ce mb er 17, 2004
1
1.1
of
5
B27
G25
H25
H24
B31
A28
F24
D29
J24
H27
B28
B30
C29
E28
E25
F27
D16
E15
C18
B19
C14
A17
A19
B16
C17
B18
D17
A16
B13
A14
A13
D14
C12
B12
E18
J18
H18
F17
G17
K17
E16
J17
J14
F14
F15
G16
K16
H16
G14
K14
E12
C11
H13
F11
G13
D11
F12
G10
H10
J12
G11
K13
H12
B10
A10
A11
F9
A5
E9
D8
F8
C9
B9
C8
B6
B7
E7
B4
A4
B3
D5
C6
D7
C5
U23C
ADS#
AP#0
AP#1
MCERR#
BNR#
BPRI#
BREQ#0
BREQ#1
CPURST#
DBSY#
DEFER#
DRDY#
DP#0
DP#1
DP#2
DP#3
DBI#0
DBI#1
DBI#2
DBI#3
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
Lindenhurst-VS
SB_ADS#8,11
SB_AP#08,11
SB_AP#18,11
SB_MCERR#8,9,11
SB_BNR#8,9,11
SB_BPRI#8,11
MCH_BREQ#014
D D
C C
B B
A A
MCH_BREQ#114
SB_CPURST#8,9,11,13
SB_DBSY#8,11
SB_DEFER#8,11
SB_DRDY#8,11
SB_DP#[3..0]8, 11
SB_DBI#[3..0]8,11
SB_D#[63..0]8,11
SB_ADS#
SB_AP#0
SB_AP#1
SB_MCERR#
SB_BNR#
SB_BPRI#
MCH_BREQ#0
MCH_BREQ#1
SB_CPURST#
SB_DBSY#
SB_DEFER#
SB_DRDY#
SB_DP#0
SB_DP#1
SB_DP#2
SB_DP#3
SB_DBI#0
SB_DBI#1
SB_DBI#2
SB_DBI#3
SB_D#0
SB_D#1
SB_D#2
SB_D#3
SB_D#4
SB_D#5
SB_D#6
SB_D#7
SB_D#8
SB_D#9
SB_D#10
SB_D#11
SB_D#12
SB_D#13
SB_D#14
SB_D#15
SB_D#16
SB_D#17
SB_D#18
SB_D#19
SB_D#20
SB_D#21
SB_D#22
SB_D#23
SB_D#24
SB_D#25
SB_D#26
SB_D#27
SB_D#28
SB_D#29
SB_D#30
SB_D#31
SB_D#32
SB_D#33
SB_D#34
SB_D#35
SB_D#36
SB_D#37
SB_D#38
SB_D#39
SB_D#40
SB_D#41
SB_D#42
SB_D#43
SB_D#44
SB_D#45
SB_D#46
SB_D#47
SB_D#48
SB_D#49
SB_D#50
SB_D#51
SB_D#52
SB_D#53
SB_D#54
SB_D#55
SB_D#56
SB_D#57
SB_D#58
SB_D#59
SB_D#60
SB_D#61
SB_D#62
SB_D#63
5
4
HDSTBP#0
HDSTBN#0
HDSTBP#1
HDSTBN#1
HDSTBP#2
HDSTBN#2
HDSTBP#3
HDSTBN#3
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
TESTIN#
RSTIN#
HCRES0
HODTCRES
HSLWCRES
HDVREF0
HDVREF1
System Bus Interface
HACVREF
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
HA#33
HA#34
HA#35
HCLKINN
HCLKINP
HADSTB#0
HADSTB#1
RS#0
RS#1
RS#2
RSP#
BINIT#
PME#
GPE#
4
C15
B15
J15
H15
E10
D10
A7
A8
E30
D28
C30
A30
K20
J21
J23
H22
K23
L12
C2
C27
E27
F26
D13
E13
F23
K22
J20
G23
G22
H21
K19
H19
G19
E22
E21
F18
E19
F21
F20
D26
C26
A26
D22
B22
A25
B25
D25
C24
A22
B21
D23
A23
B24
A20
D19
C20
C21
D20
J11
K11
G20
C23
F29
D31
G28
J26
G26
M24
L25
SB_DSTBP#0
SB_DSTBN#0
SB_DSTBP#1
SB_DSTBN#1
SB_DSTBP#2
SB_DSTBN#2
SB_DSTBP#3
SB_DSTBN#3
SB_HIT#
SB_HITM#
SB_LOCK#
SB_TRDY#
SB_REQ#0
SB_REQ#1
SB_REQ#2
SB_REQ#3
SB_REQ#4
MCH_TESTIN#
-PCIRST_MCH
HCRES0
SB_ODTCRES_MCH
SB_SLWCRES_MCH
SB_HA#3
SB_HA#4
SB_HA#5
SB_HA#6
SB_HA#7
SB_HA#8
SB_HA#9
SB_HA#10
SB_HA#11
SB_HA#12
SB_HA#13
SB_HA#14
SB_HA#15
SB_HA#16
SB_HA#17
SB_HA#18
SB_HA#19
SB_HA#20
SB_HA#21
SB_HA#22
SB_HA#23
SB_HA#24
SB_HA#25
SB_HA#26
SB_HA#27
SB_HA#28
SB_HA#29
SB_HA#30
SB_HA#31
SB_HA#32
SB_HA#33
SB_HA#34
SB_HA#35
MCH_BCLK#
MCH_BCLK
SB_ADSTB#0
SB_ADSTB#1
SB_RS#0
SB_RS#1
SB_RS#2
SB_RSP#
SB_BINIT#
MCH_PME#
3
SB_HIT# 8,9,11
SB_HITM# 8,9,11
SB_LOCK# 8,11
SB_TRDY# 8,11
TP92
-PCIRST_MCH 37
MCH_BCLK# 32
MCH_BCLK 32
SB_ADSTB#[1..0] 8,11
SB_RS#[2..0] 8,11
SB_RSP# 8,11
SB_BINIT# 8,9,11
MCH_PME# 13,37
3
SB_DSTBP#[3..0] 8,11
SB_DSTBN#[3..0] 8,11
SB_REQ#[4..0] 8,11
SB_HA#[35..3] 8,11
R452
8.2K/6
MCH_BREQ#0
MCH_BREQ#1
R526
48.7/6/1
Add Caps/ Layout
R529 51/6
R524 51/6
P3V3
R527
442/6/1
MCH_SB_VREF
P_VTT
2
P_VTT
R533 0/6
C349
220P/6
2
754mV
C367
1U/6/Y/10V
1
Title
Size Docum e n t N u mb er Re v
Date: Sheet
MCH_HSINK1
MCH_HSINK
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH SYS BUS
1
R544
49.9/6/1
R548
90.9/6/1
2
GA-9IVDPP-GG
1
18 70Friday, De ce mb er 17, 2004
1.1
of
5
4
3
2
1
D D
C C
MCH_SRC_100MHZ_CLK_N34
B B
MCH_SRC_100MHZ_CLK_P34
EXP_A_RXP040
EXP_A_RXP435
EXP_A_RXP535
EXP_A_RXP635
EXP_A_RXP735
EXP_A_RXN040
EXP_A_RXN435
EXP_A_RXN535
EXP_A_RXN635
EXP_A_RXN735
EXP_A_RXP0
EXP_A_RXP4
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXN0
EXP_A_RXN4
EXP_A_RXN5
EXP_A_RXN6
EXP_A_RXN7
MCH_SRC_100MHZ_CLK_N
MCH_SRC_100MHZ_CLK_P
R33
N28
L31
J33
R26
N25
M27
K29
P33
N29
L30
J32
R27
N26
M26
K28
AG33
AE32
AC30
AC31
AD29
AC25
AB26
Y25
AF33
AD32
AD30
AB31
AE29
AC24
AB25
Y24
Y28
Y30
AA30
V33
T32
R30
V27
V24
Y27
Y31
AA29
V32
T31
R29
V26
U24
R24
T23
U23D
EXP_A_RXP0
EXP_A_RXP1
EXP_A_RXP2
EXP_A_RXP3
EXP_A_RXP4
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXN0
EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3
EXP_A_RXN4
EXP_A_RXN5
EXP_A_RXN6
EXP_A_RXN7
EXP_B_RXP0
EXP_B_RXP1
EXP_B_RXP2
EXP_B_RXP3
EXP_B_RXP4
EXP_B_RXP5
EXP_B_RXP6
EXP_B_RXP7
EXP_B_RXN0
EXP_B_RXN1
EXP_B_RXN2
EXP_B_RXN3
EXP_B_RXN4
EXP_B_RXN5
EXP_B_RXN6
EXP_B_RXN7
EXP_C_RXP0
EXP_C_RXP1
EXP_C_RXP2
EXP_C_RXP3
EXP_C_RXP4
EXP_C_RXP5
EXP_C_RXP6
EXP_C_RXP7
EXP_C_RXN0
EXP_C_RXN1
EXP_C_RXN2
EXP_C_RXN3
EXP_C_RXN4
EXP_C_RXN5
EXP_C_RXN6
EXP_C_RXN7
EXP_CLKN
EXP_CLKP
Lindenhurst-VS
NO USE
NO USE
LAN/SLOT
P30
EXP_A_TXP0
N31
EXP_A_TXP1
M33
EXP_A_TXP2
K32
EXP_A_TXP3
P24
EXP_A_TXP4
P27
EXP_A_TXP5
M30
EXP_A_TXP6
L28
EXP_A_TXP7
P31
EXP_A_TXN0
N32
EXP_A_TXN1
M32
EXP_A_TXN2
K31
EXP_A_TXN3
P25
EXP_A_TXN4
P28
EXP_A_TXN5
M29
EXP_A_TXN6
L27
EXP_A_TXN7
AG32
EXP_B_TXP0
AF31
EXP_B_TXP1
AC33
EXP_B_TXP2
AB32
EXP_B_TXP3
AD27
EXP_B_TXP4
AC27
EXP_B_TXP5
PCI Express
EXP_B_TXP6
EXP_B_TXP7
EXP_B_TXN0
EXP_B_TXN1
EXP_B_TXN2
EXP_B_TXN3
EXP_B_TXN4
EXP_B_TXN5
EXP_B_TXN6
EXP_B_TXN7
EXP_C_TXP0
EXP_C_TXP1
EXP_C_TXP2
EXP_C_TXP3
EXP_C_TXP4
EXP_C_TXP5
EXP_C_TXP6
EXP_C_TXP7
EXP_C_TXN0
EXP_C_TXN1
EXP_C_TXN2
EXP_C_TXN3
EXP_C_TXN4
EXP_C_TXN5
EXP_C_TXN6
EXP_C_TXN7
EXP_COMP0
EXP_COMP1
EXPHPINTR#
VCCBGEXP
VSSBGEXP
AB29
AA27
AH32
AE31
AD33
AA32
AD26
AC28
AB28
AA26
W26
W28
Y33
W32
U31
V30
T29
T26
W25
W29
AA33
W31
U30
V29
T28
T25
U33
U25
E6
U27
U28
PORT B
PORT C
PORT A
HI
A A
EXP_A_TXP_C0
EXP_A_TXP_C1
EXP_A_TXP_C2
EXP_A_TXP_C3
EXP_A_TXP_C4
EXP_A_TXP_C5
EXP_A_TXP_C6
EXP_A_TXP_C7
EXP_A_TXN_C0
EXP_A_TXN_C1
EXP_A_TXN_C2
EXP_A_TXN_C3
EXP_A_TXN_C4
EXP_A_TXN_C5
EXP_A_TXN_C6
EXP_A_TXN_C7
EXP_COMP0
EXP_COMP1
PU_EXPHPINTR#
CLOSE MCH
SC273 0.1U/4/Y/16V
SC304 0.1U/4/Y/16V
SC311 0.1U/4/Y/16V
SC316 0.1U/4/Y/16V
SC274 0.1U/4/Y/16V
SC296 0.1U/4/Y/16V
SC298 0.1U/4/Y/16V
SC315 0.1U/4/Y/16V
SC272 0.1U/4/Y/16V
SC300 0.1U/4/Y/16V
SC314 0.1U/4/Y/16V
SC319 0.1U/4/Y/16V
SC275 0.1U/4/Y/16V
SC297 0.1U/4/Y/16V
SC299 0.1U/4/Y/16V
SC317 0.1U/4/Y/16V
P1V5
DDR
FSB
R441
24.9/6/1
EXP_A_TXP0
EXP_A_TXP4
EXP_A_TXP4 35
EXP_A_TXP5
EXP_A_TXP5 35
EXP_A_TXP6
EXP_A_TXP6 35
EXP_A_TXP7
EXP_A_TXP7 35
EXP_A_TXN0
EXP_A_TXN4
EXP_A_TXN4 35
EXP_A_TXN5
EXP_A_TXN5 35
EXP_A_TXN6
EXP_A_TXN6 35
EXP_A_TXN7
EXP_A_TXN7 35
P3V3
R515
1K/6/X
Do Not Support PCI Express Hot-Plug
MCH_VCCB GEXP
MCH_VSSBGEXP
EXP_A_TXP0 40
EXP_A_TXN0 40
DIFFERENTIAL PAIRS
MCH_VCCB GEXP
12
C301
10U/8/Y/10V
MCH_VSSBGEXP
L6
4.7UH/60mA/8
C300
0.1U/6/X/16V
R438 0/6
P3V3_U24
P3V3
R436
100/6
2.5V 3% 600uA
U24
LM431BCM3
R
A C
R445
0/6
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
MCH PCI EXPRESS
Size Document Number Rev
5
4
3
2
Date: Sheet
GA-9IVDPP-GG
1
1.1
of
19 70Friday, December 17, 2004
5
P2V5
D D
C C
P1V5
B B
A A
AN28
AN22
AN16
AN10
AL30
AL24
AL18
AL12
AJ26
AJ20
AJ14
AG28
AG22
AG16
AG10
AE24
AE18
AE12
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AB22
AB20
AB18
AB16
AB14
AB12
AA11
W11
AH33
AE33
AE30
AC29
AB33
AB27
AB24
AA23
W33
W27
W23
AN3
AL6
AJ8
AH3
AF5
AD7
AD1
AB9
AB3
Y12
Y5
V12
V7
V1
U11
T12
T9
T3
R11
P12
P5
N11
M1
K3
H5
F1
M7
AL1
Y29
Y22
V22
U29
T33
T27
T24
T22
R23
P29
N33
M28
K33
K30
5
U23F
VCC_DDR0
VCC_DDR1
VCC_DDR2
VCC_DDR3
VCC_DDR4
VCC_DDR5
VCC_DDR6
VCC_DDR7
VCC_DDR8
VCC_DDR9
VCC_DDR10
VCC_DDR11
VCC_DDR12
VCC_DDR13
VCC_DDR14
VCC_DDR15
VCC_DDR16
VCC_DDR17
VCC_DDR18
VCC_DDR19
VCC_DDR20
VCC_DDR21
VCC_DDR22
VCC_DDR23
VCC_DDR24
VCC_DDR25
VCC_DDR26
VCC_DDR27
VCC_DDR28
VCC_DDR29
VCC_DDR30
VCC_DDR31
VCC_DDR32
VCC_DDR33
VCC_DDR34
VCC_DDR35
VCC_DDR36
VCC_DDR37
VCC_DDR38
VCC_DDR39
VCC_DDR40
VCC_DDR41
VCC_DDR42
VCC_DDR43
VCC_DDR44
VCC_DDR45
VCC_DDR46
VCC_DDR47
VCC_DDR48
VCC_DDR49
VCC_DDR50
VCC_DDR51
VCC_DDR52
VCC_DDR53
VCC_DDR54
VCC_DDR55
VCC_DDR56
VCC_DDR57
VCC_DDR58
VCC_DDR59
VCC_DDR60
VCC_EXP0
VCC_EXP1
VCC_EXP2
VCC_EXP3
VCC_EXP4
VCC_EXP5
VCC_EXP6
VCC_EXP7
VCC_EXP8
VCC_EXP9
VCC_EXP10
VCC_EXP11
VCC_EXP12
VCC_EXP13
VCC_EXP14
VCC_EXP15
VCC_EXP16
VCC_EXP17
VCC_EXP18
VCC_EXP19
VCC_EXP20
VCC_EXP21
VCC_EXP22
VCC_EXP23
VCC_EXP24
Lindenhurst-VS
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
POWER
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCCA_CORE0
VSSA_CORE1
VCC_CORE0
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_VTT0
VCC_VTT1
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_VTT12
VCC_VTT13
VCC_VTT14
VCC_VTT15
VCC_VTT16
VCC_VTT17
VCC_VTT18
VCC_VTT19
VCC_VTT20
VCC_VTT21
VCC_VTT22
VCC_VTT23
VCC_VTT24
VCC_VTT25
VCC_VTT26
VCC_VTT27
VCC_VTT28
VCCA_EXP0
VSSA_EXP1
VCCA_HI0
VSSA_HI1
VCCA_DDR
AA21
AA19
AA17
AA15
AA13
Y20
Y18
Y16
Y14
W21
W19
W17
W15
W13
V20
V18
V16
V14
U21
U19
U17
U15
T20
T18
T16
T14
R21
R19
R17
R15
R13
P18
P16
P14
N21
N19
N17
N15
N13
U13
C33
K9
M12
G33
H29
K27
L23
N23
P22
M22
A31
M20
M18
M16
M14
L21
L19
L17
L15
L13
J19
J16
J13
H26
H23
E23
E20
E17
E14
E11
E8
D30
D27
A18
A15
A12
A9
A6
A3
F6
F5
U23
V23
P20
P21
E4
P1V5
VCCA_SB
VSSA_SB
VCCA_EXP
VSSA_EXP
VCCA_HI
VSSA_HI
VCCA_DDR
P_VTT
4
Y13
Y11
Y8
Y2
W30
W24
W22
W20
W18
W16
W14
W12
W9
W6
W3
V31
V28
V25
V21
V19
V17
V15
V13
V11
V10
V4
U32
AB6
AA31
AA28
AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
AA7
AB23
AB21
AB19
AB17
AB15
AB13
AN31
AN25
AN19
AN13
AN7
AM32
AM29
AM26
AM23
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL33
AL27
AL21
AL15
AL9
AL3
AK31
AK28
AK25
AK22
AK19
AK16
AG13
E24
VCCA_SB 21
VSSA_SB 21
VCCA_EXP 21
VSSA_EXP 21
VCCA_HI 21
VSSA_HI 21
VCCA_DDR 21
4
U23G
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
Lindenhurst-VS
3
3
GND
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
AF29
AF26
AF23
AF20
AF17
AF14
AF11
AF8
AF2
AE27
AE21
AE15
AE9
AE6
AE3
AD31
AD28
AD25
AD22
AD19
AD16
AD13
AD10
AD4
AC32
AC26
AC22
AC20
AC18
AC16
AC14
AC12
AC8
AC5
AC2
AB30
AK7
AK4
AJ32
AJ29
AJ17
AJ11
AJ5
AJ23
AJ2
AH30
AH27
AH24
AH21
AH18
AH15
AH12
AH9
AG31
AG25
AG19
AG1
AF32
AA4
AA1
Y32
Y26
Y23
Y21
Y19
Y17
Y15
AB11
AK10
AK13
U26
U22
U20
2
U23H
M13
VSS148
M11
VSS149
M10
VSS150
M4
VSS151
L32
VSS152
L29
VSS153
L26
VSS154
L22
VSS155
L20
VSS156
L18
VSS157
L16
VSS158
L14
VSS159
L8
VSS160
L5
VSS161
L2
VSS162
K24
VSS163
K21
VSS164
K18
VSS165
K15
VSS166
K12
VSS167
K6
VSS168
J31
VSS169
J28
VSS170
J25
VSS171
J22
VSS172
J10
VSS173
J7
VSS174
J4
VSS175
J1
VSS176
H32
VSS177
H20
VSS178
H17
VSS179
H14
VSS180
H11
VSS181
AG4
VSS182
AG7
VSS183
U18
VSS184
U16
VSS185
U14
VSS186
U12
VSS187
U8
VSS188
U5
VSS189
U2
VSS190
T30
VSS191
T21
VSS192
T19
VSS193
T17
VSS194
T15
VSS195
T11
VSS196
T13
VSS197
T6
VSS198
R31
VSS199
R28
VSS200
R25
VSS201
R22
VSS202
R20
VSS203
R18
VSS204
R16
VSS205
R14
VSS206
R12
VSS207
R7
VSS208
R4
VSS209
R1
VSS210
P32
VSS211
P26
VSS212
P23
VSS213
P19
VSS214
P17
VSS215
P15
VSS216
N22
VSS217
N20
VSS218
N18
VSS219
N16
VSS220
N14
VSS221
Lindenhurst-VS
Title
Size Docum e n t N u mb er Re v
2
Date: Sheet
F16
VSS222
F13
VSS223
F10
VSS224
F7
VSS225
F4
VSS226
H8
VSS227
H2
VSS228
G30
VSS229
G27
VSS230
G21
VSS231
G18
VSS232
G15
VSS233
G12
VSS234
G9
VSS235
G3
VSS236
F31
VSS237
F28
VSS238
G24
VSS239
F25
VSS240
F22
VSS241
F19
VSS242
N3
VSS243
M31
VSS244
GND
M25
VSS245
M23
VSS246
M21
VSS247
M19
VSS248
M17
VSS249
M15
VSS250
N6
VSS251
E32
VSS252
E29
VSS253
E26
VSS254
E5
VSS255
E2
VSS256
D24
VSS257
D21
VSS258
D18
VSS259
D15
VSS260
D12
VSS261
D9
VSS262
D6
VSS263
B32
VSS264
C28
VSS265
C25
VSS266
C22
VSS267
C19
VSS268
C16
VSS269
C13
VSS270
C10
VSS271
C7
VSS272
C4
VSS273
C1
VSS274
B29
VSS275
B26
VSS276
B23
VSS277
B20
VSS278
B14
VSS279
B11
VSS280
B8
VSS281
B5
VSS282
A27
VSS283
A24
VSS284
A21
VSS285
P13
VSS286
P11
VSS287
P8
VSS288
P2
VSS289
N30
VSS290
N27
VSS291
N24
VSS292
N12
VSS293
N9
VSS294
B17
VSS295
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PWR/GND
1
GA-9IVDPP-GG
1
20 70Friday, De ce mb er 17, 2004
1.1
of
SC361
0.1U/6/X/16V
SC269
0.1U/6/X/16V
SC302
0.01U/6/X/50V
SC318
0.1U/6/X/16V
SC242
0.1U/6/X/16V
5
SC237
0.1U/6/X/16V
SC268
0.1U/6/X/16V
SC286
0.01U/6/X/50V
SC250
0.1U/6/X/16V
C336
0.1U/6/X/16V
SC290
0.1U/6/X/16V
SC267
0.1U/6/X/16V
SC327
0.1U/6/X/16V
SC276
0.1U/6/X/16V
C333
0.1U/6/X/16V
SC224
0.1U/6/X/16V
SC266
0.1U/6/X/16V
SC303
0.01U/6/X/50V
SC265
0.1U/6/X/16V
C452
0.1U/6/X/16V
SC235
0.1U/6/X/16V
SC240
0.1U/6/X/16V
SC236
0.01U/6/X/50V
C351
0.1U/6/X/16V
SC222
0.1U/6/X/16V
SC259
0.1U/6/X/16V
SC251
0.01U/6/X/50V
C318
0.01U/6/X/50V
P1V5
D D
C C
P1V5
SC249
0.1U/6/X/16V
SC271
0.1U/6/X/16V
SC295
0.01U/6/X/50V
C343
0.01U/6/X/50V
4
SC260
0.1U/6/X/16V
SC270
0.1U/6/X/16V
SC258
0.01U/6/X/50V
C353
0.1U/6/X/16V
SC257
0.1U/6/X/16V
SC281
0.01U/6/X/50V
SC243
0.01U/6/X/50V
C265
0.01U/6/X/50V
SC293
0.1U/6/X/16V
SC360
0.1U/6/X/16V
SC336
0.1U/6/X/16V
C354
0.01U/6/X/50V
VCCA_HI
VCCA_EXP
VCCA_DDR
VCCA_SB
SC252
0.1U/6/X/16V
PLACE COMPONENTS:
GROUP ASSOCIATE COMPONENTS
TOGHTER AND AS PHYSICALLY
PIN AS POSSIBLE
SC359
MIN TRACE WIDTH:
0.1U/6/X/16V
AS WIDE AS POSSIBLE
>= 25 MILS
MIN TRACE SPACING:
>= 10 MILS
SC366
0.01U/6/X/50V
MAX LENGTH
>=1.2(BOARD+BREAKOUT)
ROUTE
DIFFERENTIAL PAIRS
3
MCH VCCA
P1V5
R444
1/6/1
P1V5
R433
1/6/1
P1V5
R550
1/6/1
P1V5
R549
1/6/1
2
VCCA_HI_R_N VCCA_HI
L8 4.7UH/60mA/8
3% 31.8mA
L5 4.7UH/60mA/8
3% 30.9mA
L10 4. 7UH/60mA /8
3% 28.9mA
VCCA_SB_R_N VCCA_SB
L9 4.7UH/60mA/8
3% 28.9mA
12
C289
10U/8/Y/10V
12
C305
10U/8/Y/10V
12
C280
10U/8/Y/10V
12
C356
10U/8/Y/10V
12
C355
10U/8/Y/10V
C307
0.1U/6/X/16V
C290
0.1U/6/X/16V
C364
0.1U/6/X/16V
C363
0.1U/6/X/16V
VSSA_HI
VCCA_EXPVCCA_EXP_R_N
VSSA_EXP
VCCA_DDRVCCA_DDR_R_N
VSSA_SB
VSSA_SB
1
VCCA_HI 20
VSSA_HI 20
VCCA_EXP 20
VSSA_EXP 20
VCCA_DDR 20
VSSA_SB 20
VCCA_SB 20
VSSA_SB 20
C316
C308
P2V5
0.1U/6/X/16V
SC207
0.1U/6/X/16V
C233
0.1U/6/X/16V
0.1U/6/X/16V
SC206
0.1U/6/X/16V
C234
0.1U/6/X/16V
5
B B
A A
C347
0.1U/6/X/16V
SC217
0.1U/6/X/16V
SC223
0.1U/6/X/16V
SC241
0.01U/6/X/50V
C279
0.1U/6/X/16V
C278
0.1U/6/X/16V
C352
0.01U/6/X/50V
C250
0.1U/6/X/16V
C249
0.1U/6/X/16V
C330
0.1U/6/X/16V
C251
0.1U/6/X/16V
C292
0.1U/6/X/16V
C252
0.1U/6/X/16V
C295
0.1U/6/X/16V
C253
0.1U/6/X/16V
C302
0.1U/6/X/16V
4
C254
0.1U/6/X/16V
C304
0.1U/6/X/16V
C255
0.1U/6/X/16V
C306
0.1U/6/X/16V
12
+
EC18
100U/12/X5R/6.3V/X
12
+
EC16
100U/12/X5R/6.3V/X
12
+
EC19
100U/12/X5R/6.3V/X
P_VTT
12
12
C358
C366
22U/12/Y/10V
3
22U/12/Y/10V
C345
0.1U/6/X/16V
C348
1U/6/Y/10V
2
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Docum e n t N u mb er Re v
Date: Sheet
MCH DECOUPING
GA-9IVDPP-GG
21 70Friday, De ce mb er 17, 2004
of
1
1.1