Gigabyte GA-9IVDPL R2.1_schematic Schematics
第 1 頁，共 1 頁Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2005/12/21 下午 02:37:11
Project Code S94006-0 Customer DAWNING
Project Name GS-SR168 Revision Old N/A New 2.1
Model Name GA-9IVDPL IT Doc No DR05C129
P/N RD Doc No
PCB Rev. 2.1 Check Sum
R N M
e
e
m
m
gfedc gfedcb gfedc
A B C D E F
gfedcb
A B
gfedc gfedcb
n
n
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e
gfedc
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gfedc gfedc
gfedc gfedc
M/B GA-9IVDPL 2.1A DAWNING
P/N Description
FINISHED GOOD
Description GA-9IVDPL R2.1 schematic
Remark
Approved By daniel.hou 2005/12/21 下午 02:48:12 Applicant peter.chen
Research
Management
yuling.cheng
2005/12/21 下午
04:11:01
R
R
T
T
I
I
Validation Manager 890622(何士弘 ) Project Manager 891364(葉行健)
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c
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a
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2
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0
0
Effected Class
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a
M
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5
5
0
0
1
1
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2
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2005/12/21http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
yuling.cheng
5
4
3
2
1
NOCONA800/LINDENHURST-VS
D D
1 TITLE
2 SYS BLOCK
3 SYS RESET
4 CLOCK BLOCK
5 SMBUS BLOCK
6 POWER DELIVERY
7 PCI routing & GPIO
8-10 P0 CPU
C C
11-13 P1 CPU
14 Level Shift & CPU Detection
15 MCH/DDRII CH A
16 MCH/DDRII CH B
17 MCH/HI1.5/MISC
18 MCH/SYSBUS
19 MCH/PCIEXPRESS
20-21 MCH/PWR/GND/DECOUPING
22 PCI-E X8/CONNX4 SLOT1
23-25 DDRII A DIMMX3
B B
26-28 DDRII B DIMMX3
29 DDR II TERM/DECOUP
30-31 CK409B
32 DB400
33 ICH-R_PCI&HI1.5&IDE&USB2.0
34 ICH-R_SATA&PCIX&GPIO&MISC
35 ICH-R_POWER&GND
36 USB_2.0 CONNECTOR
37 PCI-X SO-DIMM
A A
38 PCI-X 1.0 SLOT2 66MHZ
39 PCI_32BIT/33MHZ SLOT4
40 BROADCOM BCM5751 LAN1
41 82541GI LAN2&P1V2_NIC PWR
42-44 ATI VGA/CONN/SDRAM
45 G-LOGIC/PSON/VIDGOOD
46 IPMI_CONNECTOR
47 FWH
48 SIO-IT8712/FLOPPY
49 PS2/COM/LPT
50 LM93
51 SMBUS SEGMENTS
52 POWER SUPPLY CONNECTOR
53 P0 VR
54 P1 VR
55 1.2V CPU VTT/3.3SB/1.5SB
56 1.5V REGULATOR @13A
57 1.8V/0.9V REGULATOR @30A
58 ATX POWER 12V, 5V, 3.3V
59 ID SW/HDD LED
60 FRONT-PANEL
61 BACK IO
62 HOLE
BOARD STACK-UP
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
Core
Copper
Prepreg
Copper
COMPONENT SIDE
PP 2113
GND
FR4 1/1
INT 1(Layer 3)
PP 2116
PP 7628
(PWR)
FR4 2/2
(PWR)
PP 7628
PP 2116
INT 2(Layer 6) 1 OZ
FR4 1/1
GND
PP 2113
SOLDER SIDE
1.5 OZ
1 OZ
1 OZ
2 OZ
2 OZ
1 OZ
1.5 OZ
2.0 mil
3.7 mil
1.35 mil
3.7 mil
1.35 mil
4.1 mil
7.0 mil
2.7 mil
10.0 mil
2.7 mil
7.0 mil
4.1 mil
1.35 mil
3.7 mil
1.35 mil
3.7 mil
2.0 mil
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
COVER SHEET
GA-9IVDPL
1
164Wednesday, December 21, 2005
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2.1
5
4
3
2
1
EVRD 10.1
D D
BROADCOM
BCM5751
RJ45
LAN1
PCI-X_3
PCI-E_1
Intel
Nocona
Processor
CPU 2
6.4GB/s
System Bus(800MT/S)
EVRD 10.1
Intel
Nocona
Processor
CPU 1
CK409B
CLOCK
Channel A
DDR2-400 DIMM Module *3
DB400
CLOCK
PCI-X
SO-DIMM
( 4GB/S)
PCI EXPRESS X4
C C
PCI EXPRESS X8 Slot
(500MB/S)
PCI EXPRESS X1
(Lindenhurst-VS)
Intel
E7320
MCH
1077 BGA
266MB/s
HUB INTERFACE 1.5
3.2GB/s
3.2GB/s
Channel B
DDR2-400 DIMM Module *3
Front
Header
USB2.0x1
Intel
82541GI
PCI X 64bit/66MHz Slot
RJ45
LAN2
B B
PCI-X_2
PCI X 64 Bit BUS
PCI 32 Bit BUS
133MB/s
Intel
FWE6300ESB
(HANCE RAPIDS)
ICH
USB Bus
IDE Bus
100MB/s
ATA-100
480Mb/s
IDE Connector * 1
Back Panel
USB2.0X2
W83792D
SATAx2
150MB/s
689 BGA
I2C IC
ATI Rage XL
Intel
FWH
LPC
LPC
LPC
IPMI 1.5
MODULE
I2C Bus
H/M
LM93
VGA
PCI 32bit/33MHz Slot
BGA
PCI_4
A A
8MB
Floppy Connector
LPC
Interface
IT8712F
LPC Super I/O
128 PQFP
SDRAM
COM1
COM2
VGA Connector
KB MS
5
4
3
2
CPU2
FAN
PWR
FAN
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
CPU2
FAN
BLOCK DIAGRAM
GA-9IVDPL
1
CPU1
FAN
CPU1
FAN
264Wednesday, December 21, 2005
2.1
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5
SYS RESET & PWR SET
BTN
LEVEL
D D
LOGIC
DB400
FP
PWRDWN#
CK409B
CK409B_PWR_GD#
VID_PWRGD
C C
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
CPU0_THRMTRIP#
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
CPU1_THRMTRIP#
B B
Lindenhust-VS
CPU_RST#
PCIRST#
PWB+
P0
VTTEN
CPU0_BSEL[0/1]
CPU1_BSEL[0/1]
VTTEN
P1
MCH
PWROK
CPU_VRD_PWR_GDPWRDWN#
FET
VTT
LEVEL
R
R
PWRBTN
R
IPMI_PWRBT_IN
SB_VTT_PWRGD
VTTEN
P3V3
LEVEL
P1_SKT0CC#
CPU_PWR_GD
75
37
IPMI CONN
1.2V
VTT_PWRGD
H-R
SYS RST#
4
CPU 0
P0_SKT0CC#
R
75--72--71--76
71
76
SIO
72
BMC_PWRBNIN#
36
7
DDRII DIMM
DDRII DIMM
AB
DDRII DIMM
SIO_PWRBNOUT#
DDRII DIMM
DDRII DIMM
DDRII DIMM
R
H-R
3
SLP_S#3
1.8V
HIP6302CB
SLP_S#4
P5V_STBY
HUF76107
PWRGD_1_5VPWRGD_1_8V
1.5V
ISL6526
IPMI CONN
VTT_ENABLE
BSEL
COMPARE
LOGIC
CPU_VRD_PWR_GD
PCIRST1#
PCI_RST#
PWROK
DDRA_PCIRST#
CPU_VRD_PWR_GD
DDRB_PCIRST#
100ms
PX_PAPCIRST#
R
PCIRST#
SYS_PWR_GD#
PLD
BUFF
BUFF
BUFF
PLD
LOGIC
IDE_RSTDRV#
PCIRST_BUFF#1
2
LOGIC
IDE CONN
PS_PWR_GD#
CPU1_VRD_PWR_GD
SYS_PWR_GD_BUFF1#
PS_PWR_GD
VR0_SYS_ENABLE
VR1_SYS_ENABLE
SYS_PWR_GD_BUFF1
PCIX_RST_SODIMM
PCIX_RST_SLOT2#
R
VGA_HV
P0 VCORE
P1 VCORE
PCI EX X8 CONN
PCI-X 66 CONN2
1
PS_ON#
ATX CONN
PWOK
ISL6556BCPU0_VRD_PWR_GD
ISL6556B
ZCR
SODIMM
PS_PWR_GD
BUFFER
A A
BTN
FP
5
RST_SW
40 35
IPMI CONN
R
IPMI_RST_OUT#RST_IPMI#
4
PCIX_RST_SODIMM
PCIX_RST_SLOT2#
SLOT3_PCIRST#
IPMI_PCIRST#
MCH_PCIRST#
VGA_PCIRST#
LAN1_PCIRST#
LAN2_PCIRST#
3
VGA_PCIRST#
LAN1_PCIRST#
LAN2_PCIRST#
SLOT3_PCIRST#
IPMI_PCIRST#
ATI
VIDEO
BCM5751 LAN1
82541 LAN2
PCI- 32 CONN
IPMI CONN
2
Title
Size Document Number Rev
Date: Sheet
SIO
FWH
GIGA-BYTE TECHNOLOGY CO., LTD.
SYS RESET
GA-9IVDPL
1
364Wednesday, December 21, 2005
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2.1
5
4
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1
CLOCK BLOCK DIAGRAM
D D
CK 409B
CLOCK SYNTHESIZER
DRIVER
C C
B B
14.318
CRYSTAL
P0_BCLK/#(200MHZ)
CPU0
P1_BCLK/#(200MHZ)
CPU1
MCH_BCLK/# (200MHZ)
CPU2
MCH_66MHZ_CLK 2
3V66_1
ICH_PX66MHZ_CLK
3V66_0
ICH_HI66MHZ_CLK
3V66_2
ICH_USB_48MHZ_CLK
USB_48
ICH_33MHZ_CLK
PCIF0
ICH_14MHZ_CLK
REF0
SIO_48MHZ_CLK
DOT_48
SIO_33MHZ_CLK
PCI_F1
DB400_SRC_100MHZ_CLK_P/N
SRC
PCI_SLOT1_33MHZ_CLK
PCI 6
IPMI33_LPC_CLK
PCI 2
VIDEO_33MHZ_CLK
PCI 1
VIDEO_14MHZ_CLK
REF 1
FWH_33MHZ_CLK FWH
PCI 3
PCI 4
LAN2_33MHZ_CLK
PCI 5
SUS_CLK
2
BCLK(P/N-1/0)
2
32.768KHZ
CRYSTAL
ICH
HANCE
RAPIDS
SUS_CLK
SIO
2
SYS MGMT CONNECTOR
VIDEO (RAGE XL) 29.49MHZ
Intel 82541 LAN2
PCI 32/33 (PCI 4)
PLD
CPU0
CPU1BCLK(P/N-1/0)
CRYSTAL
25MHZ
CRYSTAL
ICH_SRC_100MHZ_CLK_P/N
PCI_X SLOT #2(PCI-X_2)
ZCR SO-DIMM
PX_PAPCLKO0
PX_PAPCLKO1
DDRA_CMDCLK_A0_P/N
DDRA_CMDCLK_A2_P/N
DDRA_CMDCLK_A1_P/N
DDRB_CMDCLK_B2_P/N
DDRB_CMDCLK_B1_P/N
DDRB_CMDCLK_B0_P/N
LINDENHURST-VS
MCH_SRC_100MHZ_CLK_P/N
2
DIFF_OUT0
CLK_IN
DB400 (DIFFCLK SUFFER)
DIFF_OUT1
2
EXP_SLOT_100MHZ_CLK_P/N
PCI EXPRESS X8 SLOT(PCI-E_1)
2
DIFF_OUT2
DIFF_OUT3
2
2
2
2
2
2
DDRII400 DIMM #A1
DDRII400 DIMM #B1
2
LAN1_SRC_100MHZ_CLK_P/N
BCM5751 LAN1
DDRII400 DIMM #A2
DDRII400 DIMM #B2
DDRII400 DIMM #A3
25MHZ
CRYSTAL
DDRII400 DIMM #B3
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
CLOCK BLOCK
GA-9IVDPL
1
464Wednesday, December 21, 2005
of
2.1
5
4
BCM5751
LAN1
82541GI
LAN2
3
IPMB_SDA2
IPMB_SCL2
2
R31
R114
1
Hance
D D
Rapids
SMB Address = 44h
P3V3_STBY
SR281,
SR282
LAN_EMP_SDA
LAN_EMP_SCL
R24,
R25
P3V3_STBY
IMPI
ICH_SDA
ICH_SCL
PCA9545
Mutiplexer
C C
B B
P3V3_STBY
SMB = E0h
I2C_BUS0_SDA
I2C_BUS0_SCL
I2C_BUS1_SDA
I2C_BUS1_SCL
P3V3
P3V3
R97/X,
R103/X
IDEEPROM
SMB = A8h
I2C_BUS0_SDA
I2C_BUS0_SCL
R109,
R111
I2C_BUS1_SDA
I2C_BUS1_SCL
R82,
R87
ICH_SDA
ICH_SCL
DIMM B-1
SMB Address = AAh
DIMM A-1
SMB Address = A2h
GSMI
70P
I2C_BUS0_SDA2
I2C_BUS0_SCL2
PCI-X Slot#2
R386/X,
R387/X
DIMM B-2
SMB Address = ACh SMB Address = D2h
DIMM A-2
SMB Address = A4h
IPMB_SDA
IPMB_SCL
LM93
SMB = 58h
DIMM B-3
SMB Address = AEh
DIMM A-3
SMB Address = A6h SMB Address = DCh
CK-409B
DB400
R386/X,
R387/X
PCI-E Slot#1
R120,
R123
R81/X,
R88/X
LM75
DDR
SMB = 92h SMB = 98h
R662/X R367/X
P3V3_STBY
SIO
SMB Address = 2Dh
P3V3_STBY
LM75
PCI
IPMB2
IPMB1
I2C_BUS0_SDA2
I2C_BUS0_SCL2
ICH_SDA
ICH_SCL
PCA9515
Mutiplexer
MCH
I2C_BUS2_SDA
I2C_BUS2_SCL
P3V3
R108/X,
R116/X
LINDENHURST-VS
SMB Address = 60h
I2C_BUS2_SDA
I2C_BUS2_SCL
R96,
R102
W83792D
SMB Address = 58h
BACK_IO
FFC_SCL
FFC_SDA
R743,
R744
PCA9515
BACK PLANE BOARD
PCI/32BIT#6
A A
P3V3
I2C_BUS3_SDA
I2C_BUS3_SCL
5
R94/X,
R101/X
R28/X,
R29/X
I2C_BUS3_SDA
I2C_BUS3_SCL
LM75
SMB Address = 95h
FRONT PANEL BOARD
4
3
2
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
SMBUS
GA-9IVDPL
1
564Wednesday, December 21, 2005
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2.1
5
4
3
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D D
ERP12V
ISL6556B
P12V_CPU_0
120A
ISL6556B HIP6612
P12V_CPU_1
120A
HIP6302
P12V2
C C
P12V3
P5VSB
ATX CONN
FAN x 9
ISL6525
13A
ISL6522C
P5V/15A
30A
HIP6612
X4
X4
HIP6602
APL1084
3A
P_VCCP0
P_VCCP1
RT9173A
2A
LM358+
ISL9N306
6A
CPU0
CORE/1.2
CPU1
CORE/1.2
P1V8
P_VTT
P0V9_DDR
P1V5
P2V5_VIDEO
MCH
1.2V
1.8V
1.5V
DDR II
1.8V
VIDEO
0.9V
ICH
1.2V
1.5V
831mA
2.5mA
3.3V
1.5VSBY
75mA
528mA
142mA
3.3VSBY
P3V3
B B
LM2596-ADJ
N12V
A A
ISL6522C
P3V3/15A
HUF76107
PCI-E CONN
PCI CONN
P5V_STBY
APL1084
3A
P3V3_STBY
RC1117
800mA
BCP69
BCP69
RC1117
800mA
P1V2
P1V2
P1V8
P1V2
320mA
400mA
P1V5_STBY
BCM5751
GIGA LAN
82541GI
GIGA LAN
46mA
GD75232
PCI-X CONN
5
4
3
2
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
PWR DELIVERY
GA-9IVDPL
1
664Wednesday, December 21, 2005
of
2.1
5
Hance Rapids
R
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
4.7K
4.7K
8.2K
8.2K
8.2K
8.2K
10KPU
PWR WELL
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V38.2KPU
P3V3
P3V3_STBY
P3V3_STBY
P3V3_STBY
P3V3_STBY
P3V3
P3V3
P3V3
P3V3
P3V3_STBY
P3V3_STBY
P3V3_STBY4.7K
P3V3_STBY
P3V3
P3V3I
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3
P3V3_STBY/RTC
P3V3_STBY/RTC
PX_REQ2-
P_ IRQEP_ IRQFP_ IRQGP_ IRQHIPMI_FP_SMI#
MCH_PME#
WAKE# FROM PCI-E CONN
RESERVED
PCI_PERR_SMI#
SLP_BTN#
SIO_PME#
RESERVED
PX_GNT2PX_GNT3-
FWH_WP#
R E S E R V E D
I2C_MUX_RST#
R E S E R V E D
LAN_DISABLE1# DISABLE LAN 1
CPU0_PROCHOT#
CPU1_PROCHOT#
PCI32 CONN
PCI32 CONN
PCI32 CONN8.2K
PCI32 CONN
SMI EVENT FROM IPMI or NMI EVENT from FP.
PME EVENT FROM MCH PCI-E PORT
FROM FRONT PANEL
Power Management Event from SIO
BIOS WRITE PROTECT
RST 9545 I2C BUS
DISABLE LAN 2LAN_DISABLE2# EnableNormal
RESERVED
PX_IRQ0PX_IRQ1PX_IRQ2PX_IRQ3- PCI-X CONN
P66DET
DPMB_SET1PU/D 8.2K
PERR_SMI_RST#
RESERVED
MEM FREQ_SEL0
MEM FREQ_SEL1
PCI-X CONN
PCI-X CONN
PCI-X CONN
DETECT PRIMARY IDE CABLE
DP MB ID SETTINGDPMB_SET0
DP MB ID SETTING
DP MB ID SETTING8.2KPU/D DPMB_SET2 Table1 Table1
ISSUE RESET WHEN PERR SMI EVENT OCCURS.
GPIO
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
D D
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
C C
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
B B
GPIO 43
GPIO 44
GPIO 55
GPIO 56
GPIO 57
1. GIPO[0:7], GPIO[16:21, 23], and GPIO[32:55] are in the core well.
2. GPIO[8:15] and GPIO[24:31] are in the suspend well.
3. Core-well GPIO are 5V tolerant, except for GPIO[32:43].
4. Resume-well GPIO are not 5V tolerant.
5. GPIO[56:57] pads are in the suspend well,
the register bits are in the RTC well.
PU
I
I
PU PX_REQ3-
I
PU
I
PU
I
PU
PU
I
I
PU
I
PU
I
PU
IGPIO 11
I
PU
I
PU
N/A
O
N/A
O
N/A
O
N/A
O
O
N/A P3V3
O
PU
PU 8.2K
O
N/A
I/O
I/O
N/A
O
I/
PU
O
I/
PU
N/A
I/O
PU
PU
I
I PU
I PU
N/A
I/O
N/AI/O
PU/D 8.2K
I/O
I/O
I/O
N/A
I/O
PU 10K
OD
OD
4
FUNCTION
SMI EVENT FROM EXT-LOGIC PERR DECTION
PIN DEFINE
Hi(1)
Normal
Normal
Normal
Normal H/L
Normal
Disable
Disable
Normal
Normal
33
Table1 Table1
Table1 Table1
Table1
GBT/CH1
D1
Lo(0)
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
66/100 By cableI/O 33KPD
0
0
0
0
1
1
1
1
3
Normal/ACT
(DEFAULT)
(DEFAULT)
(DEFAULT)
(DEFAULT)
(DEFAULT)
(DEFAULT)
H/L
H/L
H/LNormal Enable
H/L
H/L
(DEFAULT)
(DEFAULT)
H/L
H/L
H/L
H/L
H/L
H/L
(DEFAULT)
(DEFAULT)
(DEFAULT)
(DEFAULT)
GPI41GPI40M/B model
GPI42
01
1
11
0
0
1
1
2
SIO(SMBUS & H/W monitor)
GPIO
GPIO 10 STBY O
GPIO 21
GPIO 35
GPIO 40
GPIO 42
GPIO 43
GPIO 45
GPIO 46
GPIO 52
GPIO 53
GPIO 54
NOTE:
PWR
MAIN
MAIN
STBY
STBY
STBY
STBY
STBY
STBY
STBY
SIO_BEEP
I
HW_SMI#
O H/L
O
O
SIO_PSON#
I
PWRBTN
O
HR_PWRBNIN#
SLP_S#3
I
SIO_BMC_RST#
O
IMAIN
SUS_LED
O
O
SIO_PME#
GPIO(10/40/41/42/43/44/45/46/53/54/55) POWER BY STBY
LM93
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
Memory Mapping Table
CH.A
CH.B
STBY
I
STBY
I
STBY
O
HW_CPU0_SMI#
O
STBY
STBY
STBY
STBY
STBY
Location CMDCLK Mapping
DDR-A1
DDR-A2
DDR-A3
DDR-B2
DDR-B3
HW_CPU1_SMI#
I
CPU0_THERMTRIP#
I
CPU1_THERMTRIP#
I
CPU0_IERR#
IGPIO 7
CPU1_IERR#
SMB Addr.
0XA2
0XA6
0XAA
0XAC
0XAE
DDRA_CMDCLK_A0
DDRA_CMDCLK_A2
DDRA_CMDCLK_A1
DDRA_CMDCLK_B2
DDRA_CMDCLK_B1
PCI ROUTING LIST
REQ-/GNT-
PX_PAREQ#0/PX_PAGNT#0
PCI_REQ#3/PCI_GNT#3
00
0
0
1
0
1
PCI ROUNTING
PCIX SLOT2
PCI-X
SO-DIMM
PCI SLOT3
KEINEAI32
82541EI LAN2
VGA
PIRQ-
PX_PAIRQ#0/1/2/3
PX_PAIRQ#1
PCI_PIRQ#B PCI_REQ#2/PCI_GNT#2
PCI_PIRQ#C
FUNCTION
SIO SPEAKER
Power Management Event from 792D
PWR ON FROM SIO
PWR BTIN FROM FP & IPMI
PWR BTOUT TO ICHGPIO 44
INDECATE S3 MODE FROM ICH
RST IPMI FROM SIO
Power Management Event to ICH
SMI EVENT FROM LM93HW
SMI EVENT FROM LM93HW
MONITOR CPU0_THERMTRIP#
MONITOR CPU1_THERMTRIP#
DETECT CPU0_IERR#
DETECT CPU1_IERR# H/L
CS# Mapping
DDRA_CS#2,3
DDRA_CS#2,3,4,5
DDRA_CS#0,1,6,7
DDRB_CS#2,3DDR-B1
DDRB_CS#2,3,4,5
DDRB_CS#0,1,6,7
IDSEL-
PX_PAAD17
PX_PAAD18PX_PAREQ#1/PX_PAGNT#1 PX_PAPCLKO1
PCI_AD18PCI_PIRQ#G/H/E/F PCI_REQ#0/PCI_GNT#0 PCI_SLOT_33MHZ_CLK
PCI_AD20
PCI_AD21
1
NOMAL/ACT
H/L
H/L
H/L
(DEFAULT)
H/L
(DEFAULT)STBY
(DEFAULT)
H/L
H/L
H/L
H/L
H/L
H/L
(DEFAULT)
NOMAL/ACTGPIO PWR FUNCTION
H/L
H/L
(DEFAULT)
H/L
(DEFAULT)
H/L
(DEFAULT)
H/L
(DEFAULT)
CKE
MEM_CKE2
MEM_CKE2,40XA4
MEM_CKE0,6
MEM_CKE3
MEM_CKE3,5
MEM_CKE1,7DDRA_CMDCLK_B0
CLOCK
PX_PAPCLKO0
LAN2_33MHZ_CLK
VIDEO_33MHZ_CLK
A A
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
PCI ROUTING
GA-9IVDPL
1
764Wednesday, December 21, 2005
2.1
of
5
4
3
2
1
END PROCESSOR 0
SB_BPRI#(11,18)
SB_CPU0_BREQ#23(9)
SB_BREQ#1(9,11,18)
SB_BREQ#0(9,11,18)
SB_CPURST#(9,11,14,18)
D D
P_VTT
PLACE WITHIN 1" OF CPU
C C
P_VCCP_A_CPU0
AGND_CPU0
P_VTT
B B
775mV
P_VTT
775mV
A A
SB_RS#[0..2](11,18)
SB_RSP#(11,18)
SB_CPU_A20M#(9,11,34)
SB_CPU_IGNNE#(9,11,34)
SB_CPU_INIT#(9,11,34,47)
SB_CPU_NMI(9,11,14)
SB_CPU_INTR(9,11,34)
CPU_PWR_GD(9,11,13,34)
SB_CPU0_SMI#(9,14)
SB_CPU_SLP#(9,11,34)
SB_CPU_STPCLK#(9,11)
P0_BCLK#(30)
P0_BCLK(30)
R587
R584
R578
R583
SB_CPU0_BSEL1(9,45)
SB_CPU0_BSEL0(9,45)
TP27
TP31
TP26
STP41
TP28
TP30
TP29
STP22
STP24
STP21
STP23
TP33
STP42
TP32
VID_CPU0_R[0..5](48,50,53)
VR0_VCCSENSE(53)
VTTEN(9,11,45)
VR0_VSSSENSE(53)
R642
49.9/6/1
1 2
VREF_P_VTT_CPU0_3_R VREF_P_VTT_CPU0_3
12
C352
R643
1U/6/Y5V/16V
90.9/6/1
1 2
R585
49.9/6/1
VREF_P_VTT_CPU0_0_R
1 2
12
R581
C295
90.9/6/1
1U/6/Y5V/16V
1 2
5
SB_BPRI#
SB_CPU0_BREQ#23
SB_BREQ#1
SB_BREQ#0
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
SB_CPU0_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P0_BCLK#
P0_BCLK
P0_TCK0
12
51/6
P0_TDI
12
51/6
P0_TMS
12
51/6
P0_TRST#
12
51/6
SB_CPU0_BSEL1
SB_CPU0_BSEL0
VID_CPU0_R5
VID_CPU0_R4
VID_CPU0_R3
VID_CPU0_R2
VID_CPU0_R1
VID_CPU0_R0
VR0_VCCSENSE
VTTEN
VR0_VSSSENSE
R641
12
0/6
SC383
220P/6/X7R/50V
R576
12
0/6
SC381
220P/6/X7R/50V
12
12
U71A
D23
BPRI#
D10
NOCONA 800
BR3#
E11
BR2#
F12
BR1#
D20
BR0#
Y8
RESET#
F21
RS2#
D22
RS1#
E21
RS0#
C6
RSP#
F27
A20M#
C26
IGNNE#
D6
INIT#
G23
LINT1_NMI
B24
LINT0_INTR
AB7
PWRGOOD
C27
SMI#
AE6
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
E24
TCK
C24
TDI
A25
TMS
F24
TRST#
AB3
BSEL1
AA3
BSEL0
AE29
RESERVED1
AE28
RESERVED0
AE30
RSVD16
Y3
RSVD15
AD29
RSVD14
AD28
RSVD13
AC29
RSVD12
AB29
RSVD10
AB28
RSVD9
AA29
RSVD8
AA28
RSVD7
AE15
RSVD3
AC1
RSVD2
AE16
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
AD4
VCCIOPLL
B27
VCC_SENSE
E1
VTTEN
AB4
VCCA
AA5
VSSA
D26 C1
VSS_SENSE OPTIMIZED_COMPAT#
NOCONA_800-mPGA604
THERMTRIP#
PROCHOT#
THERMDC
THERMDA
BOOT_SELECT
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
WIDE 10-12 MILS
12
SC339
220P/6/X7R/50V
WIDE 10-12 MILS
VREF_P_VTT_CPU0_0
12
SC338
220P/6/X7R/50V
ADS#
BINIT#
BNR#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
TDO
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
RSVD
P_VTT
4
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU0_BPM#5
E4
CPU0_BPM#4
E8
CPU0_BPM#3
F5
CPU0_BPM#2
E7
CPU0_BPM#1
F8
CPU0_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU0_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU0_THERMTRIP#
F26
SB_CPU0_PROCHOT#
B25
E25
F9
F23
W9
W23
B5
A3
AC28
D25
E16
AD16
Y29
A26
AE5
AD5
AA7
Y6
W8
W7
W6
AE4
AD1
Y28
Y27
G7
W3
B1
A16
A15
AC30
COMP3 =SB_CPU0_ADDR_ERC
COMP2 =SB_CPU0_DATA_ERC
PU_CPU0_8=SB_CPU0_EDRDY
PU_CPU0_0=SB_CPU0_SNPD#
STP27
PD_ODTEN_CPU0
SMC_CPU0_SKTOCC#
PD_COMP3_CPU0
PD_COMP2_CPU0
PD_COMP1_CPU0
PD_COMP0_CPU0
PU_CPU0_8
PU_CPU0_0
PU_CPU0_5
PU_CPU0_6
PU_CPU0_1
PU_CPU0_7
PU_CPU0_3
PU_CPU0_2
PU_CPU0_4
PU_VCCPLL_CPU0
CPU0_THERMDC
CPU0_THERMDA
PU_BOOT_SELECT_CPU0
VID_PWRGD
SB_CPU0_CPU1_TESTBUS
SB_CPU0_FORCEPR#
SLEW_CTRL_CPU0
CPU0_OPTIM_COMPAT_CTRL
100mA
L18
10UH/100mA/1206
L19
10UH/100mA/1206
TP34
STP43
STP40
SB_ADS# (11,18)
SB_BINIT# (9,11,18)
SB_BNR# (9,11,18)
CPU0_BPM#[0..5] (9)
SB_DBSY# (11,18)
SB_DEFER# (11,18)
SB_DRDY# (11,18)
SB_HIT# (9,11,18)
SB_HITM# (9,11,18)
SB_TRDY# (11,18)
SB_LOCK# (11,18)
SB_MCERR# (9,11,18)
SB_CPU0_IERR# (9,14)
SB_CPU_FERR# (9,11,34)
SB_CPU0_THERMTRIP# (9,14)
SB_CPU0_PROCHOT# (9,14)
PD_ODTEN_CPU0 (9)
SMC_CPU0_SKTOCC# (9,46,52)
PD_COMP3_CPU0 (9)
PD_COMP2_CPU0 (9)
PD_COMP1_CPU0 (9)
PD_COMP0_CPU0 (9)
PU_CPU0_8 (9)
PU_CPU0_0 (9)
PU_CPU0_5 (9)
PU_CPU0_6 (9)
PU_CPU0_1 (9)
PU_CPU0_7 (9)
PU_CPU0_3 (9)
PU_CPU0_2 (9)
PU_CPU0_4 (9)
CPU0_THERMDC (10)
CPU0_THERMDA (10)
PU_BOOT_SELECT_CPU0 (9)
VID_PWRGD (11,45)
SB_CPU0_CPU1_TESTBUS (9,11)
SB_CPU0_FORCEPR# (9,14)
SLEW_CTRL_CPU0 (9)
CPU0_OPTIM_COMPAT_CTRL (9)
WIDE 10-12 MILS
P_VCCP_A_CPU0
12
C338
22U/1206/Y5V/10V
AGND_CPU0
C356
22U/1206/Y5V/10V
3
SB_D#[0..63](11,18)
VREF_P_VTT_CPU0_3
VREF_P_VTT_CPU0_0
12
C355
22U/1206/Y5V/10V
P_VTT
12
SC391
1U/6/Y5V/16V
12
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
12
SC380
0.1U/6/Y5V/50V
U71B
AB6
D63
Y9
NOCONA 800
D62
AA8
D61
AC5
D60
AC6
D59
AE7
D58
AD7
D57
AC8
D56
AB10
D55
AA10
D54
AA11
D53
AB13
D52
AB12
D51
AC14
D50
AA14
D49
AA13
D48
AC9
D47
AD8
D46
AD10
D45
AE9
D44
AC11
D43
AE10
D42
AC12
D41
AD11
D40
AD14
D39
AD13
D38
AB15
D37
AD18
D36
AE13
D35
AC17
D34
AA16
D33
AB16
D32
AB17
D31
AD19
D30
AD21
D29
AE20
D28
AE22
D27
AC21
D26
AC20
D25
AA18
D24
AC23
D23
AE23
D22
AD24
D21
AC24
D20
AE25
D19
AD25
D18
AC26
D17
AE26
D16
AA19
D15
AB19
D14
AB22
D13
AB20
D12
AA21
D11
AA22
D10
AB23
D9
AB25
D8
AB26
D7
AA24
D6
Y23
D5
AD27
D4
AA25
D3
Y24
D2
AA27
D1
Y26
D0
NOCONA_800-mPGA604
EC50
+
PSA2.5VB820MH11/8X11.5
SB_HA#35
C8
BREQ4#
BREQ3#
BREQ2#
BREQ1#
BREQ0#
DBI3#
DBI2#
DBI1#
DBI0#
DP3#
DP2#
DP1#
DP0#
AP1#
AP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
C9
A7
A6
B7
C11
D12
E13
B8
A9
D13
E14
C12
B11
B10
A10
F15
D15
D16
C14
C15
A12
B13
B14
B16
A13
D17
C17
A19
C18
B18
A20
A22
B22
C20
C21
B21
B19
AB9
AE12
AD22
AC27
AE17
AC15
AE19
AC18
D9
E10
F14
F17
Y11
Y14
Y17
Y20
Y12
Y15
Y18
Y21
SB_HA#34
SB_HA#33
SB_HA#32
SB_HA#31
SB_HA#30
SB_HA#29
SB_HA#28
SB_HA#27
SB_HA#26
SB_HA#25
SB_HA#24
SB_HA#23
SB_HA#22
SB_HA#21
SB_HA#20
SB_HA#19
SB_HA#18
SB_HA#17
SB_HA#16
SB_HA#15
SB_HA#14
SB_HA#13
SB_HA#12
SB_HA#11
SB_HA#10
SB_HA#9
SB_HA#8
SB_HA#7
SB_HA#6
SB_HA#5
SB_HA#4
SB_HA#3
SB_REQ#4
SB_REQ#3
SB_REQ#2
SB_REQ#1
SB_REQ#0
SB_DBI#3
SB_DBI#2
SB_DBI#1
SB_DBI#0
SB_DP#3
SB_DP#2
SB_DP#1
SB_DP#0
SB_AP#1
SB_AP#0
SB_ADSTB#1
SB_ADSTB#0
SB_DSTBP#3
SB_DSTBP#2
SB_DSTBP#1
SB_DSTBP#0
SB_DSTBN#3
SB_DSTBN#2
SB_DSTBN#1
SB_DSTBN#0
Trace Width:12 Mils
VREF_P_VTT_CPU0_0
VREF_P_VTT_CPU0_3
VCCIOPLL_CPU0
AGND_CPU0
PU_VCCPLL_CPU0
Title
Size Document Number Rev
2
Date: Sheet
SB_HA#[3..35] (11,18)
SB_REQ#[0..4] (11,18)
SB_DBI#[0..3] (11,18)
SB_DP#[0..3] (11,18)
SB_AP#[0..1] (11,18)
SB_ADSTB#[0..1] (11,18)
SB_DSTBP#[0..3] (11,18)
SB_DSTBN#[0..3] (11,18)
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA P0
GA-9IVDPL
1
864Wednesday, December 21, 2005
of
2.1
5
4
3
2
1
P_VTT
R557 220/6
R580 220/6
R647 220/6
D D
C C
B B
R579 220/6
R606 220/6
R623 220/6
R593 220/6
R559 220/6
R607 51/6
R648 51/6
R574 51/6
R556 51/6
R464 51/6
R560 51/6
R612 39/6
R600 39/6
R590 39/6
R586 39/6
R617 39/6
P3V3
SB_CPU_A20M#
12
SB_CPU_IGNNE#
12
SB_CPU_INIT#
12
SB_CPU_INTR
12
SB_CPU_SLP#
12
SB_CPU_STPCLK#
12
SB_CPU_NMI
12
SB_CPU0_SMI#
12
SB_CPU0_FORCEPR#
12
SB_CPU0_IERR#
12
SB_CPU0_PROCHOT#
12
SB_CPU0_THERMTRIP#
12
SB_CPU1_THERMTRIP#
12
SB_CPU_FERR#
12
SB_BININ#_R SB_BINIT#
12
SB_BNR#_R
12
SB_HIT#_R
12
SB_HITM#_R
12
SB_MCERR#_R SB_MCERR#
12
R649
12
4.7K/6
1 2
1 2
1 2
1 2
1 2
VTTEN
C322
47P/6/N/50V
C307
47P/6/N/50V
C304
47P/6/N/50V
C300
47P/6/N/50V
C327
47P/6/N/50V
SB_CPU0_SMI# (8,14)
SB_CPU0_FORCEPR# (8,14)
SB_CPU0_IERR# (8,14)
SB_CPU0_PROCHOT# (8,14)
SB_BNR#
SB_HIT#
SB_HITM#
SB_CPU_A20M# (8,11,34)
SB_CPU_IGNNE# (8,11,34)
SB_CPU_INIT# (8,11,34,47)
SB_CPU_INTR (8,11,34)
SB_CPU_SLP# (8,11,34)
SB_CPU_STPCLK# (8,11)
SB_CPU_NMI (8,11,14)
SB_CPU0_THERMTRIP# (8,14)
SB_CPU1_THERMTRIP# (11,14)
SB_CPU_FERR# (8,11,34)
SB_BINIT# (8,11,18)
SB_BNR# (8,11,18)
SB_HIT# (8,11,18)
SB_HITM# (8,11,18)
SB_MCERR# (8,11,18)
VTTEN (8,11,45)
P_VTT
R645 51/6/X
R646 51/6/X
R595 51/6
R608 51/6
R611 51/6
R618 510/6
R621 510/6
R577 100/6/1
R573 100/6/1
R601 60.4/6/1
R592 60.4/6/1
PU_BOOT_SELECT_CPU0
12
CPU0_OPTIM_COMPAT_CTRL
12
SB_BREQ#0
12
SB_BREQ#1
12
SB_CPU0_BREQ#23
12
SB_CPU0_BSEL1
12
SB_CPU0_BSEL0
12
PD_COMP2_CPU0
12
PD_COMP3_CPU0
12
PD_COMP1_CPU0
12
PD_COMP0_CPU0
12
For CPU0 margin modify
P_VTT
R650 51/6
R516 51/6
P_VTT
R603
SB_CPU_STPCLK#(8,11)
PD_ODTEN_CPU0
12
PD_ODTEN_CPU1
12
SB_CPU0_CPU1_TESTBUS
12
51/6
R604 0/6/X
R624
PU_BOOT_SELECT_CPU0 (8)
CPU0_OPTIM_COMPAT_CTRL (8)
12
12
0/6
SB_BREQ#0 (8,11,18)
SB_BREQ#1 (8,11,18)
SB_CPU0_BREQ#23 (8)
SB_CPU0_BSEL1 (8,45)
SB_CPU0_BSEL0 (8,45)
PD_COMP2_CPU0 (8)
PD_COMP3_CPU0 (8)
PD_COMP1_CPU0 (8)
PD_COMP0_CPU0 (8)
PD_ODTEN_CPU0 (8)
PD_ODTEN_CPU1 (11)
SB_CPU0_CPU1_TESTBUS (8,11)
ICH_CPU_STPCLK# (34)
together
P_VTT
R615 300/6
R602 51/6
1 2
R445 51/6/X
R562 51/6/X
R564 51/6/X
R446 0/6
P3V3_STBY
P_VTT
R561 51/6/X
R575 51/6/X
R613 51/6
R609 51/6
R622 51/6
R597 51/6
R605 51/6
R619 51/6
R572 51/6
CPU_PWR_GD
12
SB_CPURST#
12
12
12
12
R644
4.7K/6
12
SMC_CPU0_SKTOCC#
END CPU NOT USE
PU_CPU0_8
12
PU_CPU0_7
12
PU_CPU0_6
12
PU_CPU0_5
12
PU_CPU0_4
12
PU_CPU0_3
12
PU_CPU0_2
12
PU_CPU0_1
12
PU_CPU0_0
12
P_VTT
RN22 51/8P4R
1
2
3
4
5
6
7
8
CPU_PWR_GD
CPU_PWR_GD (8,11,13,34)
CLOSE TO CPU0
SB_CPURST# (8,11,14,18)
SLEW_CTRL_CPU0
SLEW_CTRL_CPU1
CPU1_BPM#[0..5]
CPU0_BPM#[0..5]
CPU1_BPM#4
CPU1_BPM#2
CPU1_BPM#3
CPU1_BPM#5
12
C320
100P/6/N/50V/X
SLEW_CTRL_CPU0 (8)
SLEW_CTRL_CPU1 (11)
SMC_CPU0_SKTOCC# (8,46,52)
PU_CPU0_8 (8)
PU_CPU0_0 (8)
PU_CPU0_6 (8)
PU_CPU0_5 (8)
PU_CPU0_4 (8)
PU_CPU0_3 (8)
PU_CPU0_2 (8)
PU_CPU0_1 (8)
PU_CPU0_7 (8)
CPU1_BPM#[0..5] (11)
CPU0_BPM#[0..5] (8)
51/8P4R
2
4
6
8
12
12
12
12
CPU0_BPM#2
CPU0_BPM#0
CPU0_BPM#3
CPU0_BPM#5
CPU1_BPM#1
CPU1_BPM#0
CPU0_BPM#4
CPU0_BPM#1
2
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P0 TERMINATION
GA-9IVDPL
1
of
964Wednesday, December 21, 2005
2.1
1
3
5
7
RN27
R511 51/6
A A
5
4
3
R514 51/6
R614 51/6
R620 51/6
5
U71C
L31
VSS9
L29
NOCONA 800
VSS10
L27
VSS11
L25
VSS12
L23
VSS13
L9
VSS14
L7
VSS15
L5
VSS16
L3
VSS17
L1
VSS18
D D
C C
B B
K30
VSS19
K28
VSS20
K26
VSS21
K24
VSS22
K8
VSS23
K6
VSS24
K4
VSS25
K2
VSS26
J31
VSS27
J29
VSS28
J27
VSS29
J25
VSS30
J23
VSS31
J9
VSS32
J7
VSS33
J5
VSS34
J3
VSS35
J1
VSS36
H30
VSS37
H28
VSS38
H26
VSS39
H24
VSS40
H8
VSS41
H6
VSS42
H4
VSS43
H2
VSS44
G31
VSS45
G29
VSS46
G27
VSS47
G25
VSS48
G9
VSS49
G5
VSS51
G3
VSS52
G1
VSS53
F30
VSS54
F28
VSS55
F25
VSS56
F19
VSS57
F13
VSS58
F7
VSS59
F2
VSS60
E31
VSS61
E29
VSS62
E23
VSS63
E17
VSS64
E15
VSS65
E9
VSS66
D30
VSS68
D28
VSS69
D27
VSS70
D21
VSS71
D11
VSS72
D5
VSS73
D2
VSS74
C31
VSS75
C29
VSS76
C25
VSS77
C19
VSS78
C13
VSS79
C7
VSS80
B30
VSS82
B28
VSS83
B23
VSS84
B17
VSS85
B15
VSS86
B9
VSS87
B2
VSS88
A31
VSS89
A29
VSS90
A27
VSS91
A21
VSS92
A11
VSS93
A5
VSS94
NOCONA_800-mPGA604
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
U71D
L30
VCC_CORE1
L26
VCC_CORE2
L24
VCC_CORE3
L8
VCC_CORE4
L6
VCC_CORE5
L4
VCC_CORE6
L2
VCC_CORE7
K31
VCC_CORE8
K29
VCC_CORE9
K27
VCC_CORE10
K25
VCC_CORE11
K23
VCC_CORE12
K9
VCC_CORE13
K7
VCC_CORE14
K5
VCC_CORE15
K3
VCC_CORE16
K1
VCC_CORE17
J30
VCC_CORE18
J28
VCC_CORE19
J26
VCC_CORE20
J24
VCC_CORE21
J8
VCC_CORE22
J6
VCC_CORE23
J4
VCC_CORE24
J2
VCC_CORE25
H31
VCC_CORE26
H29
VCC_CORE27
H27
VCC_CORE28
H25
VCC_CORE29
H23
VCC_CORE30
H9
VCC_CORE31
H7
VCC_CORE32
H5
VCC_CORE33
H3
VCC_CORE34
H1
VCC_CORE35
G30
VCC_CORE36
G28
VCC_CORE37
G26
VCC_CORE38
G24
VCC_CORE39
G8
VCC_CORE40
G6
VCC_CORE41
G4
VCC_CORE42
G2
VCC_CORE43
F31
VCC_CORE44
F29
VCC_CORE45
F22
VCC_CORE46
F16
VCC_CORE47
F4
VCC_CORE48
F1
VCC_CORE49
E30
VCC_CORE50
E28
VCC_CORE51
E26
VCC_CORE52
E20
VCC_CORE53
E6
VCC_CORE54
E2
VCC_CORE55
D31
VCC_CORE56
D29
VCC_CORE57
D24
VCC_CORE58
D18
VCC_CORE59
D14
VCC_CORE60
D8
VCC_CORE61
D1
VCC_CORE62
C30
VCC_CORE63
C28
VCC_CORE64
C22
VCC_CORE65
C16
VCC_CORE66
C4
VCC_CORE67
C2
VCC_CORE68
B31
VCC_CORE69
B29
VCC_CORE70
B26
VCC_CORE71
B20
VCC_CORE72
B6
VCC_CORE73
A30
VCC_CORE74
A28
VCC_CORE75
A24
VCC_CORE76
A18
VCC_CORE77
A14
VCC_CORE78
A8
VCC_CORE79
A2
VCC_CORE80
NOCONA_800-mPGA604
NOCONA 800
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
3
P_VCCP0P_VCCP0
P_VTT
U71E
AD12
VCC_VTT1
AC10
VCC_VTT2
AA12
VCC_VTT3
Y10
VCC_VTT4
F10
VCC_VTT5
E12
VCC_VTT6
C10
VCC_VTT7
B12
VCC_VTT8
B4
VCC_VTT9
C5
VCC_VTT10
A4
P_VCCP0
CPU0_THERMDA(8)
CPU0_THERMDC(8)
CPU0_THERMDA
CPU0_THERMDC
VCC_VTT11
AE24
VCC_CORE160
AE18
VCC_CORE161
AE14
VCC_CORE162
AE8
VCC_CORE163
AE3
VCC_CORE164
AD30
VCC_CORE165
AD26
VCC_CORE166
AD20
VCC_CORE167
AD6
VCC_CORE168
AD2
VCC_CORE169
AC31
VCC_CORE170
AC22
VCC_CORE171
AC16
VCC_CORE172
AC4
VCC_CORE173
AC3
VCC_CORE174
AB30
VCC_CORE175
AB24
VCC_CORE176
AB18
VCC_CORE177
AB14
VCC_CORE178
AB8
VCC_CORE179
AB2
VCC_CORE180
L28
VCC_CORE181
NOCONA_800-mPGA604
R570
1 2
0/6
R568
1 2
0/6
2
NOCONA 800
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
TD1P
TD1N
1
TD1P (48,50,61)
TD1N (48,50,61)
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P0 PWR/GND
GA-9IVDPL
10 64Wednesday, December 21, 2005
1
of
2.1
5
4
3
2
1
PROCESSOR 1
SB_BPRI#(8,18)
SB_CPU1_BREQ#23(13)
SB_BREQ#0(8,9,18)
SB_BREQ#1(8,9,18)
SB_CPURST#(8,9,14,18)
SB_RS#[0..2](8,18)
D D
P_VTT
PLACE WITHIN 1" OF CPU
C C
VID_CPU1_R[0..5](50,54)
P_VTT
B B
754mV
P_VTT
754mV
A A
SB_RSP#(8,18)
SB_CPU_A20M#(8,9,34)
SB_CPU_IGNNE#(8,9,34)
SB_CPU_INIT#(8,9,34,47)
SB_CPU_NMI(8,9,14)
SB_CPU_INTR(8,9,34)
CPU_PWR_GD(8,9,13,34)
SB_CPU1_SMI#(13,14)
SB_CPU_SLP#(8,9,34)
SB_CPU_STPCLK#(8,9)
P1_BCLK#(30)
P1_BCLK(30)
R471
R484
R482
R468
SB_CPU1_BSEL1(13,45)
SB_CPU1_BSEL0(13,45)
P_VCCP_A_CPU1
VR1_VCCSENSE(54)
VTTEN(8,9,45)
AGND_CPU1
VR1_VSSSENSE(54)
R491
49.9/6/1
1 2
VREF_P_VCCP_CPU1_0_R
12
R486
C213
84.5/6/1
1 2
1U/6/Y5V/16V
R527
49.9/6/1
VREF_P_VCCP_CPU1_3_R
1 2
12
R522
84.5/6/1
1 2
SB_BPRI#
SB_CPU1_BREQ#23
SB_BREQ#0
SB_BREQ#1
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
SB_CPU1_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P1_BCLK#
P1_BCLK
P1_TCK0
12
51/6
P1_TDI_P1
12
51/6
P1_TMS
12
51/6
P1_TRST#
12
51/6
SB_CPU1_BSEL1 VREF_P_VTT_CPU1_0
SB_CPU1_BSEL0
TP19
TP20
TP17
STP15
STP11
TP21
STP10
TP18
STP8
STP9
STP7
TP24
STP16
TP22
C237
1U/6/Y5V/16V
VR1_VCCSENSE
VTTEN
VR1_VSSSENSE
R470
0/6
220P/6/X7R/50V
R525
0/6
VID_CPU1_R5
VID_CPU1_R4
VID_CPU1_R3
VID_CPU1_R2
VID_CPU1_R1
VID_CPU1_R0
12
12
SC232
12
12
SC233
220P/6/X7R/50V
U59A
D23
BPRI#
D10
E11
F12
D20
F21
D22
E21
F27
C26
G23
B24
AB7
C27
AE6
E24
C24
A25
F24
AB3
AA3
AE29
AE28
AE30
AD29
AD28
AC29
AB29
AB28
AA29
AA28
AE15
AC1
AE16
AD4
B27
AB4
AA5
D26 C1
NOCONA 800
BR3#
BR2#
BR1#
BR0#
Y8
RESET#
RS2#
RS1#
RS0#
C6
RSP#
A20M#
IGNNE#
D6
INIT#
LINT1_NMI
LINT0_INTR
PWRGOOD
SMI#
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
TCK
TDI
TMS
TRST#
BSEL1
BSEL0
RESERVED1
RESERVED0
RSVD16
Y3
RSVD15
RSVD14
RSVD13
RSVD12
RSVD10
RSVD9
RSVD8
RSVD7
RSVD3
RSVD2
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
VCCIOPLL
VCC_SENSE
E1
VTTEN
VCCA
VSSA
VSS_SENSE OPTIMIZED_COMPAT#
NOCONA_800-mPGA604
THERMTRIP#
PROCHOT#
BOOT_SELECT
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
WIDE 10-12 MILS
VREF_P_VTT_CPU1_0
12
SC192
220P/6/X7R/50V
WIDE 10-12 MILS
VREF_P_VTT_CPU1_3
12
SC193
220P/6/X7R/50V
ADS#
BINIT#
BNR#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
TDO
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
THERMDC
THERMDA
RSVD
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU1_BPM#5
E4
CPU1_BPM#4
E8
CPU1_BPM#3
F5
CPU1_BPM#2
E7
CPU1_BPM#1
F8
CPU1_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU1_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU1_THERMTRIP#
F26
SB_CPU1_PROCHOT#
B25
E25
F9
F23
W9
W23
B5
A3
AC28
D25
E16
AD16
Y29
A26
AE5
AD5
AA7
Y6
W8
W7
W6
AE4
AD1
Y28
Y27
G7
W3
B1
A16
A15
AC30
STP12
PD_ODTEN_CPU1
SMC_CPU1_SKTOCC#
PD_COMP3_CPU1
PD_COMP2_CPU1
PD_COMP1_CPU1
PD_COMP0_CPU1
PU_CPU1_8
PU_CPU1_0
PU_CPU0_5
PU_CPU1_6
PU_CPU1_1
PU_CPU1_7
PU_CPU1_3
PU_CPU1_2
PU_CPU1_4
PU_VCCPLL_CPU1
CPU1_THERMDC
CPU1_THERMDA
PU_BOOT_SELECT_CPU1
VID_PWRGD
SB_CPU0_CPU1_TESTBUS
SB_CPU1_FORCEPR#
SLEW_CTRL_CPU1
CPU1_OPTIM_COMPAT_CTRL
COMP3 =SB_CPU1_ADDR_ERC
COMP2 =SB_CPU1_DATA_ERC
PU_CPU1_8=SB_CPU1_EDRDY
PU_CPU1_0=SB_CPU1_SNPD#
P_VTT
L13
10UH/100mA/1206
L12
10UH/100mA/1206
SB_ADS# (8,18)
SB_BINIT# (8,9,18)
SB_BNR# (8,9,18)
CPU1_BPM#[0..5] (9)
SB_DBSY# (8,18)
SB_DEFER# (8,18)
SB_DRDY# (8,18)
SB_HIT# (8,9,18)
SB_HITM# (8,9,18)
SB_TRDY# (8,18)
SB_LOCK# (8,18)
SB_MCERR# (8,9,18)
SB_CPU1_IERR# (13,14)
SB_CPU_FERR# (8,9,34)
SB_CPU1_THERMTRIP# (9,14)
SB_CPU1_PROCHOT# (13,14)
PD_ODTEN_CPU1 (9)
SMC_CPU1_SKTOCC# (13,45,46)
PD_COMP3_CPU1 (13)
PD_COMP2_CPU1 (13)
PD_COMP1_CPU1 (13)
PD_COMP0_CPU1 (13)
PU_CPU1_8 (13)
PU_CPU1_0 (13)
PU_CPU1_5 (13)
PU_CPU1_6 (13)
PU_CPU1_1 (13)
PU_CPU1_7 (13)
PU_CPU1_3 (13)
PU_CPU1_2 (13)
PU_CPU1_4 (13)
STP13
TP25
CPU1_THERMDC (12)
CPU1_THERMDA (12)
PU_BOOT_SELECT_CPU1 (13)
STP14
VID_PWRGD (8,45)
SB_CPU0_CPU1_TESTBUS (8,9)
SB_CPU1_FORCEPR# (13,14)
SLEW_CTRL_CPU1 (9)
CPU1_OPTIM_COMPAT_CTRL (13)
WIDE 10-12 MILS
12
C242
22U/1206/Y5V/10V
P_VCCP_A_CPU1
AGND_CPU1
SB_D#[0..63](8,18)
VREF_P_VTT_CPU1_3
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
C231
22U/1206/Y5V/10V
AB6
Y9
AA8
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
Y23
AD27
AA25
Y24
AA27
Y26
12
C230
22U/1206/Y5V/10V
U59B
D63
NOCONA 800
D62
D61
D60
D59
D58
D57
D56
D55
D54
D53
D52
D51
D50
D49
D48
D47
D46
D45
D44
D43
D42
D41
D40
D39
D38
D37
D36
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOCONA_800-mPGA604
P_VTT
SC244
1U/6/Y5V/16V
12
12
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
BREQ4#
BREQ3#
BREQ2#
BREQ1#
BREQ0#
DBI3#
DBI2#
DBI1#
DBI0#
DP3#
DP2#
DP1#
DP0#
AP1#
AP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
12
SC245
0.1U/6/Y5V/50V
SB_HA#35
C8
SB_HA#34
C9
SB_HA#33
A7
SB_HA#32
A6
SB_HA#31
B7
SB_HA#30
C11
SB_HA#29
D12
SB_HA#28
E13
SB_HA#27
B8
SB_HA#26
A9
SB_HA#25
D13
SB_HA#24
E14
SB_HA#23
C12
SB_HA#22
B11
SB_HA#21
B10
SB_HA#20
A10
SB_HA#19
F15
SB_HA#18
D15
SB_HA#17
D16
SB_HA#16
C14
SB_HA#15
C15
SB_HA#14
A12
SB_HA#13
B13
SB_HA#12
B14
SB_HA#11
B16
SB_HA#10
A13
SB_HA#9
D17
SB_HA#8
C17
SB_HA#7
A19
SB_HA#6
C18
SB_HA#5
B18
SB_HA#4
A20
SB_HA#3
A22
SB_REQ#4
B22
SB_REQ#3
C20
SB_REQ#2
C21
SB_REQ#1
B21
SB_REQ#0
B19
SB_DBI#3
AB9
SB_DBI#2
AE12
SB_DBI#1
AD22
SB_DBI#0
AC27
SB_DP#3
AE17
SB_DP#2
AC15
SB_DP#1
AE19
SB_DP#0
AC18
SB_AP#1
D9
SB_AP#0
E10
SB_ADSTB#1
F14
SB_ADSTB#0
F17
SB_DSTBP#3
Y11
SB_DSTBP#2
Y14
SB_DSTBP#1
Y17
SB_DSTBP#0
Y20
SB_DSTBN#3
Y12
SB_DSTBN#2
Y15
SB_DSTBN#1
Y18
SB_DSTBN#0
Y21
EC40
+
PSA2.5VB820MH11/8X11.5
Trace Width:12 Mils
VREF_P_VTT_CPU1_0
VREF_P_VTT_CPU1_3
VCCIOPLL_CPU1
AGND_CPU1
PU_VCCPLL_CPU1
SB_HA#[3..35] (8,18)
SB_REQ#[0..4] (8,18)
SB_DBI#[0..3] (8,18)
SB_DP#[0..3] (8,18)
SB_AP#[0..1] (8,18)
SB_ADSTB#[0..1] (8,18)
SB_DSTBP#[0..3] (8,18)
SB_DSTBN#[0..3] (8,18)
P1 VREF
MCH A0 CPU B0 800 64.9ohm 0.678V
MCH B0 CPU C1 800 49.9ohm 0.756V
5
Title
Size Document Number Rev
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 MICS P1
GA-9IVDPL
1
11 64Wednesday, December 21, 2005
of
2.1
5
U59C
L31
VSS9
L29
NOCONA 800
VSS10
L27
VSS11
L25
VSS12
L23
VSS13
L9
VSS14
L7
VSS15
L5
VSS16
L3
VSS17
L1
VSS18
D D
C C
B B
K30
VSS19
K28
VSS20
K26
VSS21
K24
VSS22
K8
VSS23
K6
VSS24
K4
VSS25
K2
VSS26
J31
VSS27
J29
VSS28
J27
VSS29
J25
VSS30
J23
VSS31
J9
VSS32
J7
VSS33
J5
VSS34
J3
VSS35
J1
VSS36
H30
VSS37
H28
VSS38
H26
VSS39
H24
VSS40
H8
VSS41
H6
VSS42
H4
VSS43
H2
VSS44
G31
VSS45
G29
VSS46
G27
VSS47
G25
VSS48
G9
VSS49
G5
VSS51
G3
VSS52
G1
VSS53
F30
VSS54
F28
VSS55
F25
VSS56
F19
VSS57
F13
VSS58
F7
VSS59
F2
VSS60
E31
VSS61
E29
VSS62
E23
VSS63
E17
VSS64
E15
VSS65
E9
VSS66
D30
VSS68
D28
VSS69
D27
VSS70
D21
VSS71
D11
VSS72
D5
VSS73
D2
VSS74
C31
VSS75
C29
VSS76
C25
VSS77
C19
VSS78
C13
VSS79
C7
VSS80
B30
VSS82
B28
VSS83
B23
VSS84
B17
VSS85
B15
VSS86
B9
VSS87
B2
VSS88
A31
VSS89
A29
VSS90
A27
VSS91
A21
VSS92
A11
VSS93
A5
VSS94
NOCONA_800-mPGA604
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
P_VCCP1
U59D
L30
VCC_CORE1
L26
VCC_CORE2
L24
VCC_CORE3
L8
VCC_CORE4
L6
VCC_CORE5
L4
VCC_CORE6
L2
VCC_CORE7
K31
VCC_CORE8
K29
VCC_CORE9
K27
VCC_CORE10
K25
VCC_CORE11
K23
VCC_CORE12
K9
VCC_CORE13
K7
VCC_CORE14
K5
VCC_CORE15
K3
VCC_CORE16
K1
VCC_CORE17
J30
VCC_CORE18
J28
VCC_CORE19
J26
VCC_CORE20
J24
VCC_CORE21
J8
VCC_CORE22
J6
VCC_CORE23
J4
VCC_CORE24
J2
VCC_CORE25
H31
VCC_CORE26
H29
VCC_CORE27
H27
VCC_CORE28
H25
VCC_CORE29
H23
VCC_CORE30
H9
VCC_CORE31
H7
VCC_CORE32
H5
VCC_CORE33
H3
VCC_CORE34
H1
VCC_CORE35
G30
VCC_CORE36
G28
VCC_CORE37
G26
VCC_CORE38
G24
VCC_CORE39
G8
VCC_CORE40
G6
VCC_CORE41
G4
VCC_CORE42
G2
VCC_CORE43
F31
VCC_CORE44
F29
VCC_CORE45
F22
VCC_CORE46
F16
VCC_CORE47
F4
VCC_CORE48
F1
VCC_CORE49
E30
VCC_CORE50
E28
VCC_CORE51
E26
VCC_CORE52
E20
VCC_CORE53
E6
VCC_CORE54
E2
VCC_CORE55
D31
VCC_CORE56
D29
VCC_CORE57
D24
VCC_CORE58
D18
VCC_CORE59
D14
VCC_CORE60
D8
VCC_CORE61
D1
VCC_CORE62
C30
VCC_CORE63
C28
VCC_CORE64
C22
VCC_CORE65
C16
VCC_CORE66
C4
VCC_CORE67
C2
VCC_CORE68
B31
VCC_CORE69
B29
VCC_CORE70
B26
VCC_CORE71
B20
VCC_CORE72
B6
VCC_CORE73
A30
VCC_CORE74
A28
VCC_CORE75
A24
VCC_CORE76
A18
VCC_CORE77
A14
VCC_CORE78
A8
VCC_CORE79
A2
VCC_CORE80
NOCONA_800-mPGA604
NOCONA 800
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
3
P_VCCP1
2
P_VTT
U59E
AD12
VCC_VTT1
AC10
AA12
Y10
F10
E12
C10
B12
B4
C5
P_VCCP1
CPU1_THERMDA(11)
CPU1_THERMDA
CPU1_THERMDC TD2N
A4
AE24
AE18
AE14
AE8
AE3
AD30
AD26
AD20
AD6
AD2
AC31
AC22
AC16
AC4
AC3
AB30
AB24
AB18
AB14
AB8
AB2
L28
R461
1 2
0/6
R460
1 2
0/6
NOCONA 800
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_CORE160
VCC_CORE161
VCC_CORE162
VCC_CORE163
VCC_CORE164
VCC_CORE165
VCC_CORE166
VCC_CORE167
VCC_CORE168
VCC_CORE169
VCC_CORE170
VCC_CORE171
VCC_CORE172
VCC_CORE173
VCC_CORE174
VCC_CORE175
VCC_CORE176
VCC_CORE177
VCC_CORE178
VCC_CORE179
VCC_CORE180
VCC_CORE181
NOCONA_800-mPGA604
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
TD2P
TD2P (48,50,61)
TD2N (48,50,61)CPU1_THERMDC(11)
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P1 PWR/GND
GA-9IVDPL
1
12 64Wednesday, December 21, 2005
of
2.1
5
4
3
2
1
P_VTTP_VTT
SB_CPU1_SMI#
R465 220/6
R488 51/6
D D
R520 51/6
R481 51/6
R530 51/6/X
R536 51/6/X
R506 51/6
12
SB_CPU1_FORCEPR#
12
SB_CPU1_IERR#
12
SB_CPU1_PROCHOT#
12
PU_BOOT_SELECT_CPU1
12
CPU1_OPTIM_COMPAT_CTRL
12
R533
51/6/X
1 2
SB_CPU1_BREQ#23
12
SB_CPU1_SMI# (11,14)
SB_CPU1_FORCEPR# (11,14)
SB_CPU1_IERR# (11,14)
SB_CPU1_PROCHOT# (11,14)
PU_BOOT_SELECT_CPU1 (11)
CPU1_OPTIM_COMPAT_CTRL (11)
SB_CPU1_BREQ#23 (11)
R444 51/6
R529 51/6
R535 51/6
R534 51/6
R528 51/6
R519 51/6
R521 51/6
R524 51/6
R472 51/6
P3V3_STBY
R531
4.7K/6
SB_CPU1_BSEL1
12
12
R501 49.9/6/1
12
SB_CPU1_BSEL0
12
PD_COMP3_CPU1
12
PD_COMP2_CPU1
12
PD_COMP1_CPU1
PD_COMP0_CPU1
R545 510/6
R546 510/6
C C
R459 100/6/1
R467 100/6/1
R485 49.9/6/1
SB_CPU1_BSEL1 (11,45)
SB_CPU1_BSEL0 (11,45)
PD_COMP3_CPU1 (11)
PD_COMP2_CPU1 (11)
PD_COMP1_CPU1 (11)
PD_COMP0_CPU1 (11)
CPU_PWR_GD
12
C236
100P/6/N/50V/X
PU_CPU1_8
12
PU_CPU1_7
12
PU_CPU1_6
12
PU_CPU1_5
12
PU_CPU1_4
12
PU_CPU1_3
12
PU_CPU1_2
12
PU_CPU1_1
12
PU_CPU1_0
12
SMC_CPU1_SKTOCC#
12
CPU_PWR_GD (8,9,11,34)
PU_CPU1_8 (11)
PU_CPU1_7 (11)
PU_CPU1_6 (11)
PU_CPU1_5 (11)
PU_CPU1_4 (11)
PU_CPU1_3 (11)
PU_CPU1_2 (11)
PU_CPU1_1 (11)
PU_CPU1_0 (11)
SMC_CPU1_SKTOCC# (11,45,46)
B B
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 800 P1 TERMINATION
GA-9IVDPL
1
13 64Wednesday, December 21, 2005
of
2.1
5
P_VTT
12
C155
0.01U/6/X7R/50V
1 2
1 2
C141
1U/6/Y5V/16V
D D
SB_CPU1_IERR#(11,13)
SB_CPU0_IERR#(8,9)
SB_CPU0_THERMTRIP#(8,9)
SB_CPU1_THERMTRIP#(9,11)
SB_CPU0_PROCHOT#(8,9)
SB_CPU1_PROCHOT#(11,13)
ICH_CPU_SMI#(34)
HW_CPU0_SMI#(50)
HW_CPU1_SMI#(50)
SB_ICH_NMI(34)
12
R373
R368
51/6
51/6
4
P_VTT
12
R366
200/6
12
R381
51/6
12
R359
51/6
12
R377
51/6
GTL2006_VREF
12
R401
100/6/1
1
27
26
19
18
21
25
20
24
23
9
12
13
7
U47
VREF
1BI
2BI
3BI
4BI
5BI
7BO1
6BI
7BO2
8BO
9BI
10AI1
10AI2
11BI
3
R378
1 2
49.9/6/1
C173
1U/6/Y5V/16V
1 2
VCC
1AO
2AO
3AO
4AO
5A(OD)
6A(OD)
8AI
9AO
10BO1
10BO2
11BO
11A(OD)GND
GTL2006/TSSOP28
P_VTT
28
2
3
10
11
4
5
6
15
17
16
22
814
P3V3
1 2
CPU0_THERMTRIP#
CPU1_THERMTRIP#
C175
1U/6/Y5V/16V
P3V3 P3V3
12
R370
220/6
GTL_SMI#
SB_CPU0_SMI#
SB_CPU1_SMI#
2
P3V3
12
12
R380
R364
1K/6
1K/6
CPU1_IERR# (46,50)
CPU0_IERR# (46,50)
CPU0_PROCHOT# (34,50)
CPU1_PROCHOT# (34,50)
SB_CPU0_SMI# (8,9)
SB_CPU1_SMI# (11,13)
SB_CPU_NMI (8,9,11)
P3V3
12
R376
10K/6
1
VCC
1Y
2B
P3V3_STBY
8
7
6
P3V3
12
R443
10K/6/X
D18 RB751V-40/SMD/X
D22 RB751V-40/SMD/X
SD3 RB751V-40/SMD/X
SD4 RB751V-40/SMD/X
D19 RB751V-40/SMD
D21 RB751V-40/SMD
12
12
10K/6/X
Title
Size Document Number Rev
Date: Sheet
12
R469
R483
12
12
12
12
12
12
R442
10K/6/X
10K/6/X
P3V3
12
R441
10K/6/X
SB_CPU_THERMTRIP# (34)
LM93_CPU1_THRMTRIP# (50)
LM93_CPU0_THRMTRIP# (50)
IPMI_CPU1_THRMTRIP# (46)
IPMI_CPU0_THRMTRIP# (46)
12
R473
10K/6/X
BACK_CPU1_THRMTRIP# (61)
BACK_CPU0_THRMTRIP# (61)
GIGA-BYTE TECHNOLOGY CO., LTD.
LEVEL/THERMAL/BREQ
GA-9IVDPL
1
14 64Wednesday, December 21, 2005
2.1
of
P3V3 P3V3
470/6/X
R505
10K/6/X
P3V3
12
12
R487
ECB
12
R333
1K/6
Q62
MMBT2222A/SOT23/X
ECB
Q61
MMBT2222A/SOT23/X
P3V3
U45
168
2
1A
3
1B
VCCGND
5
2A
6
2B
11
3A
10
3B
14
4A
13
4B
1
A/B
15
G
74LCX157/TSSOP16
12
C156
0.1U/6/Y5V/50V
4
1Y
7
2Y
9
3Y
12
4Y
3
P3V3 P_VTT
C140
0.1U/6/Y5V/50V
2 4
C139
0.1U/6/Y5V/50V
2 4
SB_CPU1_FORCEPR# (11,13)
12
12
R318
53
53
51/6/1
SB_CPU0_SMI#
U40
74LVC1G07/SOT23-5
P_VTTP3V3
12
12
R363
51/6/1
SB_CPU1_SMI#
U39
74LVC1G07/SOT23-5
CPU1_THERMTRIP#
CPU0_THERMTRIP#
PS_PWR_GD#(45,52)
CPU0_THERMTRIP#
CPU1_THERMTRIP#
D20 RB751V-40/SMD/X
12
D23 RB751V-40/SMD/X
12
U54
1
1A
2
1B
3
2Y
4 5
GND 2A
SN74LVC2G32DCTR/SSOP8/X
CPU1_THERMTRIP#
CPU0_THERMTRIP#
IPMI_CPU1_THRMTRIP#
IPMI_CPU0_THRMTRIP#
CPU1_THERMTRIP#
CPU0_THERMTRIP#
2
R588
10K/6/X
R598
470/6/X
P3V3
1 2
1 2
12
Q84
MMBT2222A/SOT23/X
ECB
R523 8.2K/6
R517 8.2K/6
Q85
MMBT2222A/SOT23/X
ECB
HW_CPU0_SMI#
HW_CPU1_SMI#
C C
CPU0_FORCEPR#(50,53)
B B
1 2
CPU Reduction Circuit
A A
MMBT2222A/SOT23
R361 10K/6
SB_CPURST#(8,9,11,18)
5
1 2
SB_CPU0_FORCEPR# (8,9)
P3V3
12
R351
1K/6
Q43
ECB
GTL_SMI#
4
CPU1_FORCEPR#(50,54)
BMC_BSP_TRI#(46)
BMC_AP_TRI#(46)
12
C154
0.1U/6/Y5V/50V
R317
1K/6
P3V3
12
R341
1K/6
D
D
GS
G
S
1 2
Q42
2N7002/SOT23
5
DDRA_MA[0..13](23,24,25,29)
D D
DDRA_CB[0..7](23,24,25)
MEM_CKE0(25,29)
MEM_CKE1(28,29)
MEM_CKE2(23,24,29)
MEM_CKE3(26,27,29)
DDRA_CMDCLK0_P(23,29)
DDRA_CMDCLK0_N(23,29)
DDRA_CMDCLK2_P(25,29)
DDRA_CMDCLK2_N(25,29)
DDRA_CMDCLK1_P(24,29)
PLACE DDR VREF VOLTAGE
C C
DIVIDER NEAR CHANNEL A
DIMMS
P1V8
R637
75/6/1
1 2
R636
75/6/1
1 2
B B
12
C347
1U/6/Y5V/16V
PLACE CLOSE TO DIMM < 0.5
P1V8 P1V8 P1V8 P1V8
PLACE CLOSE TO MCH < 0.5
DDRA_MCH_VREF_R
C346
12
0.1U/6/Y5V/50V
DDRA_CMDCLK1_N(24,29)
STP36
DDRA_CS#[0..7](23,24,25,29)
STP37
DDRA_CAS#(23,24,25,29)
DDRA_RAS#(23,24,25,29)
DDRA_WE#(23,24,25,29)
DDRA_BA[0..2](23,24,25,29)
4
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_CB0
DDRA_CB1
DDRA_CB2
DDRA_CB3
DDRA_CB4
DDRA_CB5
DDRA_CB6
DDRA_CB7
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
DDRA_CMDCLK0_P
DDRA_CMDCLK0_N
DDRA_CMDCLK2_P
DDRA_CMDCLK2_N
DDRA_CMDCLK1_P
DDRA_CMDCLK1_N
DDRA_CS#0
DDRA_CS#1
DDRA_CS#2
DDRA_CS#3
DDRA_CS#4
DDRA_CS#5
DDRA_CS#6
DDRA_CS#7
DDRA_CAS#
DDRA_RAS#
DDRA_WE#
DDRA_BA0
DDRA_BA1
DDRA_BA2
DDRA_DQS0
DDRA_DQS#0
DDRA_DQS1
DDRA_DQS#1
DDRA_DQS2
DDRA_DQS#2
DDRA_DQS3
DDRA_DQS#3
DDRA_DQS4
DDRA_DQS#4
DDRA_DQS5
DDRA_DQS#5
DDRA_DQS6
DDRA_DQS#6
DDRA_DQS7
DDRA_DQS#7
DDRA_DQS8
DDRA_DQS#8
U68A
AH5
DDR_A_MA0
AD14
DDR_A_MA1
AL14
DDR_A_MA2
AK15
DDR_A_MA3
AJ16
DDR_A_MA4
AH17
DDR_A_MA5
AF18
DDR_A_MA6
AN20
DDR_A_MA7
AK20
DDR_A_MA8
AJ22
DDR_A_MA9
AE4
DDR_A_MA10
AF22
DDR_A_MA11
AG23
DDR_A_MA12
U6
DDR_A_MA13
AJ9
DDR_A_CB0
AG11
DDR_A_CB1
AE11
DDR_A_CB2
AD11
DDR_A_CB3
AJ10
DDR_A_CB4
AH10
DDR_A_CB5
AF10
DDR_A_CB6
AE10
DDR_A_CB7
AE26
DDR_CKE0
AN26
DDR_CKE1
AL26
DDR_CKE2
AK26
DDR_CKE3
AF13
DDR_A_CMDCLK_P0
AF12
DDR_A_CMDCLK_N0
AH11
DDR_A_CMDCLK_P1
AJ12
DDR_A_CMDCLK_N1
AH13
DDR_A_CMDCLK_P2
AG12
DDR_A_CMDCLK_N2
AC10
DDR_A_CMDCLK_P3
AD9
DDR_A_CMDCLK_N3
W2
DDR_A_#CS0
V3
DDR_A_#CS1
T8
DDR_A_#CS2
T10
DDR_A_#CS3
N5
DDR_A_#CS4
M5
DDR_A_#CS5
M3
DDR_A_#CS6
L4
DDR_A_#CS7
AM3
DDR_A_VREF
W8
DDR_A_CAS#
AA6
DDR_A_RAS#
Y10
DDE_A_WE#
AB5
DDR_A_BA0
AF6
DDR_A_BA1
AE25
DDR_A_BA2
AJ30
DDR_A_DQS_P0
AJ31
DDR_A_DQS_N0
AJ24
DDR_A_DQS_P1
AJ25
DDR_A_DQS_N1
AH19
DDR_A_DQS_P2
AH20
DDR_A_DQS_N2
AG14
DDR_A_DQS_P3
AG15
DDR_A_DQS_N3
AC6
DDR_A_DQS_P4
AD6
DDR_A_DQS_N4
W7
DDR_A_DQS_P5
V8
DDR_A_DQS_N5
N7
DDR_A_DQS_P6
P7
DDR_A_DQS_N6
G4
DDR_A_DQS_P7
H4
DDR_A_DQS_N7
AF9
DDR_A_DQS_P8
AG9
DDR_A_DQS_N8
3
DDR_A_DQ0
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR GROUP A
Lindenhurst-VS/BGA1077(C4)
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63
DDR_A_DQS_P9
DDR_A_DQS_N9
DDR_A_DQS_P10
DDR_A_DQS_N10
DDR_A_DQS_P11
DDR_A_DQS_N11
DDR_A_DQS_P12
DDR_A_DQS_N12
DDR_A_DQS_P13
DDR_A_DQS_N13
DDR_A_DQS_P14
DDR_A_DQS_N14
DDR_A_DQS_P15
DDR_A_DQS_N15
DDR_A_DQS_P16
DDR_A_DQS_N16
DDR_A_DQS_P17
DDR_A_DQS_N17
AK32
AH31
AH29
AF28
AJ33
AK33
AG30
AG29
AG27
AG26
AD24
AD23
AE28
AF27
AH25
AG24
AF21
AG21
AF19
AG18
AE22
AD21
AJ18
AG20
AF16
AF15
AE13
AD12
AE17
AJ15
AE16
AD17
AH4
AG5
AB8
AB7
AB10
AA9
AE5
AD5
U9
AA5
V6
U7
W10
U10
W5
V5
R6
R5
L7
L6
P9
T5
N8
M9
K5
J5
K8
K10
L9
L10
K7
H7
AL32
AL31
AF25
AF24
AE20
AE19
AH14
AJ13
AD8
AC7
Y7
Y6
P10
N10
J6
H6
AH8
AJ7
DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63
DDRA_DQS9
DDRA_DQS#9
DDRA_DQS10
DDRA_DQS#10
DDRA_DQS11
DDRA_DQS#11
DDRA_DQS12
DDRA_DQS#12
DDRA_DQS13
DDRA_DQS#13
DDRA_DQS14
DDRA_DQS#14
DDRA_DQS15
DDRA_DQS#15
DDRA_DQS16
DDRA_DQS#16
DDRA_DQS17
DDRA_DQS#17
DDRA_DQ[0..63] (23,24,25)
2
1
DDRA_DQS[9..17]
DDRA_DQS#[9..17]
DDRA_DQS[9..17] (23,24,25)
DDRA_DQS#[9..17] (23,24,25)
2
Title
Size Document Number Rev
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDRII CHA
GA-9IVDPL
1
15 64Wednesday, December 21, 2005
of
2.1
SC350
0.1U/6/Y5V/50V
Under NB
SC342
0.1U/6/Y5V/50V/X
SC340
12
0.1U/6/Y5V/50V
DDRA_DQS[0..8](23,24,25)
DDRA_DQS#[0..8](23,24,25)
4
DDRA_DQS[0..8]
DDRA_DQS#[0..8]
3
12
SC361
0.1U/6/Y5V/50V
A A
SC356
0.1U/6/Y5V/50V
SC365
0.1U/6/Y5V/50V
P1V8 P1V8 P1V8
12
SC348
0.1U/6/Y5V/50V/X
12
12
12
12
5
5
DDRB_MA[0..13](26,27,28,29)
D D
DDRB_CB[0..7](26,27,28)
MEM_CKE4(24,29)
MEM_CKE5(27,29)
MEM_CKE6(25,29)
MEM_CKE7(28,29)
DDRB_CMDCLK2_P(28,29)
DDRB_CMDCLK2_N(28,29)
DDRB_CMDCLK1_P(27,29)
DDRB_CMDCLK1_N(27,29)
DDRB_CMDCLK0_P(26,29)
PLACE DDR VREF VOLTAGE
DIVIDER NEAR CHANNEL B
C C
DIMMS
P1V8
R631
75/6/1
1 2
12
R635
75/6/1
1 2
B B
C345
1U/6/Y5V/16V
PLACE CLOSE TO DIMM< 0.5
DDRB_MCH_VREF_R
C343
12
0.1U/6/Y5V/50V
DDRB_DQS[0..8](26,27,28)
DDRB_DQS#[0..8](26,27,28) DDRB_DQS#[9..17] (26,27,28)
DDRB_CMDCLK0_N(26,29)
STP38
DDRB_CS#[0..7](26,27,28,29)
STP39
DDRB_CAS#(26,27,28,29)
DDRB_RAS#(26,27,28,29)
DDRB_WE#(26,27,28,29)
DDRB_BA[0..2](26,27,28,29)
4
DDRB_MA0
DDRB_MA1
DDRB_MA2
DDRB_MA3
DDRB_MA4
DDRB_MA5
DDRB_MA6
DDRB_MA7
DDRB_MA8
DDRB_MA9
DDRB_MA10
DDRB_MA11
DDRB_MA12
DDRB_MA13
DDRB_CB0
DDRB_CB1
DDRB_CB2
DDRB_CB3
DDRB_CB4
DDRB_CB5
DDRB_CB6
DDRB_CB7
MEM_CKE4
MEM_CKE5
MEM_CKE6
MEM_CKE7
DDRB_CMDCLK2_P
DDRB_CMDCLK2_N
DDRB_CMDCLK1_P
DDRB_CMDCLK1_N
DDRB_CMDCLK0_P
DDRB_CMDCLK0_N
DDRB_CS#0
DDRB_CS#1
DDRB_CS#2
DDRB_CS#3
DDRB_CS#4
DDRB_CS#5
DDRB_CS#6
DDRB_CS#7
DDRB_CAS#
DDRB_RAS#
DDRB_WE#
DDRB_BA0
DDRB_BA1
DDRB_BA2
DDRB_DQS0
DDRB_DQS#0
DDRB_DQS1
DDRB_DQS#1
DDRB_DQS2
DDRB_DQS#2
DDRB_DQS3
DDRB_DQS#3
DDRB_DQS4
DDRB_DQS#4
DDRB_DQS5
DDRB_DQS#5
DDRB_DQS6
DDRB_DQS#6
DDRB_DQS7
DDRB_DQS#7
DDRB_DQS8
DDRB_DQS#8
U68B
AF7
DDR_B_MA0
AE14
DDR_B_MA1
AN14
DDR_B_MA2
AK14
DDR_B_MA3
AD15
DDR_B_MA4
AH16
DDR_B_MA5
AG17
DDR_B_MA6
AD18
DDR_B_MA7
AL20
DDR_B_MA8
AJ21
DDR_B_MA9
AC4
DDR_B_MA10
AH22
DDR_B_MA11
AH23
DDR_B_MA12
U4
DDR_B_MA13
AM7
DDR_B_CB0
AL7
DDR_B_CB1
AM4
DDR_B_CB2
AL4
DDR_B_CB3
AN8
DDR_B_CB4
AK8
DDR_B_CB5
AN5
DDR_B_CB6
AL5
DDR_B_CB7
AH26
DDR_CKE4
AJ27
DDR_CKE5
AJ28
DDR_CKE6
AH28
DDR_CKE7
AH7
DDR_B_CMDCLK_P0
AJ6
DDR_B_CMDCLK_N0
AH6
DDR_B_CMDCLK_P1
AG6
DDR_B_CMDCLK_N1
AG8
DDR_B_CMDCLK_P2
AE8
DDR_B_CMDCLK_N2
AK9
DDR_B_CMDCLK_P3
AL8
DDR_B_CMDCLK_N3
V9
DDR_B_#CS0
V2
DDR_B_#CS1
T7
DDR_B_#CS2
P6
DDR_B_#CS3
N4
DDR_B_#CS4
M2
DDR_B_#CS5
M6
DDR_B_#CS6
L3
DDR_B_#CS7
AN4
DDR_B_VREF
W1
DDR_B_CAS#
Y9
DDR_B_RAS#
W4
DDE_B_WE#
AA8
DDR_B_BA0
AE7
DDR_B_BA1
AM25
DDR_B_BA2
AM28
DDR_B_DQS_P0
AN29
DDR_B_DQS_N0
AM22
DDR_B_DQS_P1
AN23
DDR_B_DQS_N1
AK17
DDR_B_DQS_P2
AL17
DDR_B_DQS_N2
AK11
DDR_B_DQS_P3
AL11
DDR_B_DQS_N3
AG2
DDR_B_DQS_P4
AH2
DDR_B_DQS_N4
AA3
DDR_B_DQS_P5
AB4
DDR_B_DQS_N5
P1
DDR_B_DQS_P6
R2
DDR_B_DQS_N6
H3
DDR_B_DQS_P7
H1
DDR_B_DQS_N7
AK5
DDR_B_DQS_P8
AK6
DDR_B_DQS_N8
Lindenhurst-VS/BGA1077(C4)
3
DDR_B_DQ0
DDR_B_DQ1
DDR_B_DQ2
DDR_B_DQ3
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
DDR_B_DQ7
DDR_B_DQ8
DDR_B_DQ9
DDR_B_DQ10
DDR_B_DQ11
DDR_B_DQ12
DDR_B_DQ13
DDR_B_DQ14
DDR_B_DQ15
DDR_B_DQ16
DDR_B_DQ17
DDR_B_DQ18
DDR_B_DQ19
DDR_B_DQ20
DDR_B_DQ21
DDR_B_DQ22
DDR_B_DQ23
DDR GROUP B
DDR_B_DQ24
DDR_B_DQ25
DDR_B_DQ26
DDR_B_DQ27
DDR_B_DQ28
DDR_B_DQ29
DDR_B_DQ30
DDR_B_DQ31
DDR_B_DQ32
DDR_B_DQ33
DDR_B_DQ34
DDR_B_DQ35
DDR_B_DQ36
DDR_B_DQ37
DDR_B_DQ38
DDR_B_DQ39
DDR_B_DQ40
DDR_B_DQ41
DDR_B_DQ42
DDR_B_DQ43
DDR_B_DQ44
DDR_B_DQ45
DDR_B_DQ46
DDR_B_DQ47
DDR_B_DQ48
DDR_B_DQ49
DDR_B_DQ50
DDR_B_DQ51
DDR_B_DQ52
DDR_B_DQ53
DDR_B_DQ54
DDR_B_DQ55
DDR_B_DQ56
DDR_B_DQ57
DDR_B_DQ58
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
DDR_B_DQ62
DDR_B_DQ63
DDR_B_DQS_P9
DDR_B_DQS_N9
DDR_B_DQS_P10
DDR_B_DQS_N10
DDR_B_DQS_P11
DDR_B_DQS_N11
DDR_B_DQS_P12
DDR_B_DQS_N12
DDR_B_DQS_P13
DDR_B_DQS_N13
DDR_B_DQS_P14
DDR_B_DQS_N14
DDR_B_DQS_P15
DDR_B_DQS_N15
DDR_B_DQS_P16
DDR_B_DQS_N16
DDR_B_DQS_P17
DDR_B_DQS_N17
AM30
AN30
AN27
AM27
AK30
AM31
AL28
AK27
AM24
AN24
AN21
AM21
AL25
AK24
AL22
AK21
AK18
AM18
AN15
AM15
AL19
AM19
AM16
AL16
AK12
AM12
AN9
AM9
AL13
AM13
AM10
AL10
AJ3
AJ4
AF1
AF4
AK3
AK2
AG3
AF3
AC3
AC1
Y3
Y4
AD2
AD3
AA2
Y1
T4
T1
N1
N2
U3
U1
P3
P4
K2
K1
F2
E1
L1
K4
G1
G2
AK29
AL29
AK23
AL23
AN18
AN17
AN12
AN11
AJ1
AH1
AB2
AB1
T2
R3
J3
J2
AM6
AN6
DDRB_DQ0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ3
DDRB_DQ4
DDRB_DQ5
DDRB_DQ6
DDRB_DQ7
DDRB_DQ8
DDRB_DQ9
DDRB_DQ10
DDRB_DQ11
DDRB_DQ12
DDRB_DQ13
DDRB_DQ14
DDRB_DQ15
DDRB_DQ16
DDRB_DQ17
DDRB_DQ18
DDRB_DQ19
DDRB_DQ20
DDRB_DQ21
DDRB_DQ22
DDRB_DQ23
DDRB_DQ24
DDRB_DQ25
DDRB_DQ26
DDRB_DQ27
DDRB_DQ28
DDRB_DQ29
DDRB_DQ30
DDRB_DQ31
DDRB_DQ32
DDRB_DQ33
DDRB_DQ34
DDRB_DQ35
DDRB_DQ36
DDRB_DQ37
DDRB_DQ38
DDRB_DQ39
DDRB_DQ40
DDRB_DQ41
DDRB_DQ42
DDRB_DQ43
DDRB_DQ44
DDRB_DQ45
DDRB_DQ46
DDRB_DQ47
DDRB_DQ48
DDRB_DQ49
DDRB_DQ50
DDRB_DQ51
DDRB_DQ52
DDRB_DQ53
DDRB_DQ54
DDRB_DQ55
DDRB_DQ56
DDRB_DQ57
DDRB_DQ58
DDRB_DQ59
DDRB_DQ60
DDRB_DQ61
DDRB_DQ62
DDRB_DQ63
DDRB_DQS9
DDRB_DQS#9
DDRB_DQS10
DDRB_DQS#10
DDRB_DQS11
DDRB_DQS#11
DDRB_DQS12
DDRB_DQS#12
DDRB_DQS13
DDRB_DQS#13
DDRB_DQS14
DDRB_DQS#14
DDRB_DQS15
DDRB_DQS#15
DDRB_DQS16
DDRB_DQS#16
DDRB_DQS17
DDRB_DQS#17
2
DDRB_DQ[0..63] (26,27,28)
DDRB_DQS[9..17] (26,27,28)
1
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDRII CHB
GA-9IVDPL
1
16 64Wednesday, December 21, 2005
of
2.1
5
MCH_66MHZ_CLK
P1V5
D D
MCH_HI_VSWING
MCH_HI_VREF
12
C303
100P/6/N/50V/X
C C
B B
P1V8
12
SR207
R629
40.2/6/1
R627
40.2/6/1
43.2/6/1
P_VTT
12
12
C339
0.1U/6/Y5V/50V
SYS_PWR_GD_3_3V(31,34,45)
12
0.1U/6/Y5V/50V
I2C_BUS2_SCL(51)
I2C_BUS2_SDA(51)
R596
SR243
SR237
R589
SR239
C342
1 2
SC307
10P/6/N/50V/X
MCH_66MHZ_CLK
MCH_HI_RCOMP
SYS_PWR_GD_3_3V
12
51/6
12
51/6
12
51/6
12
51/6
12
51/6
PD_DDRRES1
PD_DDRRES2
TP_RESERVED2
TP_RESERVED3
TP_RESERVED4
TP_RESERVED5
TP_RESERVED6
TP_RESERVED7
TP_RESERVED8
TP_RESERVED9
TP_RESERVED10
TP_RESERVED11
TP_RESERVED12
HIA_STRBS
HIA_STRBF
I2C_BUS2_SCL
I2C_BUS2_SDA
MCH_TMS
MCH_TDI
MCH_TDO
MCH_TCK
MCH_TRST#
HIA_STRBS(33)
HIA_STRBF(33)
MCH_66MHZ_CLK(31)
12
STP25
STP29
STP31
STP35
STP33
STP32
STP34
STP30
STP26
STP20
STP19
4
U68E
E31
HI_STBS
D32
HI_STBF
H31
HISWING
L24
HICLK
K25
HIRCOMP
F32
HIVREF
E3
PWRGOOD
C3
SMBCLK
D4
SMBDATA
F3
TMS
G5
TDI
G6
TDO
D2
TCK
J9
TRST#
AE2
DDR_RES1
AE1
DDR_RES2
AF30
RESERVED2
AE23
RESERVED3
AD20
RESERVED4
AJ19
RESERVED5
R10
RESERVED6
R9
RESERVED7
R8
RESERVED8
M8
RESERVED9
AA24
RESERVED10
R32
RESERVED11
L33
RESERVED12
Lindenhurst-VS/BGA1077(C4)
P3V3
12
C268
0.1U/6/Y5V/50V
H33
V3REF
MCH_DDRSLWCRES
PLLSEL1#
PLLSEL0#
DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7
HI10
HI11
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
AK1
MCH_DDRCRES0
AC9
MCH_DDRIMPCRES
AL2
MCH_PLLSEL1#
A29
MCH_PLLSEL0#
C31
J30
H30
C32
G31
G29
H28
K26
J27
F30
E33
J29
G32
J8
G7
G8
H9
B2
D3
L11
D1
F33
D33
HI_A0
HI_A1
HI_A2
HI_A3
HI_A4
HI_A5
HI_A6
HI_A7
HI_A8
HI_A9
HI_A10
HI_A11
MCH_TDC
MCH_TDA
DDRSLWCRES
DDR_CRES0
DDR_IMPCRES
TDIOCATHODE
TDIOANODE
HI 1.5 & Miscellaneous
P1V5
12
SR216
80.6/6/1
12
SR209
51/6/1
12
SR206
40.2/6/1
3
R628 976/6/1
R630 287/6/1
STP18
STP17
20MILS
MCH_HI_VSWING
SC267
12
0.1U/6/Y5V/50V
MCH_HI_VREF
12
12
D24
1N5820/SMD
R628 change value to 976 ohm +/-1% (04
WW14 MOW)
12
12
HI_A[0..11] (33)
NO USE
800mV
20MILS
SC269
12
NEAR PIN
0.01U/6/X7R/50V
20MILS
12
C267
0.01U/6/X7R/50V
NEAR PIN
350mV
20MILS
P1V5
2
FSB Speed
533 MHz
667 MHz
800 MHz
MCH_PLLSEL1# (34)
MCH_PLLSEL0# (34)
DDRII 400
DDRII 400
1
PLLSEL0# PLLSEL1#Memory
LO
LO
LODDRII 400
HI
HI
LO
C264
0.1U/6/Y5V/50V
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH HI 1.5/MISC
GA-9IVDPL
1
17 64Wednesday, December 21, 2005
of
2.1
5
SB_ADS#(8,11)
SB_AP#0(8,11)
SB_AP#1(8,11)
SB_MCERR#(8,9,11)
SB_BNR#(8,9,11)
SB_BPRI#(8,11)
SB_BREQ#0(8,9,11)
SB_BREQ#1(8,9,11)
D D
C C
B B
SB_CPURST#(8,9,11,14)
SB_DBSY#(8,11)
SB_DEFER#(8,11)
SB_DRDY#(8,11)
SB_DP#[0..3](8,11)
SB_DBI#[0..3](8,11)
SB_D#[0..63](8,11)
SB_ADS#
SB_AP#0
SB_AP#1
SB_MCERR#
SB_BNR#
SB_BPRI#
SB_BREQ#0
SB_BREQ#1
SB_CPURST#
SB_DBSY#
SB_DEFER#
SB_DRDY#
SB_DP#0
SB_DP#1
SB_DP#2
SB_DP#3
SB_DBI#0
SB_DBI#1
SB_DBI#2
SB_DBI#3
SB_D#0
SB_D#1
SB_D#2
SB_D#3
SB_D#4
SB_D#5
SB_D#6
SB_D#7
SB_D#8
SB_D#9
SB_D#10
SB_D#11
SB_D#12
SB_D#13
SB_D#14
SB_D#15
SB_D#16
SB_D#17
SB_D#18
SB_D#19
SB_D#20
SB_D#21
SB_D#22
SB_D#23
SB_D#24
SB_D#25
SB_D#26
SB_D#27
SB_D#28
SB_D#29
SB_D#30
SB_D#31
SB_D#32
SB_D#33
SB_D#34
SB_D#35
SB_D#36
SB_D#37
SB_D#38
SB_D#39
SB_D#40
SB_D#41
SB_D#42
SB_D#43
SB_D#44
SB_D#45
SB_D#46
SB_D#47
SB_D#48
SB_D#49
SB_D#50
SB_D#51
SB_D#52
SB_D#53
SB_D#54
SB_D#55
SB_D#56
SB_D#57
SB_D#58
SB_D#59
SB_D#60
SB_D#61
SB_D#62
SB_D#63 GPE#
U68C
B27
ADS#
G25
AP#0
H25
AP#1
H24
MCERR#
B31
BNR#
A28
BPRI#
F24
BREQ#0
D29
BREQ#1
J24
CPURST#
H27
DBSY#
B28
DEFER#
B30
DRDY#
C29
DP#0
E28
DP#1
E25
DP#2
F27
DP#3
D16
DBI#0
E15
DBI#1
F9
DBI#2
A5
DBI#3
C18
HD#0
B19
HD#1
C14
HD#2
A17
HD#3
A19
HD#4
B16
HD#5
C17
HD#6
B18
HD#7
D17
HD#8
A16
HD#9
B13
HD#10
A14
HD#11
A13
HD#12
D14
HD#13
C12
HD#14
B12
HD#15
E18
HD#16
J18
HD#17
H18
HD#18
F17
HD#19
G17
HD#20
K17
HD#21
E16
HD#22
J17
HD#23
J14
HD#24
F14
HD#25
F15
HD#26
G16
HD#27
K16
HD#28
H16
HD#29
G14
HD#30
K14
HD#31
E12
HD#32
C11
HD#33
H13
HD#34
F11
HD#35
G13
HD#36
D11
HD#37
E9
HD#38
F12
HD#39
G10
HD#40
D8
HD#41
H10
HD#42
F8
HD#43
J12
HD#44
G11
HD#45
K13
HD#46
H12
HD#47
B10
HD#48
A10
HD#49
A11
HD#50
C9
HD#51
B9
HD#52
C8
HD#53
B6
HD#54
B7
HD#55
E7
HD#56
B4
HD#57
A4
HD#58
B3
HD#59
D5
HD#60
C6
HD#61
D7
HD#62
C5
HD#63
Lindenhurst-VS/BGA1077(C4)
System Bus Interface
HDSTBP#0
HDSTBN#0
HDSTBP#1
HDSTBN#1
HDSTBP#2
HDSTBN#2
HDSTBP#3
HDSTBN#3
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
TESTIN#
RSTIN#
HCRES0
HODTCRES
HSLWCRES
HDVREF0
HDVREF1
HACVREF
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
HA#33
HA#34
HA#35
HCLKINN
HCLKINP
HADSTB#0
HADSTB#1
RS#0
RS#1
RS#2
RSP#
BINIT#
PME#
GPE#
4
SB_DSTBP#0
C15
B15
J15
H15
E10
D10
A7
A8
E30
D28
C30
A30
K20
J21
J23
H22
K23
L12
C2
C27
E27
F26
D13
E13
F23
K22
J20
G23
G22
H21
K19
H19
G19
E22
E21
F18
E19
F21
F20
D26
C26
A26
D22
B22
A25
B25
D25
C24
A22
B21
D23
A23
B24
A20
D19
C20
C21
D20
J11
K11
G20
C23
F29
D31
G28
J26
G26
M24
L25
SB_DSTBN#0
SB_DSTBP#1
SB_DSTBN#1
SB_DSTBP#2
SB_DSTBN#2
SB_DSTBP#3
SB_DSTBN#3
SB_HIT#
SB_HITM#
SB_LOCK#
SB_TRDY#
SB_REQ#0
SB_REQ#1
SB_REQ#2
SB_REQ#3
SB_REQ#4
MCH_TESTIN#
SB_ODTCRES_MCH
SB_SLWCRES_MCH
SB_HA#3
SB_HA#4
SB_HA#5
SB_HA#6
SB_HA#7
SB_HA#8
SB_HA#9
SB_HA#10
SB_HA#11
SB_HA#12
SB_HA#13
SB_HA#14
SB_HA#15
SB_HA#16
SB_HA#17
SB_HA#18
SB_HA#19
SB_HA#20
SB_HA#21
SB_HA#22
SB_HA#23
SB_HA#24
SB_HA#25
SB_HA#26
SB_HA#27
SB_HA#28
SB_HA#29
SB_HA#30
SB_HA#31
SB_HA#32
SB_HA#33
SB_HA#34
SB_HA#35
MCH_BCLK#
MCH_BCLK
SB_ADSTB#0
SB_ADSTB#1
SB_RS#0
SB_RS#1
SB_RS#2
SB_RSP#
SB_BINIT#
MCH_PME#
SB_HIT# (8,9,11)
SB_HITM# (8,9,11)
SB_LOCK# (8,11)
SB_TRDY# (8,11)
STP28
MCH_PCIRST# (33)
MCH_BCLK# (30)
MCH_BCLK (30)
SB_RS#[0..2] (8,11)
SB_RSP# (8,11)
SB_BINIT# (8,9,11)
MCH_PME# (33)
SB_DSTBP#[0..3] (8,11)
SB_DSTBN#[0..3] (8,11)
SB_REQ#[0..4] (8,11)
SB_HA#[3..35] (8,11)
SB_ADSTB#[0..1] (8,11)
SR211 8.2K/6
1 2
3
SR210
SR212
48.7/6/1
442/6/1
1 2
P3V3
or 374/6/1
1 2
MCH_SB_VREF
SC276
220P/6/X7R/50V
SR222
0/6
12
1U/6/Y5V/16V
1
2
P_VTT
12
SC271
MCH_HSINK-12SP3-040001-01
1 2
12
1 2
MCH_HSINK1
SR215
49.9/6/1
SR218
90.9/6/1
1
775mV
2
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH SYS BUS
GA-9IVDPL
1
18 64Wednesday, December 21, 2005
of
2.1
5
4
3
2
1
EXP_A_RXP[0..3](22)
D D
EXP_A_RXN[0..3](22)
C C
EXP_A_RXP4(40)
EXP_A_RXN4(40)
DIFFERENTIAL PAIRS
MCH_SRC_100MHZ_CLK_N(32)
MCH_SRC_100MHZ_CLK_P(32)
B B
EXP_A_RXP0
EXP_A_RXP1
EXP_A_RXP2
EXP_A_RXP3
EXP_A_RXP4
EXP_A_RXN0
EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3
EXP_A_RXN4
MCH_SRC_100MHZ_CLK_N
MCH_SRC_100MHZ_CLK_P
U68D
R33
EXP_A_RXP0
N28
EXP_A_RXP1
L31
EXP_A_RXP2
J33
EXP_A_RXP3
R26
EXP_A_RXP4
N25
EXP_A_RXP5
M27
EXP_A_RXP6
K29
EXP_A_RXP7
P33
EXP_A_RXN0
N29
EXP_A_RXN1
L30
EXP_A_RXN2
J32
EXP_A_RXN3
R27
EXP_A_RXN4
N26
EXP_A_RXN5
M26
EXP_A_RXN6
K28
EXP_A_RXN7
AG33
EXP_B_RXP0
AE32
EXP_B_RXP1
AC30
EXP_B_RXP2
AC31
EXP_B_RXP3
AD29
EXP_B_RXP4
AC25
EXP_B_RXP5
AB26
EXP_B_RXP6
Y25
EXP_B_RXP7
AF33
EXP_B_RXN0
AD32
EXP_B_RXN1
AD30
EXP_B_RXN2
AB31
EXP_B_RXN3
AE29
EXP_B_RXN4
AC24
EXP_B_RXN5
AB25
EXP_B_RXN6
Y24
EXP_B_RXN7
Y28
EXP_C_RXP0
Y30
EXP_C_RXP1
AA30
EXP_C_RXP2
V33
EXP_C_RXP3
T32
EXP_C_RXP4
R30
EXP_C_RXP5
V27
EXP_C_RXP6
V24
EXP_C_RXP7
Y27
EXP_C_RXN0
Y31
EXP_C_RXN1
AA29
EXP_C_RXN2
V32
EXP_C_RXN3
T31
EXP_C_RXN4
R29
EXP_C_RXN5
V26
EXP_C_RXN6
U24
EXP_C_RXN7
R24
EXP_CLKN
T23
EXP_CLKP
Lindenhurst-VS/BGA1077(C4)
VCCBGEXP
VSSBGEXP
P30
N31
M33
K32
P24
P27
M30
L28
P31
N32
M32
K31
P25
P28
M29
L27
AG32
AF31
AC33
AB32
AD27
AC27
AB29
AA27
AH32
AE31
AD33
AA32
AD26
AC28
AB28
AA26
W26
W28
Y33
W32
U31
V30
T29
T26
W25
W29
AA33
W31
U30
V29
T28
T25
U33
U25
E6
U27
U28
EXP_A_TXP0
EXP_A_TXP1
EXP_A_TXP2
EXP_A_TXP3
EXP_A_TXP4
EXP_A_TXP5
EXP_A_TXP6
EXP_A_TXP7
EXP_A_TXN0
EXP_A_TXN1
EXP_A_TXN2
EXP_A_TXN3
EXP_A_TXN4
EXP_A_TXN5
EXP_A_TXN6
EXP_A_TXN7
EXP_B_TXP0
EXP_B_TXP1
EXP_B_TXP2
EXP_B_TXP3
PCI Express
EXP_B_TXP4
EXP_B_TXP5
EXP_B_TXP6
EXP_B_TXP7
EXP_B_TXN0
EXP_B_TXN1
EXP_B_TXN2
EXP_B_TXN3
EXP_B_TXN4
EXP_B_TXN5
EXP_B_TXN6
EXP_B_TXN7
EXP_C_TXP0
EXP_C_TXP1
EXP_C_TXP2
EXP_C_TXP3
EXP_C_TXP4
EXP_C_TXP5
EXP_C_TXP6
EXP_C_TXP7
EXP_C_TXN0
EXP_C_TXN1
EXP_C_TXN2
EXP_C_TXN3
EXP_C_TXN4
EXP_C_TXN5
EXP_C_TXN6
EXP_C_TXN7
EXP_COMP0
EXP_COMP1
EXPHPINTR#
EXP_A_TXP_C0
EXP_A_TXP_C1
EXP_A_TXP_C2
EXP_A_TXP_C3
EXP_A_TXP_C4
EXP_A_TXN_C0
EXP_A_TXN_C1
EXP_A_TXN_C2
EXP_A_TXN_C3
EXP_A_TXN_C4
MCH_EXPCOMP
PU_EXPHPINTR#
22U/1206/Y5V/10V
P1V5
CLOSE TO MCH
R558
24.9/6/1
1 2
SC273
P3V3
SR214
100/6
1 2
SU1
12
SC431/SOT23
A C
P3V3
R
SR220 0/6
SR208
0/6
1 2
SL1
4.7uH/60mA/8
SC282
10U/8/Y5V/10V
12
2.5V 3% 600uA
12
12
Close U31 pin U27,U28
MCH_VCCBGEXP
12
SC285
0.1U/6/Y5V/50V
MCH_VSSBGEXP
NO USE
SR231
1K/6/X
1 2
DIFFERENTIAL PAIRS
MCH_VCCBGEXP
MCH_VSSBGEXP
CLOSE TO MCH
EXP_A_TXP_C0
EXP_A_TXP_C1
EXP_A_TXP_C2
EXP_A_TXP_C3
EXP_A_TXP_C4 EXP_A_TXP4
EXP_A_TXN_C0
EXP_A_TXN_C1
A A
EXP_A_TXN_C2
EXP_A_TXN_C3
1 2
SC296 0.1U/4/Y5V/16V
1 2
SC291 0.1U/4/Y5V/16V
1 2
SC290 0.1U/4/Y5V/16V
1 2
SC284 0.1U/4/Y5V/16V
1 2
SC283 0.1U/4/Y5V/16V
1 2
SC294 0.1U/4/Y5V/16V
1 2
SC293 0.1U/4/Y5V/16V
1 2
SC288 0.1U/4/Y5V/16V
1 2
SC286 0.1U/4/Y5V/16V
1 2
SC281 0.1U/4/Y5V/16V
EXP_A_TXP0
EXP_A_TXP1
EXP_A_TXP2
EXP_A_TXP3
EXP_A_TXN0
EXP_A_TXN1
EXP_A_TXN2
EXP_A_TXN3
EXP_A_TXN4EXP_A_TXN_ C 4
DIFFERENTIAL PAIRS
5
EXP_A_TXP[0..3] (22)
EXP_A_TXP4 (40)
EXP_A_TXN[0..3] (22)
EXP_A_TXN4 (40)
Title
Size Document Number Rev
4
3
2
Date: Sheet
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PCI EXPRESS
GA-9IVDPL
1
19 64Wednesday, December 21, 2005
of
2.1
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