Gigabyte GA-9ILDR rev.1.2 Schematic
第1頁，共1頁
Technical Information Release Notice
Technical Information Release Notice
Doc Type Schematic Date 2004/12/20 下午 12:52:51
Project Code S92029-0 Customer GB
Project Name GA-9ILDR Revision Old 1.1 New 1.2
Model Name GA-9ILDR IT Doc No DR04C268
P/N RD Doc No
PCB Rev. Check Sum
P/N Description
Description V1.2 SCHEMATIC
Remark
Approved By daniel.hou 2004/12/20 下午 01:34:20 Applicant Larry.Tsai
Research
Management
emily.chin
2004/12/20 下午
03:04:43
R
R
IT
IT
Validation Manager Project Manager
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2004/12/20http://gwfap/ef2kweb/CHT/Forms/RTC009/RTC009_P.asp
emily.chin
5
4
3
2
1
NOCONA800/E 7520/6700/ICH5R
GA-9ILDR
D D
1 TITLE
2 SYS BLOCK
3 SYS RESET
4 CLOCK
5 SMBUS
6 POWER
7 PCI / GPIO
C C
8-10 P0 NOCONA
11-12 P1 NOCONA
13 ITP
14 BSP_SEL/BREQ/LEVEL
15 MCH/DDR CH A
16 MCH/DDR CH B
17 MCH/HI1.5/MISC
18 MCH/SYSBUS
19 MCH/PCIEXPRESS
20-21 MCH/PWR/GND/DECOUPING
B B
22 PCI-E X4/CONNX8
23 PCI-E X8/CONNX8
23 PCI-E CAPS
25-28 MCH/DDR A DIMMX3
29-32 MCH/DDR B DIMMX3
33-34 CK409B
35 DB800
36 ICH5/IDE/PCI/USB/HI1.5/RST#
37 ICH5/SATA/GPIO/LPC/RTC/HOST/PME
38 ICH5/PWR/GND
A A
39 ICH5/TERMINATION/WOL/IDE CONN
41 PXH/PCI-E
42 PXH/PWR/GND
43 PXH/PCI-X CH A
44 PXH/PCI-X CH B
45 FP CONN/SLBTIN/ID SWITCH HDLED
46 PCI-X SLOT 1 100MHZ
47 PCI-X SLOT 2 100MHZ/ZCR
48 PCI-X SLOT 6 266MHZ
49 PCI SLOT3 33MHZ
50 G-LOGIC/PSON/VIDGOOD
51-53 ATI VGA/CONN/SDRAM
54-55 DUAL NORTHWAY G-LAN/3V3STBY
56-59 LSI 1030 SCSI
60 FWH
61 SIO-IT8712
62 PS2/COM/PRT/FLOPPY
63 POWER CONN
64 1.2 VTT R/ PCI VIO
65 1.5V/1.25
66 2.5V
67 P0 VR
68 P1 VR
69 FAN CONTROL
70 COUPON/FAN
71 SMBUS
72 LM93/LM75/83791
73 IPMI
PCB > >
祥裕 育富 智恩
TOP INT
S 5.75 [49.76]50 S 4 [ 49 ]
85 D 5/5 [84.55] D 4/5.5 [84.12]
100 D 4.5/8 [99.38]
90
D 6/9 [90.59] D 4/8 [89.76]
110 D 4/10 [108.17] D 4/10 [93.64]
4.1 mil
4 mil
11.1 mil
10 mil
11.1 mil
4 mil
4.1 mil
Er=4.2 INNER
Er=3.96 TOP
PP 2116
CORE
PP 2116+7628
CORE
PP 2116+7628
CORE
PP 2116
BOARD STACK-UP
COMPONENT SIDE
GND
INT 1
(PWR)
(PWR)
INT 2
GND
SOLDER SIDE
HI1.5/LPC/PCI
IDE/FP/COM
PCI-E
SATA
USB
SCSI
0.4 mil
1.8 mil
1.5 OZ
1.3 mil
1 OZ
1.3 mil
1 OZ
1.3 mil
1 OZ
1.3mil
1 OZ
1.3 mil
1 OZ
1.3 mil
1 OZ
1.8 mil
1.5 OZ
0.4 mil
40 USB/PWBTIN/RESET/NMI/BEEP
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
COVER SHEET
GA-9ILDR
1 74Monday, December 20, 2004
1
1.2
5
SCSI 68PinSCSI 68Pin
D D
PCI-X 133MHZ (SLOT1)
4
EVRD 10.1
Intel
NOCONA/JAYHAWK
Processor
CPU 0
3
EVRD 10.1
Intel
NOCONA/JAYHAWK
Processor
CPU 1
2
Channel A
1
CK409B
CLOCK
DB800
CLOCK
SCSI 1
SCSI 0
Dual U320
SCSI
(LSI 1030)
PCI-X 100MHZ[ZCR](SLOT3)
C C
PCI-X (100MT/S - 600MB/S)
PCI-X 100MHZ (SLOT2)
PCI-X (133MT/S)
PXH
PCI EXPRESS X4 ( 8GB/S)
PCI EXPRESS X4 ( 8GB/S)
( 16GB/S)
PCI EXPRESS X8
X4
PCI EXPRESS SLOTX4
PCI EXPRESS SLOTX4
B B
OPTION
USE X4
CONN
PCI-EX X4
BUS
X4
PCI Slot
PCI EXPRESS SLOTX8
ATI Rage XL
8MB
SDRAM
PCI 32 Bit BUS
VGA
BGA
133MB/s
SATAx2
150MB/s
Intel
FWH
LPC
Interface
6.4GB/s
System Bus(800MT/S)
Intel
E7520
MCH
HUB INTERFACE 1.5
ICH5R
LPC
IT8712F
LPC Super I/O
128 PQFP
2.1GB/s up to 2.7GB/s
2.1GB/s up to 2.7GB/s
PCI EXPRESS X1 ( 2GB/S)
PCI EXPRESS X1 ( 2GB/S)
USB
IDE BusATA-100
IPMI
144
SO-DIMM
DDR266/333 DIMM Module *3
Channel B
DDR266/333 DIMM Module *3
BROADCOM
BCM5721
GbE MAC/PHY
BROADCOM
BCM5721
GbE MAC/PHY
IDE Connector * 2
H/M
LM93
H/M
83791
RJ45
LAN
RJ45
LAN
Front Side
USB
2.0x2
Back Panel USB
2.0X2
CPU0
FAN
SYS1
FAN
CPU1
FAN
SYS2
FAN
SYS3
FAN
PCI
PCI-EX X8
PCI-EX X8
A A
PCI-X 100M
PCI-X 100M
PCI-X 266M
PCI-EX X4 CONN
OPTION X8 USE
5
VGA Connector
Title
Floppy Connector
4
COM1 Printer Port
3
COM2
KB & MS
2
Size Document Number Rev
Date: Sheet of
1U
COOL
PWR4
FAN
FAN
GIGA-BYTE TECHNOLOGY CO., LTD.
BLOCK DIAGRAM
GA-9ILDR
1
2 74Monday, December 20, 2004
1.2
5
SYS RESET & PWR SET
BTN
BTN
D D
DB800
CK409B
OB_PWR_BTN#
FB_PWR_BTN#
FP CONN
PWRDWN#
IPMI_PWBTIN#
CPU_VRD_PWR_GDPWRDWN#
IPMI_PWOUT#
IPMI CONN
IPMI_PWRON#
4
CPU 0
SIO_PWBTIN# SIO_PWBTOUT#
A B
SIO
DDR DIMM
DDR DIMM
DDR DIMM
P0_SKT0CC#
ICH5
DDR DIMM
DDR DIMM
DDR DIMM
3
LEVEL 5V
SIO_ONCTL#
IPMI_PWRON#
IPMI
2
PS_ON#
1
ATX CONN
CK409B_PWR_GD#
VID_PWRGD
C C
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
CPU0_BSEL[0/1]
CPU1_BSEL[0/1]
VIP_PWRGD
CPU_PWR_GD
CPU_RST#
B B
LINDENHUST
CPU_RST#
MCH
PCI_RST#
ITP-XDP
A A
P0
P1
PWROK
VTT
LEVEL
VTTEN
VTTEN
FET
BTN
P1_SKT0CC#
CPU_PWR_GD
SB_VTT_PWRGD
VTTEN
P3V3
LEVEL
OB_RST_BTN#
DBR_RESET#
1.2V
ISL6520
VTT_PWRGD
ICH5
SYS RST#
VTT_ENABLE
BSEL
COMPARE
LOGIC
CPU_VRD_PWR_GD
PCI_RST#
IPMI_RST#
DDRA_PCIRST#
CPU_VRD_PWR_GD
DDRB_PCIRST#
100ms
SYS_PWR_GD#
SYS_PWR_GD_3_3V
PWROK
PXH-D
PCI_RST# PXH_PAPCIRT#
PCI_RST#
PCI_RST#
VIDEO
PLD
BUFF
ATI
2.5V
HIP6302CB
BUFF
BUFF
PWRGD_1_5VPWRGD_2_5V
PLD
LOGIC
PXH_PBPCIRT#
IDE_RSTDRV#
PCI_RST_BUFF1#
P3V3 AUX
SYS_PWR_GD_BUFF
1.5V
ISL6526
SI4501DY
PS_PWR_GD#
VR0_SYS_ENABLE
VR1_SYS_ENABLE
CPU1_VRD_PWR_GD
SYS_PWR_GD_BUFF1#
PCI-X 133 CONN
PCI-X 100 CONN
PCI-X 100 CONN
IDE CONN
IDE CONN
PS_PWR_GD
SYS_PWR_GD_BUFF1
P0 VCORE
ISL6556BCPU0_VRD_PWR_GD
P1 VCORE
ISL6556B
PCI EX X4 CONN
PCI EX X8 CONN
PCI EX X4
82571
LSI 1030
IPMI CONN
SIO
BTN
5
FB_RST_BTN#
FP CONN
IPMI CONN
4
PCI_RST#
PCI_RST#
FWH
PCI- 32 CONN
3
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
SYS RESET
Size Document Number Rev
2
Date: Sheet of
GA-9ILDR
1
3 74Monday, December 20, 2004
1.2
5
4
3
2
1
14.318
SMA CONNECTOR
CLOCK BLOCK DIAGRAM
CRYSTAL
D D
CPU3
CPU2
CPU1
3V66_1
CPU0
P0_BCLK_P/N(167MHZ)
P1_BCLK_P/N(167MHZ)
MCH_BCLK_P/N (167MHZ)
MCH_66MHZ_CLK
ITP_BCLK_P/N (167MHZ)
CK 409B
CLOCK SYNTHESIZER
C C
DRIVER
3V66_2
USB_48
PCIF0
REF0
DOT_48
PCI_F1
ICH5_66MHZ_CLK
ICH5_USB_48MHZ_CLK
ICH5_33MHZ_CLK
ICH5_14MHZ_CLK
SIO_48MHZ_CLK
SIO_33MHZ_CLK
2
2
2
BCLK(P/N-1/0)
BCLK(P/N-1/0)
2
ITP_XDP
32.768KHZ
CRYSTAL
ICH5
SIO
CUP0
CUP1
SUS_CLK
DDRA_CMDCLK_A0_P/N
DDRA_CMDCLK_A1_P/N
DDRA_CMDCLK_A2_P/N
DDRA_CMDCLK_B0_P/N
DDRA_CMDCLK_B1_P/N
LINDENHURST
DDRA_CMDCLK_B2_P/N
MCH_SRC_100MHZ_CLK_P/N
ICH5_SRC_100MHZ_CLK_P/N
2
DIFF0 DIFF1 DIFF2 DIFF3
DB800 (SRC -DIFFERENTIAL BUFFER)
SRC
DIFF4 DIFF6 DIFF7
2
2
2
2
2
DDR266 DIMM #A1
DDR266 DIMM #B1
DDR266 DIMM #A2
DDR266 DIMM #B2
DDR266 DIMM #A3
DDR266 DIMM #B3
2
25MHZ
CRYSTAL
DUAL NORTHWAY PCI EXPRESS LAI
LAN_SRC_100MHZ_CLK_P/N EXP_SRC_100MHZ_CLK_P/N
2 22
DB800_SRC_100MHZ_CLK_P/N
SRC
B B
3V66_3
PCI 0
PCI 1
PCI 2
REF 1
PCI 3
A A
5
HI_LAI_66MHZ_CLK
PCI_SLOT3_33MHZ_CLK
SMC_33MHZ_CLK
VIDEO_33MHZ_CLK
VIDEO_14MHZ_CLK
PLD_33MHZ_CLK
2
HI 1.5LAI CONNECTOR
PCI 32/33 (SLOT #3)
SYS MGMT CONNECTOR
VIDEO
(RAGE XL)
PLD
25MHZ
CRYSTAL
80MHZ
OSC
4
PXH_PACLK_FB PXH_PBCLK_FB
PAPCLK0(6)
PAPCLKI
PAPCLK0(0)
SUS_CLK
PAPCLK0(1)
PXH_PAPCLK0<0>
PXH_PAPCLK0<1>
PCI_X SLOT #1
PCI_X SLOT #2
U320 SCSI AIC7902
3
PXH
PAPCLK0(2)
PXH_PAPCLK0<2>
2
PBPCLK0(6)
PB_PCLKI
PBPCLK0(0)
PBPCLK0(1)
PBPCLK0(2)
PXH_PBPCLK0<0>
PXH_PBPCLK0<1>
PXH_PBPCLK0<2>
PCI_X SLOT #6
EXP_SLOT5_100MHZ_CLK_P/N
PCI EXPRESS X8 SLOT #5
PCI EXPRESS X8 SLOT #4
Title
Size Document Number Rev
GIGA-BYTE TECHNOLOGY CO., LTD.
CLOCK BLOCK
EXP_SLOT4_100MHZ_CLK_P/N
22
GA-9ILDR
Date: Sheet of
2
4 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
ICH5R
IMPI
144P
BCM5721
SMB Address = ACh
SMB Address = A4h
AUX
IPMB
W83791
33
DIMM B-3
30
DIMM A-3
DB800
SMB Address = DCh
PCA9515
LM75
CPU0
LM75
CPU1
SMB = 93h
2.2K 3V3_STBY3.3K 3V3_STBY
SMB = 95hSMB = 91h
LM75
DDR
LM75
SCSI
SMB = 97h
D D
SMB Address = 44h
3.3K 3V3_STBY
BCM5721
ASF 2.0
SE-LINK
IPMB
ICH_SMB
SMB Address = E0h
I2C_BUS0_SDA
C C
I2C_BUS0_SCL
LM93_SMB
PCA9545
LM93
SMB = 5Ch
31
DIMM B-1
SMB Address = A8h
IDEEPROM
SMB = ADh SMB Address = 5Eh
32
DIMM B-2
SMB Address = AAh
Mutiplexer
SMB = E0h
DIMM A-1
SMB Address = A0h
I2C_BUS1_SDA
I2C_BUS1_SCL
B B
I2C_BUS2_SDA
I2C_BUS2_SCL
DIMM_SMB
MCH_SMB
MCH
LINDENHURST
SMB Address = 60h
3.3K 3V3
4.7K 3V3
DIMM A-2
SMB Address = A2h
CK-409B
SMB Address = D2h
PCI-X Slot#1 PCI-X Slot#5
I2C_BUS3_SDA
I2C_BUS3_SCL
A A
PCI_SMB
PXH
SMB Address = C2h
PCI-EXPRESS#2
PCI-E RISER
PCI-EXPRESS#3
PCI/32BIT#6
2.2K 3V3
5
4
3
PCI-X Slot#4
Title
Size Document Number Rev
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
SMBUS
GA-9ILDR
5 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
ERP12V
ISL6556B
P12V_CPU_0
D D
120A
ISL6556B HIP6601B
P12V_CPU_1
120A
ATX CONN
HIP6302
P12V
C C
P5V
39A
ISL6520
6A
ISL6520
6.2A
ISL6525
13A
APL1084
1.5A
HIP6601B
X4
X4
HIP6602
X2
P_VCCP0
P_VCCP1
CPU0
1.2/CORE
CPU1
1.2/CORE
P2V5
P_VTT
P1V25_VTT
P1V5
P2V5_VIDEO
MCH
1.2/1.5/2.5
DDR266
1.25/2.5
VIDEO
ICH5
1.2/1.5
3.3/3.3SBY
APL1084
1.7A
B B
P3V3
P3V3_STBY
P5V_STBY
A A
N12V
5
APL1084
3A
GD75232
PCI/PCI-X CONN
4
MMJT9435
563mA
MMJT9435
563mA
3
P1V8_SCSI
P1V2
BCM5721
GIGA LAN
INTERNAL 2.5 V 206mA
P1V2
BCM5721
GIGA LAN
INTERNAL 2.5 V 206mA
SCSI
3.3/1.8
PXH
3.3/2.5
Title
Size Document Number Rev
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
PWR DELIVERY
GA-9ILDR
6 74Monday, December 20, 2004
1
1.2
5
ICH5
GPIO R PWR WELL FUNCTION
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
D D
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
C C
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
B B
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49
NOTE
I
PUPU8.2K
I
I
PU
I
PU
I
PU
I
PU
I
PU 8.2K P3V3 GPE#
I
PU 8.2K P3V3 MCH_PME#
I
I
PU
I
PU
I
I
PUPU8.2K
I
I
PUPU1.0K
I
O
PUPU8.2K
O
O
O
O
PUPU8.2K
O
OD
PUPU4.7K
O
I/O
PU 8.2K
I/
O
I/O
I/
O
I/
O
PU 8.2K
N/A
N/A
N/A
I/
O
I/
O
/O
I
N/A
N/A
N/A
N/A
N/A
I
I
N/A
N/A
N/A
N/A
N/A
N/A
O
PU P3V310K
OD
P3V3
8.2K
P3V3
8.2K
P5V
8.2K
P5V
8.2K
P5V
8.2K
P5V
8.2K
P3V3_STBY
8.2K
P3V3_STBY
8.2KPU ICH_SMBALERT# ALERT EVENT FROM PCAP545
P3V3_STBY
P3V3_STBY
8.2K SIO_PME# WAK UP EVENT FROM SIO
P3V3_STBY
P3V3_STBY
1.0K
P3V3_STBY
P3V3
P3V3
8.2K
P3V3
P3V3
P3V3
8.2K
P3V3
P3V3
4.7K
P3V3
P3V3_STBY
P3V3_STBY
P3V3_STBY
8.2KPU
P3V3_STBY
4.7KPD GND
IPMI_SMIOUT#
IPMI_SCI#
PCI IRQE#
PCI IRQF#
PCI IRQG#
PCI IRQH#
WAKE#PU 4.7K P3V3_STBY PXHPME# FROM PCIE-X CONN AND LAN
PULL UP ONLY
ICH_SLBTIN#
NMI_BTN#
PULL UP ONLY
PULL UP ONLY
ICH_CPU0_DIS#
ICH_CPU1_DIS#
TEST PIN
TEST PIN
CPU0_FORCEPR#
CPU1_FORCEPR#
FWH_WP#
FWH_TBL#
TEST PIN
LAN_DISPD 4.7K DIS ONBOARD LAN
IPMI_RST_REQ#
IDE_SEC_CBLSNS
NON
NON
NON
TEST PIN
SATA_LED#PU 8.2K P3V3 SATA LED
IDE_PRI_CBLSNSPD GND10K
NON
NON
NON
NON
NON
FREQ_SEL0 CPU0 BSEL
FREQ_SEL1 CPU1 BSEL
NON
NON
NON
NON
NON
NON
TIME_HALT# STOP FRB3 BMC TIMER
CPUPWRGDPU 300 P_VTT CPU0/CPU1/ITP
ONLY GPIO[0:15] ALLOW AN INPUT TO BE ROUTED TO SMI# OR SCI
4
SMI FROM BMC H/L
ACPI INT FROM BMC H/L
PCI32 CONN
PCI32 CONN
PCI32 CONN
PCI32 CONN
ACPI GPE EVENT FROM MCH
PME EVENT FROM MCH PCI -E PORT
SLEEP BTN FROM FP
NMI EVENT FROM FP AND CPU
DIS CPU0 FROM ICH5
DIS CPU1 FROM ICH5
FORCE CPU0 TO ACT TCC
FORCE CPU1 TO ACT TCC
BIOS WRITE PROTECT
BIOS BLOCK LOCK
NOMAL/ACT
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
H/L
L/H
C+A+D RESET BMC
DETECTE 80 PIN CABLE
DETECTE 80 PIN CABLE
NON
NON
NON
NON
NON
NON
NON
NON
NON
NON
NON
NON
NON
NON
H/L
H/L
L/H
3
2
1
SIO
GPIO
GPIO 15
GPIO 16 MAIN ICH_LED1 IPMI UNPLUG INSTEAD SYSREADY_LED L/H
GPIO 17
GPIO 20
GPIO 24
GPIO 25
GPIO 32
GPIO 33
GPIO 35
GPIO 40
GPIO 41
GPIO 43 SIO_PWBTIN#
GPIO 44 SIO_PWBTOUT#
GPIO 45 SLP_S#3
GPIO 53
GPIO 54
NOTE
PWR
LED3_SIO
MAIN
O
O
IPMI_SYSIRQ
MAIN
I
IPMI_SMIOUT#
O
MAIN
MAIN
O
MAIN
O
O
DIS_SCSIB
MAIN
O
DIS_SCSIA
MAIN
SIO_BEEP
MAIN
O
PWRLED
STBY
O
IPMI_SECURE_MODE_KB#
STBY
O
STBY
I
O
STBY
STBY
I
O
STBY SUSLED
SIO_PME#
O
STBY
GPIO(10/40/41/42/43/44/45/46/53/54/55) POWER BY STBY
FUNCTION
IPMI UNPLUG INSTEAD FP_SYSFLT_LED
INTERRUPT FROM BMC
SMI FROM BMC
DISABLE SCSI CH A
DISABLE SCSI CH B
SIO SPEAKER
ACT PWR ON
LOCK FP FROM KBC IN SECURE
PWR BTIN FROM FP
PWR BTOUT TO ICH5
INDECATE S3 MODE FROM ICH5
ACT S3 MODE LED TO FP
WAKE UP FROM ICH5
NOMAL/ACT
L/H
L/H
H/L
L/H
L/H
H/L(PWR ON)
H/L
H/L
H/L
H/L
L/H
H/L
LM93
GPIO 5
GPIO 4
STBY
STBY
O
O
CPU THERMTRIP#
LM75_ALERT#
JUMPER SETTING
PAGE 17 PLL0/PLL1
PAGE 37 CLR_CMOS 2-3
LM75 SENSER ALERT
THERMTRIP FROM CPU
H/L
H/L
ONLY GPIO[18/19/25/27/28] CAN SET BLINKING LED
CONTROLLER
PCI DEVICE
PCI-X 100 SLOT
PXH-D A
A A
PXH-D B
ICH5
PCI-X 100 SLOT(ZCR)
PCI-X 100 SCSI
PCI-X 133(266) SLOT
PCI-33 SLOT
PCI-33 ATI
5
IDSEL
PA_AD17
PA_AD19
PA_AD21
PB_AD17
(SEL)
AD17
AD18
REQ / GNT
PA_REQ0 / PA_GNT0
PA_REQ1 / PA_GNT1
PA_REQ2 / PA_GNT2
PB_REQ0 / PB_GNT0
REQ0 / GNT0
REQ1 / GNT1
4
IRQ ROUTING
D
INT A
C
B
0 1 2 3
4 5 6(SCSIA) 7(SCSIB)
6(SCSIA) 7( SCSIB)
0 1 2 3
G F E H
B
GIGA-BYTE TECHNOLOGY CO., LTD.
Title
PCI ROUTING
Size Document Number Rev
3
2
Date: Sheet of
GA-9ILDR
1
7 74Monday, December 20, 2004
1.2
5
4
3
2
1
END PROCESSOR 0
SC102
0.1U/6
7
9
7
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
AD27
AA25
AA27
AB6
Y9
AA8
Y23
Y24
Y26
2
U1B
D63
NOCONA 667
D62
D61
D60
D59
D58
D57
D56
D55
D54
D53
D52
D51
D50
D49
D48
D47
D46
D45
D44
D43
D42
D41
D40
D39
D38
D37
D36
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOCONA 667_7
EC34
PSA2.5VB820MH11/8X11.5
22ANTVIA 10
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
SB_HA#35
C8
BREQ4#
BREQ3#
BREQ2#
BREQ1#
BREQ0#
DBI3#
DBI2#
DBI1#
DBI0#
DP3#
DP2#
DP1#
DP0#
AP1#
AP0#
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
SB_HA#34
C9
SB_HA#33
A7
SB_HA#32
A6
SB_HA#31
B7
SB_HA#30
C11
SB_HA#29
D12
SB_HA#28
E13
SB_HA#27
B8
SB_HA#26
A9
SB_HA#25
D13
SB_HA#24
E14
SB_HA#23
C12
SB_HA#22
B11
SB_HA#21
B10
SB_HA#20
A10
SB_HA#19
F15
SB_HA#18
D15
SB_HA#17
D16
SB_HA#16
C14
SB_HA#15
C15
SB_HA#14
A12
SB_HA#13
B13
SB_HA#12
B14
SB_HA#11
B16
SB_HA#10
A13
SB_HA#9
D17
A9
SB_HA#8
C17
A8
SB_HA#7
A19
A7
SB_HA#6
C18
A6
SB_HA#5
B18
A5
SB_HA#4
A20
A4
SB_HA#3
A22
A3
SB_REQ#4
B22
SB_REQ#3
C20
SB_REQ#2
C21
SB_REQ#1
B21
SB_REQ#0
B19
SB_DBI#3
AB9
SB_DBI#2
AE12
SB_DBI#1
AD22
SB_DBI#0
AC27
SB_DP#3
AE17
SB_DP#2
AC15
SB_DP#1
AE19
SB_DP#0
AC18
SB_AP#1
D9
SB_AP#0
E10
SB_ADSTB#1
F14
SB_ADSTB#0
F17
SB_DSTBP#3
Y11
SB_DSTBP#2
Y14
SB_DSTBP#1
Y17
SB_DSTBP#0
Y20
SB_DSTBN#3
Y12
SB_DSTBN#2
Y15
SB_DSTBN#1
Y18
SB_DSTBN#0
Y21
Trace Width:12 Mils
VREF_P_VTT_CPU0_0
VREF_P_VTT_CPU0_3
VCCIOPLL_CPU0
AGND_CPU0
PU_VCCPLL_CPU0
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA P0
GA-9ILDR
SB_BPRI#11,18
SB_CPU0_BREQ#239
SB_BREQ#19,11,14
SB_BREQ#09,11,14
D D
C C
P_VCCP_A_CPU0
AGND_CPU0
B B
P_VTT
754mV
84.5 NORMAL
90.9 FOR B0
P_VTT
SB_CPURST#9,11,18
SB_RS#[0..2]11,18
SB_RSP#11,18
SB_CPU_A20M#9,11,37
SB_CPU_IGNNE#9,11,37
SB_CPU_INIT#9,11,37,60
SB_CPU_NMI9,11,14
SB_CPU_INTR9,11,37
CPU_PWR_GD9,11,13,37
SB_CPU0_SMI#9,14
SB_CPU_SLP#9,11,37
SB_CPU_STPCLK#9,11
P0_BCLK#33
P0_BCLK33
ITP_TCK011,13
ITP_TRST#11,13,17
SB_CPU0_BSEL19,14
SB_CPU0_BSEL09,14
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
VID_CPU0_R[5..0]67,71
VR0_VCCSENSE67
VTTEN9,11,50
VR0_VSSSENSE67
SR60
49.9/6/1
VREF_P_VTT_CPU0_3_R VREF_P_VTT_CPU0_3
SC98
SR62
2.2U/6
90.9/6/1
SB_BPRI#
SB_CPU0_BREQ#23
SB_BREQ#1
SB_BREQ#0
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
SB_CPU0_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P0_BCLK#
P0_BCLK
ITP_TCK0
TP101
TP102
ITP_TRST#
SB_CPU0_BSEL1
SB_CPU0_BSEL0
VID_CPU0_R5
VID_CPU0_R4
VID_CPU0_R3
VID_CPU0_R2
VID_CPU0_R1
VID_CPU0_R0
VR0_VCCSENSE
VTTEN
VR0_VSSSENSE
tolerance up 6% down 6% vtt
C0 Vtt X 0.6456 =0.77472
normal Vtt X 0.6287 =0.75444
SR61
0/6
SC99
220P/6
U1A
D23
BPRI#
D10
NOCONA 667
BR3#
E11
BR2#
F12
BR1#
D20
BR0#
Y8
RESET#
F21
RS2#
D22
RS1#
E21
RS0#
C6
RSP#
F27
A20M#
C26
IGNNE#
D6
INIT#
G23
LINT1_NMI
B24
LINT0_INTR
AB7
PWRGOOD
C27
SMI#
AE6
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
E24
TCK
C24
TDI
A25
TMS
F24
TRST#
AB3
BSEL1
AA3
BSEL0
AE29
RESERVED1
AE28
RESERVED0
AE30
RSVD16
Y3
RSVD15
AD29
RSVD14
AD28
RSVD13
AC29
RSVD12
AB29
RSVD10
AB28
RSVD9
AA29
RSVD8
AA28
RSVD7
AE15
RSVD3
AC1
RSVD2
AE16
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
AD4
VCCIOPLL
B27
VCC_SENSE
E1
VTTEN
AB4
VCCA
AA5
VSSA
D26 C1
VSS_SENSE OPTIMIZED_COMPAT#
NOCONA 667_7
ADS#
BINIT#
BNR#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
THERMTRIP#
PROCHOT#
TDO
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
THERMDC
THERMDA
BOOT_SELECT
RSVD
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
WIDE 10-12 MILS
P_VTT
SC100
220P/6
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU0_BPM#5
E4
CPU0_BPM#4
E8
CPU0_BPM#3
F5
CPU0_BPM#2
E7
CPU0_BPM#1
F8
CPU0_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU0_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU_THERMTRIP#
F26
SB_CPU0_PROCHOT#
B25
E25
TP100
F9
F23
W9
W23
B5
A3
AC28
D25
E16
AD16
Y29
A26
AE5
AD5
AA7
Y6
W8
W7
W6
AE4
AD1
Y28
Y27
PU_BOOT_SELECT_CPU0
G7
W3
B1
SB_CPU0_CPU1_TESTBUS
A16
SB_CPU0_FORCEPR#
A15
AC30
COMP3 =SB_CPU0_ADDR_ERC
COMP2 =SB_CPU0_DATA_ERC
PU_CPU0_8=SB_CPU0_EDRDY
PU_CPU0_0=SB_CPU0_SNPD#
V0.5V0.5
PD_ODTEN_CPU0
SMC_CPU0_SKTOCC#
PD_COMP3_CPU0
PD_COMP2_CPU0
PD_COMP1_CPU0
PD_COMP0_CPU0
PU_CPU0_8
PU_CPU0_0
PU_CPU0_5
PU_CPU0_6
PU_CPU0_1
PU_CPU0_7
PU_CPU0_3
PU_CPU0_2
PU_CPU0_4
CPU0_THERMDC
CPU0_THERMDA
VID_PWRGD
SLEW_CTRL_CPU0
CPU0_OPTIM_COMPAT_CTRL
120mA
L1
10UH/8
L2
10UH/8
SB_ADS# 11,18
SB_BINIT# 9,11,18
SB_BNR# 9,11,18
CPU0_BPM#[5..0] 13
SB_DBSY# 11,18
SB_DEFER# 11,18
SB_DRDY# 11,18
SB_HIT# 9,11,18
SB_HITM# 9,11,18
SB_TRDY# 11,18
SB_LOCK# 11,18
SB_MCERR# 9,11,18
SB_CPU0_IERR# 9,14
SB_CPU_FERR# 9,11,37,39
SB_CPU_THERMTRIP# 9,11,14,37,39
SB_CPU0_PROCHOT# 9,14
PD_ODTEN_CPU0 9
SMC_CPU0_SKTOCC# 9,50,72
PD_COMP3_CPU0 9
PD_COMP2_CPU0 9
PD_COMP1_CPU0 9
PD_COMP0_CPU0 9
PU_CPU0_8 9
PU_CPU0_0 9
PU_CPU0_5 9
PU_CPU0_6 9
PU_CPU0_1 9
PU_CPU0_7 9
PU_CPU0_3 9
PU_CPU0_2 9
PU_CPU0_4 9
TP15
CPU0_THERMDC 10
CPU0_THERMDA 10
PU_BOOT_SELECT_CPU0 9
TP16
VID_PWRGD 11,50
SB_CPU0_CPU1_TESTBUS 9,11
SB_CPU0_FORCEPR# 9,14
SLEW_CTRL_CPU0 9
CPU0_OPTIM_COMPAT_CTRL 9
WIDE 10-12 MILS
P_VCCP_A_CPU0
12
C8
22U/1206
AGND_CPU0
WIDE 10-12 MILS
R4
49.9/6/1
A A
754mV
84.5 NORMAL
90.9 FOR B0
VREF_P_VTT_CPU0_0_R
C9
R6
2.2U/6
90.9/6/1
5
R5
0/6
VREF_P_VTT_CPU0_0
C11
C10
220P/6
220P/6
P1V5
SR63
0/6/X
4
WIDE 10-12 MILS
PU_VCCPLL_CPU0
SC105
0.1U/6/X
3
NO USE
SC107
0.1U/6/X
SB_D#[63..0]11,18
VREF_P_VTT_CPU0_3
VREF_P_VTT_CPU0_0
PU_VCCPLL_CPU0
NEW
12
SC115
100U/1210
SC106
100U/1210
P_VTT
12
100U/1210
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
VTT PWRPLANE NEED
ON TOP OR BOTTOM
SC101
SC104
2.2U/6
breakout region
4.5
4.5
SB_HA#[35..3] 11,18
SB_REQ#[4..0] 11,18
SB_DBI#[3..0] 11,18
SB_DP#[3..0] 11,18
SB_AP#[1..0] 11,18
SB_ADSTB#[1..0] 11,18
SB_DSTBP#[3..0] 11,18
SB_DSTBN#[3..0] 11,18
8 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
P_VTT
R8
220/6
P3V3
R11
R13
R16
R18
R20
R24
R26
R28
R37
SR42
SR46
SR49
SR51
SR52
R33
R35
220/6
220/6
220/6
220/6
220/6
220/6
220/6
51/6/X
R31
51/6
51/6
51/6
51/6
39/6
39/6
39/6
39/6
39/6
D D
C C
B B
A A
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_INTR
SB_CPU_SLP#
SB_CPU_STPCLK#
SB_CPU_NMI
SB_CPU0_SMI#
SB_CPU0_FORCEPR#
SB_CPU0_IERR#
SB_CPU0_PROCHOT#
SB_CPU_THERMTRIP#
SB_CPU_FERR#
SB_BININ#_R SB_BINIT#
SB_BNR#_R
SB_HIT#_R
SB_HITM#_R
SB_MCERR#_R SB_MCERR#
R55
VTTEN
4.7K/6
5
SB_CPU0_SMI# 8,14
SB_CPU0_FORCEPR# 8,14
SB_CPU0_IERR# 8,14
SB_CPU0_PROCHOT# 8,14
SC116
47P/6
SC117
SB_BNR#
47P/6
SC118
SB_HIT#
47P/6
SC119
SB_HITM#
47P/6
SC120
47P/6
SB_CPU_A20M# 8,11,37
SB_CPU_IGNNE# 8,11,37
SB_CPU_INIT# 8,11,37,60
SB_CPU_INTR 8,11,37
SB_CPU_SLP# 8,11,37
SB_CPU_STPCLK# 8,11
SB_CPU_NMI 8,11,14
SB_CPU_THERMTRIP# 8,11,14,37,39
SB_CPU_FERR# 8,11,37,39
SB_BINIT# 8,11,18
SB_BNR# 8,11,18
SB_HIT# 8,11,18
SB_HITM# 8,11,18
SB_MCERR# 8,11,18
VTTEN 8,11,50
together
together
4
SB_CPU_STPCLK#8,11
P_VTT
P_VTT
P_VTT
R9
R12
R39
SR15
SR17
SR19
R22
R25
R44
R53
PU_BOOT_SELECT_CPU0
51/6/X
CPU0_OPTIM_COMPAT_CTRL
51/6/X
51/6
51/6
51/6
510/6
510/6
R27
100/6/1
R29
100/6/1
SR1
49.9/6/1
R97
49.9/6/1
PD_ODTEN_CPU0
51/6
PD_ODTEN_CPU1
51/6
SB_CPU0_CPU1_TESTBUS
51/6
SB_BREQ#0
SB_BREQ#1
SB_CPU0_BREQ#23
SB_CPU0_BSEL1
SB_CPU0_BSEL0
PD_COMP2_CPU0
PD_COMP3_CPU0
PD_COMP1_CPU0
PD_COMP0_CPU0
R54
0/6/X
R56
0/6
3
PU_BOOT_SELECT_CPU0 8
CPU0_OPTIM_COMPAT_CTRL 8
SB_BREQ#0 8,11,14
SB_BREQ#1 8,11,14
SB_CPU0_BREQ#23 8
SB_CPU0_BSEL1 8,14
SB_CPU0_BSEL0 8,14
PD_COMP2_CPU0 8
PD_COMP3_CPU0 8
PD_COMP1_CPU0 8
PD_COMP0_CPU0 8
PD_ODTEN_CPU0 8
PD_ODTEN_CPU1 11
SB_CPU0_CPU1_TESTBUS 8,11
ICH_CPU_STPCLK# 37
together
P_VTT
R1104 51/6/X
R1145 51/6/X
P3V3_STBY
P_VTT
2
CPU_PWR_GD
300/6
51/6
CPU_PWR_GD
SB_CPURST#
51/6/X
0/6
R30
4.7K/6
CPU_PWR_GD 8,11,13,37
CLOSE TO CPU0
SB_CPURST# 8,11,18
SLEW_CTRL_CPU0
SLEW_CTRL_CPU1
SMC_CPU0_SKTOCC#
SLEW_CTRL_CPU0 8
SLEW_CTRL_CPU1 11
SMC_CPU0_SKTOCC# 8,50,72
R10
R14
R21
R23
END CPU NOT USE
PU_CPU0_8
PU_CPU0_7
PU_CPU0_6
PU_CPU0_5
PU_CPU0_4
PU_CPU0_3
PU_CPU0_2
PU_CPU0_1
PU_CPU0_0
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 667 P0 TERMINATION
GA-9ILDR
PU_CPU0_8 8
PU_CPU0_0 8
PU_CPU0_6 8
PU_CPU0_5 8
PU_CPU0_4 8
PU_CPU0_3 8
PU_CPU0_2 8
PU_CPU0_1 8
PU_CPU0_7 8
1
R45
R47
R48
R50
R36
R38
R40
R41
R43
51/6/X
51/6/X
51/6
51/6
51/6
51/6
51/6
51/6
51/6
C15
100P/6/X
1.2
9 74Monday, December 20, 2004
5
U1C
L31
VSS9
L29
L27
L25
L23
L9
K30
K28
K26
K24
J31
J29
J27
J25
J23
H30
H28
H26
H24
G31
G29
G27
G25
F30
F28
F25
F19
F13
E31
E29
E23
E17
E15
D30
D28
D27
D21
D11
C31
C29
C25
C19
C13
B30
B28
B23
B17
B15
A31
A29
A27
A21
A11
L7
L5
L3
L1
K8
K6
K4
K2
J9
J7
J5
J3
J1
H8
H6
H4
H2
G9
G5
G3
G1
F7
F2
E9
D5
D2
C7
B9
B2
A5
D D
C C
B B
A A
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
NOCONA 667_7
5
NOCONA 667
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
U1D
L30
VCC_CORE1
L26
VCC_CORE2
L24
VCC_CORE3
L8
VCC_CORE4
L6
VCC_CORE5
L4
VCC_CORE6
L2
VCC_CORE7
K31
VCC_CORE8
K29
VCC_CORE9
K27
VCC_CORE10
K25
VCC_CORE11
K23
VCC_CORE12
K9
VCC_CORE13
K7
VCC_CORE14
K5
VCC_CORE15
K3
VCC_CORE16
K1
VCC_CORE17
J30
VCC_CORE18
J28
VCC_CORE19
J26
VCC_CORE20
J24
VCC_CORE21
J8
VCC_CORE22
J6
VCC_CORE23
J4
VCC_CORE24
J2
VCC_CORE25
H31
VCC_CORE26
H29
VCC_CORE27
H27
VCC_CORE28
H25
VCC_CORE29
H23
VCC_CORE30
H9
VCC_CORE31
H7
VCC_CORE32
H5
VCC_CORE33
H3
VCC_CORE34
H1
VCC_CORE35
G30
VCC_CORE36
G28
VCC_CORE37
G26
VCC_CORE38
G24
VCC_CORE39
G8
VCC_CORE40
G6
VCC_CORE41
G4
VCC_CORE42
G2
VCC_CORE43
F31
VCC_CORE44
F29
VCC_CORE45
F22
VCC_CORE46
F16
VCC_CORE47
F4
VCC_CORE48
F1
VCC_CORE49
E30
VCC_CORE50
E28
VCC_CORE51
E26
VCC_CORE52
E20
VCC_CORE53
E6
VCC_CORE54
E2
VCC_CORE55
D31
VCC_CORE56
D29
VCC_CORE57
D24
VCC_CORE58
D18
VCC_CORE59
D14
VCC_CORE60
D8
VCC_CORE61
D1
VCC_CORE62
C30
VCC_CORE63
C28
VCC_CORE64
C22
VCC_CORE65
C16
VCC_CORE66
C4
VCC_CORE67
C2
VCC_CORE68
B31
VCC_CORE69
B29
VCC_CORE70
B26
VCC_CORE71
B20
VCC_CORE72
B6
VCC_CORE73
A30
VCC_CORE74
A28
VCC_CORE75
A24
VCC_CORE76
A18
VCC_CORE77
A14
VCC_CORE78
A8
VCC_CORE79
A2
VCC_CORE80
NOCONA 667_7
4
NOCONA 667
3
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
3
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
2
P_VCCP0P_VCCP0
P_VTT
U1E
AD12
VCC_VTT1
AC10
AA12
Y10
F10
E12
C10
B12
B4
C5
P_VCCP0
CPU0_THERMDA8
CPU0_THERMDC8
CPU0_THERMDA CPU0_THERMDA_H7
2
A4
AE24
AE18
AE14
AE8
AE3
AD30
AD26
AD20
AD6
AD2
AC31
AC22
AC16
AC4
AC3
AB30
AB24
AB18
AB14
AB8
AB2
L28
R119
0/6
R121
0/6
Title
Size Document Number Rev
Date: Sheet of
NOCONA 667
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_CORE160
VCC_CORE161
VCC_CORE162
VCC_CORE163
VCC_CORE164
VCC_CORE165
VCC_CORE166
VCC_CORE167
VCC_CORE168
VCC_CORE169
VCC_CORE170
VCC_CORE171
VCC_CORE172
VCC_CORE173
VCC_CORE174
VCC_CORE175
VCC_CORE176
VCC_CORE177
VCC_CORE178
VCC_CORE179
VCC_CORE180
VCC_CORE181
NOCONA 667_7
CPU0_THERMDC_H7
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 667 P0 PWR/GND
GA-9ILDR
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
1
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
TD1P
C40
100P/6
TD1NCPU0_THERMDC
1
TD1P 71
TD1N 71
1.2
10 74Monday, December 20, 2004
5
4
3
2
1
PROCESSOR 1
SB_BPRI#8,18
SB_CPU1_BREQ#2313
SB_BREQ#08,9,14
SB_BREQ#18,9,14
SB_CPURST#8,9,18
D D
C C
B B
P_VTT
754mV
P_VTT
A A
754mV
P1 VREF
SB_RS#[0..2]8,18
SB_RSP#8,18
SB_CPU_A20M#8,9,37
SB_CPU_IGNNE#8,9,37
SB_CPU_INIT#8,9,37,60
SB_CPU_NMI8,9,14
SB_CPU_INTR8,9,37
CPU_PWR_GD8,9,13,37
SB_CPU1_SMI#13,14
SB_CPU_SLP#8,9,37
SB_CPU_STPCLK#8,9
P1_BCLK#33
P1_BCLK33
ITP_TCK08,13
ITP_TRST#8,13,17
SB_CPU1_BSEL113,14
SB_CPU1_BSEL013,14
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
VID_CPU1_R[5..0]68,71
P_VCCP_A_CPU1
VR1_VCCSENSE68
VTTEN8,9,50
AGND_CPU1
VR1_VSSSENSE68
R71
49.9/6/1
VREF_P_VCCP_CPU1_0_R
R73
C25
84.5/6/1
2.2U/6
R219
49.9/6/1
VREF_P_VCCP_CPU1_3_R
R162
C22
84.5/6/1
2.2U/6
MCH A0 CPU B0 800 64.9ohm 0.678V
MCH B0 CPU C1 800 49.9ohm 0.756V
5
SB_BPRI#
SB_CPU1_BREQ#23
SB_BREQ#0
SB_BREQ#1
SB_CPURST#
SB_RS#2
SB_RS#1
SB_RS#0
SB_RSP#
SB_CPU_A20M#
SB_CPU_IGNNE#
SB_CPU_INIT#
SB_CPU_NMI
SB_CPU_INTR
CPU_PWR_GD
SB_CPU1_SMI#
SB_CPU_SLP#
SB_CPU_STPCLK#
P1_BCLK#
P1_BCLK
ITP_TCK0
ITP_TRST#
SB_CPU1_BSEL1
SB_CPU1_BSEL0
VR1_VCCSENSE
VTTEN
VR1_VSSSENSE
R72
0/6
R141
0/6
TP104
TP105
VID_CPU1_R5
VID_CPU1_R4
VID_CPU1_R3
VID_CPU1_R2
VID_CPU1_R1
VID_CPU1_R0
C26
220P/6
U2A
D23
BPRI#
D10
NOCONA 667
BR3#
E11
BR2#
F12
BR1#
D20
BR0#
Y8
RESET#
F21
RS2#
D22
RS1#
E21
RS0#
C6
RSP#
F27
A20M#
C26
IGNNE#
D6
INIT#
G23
LINT1_NMI
B24
LINT0_INTR
AB7
PWRGOOD
C27
SMI#
AE6
SLP#
D4
STPCLK#
W5
BCLK1
Y4
BCLK0
E24
TCK
C24
TDI
A25
TMS
F24
TRST#
AB3
BSEL1
AA3
BSEL0
AE29
RESERVED1
AE28
RESERVED0
AE30
RSVD16
Y3
RSVD15
AD29
RSVD14
AD28
RSVD13
AC29
RSVD12
AB29
RSVD10
AB28
RSVD9
AA29
RSVD8
AA28
RSVD7
AE15
RSVD3
AC1
RSVD2
AE16
RSVD1
A1
VID5
B3
VID4
C3
VID3
D3
VID2
E3
VID1
F3
VID0
AD4
VCCIOPLL
B27
VCC_SENSE
E1
VTTEN
AB4
VCCA
AA5
VSSA
D26 C1
VSS_SENSE OPTIMIZED_COMPAT#
NOCONA 667_7
WIDE 10-12 MILS
VREF_P_VTT_CPU1_0
C27
220P/6
WIDE 10-12 MILS
VREF_P_VTT_CPU1_3
C23
C13
220P/6
220P/6
0.4 CHANGE
4
ADS#
BINIT#
BNR#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
TRDY#
LOCK#
MCERR#
IERR#
FERR#
THERMTRIP#
PROCHOT#
TDO
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
SKTOCC#
COMP3
COMP2
COMP1
COMP0
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
SMB_PRT
VCCPLL
THERMDC
THERMDA
BOOT_SELECT
RSVD
VIDPWRGD
TEST_BUS
FORCEPR#
SLEW_CTRL
SB_ADS#
D19
SB_BINIT#
F11
SB_BNR#
F20
CPU1_BPM#5
E4
CPU1_BPM#4
E8
CPU1_BPM#3
F5
CPU1_BPM#2
E7
CPU1_BPM#1
F8
CPU1_BPM#0
F6
SB_DBSY#
F18
SB_DEFER#
C23
SB_DRDY#
E18
SB_HIT#
E22
SB_HITM#
A23
SB_TRDY#
E19
SB_LOCK#
A17
SB_MCERR#
D7
SB_CPU1_IERR#
E5
SB_CPU_FERR#
E27
SB_CPU_THERMTRIP#
F26
SB_CPU1_PROCHOT#
B25
E25
TP103
F9
F23
W9
W23
B5
A3
AC28
D25
E16
AD16
Y29
A26
AE5
AD5
AA7
Y6
W8
W7
W6
AE4
AD1
Y28
Y27
PU_BOOT_SELECT_CPU1
G7
W3
B1
SB_CPU0_CPU1_TESTBUS
A16
A15
AC30
V0.5V0.5
PD_ODTEN_CPU1
SMC_CPU1_SKTOCC#
PD_COMP3_CPU1
PD_COMP2_CPU1
PD_COMP1_CPU1
PD_COMP0_CPU1
PU_CPU1_8
PU_CPU1_0
PU_CPU0_5
PU_CPU1_6
PU_CPU1_1
PU_CPU1_7
PU_CPU1_3
PU_CPU1_2
PU_CPU1_4
CPU1_THERMDC
CPU1_THERMDA
VID_PWRGD
SB_CPU1_FORCEPR#
SLEW_CTRL_CPU1
CPU1_OPTIM_COMPAT_CTRL
COMP3 =SB_CPU1_ADDR_ERC
COMP2 =SB_CPU1_DATA_ERC
PU_CPU1_8=SB_CPU1_EDRDY
PU_CPU1_0=SB_CPU1_SNPD#
P_VTT
L3
10UH/8
L4
10UH/8
P1V5
SB_ADS# 8,18
SB_BINIT# 8,9,18
SB_BNR# 8,9,18
CPU1_BPM#[5..0] 13
SB_DBSY# 8,18
SB_DEFER# 8,18
SB_DRDY# 8,18
SB_HIT# 8,9,18
SB_HITM# 8,9,18
SB_TRDY# 8,18
SB_LOCK# 8,18
SB_MCERR# 8,9,18
SB_CPU1_IERR# 13,14
SB_CPU_FERR# 8,9,37,39
SB_CPU_THERMTRIP# 8,9,14,37,39
SB_CPU1_PROCHOT# 13,14
PD_ODTEN_CPU1 9
SMC_CPU1_SKTOCC# 13,50,72
PD_COMP3_CPU1 13
PD_COMP2_CPU1 13
PD_COMP1_CPU1 13
PD_COMP0_CPU1 13
PU_CPU1_8 13
PU_CPU1_0 13
PU_CPU1_5 13
PU_CPU1_6 13
PU_CPU1_1 13
PU_CPU1_7 13
PU_CPU1_3 13
PU_CPU1_2 13
PU_CPU1_4 13
TP31
CPU1_THERMDC 12
CPU1_THERMDA 12
PU_BOOT_SELECT_CPU1 13
TP32
VID_PWRGD 8,50
SB_CPU0_CPU1_TESTBUS 8,9
SB_CPU1_FORCEPR# 13,14
SLEW_CTRL_CPU1 9
CPU1_OPTIM_COMPAT_CTRL 13
SR76
0/6/X
WIDE 10-12 MILS
P_VCCP_A_CPU1
12
C75
22U/1206
AGND_CPU1
WIDE 10-12 MILS
PU_VCCPLL_CPU1
3
SB_D#[63..0]8,18
VREF_P_VTT_CPU1_3
VREF_P_VTT_CPU1_0
PU_VCCPLL_CPU1
NO USE
SC122
SC123
0.1U/6/X
0.1U/6/X
SB_D#63
SB_D#62
SB_D#61
SB_D#60
SB_D#59
SB_D#58
SB_D#57
SB_D#56
SB_D#55
SB_D#54
SB_D#53
SB_D#52
SB_D#51
SB_D#50
SB_D#49
SB_D#48
SB_D#47
SB_D#46
SB_D#45
SB_D#44
SB_D#43
SB_D#42
SB_D#41
SB_D#40
SB_D#39
SB_D#38
SB_D#37
SB_D#36
SB_D#35
SB_D#34
SB_D#33
SB_D#32
SB_D#31
SB_D#30
SB_D#29
SB_D#28
SB_D#27
SB_D#26
SB_D#25
SB_D#24
SB_D#23
SB_D#22
SB_D#21
SB_D#20
SB_D#19
SB_D#18
SB_D#17
SB_D#16
SB_D#15
SB_D#14
SB_D#13
SB_D#12
SB_D#11
SB_D#10
SB_D#9
SB_D#8
SB_D#7
SB_D#6
SB_D#5
SB_D#4
SB_D#3
SB_D#2
SB_D#1
SB_D#0
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AD10
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
AD27
AA25
AA27
12
SC108
100U/1210
AB6
AA8
AC5
AC6
AE7
AD7
AC8
AC9
AD8
AE9
Y9
Y23
Y24
Y26
2
U2B
D63
NOCONA 667
D62
D61
D60
D59
D58
D57
D56
D55
D54
D53
D52
D51
D50
D49
D48
D47
D46
D45
D44
D43
D42
D41
D40
D39
D38
D37
D36
D35
D34
D33
D32
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NOCONA 667_7
P_VTT
12
SC109
100U/1210
SB_HA#[35..3] 8,18
SB_REQ#[4..0] 8,18
SB_DBI#[3..0] 8,18
SB_DP#[3..0] 8,18
SB_AP#[1..0] 8,18
SB_ADSTB#[1..0] 8,18
SB_DSTBP#[3..0] 8,18
SB_DSTBN#[3..0] 8,18
SC110
2.2U/6
BREQ4#
BREQ3#
BREQ2#
BREQ1#
BREQ0#
DBI3#
DBI2#
DBI1#
DBI0#
DP3#
DP2#
DP1#
DP0#
AP1#
AP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
SC111
0.1U/6
SB_HA#34
C9
SB_HA#33
A7
SB_HA#32
A6
SB_HA#31
B7
SB_HA#30
C11
SB_HA#29
D12
SB_HA#28
E13
SB_HA#27
B8
SB_HA#26
A9
SB_HA#25
D13
SB_HA#24
E14
SB_HA#23
C12
SB_HA#22
B11
SB_HA#21
B10
SB_HA#20
A10
SB_HA#19
F15
SB_HA#18
D15
SB_HA#17
D16
SB_HA#16
C14
SB_HA#15
C15
SB_HA#14
A12
SB_HA#13
B13
SB_HA#12
B14
SB_HA#11
B16
SB_HA#10
A13
SB_HA#9
D17
A9
SB_HA#8
C17
A8
SB_HA#7
A19
A7
SB_HA#6
C18
A6
SB_HA#5
B18
A5
SB_HA#4
A20
A4
SB_HA#3
A22
A3
SB_REQ#4
B22
SB_REQ#3
C20
SB_REQ#2
C21
SB_REQ#1
B21
SB_REQ#0
B19
SB_DBI#3
AB9
SB_DBI#2
AE12
SB_DBI#1
AD22
SB_DBI#0
AC27
SB_DP#3
AE17
SB_DP#2
AC15
SB_DP#1
AE19
SB_DP#0
AC18
SB_AP#1
D9
SB_AP#0
E10
SB_ADSTB#1
F14
SB_ADSTB#0
F17
SB_DSTBP#3
Y11
SB_DSTBP#2
Y14
SB_DSTBP#1
Y17
SB_DSTBP#0
Y20
SB_DSTBN#3
Y12
SB_DSTBN#2
Y15
SB_DSTBN#1
Y18
SB_DSTBN#0
Y21
EC40
PSA2.5VB820MH11/8X11.5
Trace Width:12 Mils
VREF_P_VTT_CPU1_0
SB_HA#35
C8
VREF_P_VTT_CPU1_3
VCCIOPLL_CPU1
AGND_CPU1
PU_VCCPLL_CPU1
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 667 MICS P1
GA-9ILDR
1
11 74Monday, December 20, 2004
1.2
5
U2C
L31
VSS9
L29
L27
L25
L23
L9
K30
K28
K26
K24
J31
J29
J27
J25
J23
H30
H28
H26
H24
G31
G29
G27
G25
F30
F28
F25
F19
F13
E31
E29
E23
E17
E15
D30
D28
D27
D21
D11
C31
C29
C25
C19
C13
B30
B28
B23
B17
B15
A31
A29
A27
A21
A11
L7
L5
L3
L1
K8
K6
K4
K2
J9
J7
J5
J3
J1
H8
H6
H4
H2
G9
G5
G3
G1
F7
F2
E9
D5
D2
C7
B9
B2
A5
D D
C C
B B
A A
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
NOCONA 667_7
5
NOCONA 667
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AA30
AA23
AA17
AA15
AA9
AA2
Y31
Y25
Y19
Y13
Y7
Y5
Y1
W30
W28
W26
W24
W4
W2
V31
V29
V27
V25
V23
V9
V7
V5
V3
V1
U30
U28
U26
U24
U8
U6
U4
U2
T31
T29
T27
T25
T23
T9
T7
T5
T3
T1
R30
R28
R26
R24
R8
R6
R4
R2
P31
P29
P27
P25
P23
P9
P7
P5
P3
P1
N30
N28
N26
N24
N8
N6
N4
N2
M2
M4
M6
M8
M24
M26
M28
M30
4
P_VCCP1
4
K31
K29
K27
K25
K23
H31
H29
H27
H25
H23
G30
G28
G26
G24
F31
F29
F22
F16
E30
E28
E26
E20
D31
D29
D24
D18
D14
C30
C28
C22
C16
B31
B29
B26
B20
A30
A28
A24
A18
A14
L30
L26
L24
J30
J28
J26
J24
L8
L6
L4
L2
K9
K7
K5
K3
K1
J8
J6
J4
J2
H9
H7
H5
H3
H1
G8
G6
G4
G2
F4
F1
E6
E2
D8
D1
C4
C2
B6
A8
A2
U2D
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
NOCONA 667_7
NOCONA 667
3
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCC_CORE98
VCC_CORE99
VCC_CORE100
VCC_CORE101
VCC_CORE102
VCC_CORE103
VCC_CORE104
VCC_CORE105
VCC_CORE106
VCC_CORE107
VCC_CORE108
VCC_CORE109
VCC_CORE110
VCC_CORE111
VCC_CORE112
VCC_CORE113
VCC_CORE114
VCC_CORE115
VCC_CORE116
VCC_CORE117
VCC_CORE118
VCC_CORE119
VCC_CORE120
VCC_CORE121
VCC_CORE122
VCC_CORE123
VCC_CORE124
VCC_CORE125
VCC_CORE126
VCC_CORE127
VCC_CORE128
VCC_CORE129
VCC_CORE130
VCC_CORE131
VCC_CORE132
VCC_CORE133
VCC_CORE134
VCC_CORE135
VCC_CORE136
VCC_CORE137
VCC_CORE138
VCC_CORE139
VCC_CORE140
VCC_CORE141
VCC_CORE142
VCC_CORE143
VCC_CORE144
VCC_CORE145
VCC_CORE146
VCC_CORE147
VCC_CORE148
VCC_CORE149
VCC_CORE150
VCC_CORE151
VCC_CORE152
VCC_CORE153
VCC_CORE154
VCC_CORE155
VCC_CORE156
VCC_CORE157
VCC_CORE158
VCC_CORE159
3
AA31
AA26
AA20
AA6
AA4
AA1
Y30
Y22
Y16
Y2
W31
W29
W27
W25
W1
V30
V28
V26
V24
V8
V6
V4
V2
U31
U29
U27
U25
U23
U9
U7
U5
U3
U1
T30
T28
T26
T24
T8
T6
T4
T2
R31
R29
R27
R25
R23
R9
R7
R5
R3
R1
P30
P28
P26
P24
P8
P6
P4
P2
N31
N29
N27
N25
N23
N9
N7
N5
N3
N1
M31
M29
M27
M25
M23
M9
M7
M5
M3
M1
P_VCCP1
2
P_VTT
U2E
AD12
VCC_VTT1
AC10
AA12
Y10
F10
E12
C10
B12
B4
C5
P_VCCP1
CPU1_THERMDA11
CPU1_THERMDA
CPU1_THERMDC TD2N
2
A4
AE24
AE18
AE14
AE8
AE3
AD30
AD26
AD20
AD6
AD2
AC31
AC22
AC16
AC4
AC3
AB30
AB24
AB18
AB14
AB8
AB2
L28
R120
0/6
R122
0/6
Title
Size Document Number Rev
Date: Sheet of
NOCONA 667
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_CORE160
VCC_CORE161
VCC_CORE162
VCC_CORE163
VCC_CORE164
VCC_CORE165
VCC_CORE166
VCC_CORE167
VCC_CORE168
VCC_CORE169
VCC_CORE170
VCC_CORE171
VCC_CORE172
VCC_CORE173
VCC_CORE174
VCC_CORE175
VCC_CORE176
VCC_CORE177
VCC_CORE178
VCC_CORE179
VCC_CORE180
VCC_CORE181
NOCONA 667_7
CPU1_THERMDA_H7
CPU1_THERMDC_H7
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 667 P1 PWR/GND
GA-9ILDR
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
1
AE2
AD3
AE27
AE21
AE11
AD31
AD23
AD17
AD15
AD9
AC25
AC19
AC13
AC7
AC2
AB31
AB27
AB21
AB11
AB5
AB1
TD2P
C41
100P/6
1
TD2P 71
TD2N 71CPU1_THERMDC11
1.2
12 74Monday, December 20, 2004
5
4
3
2
1
P_VTTP_VTT
R78
220/6
R80
D D
R81
R82
51/6
51/6
51/6
R83
51/6/X
R84
51/6/X R1062
R88
51/6
C C
SR92
SR95
510/6
510/6
R140
100/6/1
R98
100/6/1
SR3
49.9/6/1
B B
R7
49.9/6/1
SB_CPU1_SMI#
SB_CPU1_FORCEPR#
SB_CPU1_IERR#
SB_CPU1_PROCHOT#
PU_BOOT_SELECT_CPU1
CPU1_OPTIM_COMPAT_CTRL
51/6/X
SB_CPU1_BREQ#23
SB_CPU1_BSEL1
SB_CPU1_BSEL0
PD_COMP3_CPU1
PD_COMP2_CPU1
PD_COMP1_CPU1
PD_COMP0_CPU1
PD_COMP3_CPU1 11
PD_COMP2_CPU1 11
PD_COMP1_CPU1 11
PD_COMP0_CPU1 11
SB_CPU1_SMI# 11,14
SB_CPU1_FORCEPR# 11,14
SB_CPU1_IERR# 11,14
SB_CPU1_PROCHOT# 11,14
PU_BOOT_SELECT_CPU1 11
CPU1_OPTIM_COMPAT_CTRL 11
SB_CPU1_BREQ#23 11
SB_CPU1_BSEL1 11,14
SB_CPU1_BSEL0 11,14
R85
R91
R93
R94
R96
P3V3_STBY
CPU_PWR_GD
C881
100P/6/X
R86
R87
R89
R90
51/6
51/6
51/6
51/6
51/6
51/6
51/6
51/6
51/6
PU_CPU1_8
PU_CPU1_7
PU_CPU1_6
PU_CPU1_5
PU_CPU1_4
PU_CPU1_3
PU_CPU1_2
PU_CPU1_1
PU_CPU1_0
R79
SMC_CPU1_SKTOCC#
4.7K/6
CPU_PWR_GD 8,9,11,37
PU_CPU1_8 11
PU_CPU1_7 11
PU_CPU1_6 11
PU_CPU1_5 11
PU_CPU1_4 11
PU_CPU1_3 11
PU_CPU1_2 11
PU_CPU1_1 11
PU_CPU1_0 11
SMC_CPU1_SKTOCC# 11,50,72
P_VTT
RN1 51/8P4R
1 2
3 4
5 6
7 8
RN2 51/8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN3
ITP_TRST#8,11,17
ITP_TCK117
ITP_TCK08,11
51/8P4R
CPU1_BPM#5
CPU1_BPM#4
CPU1_BPM#3
CPU1_BPM#2
CPU1_BPM#1
CPU1_BPM#0
CPU0_BPM#5
CPU0_BPM#4
CPU0_BPM#0
CPU0_BPM#1
CPU0_BPM#2
CPU0_BPM#3
R146
1K/6
CPU1_BPM#[5..0] 11
CPU0_BPM#[5..0] 8
R147
SR39
1K/6
1K/6
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
NOCONA 667 P1 TERMINATION/ITP
GA-9ILDR
13 74Monday, December 20, 2004
1
1.2
5
P_VTT
C37
C38
2.2U/6
0.01U/6
D D
8.2K/6
8.2K/6
SR68
470/6
R958
0/6/X
470/6
R11250/6/X
R11260/6/X
R11330/6/X
R11340/6/X
SR67
ICH_CPU0_DIS#36,39
IPMI_CPU0_DIS#72
ICH_CPU1_DIS#36,39
IPMI_CPU1_DIS#72
P3V3
C C
CPU_BREQSW#72
B B
R417
R418
MMBT2222A/SOT23
SB_CPU1_BSEL111,13
SB_CPU1_IERR#11,13
SB_CPU0_IERR#8,9
SB_CPU0_PROCHOT#8,9
SB_CPU1_PROCHOT#11,13
SB_CPU_THERMTRIP#8,9,11,37,39
SB_CPU0_FORCEPR#8,9
SB_CPU1_FORCEPR#11,13
SB_ICH_NMI37
P3V3
R115
1K/6
MCH_BREQ#018 SB_BREQ#0 8,9,11
MCH_BREQ#118
P3V3
ECB
ECB
SQ8
SOT23
CPU1_BSEL1 50
SQ7
MMBT2222A/SOT23
SOT23
R105
200/6
R116
1K/6
BSP_SEL
MCH_BREQ#0
PU_BSP1
PU_BSP2
MCH_BREQ#1
R106
200/6
P3V3
R118
150/6
R117
1K/6
4
R107
2.2K/6
3
P_VTT
C35
2.2U/6
U5
VREF
1BI
2BI
3BI
4BI
5BI
7BO1
6BI
7BO2
8BO
9BI
10AI1
10AI2
11BI
GTL2006/TSSOP28
SB_BREQ#1 8,9,11
R101
49.9/6/1
ECB
SB_BREQ#0
SB_BREQ#1
SQ5
SOT23
GTL2006_VREF
R102
100/6/1
1
27
26
19
18
21
25
20
24
23
9
12
13
7
CPU1_BSEL0 50
SQ3
MMBT2222A/SOT23
SOT23
ECB
P_VTT
R108
51/6
SB_CPU1_BSEL011,13
R109
51/6
1
15
4
7
9
12
16
8
R111
51/6
C39
0.1U/6
U6
S
OE#
1A
2A
3A
4A
VCC
GND
74CBTL3257
MMBT2222A/SOT23
1B1
1B2
2B1
2B2
3B2
3B1
4B2
4B1
SR65
470/6
R112
51/6
R113
51/6
2
3
5
6
10
11
13
14
P3V3
SR64
470/6
VCC
1AO
2AO
3AO
4AO
9AO
10BO1
10BO2
11BO
P3V3
28
2
3
10
11
4
5A
5
6A
6
8AI
15
17
16
22
814
11AGND
P3V3 P3V3
R103
C36
2.2U/6
220/6
R114 0/6
CPU1_FORCEPR#37,39
VR1_FORCEPR#68,71
IPMIC1_FORCEPR#72
CPU0_FORCEPR#37,39
VR0_FORCEPR#67,71
IPMIC0_FORCEPR#72
R958 SB_BREQ#0 SB_BREQ#1
0 MCH_BREQ#1 MCH_BREQ#0
2
R104
1K/6
R58 0/6
SR5 0/6
CPU1_IERR# 71,72
CPU0_IERR# 71,72
CPU0_PROCHOT# 71
CPU1_PROCHOT# 71
CPU_THERMTRIP# 71,72
IPMI_SMI# 73ICH_CPU_SMI#37
SB_CPU0_SMI# 8,9
SB_CPU1_SMI# 11,13
SB_CPU_NMI 8,9,11
SB_IPMI_NMI# 72
P3V3
U89A
53
74LVC1G08
1
2
P3V3
SU88A
53
74LVC1G08
1
2
1
R912
10K/6
4
SR2
10K/6
4
P3V3
Q6
SOT23
CPU0_BSEL1 33,50
Q4
MMBT2222A/SOT23
SOT23
ECB
MMBT2222A/SOT23
SB_CPU0_BSEL08,9
4
R64
470/6
A A
SB_CPU0_BSEL18,9
MMBT2222A/SOT23
R66
470/6
5
ECB
R62
470/6
R60
470/6
P3V3
CPU0_BSEL0 33,50
Q1
MMBT2222A/SOT23
SOT23
ECB
Q2
SOT23
ECB
3
1 MCH_BREQ#0 MCH_BREQ#1
Title
Size Document Number Rev
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
LEVEL/THERMAL/BREQ
GA-9ILDR
14 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
U7A
DDRA_MA[13..0]25,26,27,28
D D
DDRA_CB[7..0]25,26,27,28
C C
DDRA_CMDCLK_A0_P25,28
DDRA_CMDCLK_A0_N25,28
DDRA_CMDCLK_A2_P27,28
DDRA_CMDCLK_A2_N27,28
DDRA_CMDCLK_A1_P26,28
PLACE DDR VREF VOLTAGE
DIVIDER NEAR CHANNEL A
DIMMS
P2V5
R158
75/6/1
B B
R159
75/6/1
PLACE CLOSE TO DIMM < 0.5
A A
C47
2.2U/6
5
PLACE CLOSE TO MCH < 0.5
C48
0.1U/6
DDRA_DQS[8..0]25,26,27,28
DDRA_CMDCLK_A1_N26,28
DDRA_CS#[5..0]25,26,27,28
DDRA_MCH_VREF_R
MEM_CKE025,28
MEM_CKE128,29
MEM_CKE226,28
MEM_CKE328,30
TP33
TP_DDRA_CMDCLK_A3_N
TP34
TP35
TP36
DDRA_CAS#25,26,27,28
DDRA_RAS#25,26,27,28
DDRA_WE#25,26,27,28
DDRA_BA[1..0]25,26,27,28
TP37
DDRA_DQS0
DDRA_DQS1
TP38
DDRA_DQS2
TP40
DDRA_DQS3
TP42
DDRA_DQS4
TP44
DDRA_DQS5
TP46
DDRA_DQS6
TP48
DDRA_DQS7
TP50
DDRA_DQS8
TP52
TP54
4
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_CB0
DDRA_CB1
DDRA_CB2
DDRA_CB3
DDRA_CB4
DDRA_CB5
DDRA_CB6
DDRA_CB7
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
DDRA_CMDCLK_A0_P
DDRA_CMDCLK_A0_N
DDRA_CMDCLK_A2_P
DDRA_CMDCLK_A2_N
DDRA_CMDCLK_A1_P
DDRA_CMDCLK_A1_N
DDRA_CS#0
DDRA_CS#1
DDRA_CS#2
DDRA_CS#3
DDRA_CS#4
DDRA_CS#5
TP_DDRA_CS#6
TP_DDRA_CS#7
DDRA_CAS#
DDRA_RAS#
DDRA_WE#
DDRA_BA0
DDRA_BA1
TP_DDRA_BA2
AH5
DDR_A_MA0
AD14
DDR_A_MA1
AL14
DDR_A_MA2
AK15
DDR_A_MA3
AJ16
DDR_A_MA4
AH17
DDR_A_MA5
AF18
DDR_A_MA6
AN20
DDR_A_MA7
AK20
DDR_A_MA8
AJ22
DDR_A_MA9
AE4
DDR_A_MA10
AF22
DDR_A_MA11
AG23
DDR_A_MA12
U6
DDR_A_MA13
AJ9
DDR_A_CB0
AG11
DDR_A_CB1
AE11
DDR_A_CB2
AD11
DDR_A_CB3
AJ10
DDR_A_CB4
AH10
DDR_A_CB5
AF10
DDR_A_CB6
AE10
DDR_A_CB7
AE26
DDR_CKE0
AN26
DDR_CKE1
AL26
DDR_CKE2
AK26
DDR_CKE3
AF13
DDR_A_CMDCLK_P0
AF12
DDR_A_CMDCLK_N0
AH11
DDR_A_CMDCLK_P1
AJ12
DDR_A_CMDCLK_N1
AH13
DDR_A_CMDCLK_P2
AG12
DDR_A_CMDCLK_N2
AC10
DDR_A_CMDCLK_P3
AD9
DDR_A_CMDCLK_N3
W2
DDR_A_#CS0
V3
DDR_A_#CS1
T8
DDR_A_#CS2
T10
DDR_A_#CS3
N5
DDR_A_#CS4
M5
DDR_A_#CS5
M3
DDR_A_#CS6
L4
DDR_A_#CS7
AM3
DDR_A_VREF
W8
DDR_A_CAS#
AA6
DDR_A_RAS#
Y10
DDE_A_WE#
AB5
DDR_A_BA0
AF6
DDR_A_BA1
AE25
DDR_A_BA2
AJ30
DDR_A_DQS_P0
AJ31
DDR_A_DQS_N0
AJ24
DDR_A_DQS_P1
AJ25
DDR_A_DQS_N1
AH19
DDR_A_DQS_P2
AH20
DDR_A_DQS_N2
AG14
DDR_A_DQS_P3
AG15
DDR_A_DQS_N3
AC6
DDR_A_DQS_P4
AD6
DDR_A_DQS_N4
W7
DDR_A_DQS_P5
V8
DDR_A_DQS_N5
N7
DDR_A_DQS_P6
P7
DDR_A_DQS_N6
G4
DDR_A_DQS_P7
H4
DDR_A_DQS_N7
AF9
DDR_A_DQS_P8
AG9
DDR_A_DQS_N8
DDR_A_DQ0
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR GROUP A
Lindenhurst
3
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63
DDR_A_DQS_P9
DDR_A_DQS_N9
DDR_A_DQS_P10
DDR_A_DQS_N10
DDR_A_DQS_P11
DDR_A_DQS_N11
DDR_A_DQS_P12
DDR_A_DQS_N12
DDR_A_DQS_P13
DDR_A_DQS_N13
DDR_A_DQS_P14
DDR_A_DQS_N14
DDR_A_DQS_P15
DDR_A_DQS_N15
DDR_A_DQS_P16
DDR_A_DQS_N16
DDR_A_DQS_P17
DDR_A_DQS_N17
AK32
AH31
AH29
AF28
AJ33
AK33
AG30
AG29
AG27
AG26
AD24
AD23
AE28
AF27
AH25
AG24
AF21
AG21
AF19
AG18
AE22
AD21
AJ18
AG20
AF16
AF15
AE13
AD12
AE17
AJ15
AE16
AD17
AH4
AG5
AB8
AB7
AB10
AA9
AE5
AD5
U9
AA5
V6
U7
W10
U10
W5
V5
R6
R5
L7
L6
P9
T5
N8
M9
K5
J5
K8
K10
L9
L10
K7
H7
AL32
AL31
AF25
AF24
AE20
AE19
AH14
AJ13
AD8
AC7
Y7
Y6
P10
N10
J6
H6
AH8
AJ7
DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63
DDRA_DQS9
DDRA_DQS10
DDRA_DQS11
DDRA_DQS12
DDRA_DQS13
DDRA_DQS14
DDRA_DQS15
DDRA_DQS16
DDRA_DQS17
TP39
TP41
TP43
TP45
TP47
TP49
TP51
TP53
TP55
2
DDRA_DQ[63..0] 25,26,27,28
DDRA_DQS[17..9] 25,26,27,28
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDR 266 CHA
GA-9ILDR
15 74Monday, December 20, 2004
1
1.2
5
D D
DDRB_CB[7..0]29,30,31,32
C C
PLACE DDR VREF VOLTAGE
DIVIDER NEAR CHANNEL B
DIMMS
P2V5
R160
75/6/1
B B
R161
75/6/1
PLACE CLOSE TO DIMM< 0.5
A A
C49
2.2U/6
5
DDRB_DQS[8..0]29,30,31,32
DDRB_CS#[5..0]29,30,31,32
DDRB_MCH_VREF_R
C50
0.1U/6
4
U7B
DDRB_MA[13..0]29,30,31,32
MEM_CKE427,28
MEM_CKE528,31
TP56
DDRB_CMDCLK_B2_P31,32
DDRB_CMDCLK_B2_N31,32
DDRB_CMDCLK_B1_P30,32
DDRB_CMDCLK_B1_N30,32
DDRB_CMDCLK_B0_P29,32
DDRB_CMDCLK_B0_N29,32
TP57
TP58
TP59
TP60
TP61
DDRB_CAS#29,30,31,32
DDRB_RAS#29,30,31,32
DDRB_WE#29,30,31,32
DDRB_BA[1..0]29,30,31,32
TP62
DDRB_DQS0
DDRB_DQS1
TP63
DDRB_DQS2
TP65
DDRB_DQS3
TP67
DDRB_DQS4
TP69
DDRB_DQS5
TP71
DDRB_DQS6
TP73
DDRB_DQS7
TP75
DDRB_DQS8
TP77
TP79
4
DDRB_MA0
DDRB_MA1
DDRB_MA2
DDRB_MA3
DDRB_MA4
DDRB_MA5
DDRB_MA6
DDRB_MA7
DDRB_MA8
DDRB_MA9
DDRB_MA10
DDRB_MA11
DDRB_MA12
DDRB_MA13
DDRB_CB0
DDRB_CB1
DDRB_CB2
DDRB_CB3
DDRB_CB4
DDRB_CB5
DDRB_CB6
DDRB_CB7
MEM_CKE4
MEM_CKE5
TP_MEM_CKE6
TP_MEM_CKE7
DDRB_CMDCLK_B2_P
DDRB_CMDCLK_B2_N
DDRB_CMDCLK_B1_P
DDRB_CMDCLK_B1_N
DDRB_CMDCLK_B0_P
DDRB_CMDCLK_B0_N
TP_DDRB_CMDCLK_B3_N
DDRB_CS#0
DDRB_CS#1
DDRB_CS#2
DDRB_CS#3
DDRB_CS#4
DDRB_CS#5
TP_DDRB_CS#6
TP_DDRB_CS#7
DDRB_CAS#
DDRB_RAS#
DDRB_WE#
DDRB_BA0
DDRB_BA1
TP_DDRB_BA2
AF7
DDR_B_MA0
AE14
DDR_B_MA1
AN14
DDR_B_MA2
AK14
DDR_B_MA3
AD15
DDR_B_MA4
AH16
DDR_B_MA5
AG17
DDR_B_MA6
AD18
DDR_B_MA7
AL20
DDR_B_MA8
AJ21
DDR_B_MA9
AC4
DDR_B_MA10
AH22
DDR_B_MA11
AH23
DDR_B_MA12
U4
DDR_B_MA13
AM7
DDR_B_CB0
AL7
DDR_B_CB1
AM4
DDR_B_CB2
AL4
DDR_B_CB3
AN8
DDR_B_CB4
AK8
DDR_B_CB5
AN5
DDR_B_CB6
AL5
DDR_B_CB7
AH26
DDR_CKE4
AJ27
DDR_CKE5
AJ28
DDR_CKE6
AH28
DDR_CKE7
AH7
DDR_B_CMDCLK_P0
AJ6
DDR_B_CMDCLK_N0
AH6
DDR_B_CMDCLK_P1
AG6
DDR_B_CMDCLK_N1
AG8
DDR_B_CMDCLK_P2
AE8
DDR_B_CMDCLK_N2
AK9
DDR_B_CMDCLK_P3
AL8
DDR_B_CMDCLK_N3
V9
DDR_B_#CS0
V2
DDR_B_#CS1
T7
DDR_B_#CS2
P6
DDR_B_#CS3
N4
DDR_B_#CS4
M2
DDR_B_#CS5
M6
DDR_B_#CS6
L3
DDR_B_#CS7
AN4
DDR_B_VREF
W1
DDR_B_CAS#
Y9
DDR_B_RAS#
W4
DDE_B_WE#
AA8
DDR_B_BA0
AE7
DDR_B_BA1
AM25
DDR_B_BA2
AM28
DDR_B_DQS_P0
AN29
DDR_B_DQS_N0
AM22
DDR_B_DQS_P1
AN23
DDR_B_DQS_N1
AK17
DDR_B_DQS_P2
AL17
DDR_B_DQS_N2
AK11
DDR_B_DQS_P3
AL11
DDR_B_DQS_N3
AG2
DDR_B_DQS_P4
AH2
DDR_B_DQS_N4
AA3
DDR_B_DQS_P5
AB4
DDR_B_DQS_N5
P1
DDR_B_DQS_P6
R2
DDR_B_DQS_N6
H3
DDR_B_DQS_P7
H1
DDR_B_DQS_N7
AK5
DDR_B_DQS_P8
AK6
DDR_B_DQS_N8
Lindenhurst
3
DDR GROUP B
DDR_B_DQS_P9
DDR_B_DQS_N9
DDR_B_DQS_P10
DDR_B_DQS_N10
DDR_B_DQS_P11
DDR_B_DQS_N11
DDR_B_DQS_P12
DDR_B_DQS_N12
DDR_B_DQS_P13
DDR_B_DQS_N13
DDR_B_DQS_P14
DDR_B_DQS_N14
DDR_B_DQS_P15
DDR_B_DQS_N15
DDR_B_DQS_P16
DDR_B_DQS_N16
DDR_B_DQS_P17
DDR_B_DQS_N17
3
DDR_B_DQ0
DDR_B_DQ1
DDR_B_DQ2
DDR_B_DQ3
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
DDR_B_DQ7
DDR_B_DQ8
DDR_B_DQ9
DDR_B_DQ10
DDR_B_DQ11
DDR_B_DQ12
DDR_B_DQ13
DDR_B_DQ14
DDR_B_DQ15
DDR_B_DQ16
DDR_B_DQ17
DDR_B_DQ18
DDR_B_DQ19
DDR_B_DQ20
DDR_B_DQ21
DDR_B_DQ22
DDR_B_DQ23
DDR_B_DQ24
DDR_B_DQ25
DDR_B_DQ26
DDR_B_DQ27
DDR_B_DQ28
DDR_B_DQ29
DDR_B_DQ30
DDR_B_DQ31
DDR_B_DQ32
DDR_B_DQ33
DDR_B_DQ34
DDR_B_DQ35
DDR_B_DQ36
DDR_B_DQ37
DDR_B_DQ38
DDR_B_DQ39
DDR_B_DQ40
DDR_B_DQ41
DDR_B_DQ42
DDR_B_DQ43
DDR_B_DQ44
DDR_B_DQ45
DDR_B_DQ46
DDR_B_DQ47
DDR_B_DQ48
DDR_B_DQ49
DDR_B_DQ50
DDR_B_DQ51
DDR_B_DQ52
DDR_B_DQ53
DDR_B_DQ54
DDR_B_DQ55
DDR_B_DQ56
DDR_B_DQ57
DDR_B_DQ58
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
DDR_B_DQ62
DDR_B_DQ63
AM30
AN30
AN27
AM27
AK30
AM31
AL28
AK27
AM24
AN24
AN21
AM21
AL25
AK24
AL22
AK21
AK18
AM18
AN15
AM15
AL19
AM19
AM16
AL16
AK12
AM12
AN9
AM9
AL13
AM13
AM10
AL10
AJ3
AJ4
AF1
AF4
AK3
AK2
AG3
AF3
AC3
AC1
Y3
Y4
AD2
AD3
AA2
Y1
T4
T1
N1
N2
U3
U1
P3
P4
K2
K1
F2
E1
L1
K4
G1
G2
AK29
AL29
AK23
AL23
AN18
AN17
AN12
AN11
AJ1
AH1
AB2
AB1
T2
R3
J3
J2
AM6
AN6
DDRB_DQ0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ3
DDRB_DQ4
DDRB_DQ5
DDRB_DQ6
DDRB_DQ7
DDRB_DQ8
DDRB_DQ9
DDRB_DQ10
DDRB_DQ11
DDRB_DQ12
DDRB_DQ13
DDRB_DQ14
DDRB_DQ15
DDRB_DQ16
DDRB_DQ17
DDRB_DQ18
DDRB_DQ19
DDRB_DQ20
DDRB_DQ21
DDRB_DQ22
DDRB_DQ23
DDRB_DQ24
DDRB_DQ25
DDRB_DQ26
DDRB_DQ27
DDRB_DQ28
DDRB_DQ29
DDRB_DQ30
DDRB_DQ31
DDRB_DQ32
DDRB_DQ33
DDRB_DQ34
DDRB_DQ35
DDRB_DQ36
DDRB_DQ37
DDRB_DQ38
DDRB_DQ39
DDRB_DQ40
DDRB_DQ41
DDRB_DQ42
DDRB_DQ43
DDRB_DQ44
DDRB_DQ45
DDRB_DQ46
DDRB_DQ47
DDRB_DQ48
DDRB_DQ49
DDRB_DQ50
DDRB_DQ51
DDRB_DQ52
DDRB_DQ53
DDRB_DQ54
DDRB_DQ55
DDRB_DQ56
DDRB_DQ57
DDRB_DQ58
DDRB_DQ59
DDRB_DQ60
DDRB_DQ61
DDRB_DQ62
DDRB_DQ63
DDRB_DQS9
DDRB_DQS10
DDRB_DQS11
DDRB_DQS12
DDRB_DQS13
DDRB_DQS14
DDRB_DQS15
DDRB_DQS16
DDRB_DQS17
2
DDRB_DQ[63..0] 29,30,31,32
DDRB_DQS[17..9] 29,30,31,32
TP64
TP66
TP68
TP70
TP72
TP74
TP76
TP78
TP80
Title
Size Document Number Rev
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH_MR DDR 266 CHB
GA-9ILDR
1
1.2
16 74Monday, December 20, 2004
1
5
4
3
2
1
MCH_66MHZ_CLK
SC103
27P/6/NPO
D D
MCH_HI_VSWING
MCH_HI_VREF
C C
B B
C52
100P/6/X
P2V5
P1V5
R164
R167
40.2/6/1
R168
40.2/6/1
43.2/6/1
SYS_PWR_GD_3_3V34,37,40,41,43,44,50
C53
0.1U/6
For Pwr on/off issue
C stepping only
close Ball L24 ASAP
HIA_STRBS36
HIA_STRBF36
MCH_66MHZ_CLK34
MCH_SMBCLK33,35,70
MCH_SMBDAT33,35,70
ITP_TCK113
ITP_TRST#8,11,13
TP81
TP82
C54
TP83
0.1U/6
TP84
TP85
TP86
TP87
TP88
TP89
TP90
TP91
HIA_STRBS
HIA_STRBF
MCH_66MHZ_CLK
MCH_HI_RCOMP
SYS_PWR_GD_3_3V
MCH_SMBCLK
MCH_SMBDAT
TP223
TP225
TP226
ITP_TCK1
ITP_TRST#
PD_DDRRES1
PD_DDRRES2
TP_RESERVED2
TP_RESERVED3
TP_RESERVED4
TP_RESERVED5
TP_RESERVED6
TP_RESERVED7
TP_RESERVED8
TP_RESERVED9
TP_RESERVED10
TP_RESERVED11
TP_RESERVED12
E31
D32
H31
L24
K25
F32
AE2
AE1
AF30
AE23
AD20
AJ19
R10
AA24
R32
L33
E3
C3
D4
F3
G5
G6
D2
J9
R9
R8
M8
U7E
HI_STBS
HI_STBF
HISWING
HICLK
HIRCOMP
HIVREF
PWRGOOD
SMBCLK
SMBDATA
TMS
TDI
TDO
TCK
TRST#
DDR_RES1
DDR_RES2
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
Lindenhurst
C51
0.1U/6
V3REF
DDRSLWCRES
DDR_CRES0
DDR_IMPCRES
PLLSEL1#
PLLSEL0#
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11
DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7
TDIOCATHODE
TDIOANODE
HI 1.5 & Miscellaneous
P3V3
H33
MCH_DDRSLWCRES
AK1
MCH_DDRCRES0
AC9
MCH_DDRIMPCRES
AL2
MCH_PLLSEL1#
A29
MCH_PLLSEL0#
C31
HI_A0
J30
HI_A1
H30
HI_A2
C32
HI_A3
G31
HI_A4
G29
HI_A5
H28
HI_A6
K26
HI_A7
J27
HI_A8
F30
HI_A9
E33
HI_A10
J29
HI_A11
G32
J8
G7
G8
H9
B2
D3
L11
D1
MCH_TDC
F33
MCH_TDA
D33
R165 1130/6/1
R166 374/6/1
TP220
TP222
1N5820
D-2
12
845 NORMAL
1150 FOR B0
1130 FOR C0
HI_A[11..0] 36
TIMING RELATIONSHIP BETWEEN DRAM AND FSB
INTERNAL P H
NO USE
PLL1
1
2
H1X2+JMP
R974
0/6
167/667
200/800
P1V5
R581 1K/6
12
PLL0
1
2
H1X2+JMP
R975
0/6
DDR266 DDR333PLLSEL[1:0]
00 01
P1V5 P1V5
R580 1K/6
1 2
0011
JUP
P1V5 P1V5
R169
78.7/6/1
R170
43.2/6/1
20MILS 20MILS
354mV
MCH_VREF_DIV
MCH_HI_VREF
20MILS
A A
R172
5
24.3/6/1
C55
0.01U/6
4
804mV
20MILS
R173
49.9/6/1
MCH_HI_VSWING
C56
0.01U/6
Title
Size Document Number Rev
3
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH HI 1.5/MISC
GA-9ILDR
17 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
SB_ADS#8,11
SB_AP#08,11
SB_AP#18,11
SB_MCERR#8,9,11
SB_BNR#8,9,11
SB_BPRI#8,11
MCH_BREQ#014
D D
C C
B B
A A
MCH_BREQ#114
SB_CPURST#8,9,11
SB_DBSY#8,11
SB_DEFER#8,11
SB_DRDY#8,11
SB_DP#[3..0]8,11
SB_DBI#[3..0]8,11
SB_D#[63..0]8,11
SB_ADS#
SB_AP#0
SB_AP#1
SB_MCERR#
SB_BNR#
SB_BPRI#
MCH_BREQ#0
MCH_BREQ#1
SB_CPURST#
SB_DBSY#
SB_DEFER#
SB_DRDY#
SB_DP#0
SB_DP#1
SB_DP#2
SB_DP#3
SB_DBI#0
SB_DBI#1
SB_DBI#2
SB_DBI#3
SB_D#0
SB_D#1
SB_D#2
SB_D#3
SB_D#4
SB_D#5
SB_D#6
SB_D#7
SB_D#8
SB_D#9
SB_D#10
SB_D#11
SB_D#12
SB_D#13
SB_D#14
SB_D#15
SB_D#16
SB_D#17
SB_D#18
SB_D#19
SB_D#20
SB_D#21
SB_D#22
SB_D#23
SB_D#24
SB_D#25
SB_D#26
SB_D#27
SB_D#28
SB_D#29
SB_D#30
SB_D#31
SB_D#32
SB_D#33
SB_D#34
SB_D#35
SB_D#36
SB_D#37
SB_D#38
SB_D#39
SB_D#40
SB_D#41
SB_D#42
SB_D#43
SB_D#44
SB_D#45
SB_D#46
SB_D#47
SB_D#48
SB_D#49
SB_D#50
SB_D#51
SB_D#52
SB_D#53
SB_D#54
SB_D#55
SB_D#56
SB_D#57
SB_D#58
SB_D#59
SB_D#60
SB_D#61
SB_D#62
SB_D#63
5
G25
H25
H24
B31
A28
D29
H27
B28
B30
C29
E28
E25
D16
E15
C18
B19
C14
A17
A19
B16
C17
B18
D17
A16
B13
A14
A13
D14
C12
B12
E18
H18
G17
K17
E16
G16
K16
H16
G14
K14
E12
C11
H13
G13
D11
G10
H10
G11
K13
H12
B10
A10
A11
U7C
B27
ADS#
AP#0
AP#1
MCERR#
BNR#
BPRI#
F24
BREQ#0
BREQ#1
J24
CPURST#
DBSY#
DEFER#
DRDY#
DP#0
DP#1
DP#2
F27
DP#3
DBI#0
DBI#1
F9
DBI#2
A5
DBI#3
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
J18
HD#17
HD#18
F17
HD#19
HD#20
HD#21
HD#22
J17
HD#23
J14
HD#24
F14
HD#25
F15
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
F11
HD#35
HD#36
HD#37
E9
HD#38
F12
HD#39
HD#40
D8
HD#41
HD#42
F8
HD#43
J12
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
C9
HD#51
B9
HD#52
C8
HD#53
B6
HD#54
B7
HD#55
E7
HD#56
B4
HD#57
A4
HD#58
B3
HD#59
D5
HD#60
C6
HD#61
D7
HD#62
C5
HD#63
Lindenhurst
System Bus Interface
HDSTBP#0
HDSTBN#0
HDSTBP#1
HDSTBN#1
HDSTBP#2
HDSTBN#2
HDSTBP#3
HDSTBN#3
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
TESTIN#
RSTIN#
HCRES0
HODTCRES
HSLWCRES
HDVREF0
HDVREF1
HACVREF
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HA#32
HA#33
HA#34
HA#35
HCLKINN
HCLKINP
HADSTB#0
HADSTB#1
RS#0
RS#1
RS#2
RSP#
BINIT#
PME#
GPE#
4
C15
B15
J15
H15
E10
D10
A7
A8
E30
D28
C30
A30
K20
J21
J23
H22
K23
L12
C2
C27
E27
F26
D13
E13
F23
K22
J20
G23
G22
H21
K19
H19
G19
E22
E21
F18
E19
F21
F20
D26
C26
A26
D22
B22
A25
B25
D25
C24
A22
B21
D23
A23
B24
A20
D19
C20
C21
D20
J11
K11
G20
C23
F29
D31
G28
J26
G26
M24
L25
SB_DSTBP#0
SB_DSTBN#0
SB_DSTBP#1
SB_DSTBN#1
SB_DSTBP#2
SB_DSTBN#2
SB_DSTBP#3
SB_DSTBN#3
SB_HIT#
SB_HITM#
SB_LOCK#
SB_TRDY#
SB_REQ#0
SB_REQ#1
SB_REQ#2
SB_REQ#3
SB_REQ#4
MCH_TESTIN#
PCIRST#
SB_ODTCRES_MCH
SB_SLWCRES_MCH
SB_HA#3
SB_HA#4
SB_HA#5
SB_HA#6
SB_HA#7
SB_HA#8
SB_HA#9
SB_HA#10
SB_HA#11
SB_HA#12
SB_HA#13
SB_HA#14
SB_HA#15
SB_HA#16
SB_HA#17
SB_HA#18
SB_HA#19
SB_HA#20
SB_HA#21
SB_HA#22
SB_HA#23
SB_HA#24
SB_HA#25
SB_HA#26
SB_HA#27
SB_HA#28
SB_HA#29
SB_HA#30
SB_HA#31
SB_HA#32
SB_HA#33
SB_HA#34
SB_HA#35
MCH_BCLK#
MCH_BCLK
SB_ADSTB#0
SB_ADSTB#1
SB_RS#0
SB_RS#1
SB_RS#2
SB_RSP#
SB_BINIT#
MCH_PME#
SB_HIT# 8,9,11
SB_HITM# 8,9,11
SB_LOCK# 8,11
SB_TRDY# 8,11
SB_REQ#[4..0] 8,11
TP92
PCIRST# 36,39,41,49,50,51,54,70
SB_HA#[35..3] 8,11
MCH_BCLK# 33
MCH_BCLK 33
SB_ADSTB#[1..0] 8,11
SB_RS#[2..0] 8,11
SB_RSP# 8,11
SB_BINIT# 8,9,11
MCH_PME# 37,39
GPE# 37,39
3
SB_DSTBP#[3..0] 8,11
SB_DSTBN#[3..0] 8,11
MCH_BREQ#0
MCH_BREQ#1
49.9 NORMAL
48.7 FOR B0
R174
48.7/6/1
R179
51/6
R180
51/6
R175
442/6/1
MCH_SB_VREF
549 NORMAL
442 FOR B0
P_VTT
2
P_VTT
R176
C58
2.2U/6
49.9/6/1
R178
90.9/6/1
MCH_HSINK1
GA-9ILDR
754mV
84.5 NORMAL
90.9 FOR B0
2
1
18 74Monday, December 20, 2004
R177
0/6
C57
220P/6
1
MCH_HSINK
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH SYS BUS
1.2
5
4
3
2
1
EXP_A_RXP[3..0]24
EXP_A_RXP[4..7]24
PXH
D D
EXP_A_RXN[3..0]24
EXP_A_RXN[4..7]24
8721B X1
EXP_B_RXP024
EXP_B_RXP424
EXP_A_RXP0
EXP_A_RXP1
EXP_A_RXP2
EXP_A_RXP3
EXP_A_RXP4
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXN0
EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3
EXP_A_RXN4
EXP_A_RXN5
EXP_A_RXN6
EXP_A_RXN7
EXP_B_RXP0
EXP_B_RXP4
8721A X1
C C
EXP X4
EXP X4
B B
EXP_B_RXN024
EXP_B_RXN424
EXP_C_RXP[3..0]23
EXP_C_RXP[7..4]22,23
EXP_C_RXN[3..0]23
EXP_C_RXN[7..4]22,23
MCH_SRC_100MHZ_CLK_N35
MCH_SRC_100MHZ_CLK_P35
EXP_B_RXN0
EXP_B_RXN4
EXP_C_RXP0
EXP_C_RXP1
EXP_C_RXP2
EXP_C_RXP3
EXP_C_RXP4
EXP_C_RXP5
EXP_C_RXP6
EXP_C_RXP7
EXP_C_RXN0
EXP_C_RXN1
EXP_C_RXN2
EXP_C_RXN3
EXP_C_RXN4
EXP_C_RXN5
EXP_C_RXN6
EXP_C_RXN7
MCH_SRC_100MHZ_CLK_N
MCH_SRC_100MHZ_CLK_P
R33
N28
R26
N25
M27
K29
P33
N29
R27
N26
M26
K28
AG33
AE32
AC30
AC31
AD29
AC25
AB26
Y25
AF33
AD32
AD30
AB31
AE29
AC24
AB25
Y24
Y28
Y30
AA30
V33
T32
R30
V27
V24
Y27
Y31
AA29
V32
T31
R29
V26
U24
R24
T23
L31
J33
L30
J32
U7D
EXP_A_RXP0
EXP_A_RXP1
EXP_A_RXP2
EXP_A_RXP3
EXP_A_RXP4
EXP_A_RXP5
EXP_A_RXP6
EXP_A_RXP7
EXP_A_RXN0
EXP_A_RXN1
EXP_A_RXN2
EXP_A_RXN3
EXP_A_RXN4
EXP_A_RXN5
EXP_A_RXN6
EXP_A_RXN7
EXP_B_RXP0
EXP_B_RXP1
EXP_B_RXP2
EXP_B_RXP3
EXP_B_RXP4
EXP_B_RXP5
EXP_B_RXP6
EXP_B_RXP7
EXP_B_RXN0
EXP_B_RXN1
EXP_B_RXN2
EXP_B_RXN3
EXP_B_RXN4
EXP_B_RXN5
EXP_B_RXN6
EXP_B_RXN7
EXP_C_RXP0
EXP_C_RXP1
EXP_C_RXP2
EXP_C_RXP3
EXP_C_RXP4
EXP_C_RXP5
EXP_C_RXP6
EXP_C_RXP7
EXP_C_RXN0
EXP_C_RXN1
EXP_C_RXN2
EXP_C_RXN3
EXP_C_RXN4
EXP_C_RXN5
EXP_C_RXN6
EXP_C_RXN7
EXP_CLKN
EXP_CLKP
Lindenhurst
EXP_A_TXP0
EXP_A_TXP1
EXP_A_TXP2
EXP_A_TXP3
EXP_A_TXP4
EXP_A_TXP5
EXP_A_TXP6
EXP_A_TXP7
EXP_A_TXN0
EXP_A_TXN1
EXP_A_TXN2
EXP_A_TXN3
EXP_A_TXN4
EXP_A_TXN5
EXP_A_TXN6
EXP_A_TXN7
EXP_B_TXP0
EXP_B_TXP1
EXP_B_TXP2
EXP_B_TXP3
PCI Express
EXP_B_TXP4
EXP_B_TXP5
EXP_B_TXP6
EXP_B_TXP7
EXP_B_TXN0
EXP_B_TXN1
EXP_B_TXN2
EXP_B_TXN3
EXP_B_TXN4
EXP_B_TXN5
EXP_B_TXN6
EXP_B_TXN7
EXP_C_TXP0
EXP_C_TXP1
EXP_C_TXP2
EXP_C_TXP3
EXP_C_TXP4
EXP_C_TXP5
EXP_C_TXP6
EXP_C_TXP7
EXP_C_TXN0
EXP_C_TXN1
EXP_C_TXN2
EXP_C_TXN3
EXP_C_TXN4
EXP_C_TXN5
EXP_C_TXN6
EXP_C_TXN7
EXP_COMP0
EXP_COMP1
EXPHPINTR#
VCCBGEXP
VSSBGEXP
P30
N31
M33
K32
P24
P27
M30
L28
P31
N32
M32
K31
P25
P28
M29
L27
AG32
AF31
AC33
AB32
AD27
AC27
AB29
AA27
AH32
AE31
AD33
AA32
AD26
AC28
AB28
AA26
W26
W28
Y33
W32
U31
V30
T29
T26
W25
W29
AA33
W31
U30
V29
T28
T25
U33
U25
E6
U27
U28
EXP_A_TXP_C0
EXP_A_TXP_C1
EXP_A_TXP_C2
EXP_A_TXP_C3
EXP_A_TXP_C4
EXP_A_TXP_C5
EXP_A_TXP_C6
EXP_A_TXP_C7
EXP_A_TXN_C0
EXP_A_TXN_C1
EXP_A_TXN_C2
EXP_A_TXN_C3
EXP_A_TXN_C4
EXP_A_TXN_C5
EXP_A_TXN_C6
EXP_A_TXN_C7
EXP_B_TXP_C0
EXP_B_TXP_C4
EXP_B_TXN_C0
EXP_B_TXN_C4
EXP_C_TXP_C0
EXP_C_TXP_C1
EXP_C_TXP_C2
EXP_C_TXP_C3
EXP_C_TXP_C4
EXP_C_TXP_C5
EXP_C_TXP_C6
EXP_C_TXP_C7
EXP_C_TXN_C0
EXP_C_TXN_C1
EXP_C_TXN_C2
EXP_C_TXN_C3
EXP_C_TXN_C4
EXP_C_TXN_C5
EXP_C_TXN_C6
EXP_C_TXN_C7
MCH_EXPCOMP
PU_EXPHPINTR#
EXP_A_TXP_C[3..0] 24
EXP_A_TXP_C[4..7] 24
EXP_A_TXN_C[3..0] 24
EXP_A_TXN_C[4..7] 24
EXP_B_TXP_C0 24
EXP_B_TXP_C4 24
EXP_B_TXN_C0 24
EXP_B_TXN_C4 24
EXP_C_TXP_C[0..3] 23,24
EXP_C_TXP_C[4..7] 23,24
EXP_C_TXN_C[0..3] 23,24
EXP_C_TXN_C[4..7] 23,24
P3V3
R181
100/6
2.5V 3% 600uA
L15 4.7UH/80mA/8
U8
LM431
A C
12
R
C182
22U/1206
12
DIFFERENTIAL PAIRS
P3V3P1V5
R184
24.9/6/1
MCH_VCCBGEXP
MCH_VSSBGEXP
C59
10U/8
R185
1K/6/X
C60
0.1U/6
MCH_VCCBGEXP
NO USE
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PCI EXPRESS
GA-9ILDR
19 74Monday, December 20, 2004
1
1.2
5
P2V5
D D
C C
P1V5
B B
A A
AN28
AN22
AN16
AN10
AN3
AL30
AL24
AL18
AL12
AJ26
AJ20
AJ14
AH3
AG28
AG22
AG16
AG10
AE24
AE18
AE12
AD7
AD1
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AB22
AB20
AB18
AB16
AB14
AB12
AB9
AB3
AA11
Y12
W11
V12
U11
R11
P12
N11
AL1
AH33
AE33
AE30
AC29
AB33
AB27
AB24
AA23
Y29
Y22
W33
W27
W23
V22
U29
R23
P29
N33
M28
K33
K30
AL6
AJ8
AF5
T12
T33
T27
T24
T22
Y5
V7
V1
T9
T3
P5
M1
K3
H5
F1
M7
5
U7F
VCC_DDR0
VCC_DDR1
VCC_DDR2
VCC_DDR3
VCC_DDR4
VCC_DDR5
VCC_DDR6
VCC_DDR7
VCC_DDR8
VCC_DDR9
VCC_DDR10
VCC_DDR11
VCC_DDR12
VCC_DDR13
VCC_DDR14
VCC_DDR15
VCC_DDR16
VCC_DDR17
VCC_DDR18
VCC_DDR19
VCC_DDR20
VCC_DDR21
VCC_DDR22
VCC_DDR23
VCC_DDR24
VCC_DDR25
VCC_DDR26
VCC_DDR27
VCC_DDR28
VCC_DDR29
VCC_DDR30
VCC_DDR31
VCC_DDR32
VCC_DDR33
VCC_DDR34
VCC_DDR35
VCC_DDR36
VCC_DDR37
VCC_DDR38
VCC_DDR39
VCC_DDR40
VCC_DDR41
VCC_DDR42
VCC_DDR43
VCC_DDR44
VCC_DDR45
VCC_DDR46
VCC_DDR47
VCC_DDR48
VCC_DDR49
VCC_DDR50
VCC_DDR51
VCC_DDR52
VCC_DDR53
VCC_DDR54
VCC_DDR55
VCC_DDR56
VCC_DDR57
VCC_DDR58
VCC_DDR59
VCC_DDR60
VCC_EXP0
VCC_EXP1
VCC_EXP2
VCC_EXP3
VCC_EXP4
VCC_EXP5
VCC_EXP6
VCC_EXP7
VCC_EXP8
VCC_EXP9
VCC_EXP10
VCC_EXP11
VCC_EXP12
VCC_EXP13
VCC_EXP14
VCC_EXP15
VCC_EXP16
VCC_EXP17
VCC_EXP18
VCC_EXP19
VCC_EXP20
VCC_EXP21
VCC_EXP22
VCC_EXP23
VCC_EXP24
Lindenhurst
VCC_CORE0
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
POWER
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_VTT0
VCC_VTT1
VCC_VTT2
VCC_VTT3
VCC_VTT4
VCC_VTT5
VCC_VTT6
VCC_VTT7
VCC_VTT8
VCC_VTT9
VCC_VTT10
VCC_VTT11
VCC_VTT12
VCC_VTT13
VCC_VTT14
VCC_VTT15
VCC_VTT16
VCC_VTT17
VCC_VTT18
VCC_VTT19
VCC_VTT20
VCC_VTT21
VCC_VTT22
VCC_VTT23
VCC_VTT24
VCC_VTT25
VCC_VTT26
VCC_VTT27
VCC_VTT28
VCCA_CORE0
VSSA_CORE1
VCCA_EXP0
VSSA_EXP1
VCCA_HI0
VSSA_HI1
VCCA_DDR
AA21
AA19
AA17
AA15
AA13
Y20
Y18
Y16
Y14
W21
W19
W17
W15
W13
V20
V18
V16
V14
U21
U19
U17
U15
T20
T18
T16
T14
R21
R19
R17
R15
R13
P18
P16
P14
N21
N19
N17
N15
N13
U13
C33
K9
M12
G33
H29
K27
L23
N23
P22
M22
A31
M20
M18
M16
M14
L21
L19
L17
L15
L13
J19
J16
J13
H26
H23
E23
E20
E17
E14
E11
E8
D30
D27
A18
A15
A12
A9
A6
A3
F6
F5
U23
V23
P20
P21
E4
P1V5
VCCA_SB
VSSA_SB
VCCA_EXP
VSSA_EXP
VCCA_HI
VSSA_HI
VCCA_DDR
P_VTT
4
4
VCCA_SB 21
VSSA_SB 21
VCCA_EXP 21
VSSA_EXP 21
VCCA_HI 21
VSSA_HI 21
VCCA_DDR 21
Y13
Y11
W30
W24
W22
W20
W18
W16
W14
W12
V31
V28
V25
V21
V19
V17
V15
V13
V11
V10
U32
AB6
AA31
AA28
AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
AA7
AB23
AB21
AB19
AB17
AB15
AB13
AN31
AN25
AN19
AN13
AN7
AM32
AM29
AM26
AM23
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL33
AL27
AL21
AL15
AL9
AL3
AK31
AK28
AK25
AK22
AK19
AK16
AG13
E24
3
U7G
VSS0
VSS1
Y8
VSS2
Y2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
W9
VSS12
W6
VSS13
W3
VSS14
VSS15
V4
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
Lindenhurst
GND
3
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
AF29
AF26
AF23
AF20
AF17
AF14
AF11
AF8
AF2
AE27
AE21
AE15
AE9
AE6
AE3
AD31
AD28
AD25
AD22
AD19
AD16
AD13
AD10
AD4
AC32
AC26
AC22
AC20
AC18
AC16
AC14
AC12
AC8
AC5
AC2
AB30
AK7
AK4
AJ32
AJ29
AJ17
AJ11
AJ5
AJ23
AJ2
AH30
AH27
AH24
AH21
AH18
AH15
AH12
AH9
AG31
AG25
AG19
AG1
AF32
AA4
AA1
Y32
Y26
Y23
Y21
Y19
Y17
Y15
AB11
AK10
AK13
U26
U22
U20
2
U7H
M13
VSS148
M11
VSS149
M10
VSS150
M4
VSS151
L32
VSS152
L29
VSS153
L26
VSS154
L22
VSS155
L20
VSS156
L18
VSS157
L16
VSS158
L14
VSS159
L8
VSS160
L5
VSS161
L2
VSS162
K24
VSS163
K21
VSS164
K18
VSS165
K15
VSS166
K12
VSS167
K6
VSS168
J31
VSS169
J28
VSS170
J25
VSS171
J22
VSS172
J10
VSS173
J7
VSS174
J4
VSS175
J1
VSS176
H32
VSS177
H20
VSS178
H17
VSS179
H14
VSS180
H11
VSS181
AG4
VSS182
AG7
VSS183
U18
VSS184
U16
VSS185
U14
VSS186
U12
VSS187
U8
VSS188
U5
VSS189
U2
VSS190
T30
VSS191
T21
VSS192
T19
VSS193
T17
VSS194
T15
VSS195
T11
VSS196
T13
VSS197
T6
VSS198
R31
VSS199
R28
VSS200
R25
VSS201
R22
VSS202
R20
VSS203
R18
VSS204
R16
VSS205
R14
VSS206
R12
VSS207
R7
VSS208
R4
VSS209
R1
VSS210
P32
VSS211
P26
VSS212
P23
VSS213
P19
VSS214
P17
VSS215
P15
VSS216
N22
VSS217
N20
VSS218
N18
VSS219
N16
VSS220
N14
VSS221
Lindenhurst
Title
Size Document Number Rev
2
Date: Sheet of
F16
VSS222
F13
VSS223
F10
VSS224
F7
VSS225
F4
VSS226
H8
VSS227
H2
VSS228
G30
VSS229
G27
VSS230
G21
VSS231
G18
VSS232
G15
VSS233
G12
VSS234
G9
VSS235
G3
VSS236
F31
VSS237
F28
VSS238
G24
VSS239
F25
VSS240
F22
VSS241
F19
VSS242
N3
VSS243
GND
M31
VSS244
M25
VSS245
M23
VSS246
M21
VSS247
M19
VSS248
M17
VSS249
M15
VSS250
N6
VSS251
E32
VSS252
E29
VSS253
E26
VSS254
E5
VSS255
E2
VSS256
D24
VSS257
D21
VSS258
D18
VSS259
D15
VSS260
D12
VSS261
D9
VSS262
D6
VSS263
B32
VSS264
C28
VSS265
C25
VSS266
C22
VSS267
C19
VSS268
C16
VSS269
C13
VSS270
C10
VSS271
C7
VSS272
C4
VSS273
C1
VSS274
B29
VSS275
B26
VSS276
B23
VSS277
B20
VSS278
B14
VSS279
B11
VSS280
B8
VSS281
B5
VSS282
A27
VSS283
A24
VSS284
A21
VSS285
P13
VSS286
P11
VSS287
P8
VSS288
P2
VSS289
N30
VSS290
N27
VSS291
N24
VSS292
N12
VSS293
N9
VSS294
B17
VSS295
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH PWR/GND
GA-9ILDR
1
1.2
20 74Monday, December 20, 2004
1
5
P1V5
SC1
0.1U/6
0.1U/6
D D
SC13
SC12
0.1U/6
0.1U/6
SC24
SC23
0.01U/6
0.01U/6
SC129
SC131
0.1U/6
C68
0.1U/6
0.1U/6
C69
0.1U/6
C C
P1V5
0.1U/6
SC14
0.1U/6
SC127
0.1U/6
SC132
0.1U/6
C70
0.1U/6
SC4
0.1U/6
SC15
0.1U/6
SC26
0.01U/6
SC130
0.1U/6
C1
0.1U/6
SC3
SC2
SC5
0.1U/6
SC16
0.1U/6
SC27
0.01U/6
C2
0.1U/6
SC6
0.1U/6
SC17
0.1U/6
SC28
0.01U/6
C73
0.01U/6
SC7
0.1U/6
SC18
0.1U/6
SC29
0.01U/6
C74
0.01U/6
SC124
0.1U/6
SC19
0.1U/6
SC30
0.01U/6
C3
0.1U/6
4
VCCA_HI
VCCA_EXP
VCCA_DDR
SC125
0.1U/6
SC10
0.1U/6
SC11
0.1U/6
VCCA_SB
PLACE COMPONENTS:
GROUP ASSOCIATE COMPONENTS
TOGHTER AND AS PHYSICALLY
PIN AS POSSIBLE
SC21
0.1U/6
SC22
0.1U/6
MIN TRACE WIDTH:
SC126
0.01U/6
AS WIDE AS POSSIBLE
>= 25 MILS
SC31
0.01U/6
SC128
0.1U/6
SC33
0.01U/6
MIN TRACE SPACING:
>= 10 MILS
MAX LENGTH
>=1.2(BOARD+BREAKOUT)
ROUTE
DIFFERENTIAL PAIRS
C77
C76
0.01U/6
0.01U/6
3
MCH VCCA
P1V5
P1V5
P1V5
P1V5
R186
VCCA_HI_R_N
1/6/1
3% 31.8mA
R187
VCCA_EXP_R_N
1/6/1
3% 30.9mA
R188
VCCA_DDR_R_N
1/6/1
3% 28.9mA
R189
VCCA_SB_R_N
1/6/1
3% 28.9mA
2
L5 4.7UH/80mA/8
L6 4.7UH/80mA/8
12
C63
10U/8
L7 4.7UH/80mA/8
L8 4.7UH/80mA/8
1
VCCA_HI
12
C61
C62
0.1U/6
10U/8
12
C64
10U/8
12
C66
10U/8
12
C78
10U/8
C65
0.1U/6
C67
0.1U/6
C79
0.1U/6
VSSA_HI
VCCA_EXP
VSSA_EXP
VCCA_DDR
VSSA_SB
VCCA_SB
VSSA_SB
VCCA_HI 20
VSSA_HI 20
VCCA_EXP 20
VSSA_EXP 20
VCCA_DDR 20
VSSA_SB 20
VCCA_SB 20
VSSA_SB 20
C81
C82
C80
0.1U/6
P2V5
0.1U/6
SC133
0.1U/6
C104
0.1U/6
SC134
0.1U/6
C105
0.1U/6
SC135
0.1U/6
C106
0.1U/6
5
B B
A A
0.1U/6
C4
0.01U/6
SC136
0.1U/6
C107
0.1U/6
C94
0.1U/6
C108
0.1U/6
C5
0.01U/6
C86
0.1U/6
C95
0.1U/6
C109
0.1U/6
C96
0.1U/6
C110
0.1U/6
C97
0.1U/6
C111
0.1U/6
P_VTT
12
+
12
+
EC3
100U/1210
EC5
100U/1210
C99
C98
0.1U/6
0.1U/6
C113
C112
0.1U/6
0.1U/6
4
12
+
12
+
EC4
100U/1210
EC6
100U/1210
12
12
C100
C101
C102
0.4 CH
3
100U/1210
100U/1210
0.1U/6
2
C103
2.2U/6
Title
Size Document Number Rev
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
MCH DECOUPING
GA-9ILDR
21 74Monday, December 20, 2004
1
1.2
5
4
3
2
1
P3V3_STBY
P3V3P3V3_STBY
PCIE-3
R190
D D
R192 0/6/X
R193 0/6/X
PCI_SMBCLK
PCI_SMBDAT
WAKE#23,37,48,54,55
EXP_C_TXP[7..4]24
C C
EXP_C_TXN[7..4]24
B B
PCI_SMBCLK
PCI_SMBDAT
EXP_C_TXP[7..4]
EXP_C_TXN[7..4]
WAKE#
5.1K/6
R191
5.1K/6
PCI_S4_SMBCLK_R
PCI_S4_SMBDAT_R
EXP_C_TXP4
EXP_C_TXN4
EXP_C_TXP5
EXP_C_TXN5
EXP_C_TXP6
EXP_C_TXN6
EXP_C_TXP7
EXP_C_TXN7
P12V
PCI_EXP_8PORT
B1
12V_2
B2
12V_3
B3
RSVD3
B4
GND18
B5
SMCLK
B6
SMDATA
B7
GND19
B8
3.3V_2
B9
JTAG1
B10
3.3VAUX
B11
WAKE_N
B12
RSVD4
B13
GND20
B14
HOSP0+
B15
HOSP0-
B16
GND21
B17
PRSNT2_N
B18
GND22
B19
HOSP1+
B20
HOSP1-
B21
GND23
B22
GND24
B23
HOSP2+
B24
HOSP2-
B25
GND25
B26
GND26
B27
HOSP3+
B28
HOSP3-
B29
GND27
B30
RSVD5
B31
PRSNE2_N
B32
GND28
B33
HOSP4+
B34
HOSP4-
B35
GND29
B36
GND30
B37
HOSP5+
B38
HOSP5-
B39
GND31
B40
GND32
B41
HOSP6+
B42
HOSP6-
B43
GND33
B44
GND34
B45
HOSP7+
B46
HOSP7-
B47
GND35
B48
PRSNT2_N
B49
GND36
PCI EXPRESS 98PIN
PRSNT1_N
12V_0
12V_1
GND0
JTAG2
JTAG3
JTAG4
JTAG5
3.3V_0
3.3V_1
PWRGD
GND1
REFCLK+
REFCLK-
GND2
HSIP0+
HSIP0-
GND3
RSVD0
GND4
HSIP1+
HSIP1-
GND5
GND6
HSIP2+
HSIP2-
GND7
GND8
HSIP3+
HSIP3-
GND9
RSVD1
RSVD2
GND10
HISP4+
HISP4GND11
GND12
HISP5+
HISP5GND13
GND14
HISP6+
HISP6GND15
GND16
HISP7+
HISP7GND17
P12V P3V3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
EXP_SLOT4_100MHZ_CLK_P
A13
EXP_SLOT4_100MHZ_CLK_N
A14
A15
EXP_C_RXP4_1
A16
EXP_C_RXN4_1
A17
A18
A19
A20
EXP_C_RXP5_1
A21
EXP_C_RXN5_1
A22
A23
A24
EXP_C_RXP6_1
A25
EXP_C_RXN6_1
A26
A27
A28
EXP_C_RXP7_1
A29
EXP_C_RXN7_1
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
R1500
0/6/X
R1501
0/6
R447 0/4
R448 0/4
SR307 0/4
SR304 0/4
SR303 0/4
SR302 0/4
SR301 0/4
SR300 0/4
PCIRST_BUFF#1 23,50,60,61,72
SYS_PWR_GD_BUFF 23,37,50
EXP_SLOT4_100MHZ_CLK_P 35
EXP_SLOT4_100MHZ_CLK_N 35
EXP_C_RXP4
EXP_C_RXN4
EXP_C_RXP5
EXP_C_RXN5
EXP_C_RXP6
EXP_C_RXN6
EXP_C_RXP7
EXP_C_RXN7
P3V3_STBY
C118
100U/1210
C114
0.1U/6
PCI EXPRESS SLOT4
EXP_C_RXN[7..4] 19,23
EXP_C_RXP[7..4] 19,23
P12V
C115
C116
0.1U/6
C117
0.1U/6
C120
0.1U/6
C121
0.1U/6
0.1U/6
C119
1000P/6
EC7
+
220U/16V/6X11
P3V3
C122
0.1U/6
12
C123
470U/6.3V/6.3X11
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
GIGA-BYTE TECHNOLOGY CO., LTD.
PCI EXPRESS CONN X4
GA-9ILDR
22 74Monday, December 20, 2004
1
1.2
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